x86, 32-bit: trim memory not covered by wb mtrrs
[deliverable/linux.git] / arch / x86 / kernel / ds.c
CommitLineData
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1/*
2 * Debug Store support
3 *
4 * This provides a low-level interface to the hardware's Debug Store
5 * feature that is used for last branch recording (LBR) and
6 * precise-event based sampling (PEBS).
7 *
8 * Different architectures use a different DS layout/pointer size.
9 * The below functions therefore work on a void*.
10 *
11 *
12 * Since there is no user for PEBS, yet, only LBR (or branch
13 * trace store, BTS) is supported.
14 *
15 *
16 * Copyright (C) 2007 Intel Corporation.
17 * Markus Metzger <markus.t.metzger@intel.com>, Dec 2007
18 */
19
20#include <asm/ds.h>
21
22#include <linux/errno.h>
23#include <linux/string.h>
24#include <linux/slab.h>
25
26
27/*
28 * Debug Store (DS) save area configuration (see Intel64 and IA32
29 * Architectures Software Developer's Manual, section 18.5)
30 *
31 * The DS configuration consists of the following fields; different
32 * architetures vary in the size of those fields.
33 * - double-word aligned base linear address of the BTS buffer
34 * - write pointer into the BTS buffer
35 * - end linear address of the BTS buffer (one byte beyond the end of
36 * the buffer)
37 * - interrupt pointer into BTS buffer
38 * (interrupt occurs when write pointer passes interrupt pointer)
39 * - double-word aligned base linear address of the PEBS buffer
40 * - write pointer into the PEBS buffer
41 * - end linear address of the PEBS buffer (one byte beyond the end of
42 * the buffer)
43 * - interrupt pointer into PEBS buffer
44 * (interrupt occurs when write pointer passes interrupt pointer)
45 * - value to which counter is reset following counter overflow
46 *
47 * On later architectures, the last branch recording hardware uses
48 * 64bit pointers even in 32bit mode.
49 *
50 *
51 * Branch Trace Store (BTS) records store information about control
52 * flow changes. They at least provide the following information:
53 * - source linear address
54 * - destination linear address
55 *
56 * Netburst supported a predicated bit that had been dropped in later
57 * architectures. We do not suppor it.
58 *
59 *
60 * In order to abstract from the actual DS and BTS layout, we describe
61 * the access to the relevant fields.
62 * Thanks to Andi Kleen for proposing this design.
63 *
64 * The implementation, however, is not as general as it might seem. In
65 * order to stay somewhat simple and efficient, we assume an
66 * underlying unsigned type (mostly a pointer type) and we expect the
67 * field to be at least as big as that type.
68 */
69
70/*
71 * A special from_ip address to indicate that the BTS record is an
72 * info record that needs to be interpreted or skipped.
73 */
74#define BTS_ESCAPE_ADDRESS (-1)
75
76/*
77 * A field access descriptor
78 */
79struct access_desc {
80 unsigned char offset;
81 unsigned char size;
82};
83
84/*
85 * The configuration for a particular DS/BTS hardware implementation.
86 */
87struct ds_configuration {
88 /* the DS configuration */
89 unsigned char sizeof_ds;
90 struct access_desc bts_buffer_base;
91 struct access_desc bts_index;
92 struct access_desc bts_absolute_maximum;
93 struct access_desc bts_interrupt_threshold;
94 /* the BTS configuration */
95 unsigned char sizeof_bts;
96 struct access_desc from_ip;
97 struct access_desc to_ip;
98 /* BTS variants used to store additional information like
99 timestamps */
100 struct access_desc info_type;
101 struct access_desc info_data;
102 unsigned long debugctl_mask;
103};
104
105/*
106 * The global configuration used by the below accessor functions
107 */
108static struct ds_configuration ds_cfg;
109
110/*
111 * Accessor functions for some DS and BTS fields using the above
112 * global ptrace_bts_cfg.
113 */
e6ae5d95 114static inline unsigned long get_bts_buffer_base(char *base)
eee3af4a 115{
e6ae5d95 116 return *(unsigned long *)(base + ds_cfg.bts_buffer_base.offset);
eee3af4a 117}
e6ae5d95 118static inline void set_bts_buffer_base(char *base, unsigned long value)
eee3af4a 119{
e6ae5d95 120 (*(unsigned long *)(base + ds_cfg.bts_buffer_base.offset)) = value;
eee3af4a 121}
e6ae5d95 122static inline unsigned long get_bts_index(char *base)
eee3af4a 123{
e6ae5d95 124 return *(unsigned long *)(base + ds_cfg.bts_index.offset);
eee3af4a 125}
e6ae5d95 126static inline void set_bts_index(char *base, unsigned long value)
eee3af4a 127{
e6ae5d95 128 (*(unsigned long *)(base + ds_cfg.bts_index.offset)) = value;
eee3af4a 129}
e6ae5d95 130static inline unsigned long get_bts_absolute_maximum(char *base)
eee3af4a 131{
e6ae5d95 132 return *(unsigned long *)(base + ds_cfg.bts_absolute_maximum.offset);
eee3af4a 133}
e6ae5d95 134static inline void set_bts_absolute_maximum(char *base, unsigned long value)
eee3af4a 135{
e6ae5d95 136 (*(unsigned long *)(base + ds_cfg.bts_absolute_maximum.offset)) = value;
eee3af4a 137}
e6ae5d95 138static inline unsigned long get_bts_interrupt_threshold(char *base)
eee3af4a 139{
e6ae5d95 140 return *(unsigned long *)(base + ds_cfg.bts_interrupt_threshold.offset);
eee3af4a 141}
e6ae5d95 142static inline void set_bts_interrupt_threshold(char *base, unsigned long value)
eee3af4a 143{
e6ae5d95 144 (*(unsigned long *)(base + ds_cfg.bts_interrupt_threshold.offset)) = value;
eee3af4a 145}
e6ae5d95 146static inline unsigned long get_from_ip(char *base)
eee3af4a 147{
e6ae5d95 148 return *(unsigned long *)(base + ds_cfg.from_ip.offset);
eee3af4a 149}
e6ae5d95 150static inline void set_from_ip(char *base, unsigned long value)
eee3af4a 151{
e6ae5d95 152 (*(unsigned long *)(base + ds_cfg.from_ip.offset)) = value;
eee3af4a 153}
e6ae5d95 154static inline unsigned long get_to_ip(char *base)
eee3af4a 155{
e6ae5d95 156 return *(unsigned long *)(base + ds_cfg.to_ip.offset);
eee3af4a 157}
e6ae5d95 158static inline void set_to_ip(char *base, unsigned long value)
eee3af4a 159{
e6ae5d95 160 (*(unsigned long *)(base + ds_cfg.to_ip.offset)) = value;
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161}
162static inline unsigned char get_info_type(char *base)
163{
164 return *(unsigned char *)(base + ds_cfg.info_type.offset);
165}
166static inline void set_info_type(char *base, unsigned char value)
167{
168 (*(unsigned char *)(base + ds_cfg.info_type.offset)) = value;
169}
3c68904f 170static inline unsigned long get_info_data(char *base)
eee3af4a 171{
3c68904f 172 return *(unsigned long *)(base + ds_cfg.info_data.offset);
eee3af4a 173}
3c68904f 174static inline void set_info_data(char *base, unsigned long value)
eee3af4a 175{
3c68904f 176 (*(unsigned long *)(base + ds_cfg.info_data.offset)) = value;
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177}
178
179
a95d67f8 180int ds_allocate(void **dsp, size_t bts_size_in_bytes)
eee3af4a 181{
a95d67f8 182 size_t bts_size_in_records;
e6ae5d95 183 unsigned long bts;
a95d67f8 184 void *ds;
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185
186 if (!ds_cfg.sizeof_ds || !ds_cfg.sizeof_bts)
187 return -EOPNOTSUPP;
188
a95d67f8 189 if (bts_size_in_bytes < 0)
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190 return -EINVAL;
191
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192 bts_size_in_records =
193 bts_size_in_bytes / ds_cfg.sizeof_bts;
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194 bts_size_in_bytes =
195 bts_size_in_records * ds_cfg.sizeof_bts;
196
197 if (bts_size_in_bytes <= 0)
198 return -EINVAL;
199
e6ae5d95 200 bts = (unsigned long)kzalloc(bts_size_in_bytes, GFP_KERNEL);
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201
202 if (!bts)
203 return -ENOMEM;
204
205 ds = kzalloc(ds_cfg.sizeof_ds, GFP_KERNEL);
206
207 if (!ds) {
e6ae5d95 208 kfree((void *)bts);
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209 return -ENOMEM;
210 }
211
212 set_bts_buffer_base(ds, bts);
213 set_bts_index(ds, bts);
214 set_bts_absolute_maximum(ds, bts + bts_size_in_bytes);
215 set_bts_interrupt_threshold(ds, bts + bts_size_in_bytes + 1);
216
217 *dsp = ds;
218 return 0;
219}
220
221int ds_free(void **dsp)
222{
223 if (*dsp)
e6ae5d95 224 kfree((void *)get_bts_buffer_base(*dsp));
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225 kfree(*dsp);
226 *dsp = 0;
227
228 return 0;
229}
230
231int ds_get_bts_size(void *ds)
232{
e6ae5d95 233 int size_in_bytes;
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234
235 if (!ds_cfg.sizeof_ds || !ds_cfg.sizeof_bts)
236 return -EOPNOTSUPP;
237
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238 if (!ds)
239 return 0;
240
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241 size_in_bytes =
242 get_bts_absolute_maximum(ds) -
243 get_bts_buffer_base(ds);
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244 return size_in_bytes;
245}
246
247int ds_get_bts_end(void *ds)
248{
e6ae5d95 249 int size_in_bytes = ds_get_bts_size(ds);
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250
251 if (size_in_bytes <= 0)
252 return size_in_bytes;
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253
254 return size_in_bytes / ds_cfg.sizeof_bts;
255}
256
257int ds_get_bts_index(void *ds)
258{
e6ae5d95 259 int index_offset_in_bytes;
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260
261 if (!ds_cfg.sizeof_ds || !ds_cfg.sizeof_bts)
262 return -EOPNOTSUPP;
263
264 index_offset_in_bytes =
265 get_bts_index(ds) -
266 get_bts_buffer_base(ds);
267
268 return index_offset_in_bytes / ds_cfg.sizeof_bts;
269}
270
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271int ds_set_overflow(void *ds, int method)
272{
273 switch (method) {
274 case DS_O_SIGNAL:
275 return -EOPNOTSUPP;
276 case DS_O_WRAP:
277 return 0;
278 default:
279 return -EINVAL;
280 }
281}
282
283int ds_get_overflow(void *ds)
284{
285 return DS_O_WRAP;
286}
287
288int ds_clear(void *ds)
289{
290 int bts_size = ds_get_bts_size(ds);
e6ae5d95 291 unsigned long bts_base;
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292
293 if (bts_size <= 0)
294 return bts_size;
295
296 bts_base = get_bts_buffer_base(ds);
e6ae5d95 297 memset((void *)bts_base, 0, bts_size);
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298
299 set_bts_index(ds, bts_base);
300 return 0;
301}
302
e6ae5d95 303int ds_read_bts(void *ds, int index, struct bts_struct *out)
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304{
305 void *bts;
306
307 if (!ds_cfg.sizeof_ds || !ds_cfg.sizeof_bts)
308 return -EOPNOTSUPP;
309
310 if (index < 0)
311 return -EINVAL;
312
313 if (index >= ds_get_bts_size(ds))
314 return -EINVAL;
315
e6ae5d95 316 bts = (void *)(get_bts_buffer_base(ds) + (index * ds_cfg.sizeof_bts));
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317
318 memset(out, 0, sizeof(*out));
319 if (get_from_ip(bts) == BTS_ESCAPE_ADDRESS) {
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320 out->qualifier = get_info_type(bts);
321 out->variant.jiffies = get_info_data(bts);
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322 } else {
323 out->qualifier = BTS_BRANCH;
324 out->variant.lbr.from_ip = get_from_ip(bts);
325 out->variant.lbr.to_ip = get_to_ip(bts);
326 }
327
e6ae5d95 328 return sizeof(*out);;
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329}
330
331int ds_write_bts(void *ds, const struct bts_struct *in)
332{
e6ae5d95 333 unsigned long bts;
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334
335 if (!ds_cfg.sizeof_ds || !ds_cfg.sizeof_bts)
336 return -EOPNOTSUPP;
337
338 if (ds_get_bts_size(ds) <= 0)
339 return -ENXIO;
340
341 bts = get_bts_index(ds);
342
e6ae5d95 343 memset((void *)bts, 0, ds_cfg.sizeof_bts);
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344 switch (in->qualifier) {
345 case BTS_INVALID:
346 break;
347
348 case BTS_BRANCH:
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349 set_from_ip((void *)bts, in->variant.lbr.from_ip);
350 set_to_ip((void *)bts, in->variant.lbr.to_ip);
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351 break;
352
353 case BTS_TASK_ARRIVES:
354 case BTS_TASK_DEPARTS:
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355 set_from_ip((void *)bts, BTS_ESCAPE_ADDRESS);
356 set_info_type((void *)bts, in->qualifier);
357 set_info_data((void *)bts, in->variant.jiffies);
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358 break;
359
360 default:
361 return -EINVAL;
362 }
363
e6ae5d95 364 bts = bts + ds_cfg.sizeof_bts;
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365 if (bts >= get_bts_absolute_maximum(ds))
366 bts = get_bts_buffer_base(ds);
367 set_bts_index(ds, bts);
368
e6ae5d95 369 return ds_cfg.sizeof_bts;
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370}
371
372unsigned long ds_debugctl_mask(void)
373{
374 return ds_cfg.debugctl_mask;
375}
376
377#ifdef __i386__
378static const struct ds_configuration ds_cfg_netburst = {
379 .sizeof_ds = 9 * 4,
380 .bts_buffer_base = { 0, 4 },
381 .bts_index = { 4, 4 },
382 .bts_absolute_maximum = { 8, 4 },
383 .bts_interrupt_threshold = { 12, 4 },
384 .sizeof_bts = 3 * 4,
385 .from_ip = { 0, 4 },
386 .to_ip = { 4, 4 },
387 .info_type = { 4, 1 },
3c68904f 388 .info_data = { 8, 4 },
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389 .debugctl_mask = (1<<2)|(1<<3)
390};
391
392static const struct ds_configuration ds_cfg_pentium_m = {
393 .sizeof_ds = 9 * 4,
394 .bts_buffer_base = { 0, 4 },
395 .bts_index = { 4, 4 },
396 .bts_absolute_maximum = { 8, 4 },
397 .bts_interrupt_threshold = { 12, 4 },
398 .sizeof_bts = 3 * 4,
399 .from_ip = { 0, 4 },
400 .to_ip = { 4, 4 },
401 .info_type = { 4, 1 },
3c68904f 402 .info_data = { 8, 4 },
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403 .debugctl_mask = (1<<6)|(1<<7)
404};
405#endif /* _i386_ */
406
407static const struct ds_configuration ds_cfg_core2 = {
408 .sizeof_ds = 9 * 8,
409 .bts_buffer_base = { 0, 8 },
410 .bts_index = { 8, 8 },
411 .bts_absolute_maximum = { 16, 8 },
412 .bts_interrupt_threshold = { 24, 8 },
413 .sizeof_bts = 3 * 8,
414 .from_ip = { 0, 8 },
415 .to_ip = { 8, 8 },
416 .info_type = { 8, 1 },
3c68904f 417 .info_data = { 16, 8 },
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418 .debugctl_mask = (1<<6)|(1<<7)|(1<<9)
419};
420
421static inline void
422ds_configure(const struct ds_configuration *cfg)
423{
424 ds_cfg = *cfg;
425}
426
427void __cpuinit ds_init_intel(struct cpuinfo_x86 *c)
428{
429 switch (c->x86) {
430 case 0x6:
431 switch (c->x86_model) {
432#ifdef __i386__
433 case 0xD:
434 case 0xE: /* Pentium M */
435 ds_configure(&ds_cfg_pentium_m);
436 break;
437#endif /* _i386_ */
438 case 0xF: /* Core2 */
439 ds_configure(&ds_cfg_core2);
440 break;
441 default:
442 /* sorry, don't know about them */
443 break;
444 }
445 break;
446 case 0xF:
447 switch (c->x86_model) {
448#ifdef __i386__
449 case 0x0:
450 case 0x1:
451 case 0x2: /* Netburst */
452 ds_configure(&ds_cfg_netburst);
453 break;
454#endif /* _i386_ */
455 default:
456 /* sorry, don't know about them */
457 break;
458 }
459 break;
460 default:
461 /* sorry, don't know about them */
462 break;
463 }
464}
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