Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * linux/arch/x86_64/entry.S | |
3 | * | |
4 | * Copyright (C) 1991, 1992 Linus Torvalds | |
5 | * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs | |
6 | * Copyright (C) 2000 Pavel Machek <pavel@suse.cz> | |
1da177e4 LT |
7 | */ |
8 | ||
9 | /* | |
10 | * entry.S contains the system-call and fault low-level handling routines. | |
11 | * | |
8b4777a4 AL |
12 | * Some of this is documented in Documentation/x86/entry_64.txt |
13 | * | |
1da177e4 LT |
14 | * NOTE: This code handles signal-recognition, which happens every time |
15 | * after an interrupt and after each system call. | |
0bd7b798 AH |
16 | * |
17 | * Normal syscalls and interrupts don't save a full stack frame, this is | |
1da177e4 | 18 | * only done for syscall tracing, signals or fork/exec et.al. |
0bd7b798 AH |
19 | * |
20 | * A note on terminology: | |
21 | * - top of stack: Architecture defined interrupt frame from SS to RIP | |
22 | * at the top of the kernel process stack. | |
0d2eb44f | 23 | * - partial stack frame: partially saved registers up to R11. |
0bd7b798 | 24 | * - full stack frame: Like partial stack frame, but all register saved. |
2e91a17b AK |
25 | * |
26 | * Some macro usage: | |
27 | * - CFI macros are used to generate dwarf2 unwind information for better | |
28 | * backtraces. They don't change any code. | |
29 | * - SAVE_ALL/RESTORE_ALL - Save/restore all registers | |
30 | * - SAVE_ARGS/RESTORE_ARGS - Save/restore registers that C functions modify. | |
31 | * There are unfortunately lots of special cases where some registers | |
32 | * not touched. The macro is a big mess that should be cleaned up. | |
33 | * - SAVE_REST/RESTORE_REST - Handle the registers not saved by SAVE_ARGS. | |
34 | * Gives a full stack frame. | |
35 | * - ENTRY/END Define functions in the symbol table. | |
36 | * - FIXUP_TOP_OF_STACK/RESTORE_TOP_OF_STACK - Fix up the hardware stack | |
37 | * frame that is otherwise undefined after a SYSCALL | |
38 | * - TRACE_IRQ_* - Trace hard interrupt state for lock debugging. | |
cb5dd2c5 | 39 | * - idtentry - Define exception entry points. |
1da177e4 LT |
40 | */ |
41 | ||
1da177e4 LT |
42 | #include <linux/linkage.h> |
43 | #include <asm/segment.h> | |
1da177e4 LT |
44 | #include <asm/cache.h> |
45 | #include <asm/errno.h> | |
46 | #include <asm/dwarf2.h> | |
47 | #include <asm/calling.h> | |
e2d5df93 | 48 | #include <asm/asm-offsets.h> |
1da177e4 LT |
49 | #include <asm/msr.h> |
50 | #include <asm/unistd.h> | |
51 | #include <asm/thread_info.h> | |
52 | #include <asm/hw_irq.h> | |
0341c14d | 53 | #include <asm/page_types.h> |
2601e64d | 54 | #include <asm/irqflags.h> |
72fe4858 | 55 | #include <asm/paravirt.h> |
9939ddaf | 56 | #include <asm/percpu.h> |
d7abc0fa | 57 | #include <asm/asm.h> |
91d1aa43 | 58 | #include <asm/context_tracking.h> |
63bcff2a | 59 | #include <asm/smap.h> |
3891a04a | 60 | #include <asm/pgtable_types.h> |
d7e7528b | 61 | #include <linux/err.h> |
1da177e4 | 62 | |
86a1c34a RM |
63 | /* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this. */ |
64 | #include <linux/elf-em.h> | |
65 | #define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE) | |
66 | #define __AUDIT_ARCH_64BIT 0x80000000 | |
67 | #define __AUDIT_ARCH_LE 0x40000000 | |
68 | ||
1da177e4 | 69 | .code64 |
ea714547 JO |
70 | .section .entry.text, "ax" |
71 | ||
16444a8a | 72 | |
dc37db4d | 73 | #ifndef CONFIG_PREEMPT |
1da177e4 | 74 | #define retint_kernel retint_restore_args |
0bd7b798 | 75 | #endif |
2601e64d | 76 | |
72fe4858 | 77 | #ifdef CONFIG_PARAVIRT |
2be29982 | 78 | ENTRY(native_usergs_sysret64) |
72fe4858 GOC |
79 | swapgs |
80 | sysretq | |
b3baaa13 | 81 | ENDPROC(native_usergs_sysret64) |
72fe4858 GOC |
82 | #endif /* CONFIG_PARAVIRT */ |
83 | ||
2601e64d IM |
84 | |
85 | .macro TRACE_IRQS_IRETQ offset=ARGOFFSET | |
86 | #ifdef CONFIG_TRACE_IRQFLAGS | |
87 | bt $9,EFLAGS-\offset(%rsp) /* interrupts off? */ | |
88 | jnc 1f | |
89 | TRACE_IRQS_ON | |
90 | 1: | |
91 | #endif | |
92 | .endm | |
93 | ||
5963e317 SR |
94 | /* |
95 | * When dynamic function tracer is enabled it will add a breakpoint | |
96 | * to all locations that it is about to modify, sync CPUs, update | |
97 | * all the code, sync CPUs, then remove the breakpoints. In this time | |
98 | * if lockdep is enabled, it might jump back into the debug handler | |
99 | * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF). | |
100 | * | |
101 | * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to | |
102 | * make sure the stack pointer does not get reset back to the top | |
103 | * of the debug stack, and instead just reuses the current stack. | |
104 | */ | |
105 | #if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS) | |
106 | ||
107 | .macro TRACE_IRQS_OFF_DEBUG | |
108 | call debug_stack_set_zero | |
109 | TRACE_IRQS_OFF | |
110 | call debug_stack_reset | |
111 | .endm | |
112 | ||
113 | .macro TRACE_IRQS_ON_DEBUG | |
114 | call debug_stack_set_zero | |
115 | TRACE_IRQS_ON | |
116 | call debug_stack_reset | |
117 | .endm | |
118 | ||
119 | .macro TRACE_IRQS_IRETQ_DEBUG offset=ARGOFFSET | |
120 | bt $9,EFLAGS-\offset(%rsp) /* interrupts off? */ | |
121 | jnc 1f | |
122 | TRACE_IRQS_ON_DEBUG | |
123 | 1: | |
124 | .endm | |
125 | ||
126 | #else | |
127 | # define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF | |
128 | # define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON | |
129 | # define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ | |
130 | #endif | |
131 | ||
1da177e4 | 132 | /* |
0bd7b798 AH |
133 | * C code is not supposed to know about undefined top of stack. Every time |
134 | * a C function with an pt_regs argument is called from the SYSCALL based | |
1da177e4 LT |
135 | * fast path FIXUP_TOP_OF_STACK is needed. |
136 | * RESTORE_TOP_OF_STACK syncs the syscall state after any possible ptregs | |
137 | * manipulation. | |
0bd7b798 AH |
138 | */ |
139 | ||
140 | /* %rsp:at FRAMEEND */ | |
c002a1e6 | 141 | .macro FIXUP_TOP_OF_STACK tmp offset=0 |
3d1e42a7 | 142 | movq PER_CPU_VAR(old_rsp),\tmp |
c002a1e6 AH |
143 | movq \tmp,RSP+\offset(%rsp) |
144 | movq $__USER_DS,SS+\offset(%rsp) | |
145 | movq $__USER_CS,CS+\offset(%rsp) | |
146 | movq $-1,RCX+\offset(%rsp) | |
147 | movq R11+\offset(%rsp),\tmp /* get eflags */ | |
148 | movq \tmp,EFLAGS+\offset(%rsp) | |
1da177e4 LT |
149 | .endm |
150 | ||
c002a1e6 AH |
151 | .macro RESTORE_TOP_OF_STACK tmp offset=0 |
152 | movq RSP+\offset(%rsp),\tmp | |
3d1e42a7 | 153 | movq \tmp,PER_CPU_VAR(old_rsp) |
c002a1e6 AH |
154 | movq EFLAGS+\offset(%rsp),\tmp |
155 | movq \tmp,R11+\offset(%rsp) | |
1da177e4 LT |
156 | .endm |
157 | ||
158 | .macro FAKE_STACK_FRAME child_rip | |
159 | /* push in order ss, rsp, eflags, cs, rip */ | |
3829ee6b | 160 | xorl %eax, %eax |
df5d1874 | 161 | pushq_cfi $__KERNEL_DS /* ss */ |
7effaa88 | 162 | /*CFI_REL_OFFSET ss,0*/ |
df5d1874 | 163 | pushq_cfi %rax /* rsp */ |
7effaa88 | 164 | CFI_REL_OFFSET rsp,0 |
1adfa76a | 165 | pushq_cfi $(X86_EFLAGS_IF|X86_EFLAGS_FIXED) /* eflags - interrupts on */ |
7effaa88 | 166 | /*CFI_REL_OFFSET rflags,0*/ |
df5d1874 | 167 | pushq_cfi $__KERNEL_CS /* cs */ |
7effaa88 | 168 | /*CFI_REL_OFFSET cs,0*/ |
df5d1874 | 169 | pushq_cfi \child_rip /* rip */ |
7effaa88 | 170 | CFI_REL_OFFSET rip,0 |
df5d1874 | 171 | pushq_cfi %rax /* orig rax */ |
1da177e4 LT |
172 | .endm |
173 | ||
174 | .macro UNFAKE_STACK_FRAME | |
175 | addq $8*6, %rsp | |
176 | CFI_ADJUST_CFA_OFFSET -(6*8) | |
177 | .endm | |
178 | ||
dcd072e2 AH |
179 | /* |
180 | * initial frame state for interrupts (and exceptions without error code) | |
181 | */ | |
182 | .macro EMPTY_FRAME start=1 offset=0 | |
7effaa88 | 183 | .if \start |
dcd072e2 | 184 | CFI_STARTPROC simple |
adf14236 | 185 | CFI_SIGNAL_FRAME |
dcd072e2 | 186 | CFI_DEF_CFA rsp,8+\offset |
7effaa88 | 187 | .else |
dcd072e2 | 188 | CFI_DEF_CFA_OFFSET 8+\offset |
7effaa88 | 189 | .endif |
1da177e4 | 190 | .endm |
d99015b1 AH |
191 | |
192 | /* | |
dcd072e2 | 193 | * initial frame state for interrupts (and exceptions without error code) |
d99015b1 | 194 | */ |
dcd072e2 | 195 | .macro INTR_FRAME start=1 offset=0 |
e8a0e276 IM |
196 | EMPTY_FRAME \start, SS+8+\offset-RIP |
197 | /*CFI_REL_OFFSET ss, SS+\offset-RIP*/ | |
198 | CFI_REL_OFFSET rsp, RSP+\offset-RIP | |
199 | /*CFI_REL_OFFSET rflags, EFLAGS+\offset-RIP*/ | |
200 | /*CFI_REL_OFFSET cs, CS+\offset-RIP*/ | |
201 | CFI_REL_OFFSET rip, RIP+\offset-RIP | |
d99015b1 AH |
202 | .endm |
203 | ||
d99015b1 AH |
204 | /* |
205 | * initial frame state for exceptions with error code (and interrupts | |
206 | * with vector already pushed) | |
207 | */ | |
dcd072e2 | 208 | .macro XCPT_FRAME start=1 offset=0 |
e8a0e276 | 209 | INTR_FRAME \start, RIP+\offset-ORIG_RAX |
dcd072e2 AH |
210 | /*CFI_REL_OFFSET orig_rax, ORIG_RAX-ORIG_RAX*/ |
211 | .endm | |
212 | ||
213 | /* | |
214 | * frame that enables calling into C. | |
215 | */ | |
216 | .macro PARTIAL_FRAME start=1 offset=0 | |
e8a0e276 IM |
217 | XCPT_FRAME \start, ORIG_RAX+\offset-ARGOFFSET |
218 | CFI_REL_OFFSET rdi, RDI+\offset-ARGOFFSET | |
219 | CFI_REL_OFFSET rsi, RSI+\offset-ARGOFFSET | |
220 | CFI_REL_OFFSET rdx, RDX+\offset-ARGOFFSET | |
221 | CFI_REL_OFFSET rcx, RCX+\offset-ARGOFFSET | |
222 | CFI_REL_OFFSET rax, RAX+\offset-ARGOFFSET | |
223 | CFI_REL_OFFSET r8, R8+\offset-ARGOFFSET | |
224 | CFI_REL_OFFSET r9, R9+\offset-ARGOFFSET | |
225 | CFI_REL_OFFSET r10, R10+\offset-ARGOFFSET | |
226 | CFI_REL_OFFSET r11, R11+\offset-ARGOFFSET | |
dcd072e2 AH |
227 | .endm |
228 | ||
229 | /* | |
230 | * frame that enables passing a complete pt_regs to a C function. | |
231 | */ | |
232 | .macro DEFAULT_FRAME start=1 offset=0 | |
e8a0e276 | 233 | PARTIAL_FRAME \start, R11+\offset-R15 |
dcd072e2 AH |
234 | CFI_REL_OFFSET rbx, RBX+\offset |
235 | CFI_REL_OFFSET rbp, RBP+\offset | |
236 | CFI_REL_OFFSET r12, R12+\offset | |
237 | CFI_REL_OFFSET r13, R13+\offset | |
238 | CFI_REL_OFFSET r14, R14+\offset | |
239 | CFI_REL_OFFSET r15, R15+\offset | |
240 | .endm | |
d99015b1 AH |
241 | |
242 | /* save partial stack frame */ | |
1871853f | 243 | .macro SAVE_ARGS_IRQ |
d99015b1 | 244 | cld |
1871853f | 245 | /* start from rbp in pt_regs and jump over */ |
1b2b23d8 TG |
246 | movq_cfi rdi, (RDI-RBP) |
247 | movq_cfi rsi, (RSI-RBP) | |
248 | movq_cfi rdx, (RDX-RBP) | |
249 | movq_cfi rcx, (RCX-RBP) | |
250 | movq_cfi rax, (RAX-RBP) | |
251 | movq_cfi r8, (R8-RBP) | |
252 | movq_cfi r9, (R9-RBP) | |
253 | movq_cfi r10, (R10-RBP) | |
254 | movq_cfi r11, (R11-RBP) | |
1871853f | 255 | |
a2bbe750 FW |
256 | /* Save rbp so that we can unwind from get_irq_regs() */ |
257 | movq_cfi rbp, 0 | |
258 | ||
259 | /* Save previous stack value */ | |
260 | movq %rsp, %rsi | |
3b99a3ef FW |
261 | |
262 | leaq -RBP(%rsp),%rdi /* arg1 for handler */ | |
69466466 | 263 | testl $3, CS-RBP(%rsi) |
d99015b1 AH |
264 | je 1f |
265 | SWAPGS | |
266 | /* | |
56895530 | 267 | * irq_count is used to check if a CPU is already on an interrupt stack |
d99015b1 AH |
268 | * or not. While this is essentially redundant with preempt_count it is |
269 | * a little cheaper to use a separate counter in the PDA (short of | |
270 | * moving irq_enter into assembly, which would be too much work) | |
271 | */ | |
56895530 | 272 | 1: incl PER_CPU_VAR(irq_count) |
69466466 | 273 | cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp |
eab9e613 | 274 | CFI_DEF_CFA_REGISTER rsi |
a2bbe750 | 275 | |
69466466 | 276 | /* Store previous stack value */ |
a2bbe750 | 277 | pushq %rsi |
eab9e613 JB |
278 | CFI_ESCAPE 0x0f /* DW_CFA_def_cfa_expression */, 6, \ |
279 | 0x77 /* DW_OP_breg7 */, 0, \ | |
280 | 0x06 /* DW_OP_deref */, \ | |
281 | 0x08 /* DW_OP_const1u */, SS+8-RBP, \ | |
282 | 0x22 /* DW_OP_plus */ | |
a2bbe750 FW |
283 | /* We entered an interrupt context - irqs are off: */ |
284 | TRACE_IRQS_OFF | |
1871853f | 285 | .endm |
d99015b1 | 286 | |
e2f6bc25 AH |
287 | ENTRY(save_paranoid) |
288 | XCPT_FRAME 1 RDI+8 | |
289 | cld | |
290 | movq_cfi rdi, RDI+8 | |
291 | movq_cfi rsi, RSI+8 | |
292 | movq_cfi rdx, RDX+8 | |
293 | movq_cfi rcx, RCX+8 | |
294 | movq_cfi rax, RAX+8 | |
295 | movq_cfi r8, R8+8 | |
296 | movq_cfi r9, R9+8 | |
297 | movq_cfi r10, R10+8 | |
298 | movq_cfi r11, R11+8 | |
299 | movq_cfi rbx, RBX+8 | |
300 | movq_cfi rbp, RBP+8 | |
301 | movq_cfi r12, R12+8 | |
302 | movq_cfi r13, R13+8 | |
303 | movq_cfi r14, R14+8 | |
304 | movq_cfi r15, R15+8 | |
305 | movl $1,%ebx | |
306 | movl $MSR_GS_BASE,%ecx | |
307 | rdmsr | |
308 | testl %edx,%edx | |
309 | js 1f /* negative -> in kernel */ | |
310 | SWAPGS | |
311 | xorl %ebx,%ebx | |
312 | 1: ret | |
313 | CFI_ENDPROC | |
314 | END(save_paranoid) | |
315 | ||
1da177e4 | 316 | /* |
5b3eec0c IM |
317 | * A newly forked process directly context switches into this address. |
318 | * | |
319 | * rdi: prev task we switched from | |
0bd7b798 | 320 | */ |
1da177e4 | 321 | ENTRY(ret_from_fork) |
dcd072e2 | 322 | DEFAULT_FRAME |
5b3eec0c | 323 | |
7106a5ab BL |
324 | LOCK ; btr $TIF_FORK,TI_flags(%r8) |
325 | ||
6eebdda3 | 326 | pushq_cfi $0x0002 |
df5d1874 | 327 | popfq_cfi # reset kernel eflags |
5b3eec0c IM |
328 | |
329 | call schedule_tail # rdi: 'prev' task parameter | |
330 | ||
1da177e4 | 331 | GET_THREAD_INFO(%rcx) |
5b3eec0c | 332 | |
1da177e4 | 333 | RESTORE_REST |
5b3eec0c IM |
334 | |
335 | testl $3, CS-ARGOFFSET(%rsp) # from kernel_thread? | |
7076aada | 336 | jz 1f |
5b3eec0c IM |
337 | |
338 | testl $_TIF_IA32, TI_flags(%rcx) # 32-bit compat task needs IRET | |
1da177e4 | 339 | jnz int_ret_from_sys_call |
5b3eec0c | 340 | |
c002a1e6 | 341 | RESTORE_TOP_OF_STACK %rdi, -ARGOFFSET |
5b3eec0c IM |
342 | jmp ret_from_sys_call # go to the SYSRET fastpath |
343 | ||
7076aada | 344 | 1: |
22e2430d | 345 | subq $REST_SKIP, %rsp # leave space for volatiles |
7076aada AV |
346 | CFI_ADJUST_CFA_OFFSET REST_SKIP |
347 | movq %rbp, %rdi | |
348 | call *%rbx | |
22e2430d AV |
349 | movl $0, RAX(%rsp) |
350 | RESTORE_REST | |
351 | jmp int_ret_from_sys_call | |
1da177e4 | 352 | CFI_ENDPROC |
4b787e0b | 353 | END(ret_from_fork) |
1da177e4 LT |
354 | |
355 | /* | |
0d2eb44f | 356 | * System call entry. Up to 6 arguments in registers are supported. |
1da177e4 LT |
357 | * |
358 | * SYSCALL does not save anything on the stack and does not change the | |
63bcff2a PA |
359 | * stack pointer. However, it does mask the flags register for us, so |
360 | * CLD and CLAC are not needed. | |
1da177e4 | 361 | */ |
0bd7b798 | 362 | |
1da177e4 | 363 | /* |
0bd7b798 | 364 | * Register setup: |
1da177e4 LT |
365 | * rax system call number |
366 | * rdi arg0 | |
0bd7b798 | 367 | * rcx return address for syscall/sysret, C arg3 |
1da177e4 | 368 | * rsi arg1 |
0bd7b798 | 369 | * rdx arg2 |
1da177e4 LT |
370 | * r10 arg3 (--> moved to rcx for C) |
371 | * r8 arg4 | |
372 | * r9 arg5 | |
373 | * r11 eflags for syscall/sysret, temporary for C | |
0bd7b798 AH |
374 | * r12-r15,rbp,rbx saved by C code, not touched. |
375 | * | |
1da177e4 LT |
376 | * Interrupts are off on entry. |
377 | * Only called from user space. | |
378 | * | |
379 | * XXX if we had a free scratch register we could save the RSP into the stack frame | |
380 | * and report it properly in ps. Unfortunately we haven't. | |
7bf36bbc AK |
381 | * |
382 | * When user can change the frames always force IRET. That is because | |
383 | * it deals with uncanonical addresses better. SYSRET has trouble | |
384 | * with them due to bugs in both AMD and Intel CPUs. | |
0bd7b798 | 385 | */ |
1da177e4 LT |
386 | |
387 | ENTRY(system_call) | |
7effaa88 | 388 | CFI_STARTPROC simple |
adf14236 | 389 | CFI_SIGNAL_FRAME |
9af45651 | 390 | CFI_DEF_CFA rsp,KERNEL_STACK_OFFSET |
7effaa88 JB |
391 | CFI_REGISTER rip,rcx |
392 | /*CFI_REGISTER rflags,r11*/ | |
72fe4858 GOC |
393 | SWAPGS_UNSAFE_STACK |
394 | /* | |
395 | * A hypervisor implementation might want to use a label | |
396 | * after the swapgs, so that it can do the swapgs | |
397 | * for the guest and jump here on syscall. | |
398 | */ | |
f6b2bc84 | 399 | GLOBAL(system_call_after_swapgs) |
72fe4858 | 400 | |
3d1e42a7 | 401 | movq %rsp,PER_CPU_VAR(old_rsp) |
9af45651 | 402 | movq PER_CPU_VAR(kernel_stack),%rsp |
2601e64d IM |
403 | /* |
404 | * No need to follow this irqs off/on section - it's straight | |
405 | * and short: | |
406 | */ | |
72fe4858 | 407 | ENABLE_INTERRUPTS(CLBR_NONE) |
cac0e0a7 | 408 | SAVE_ARGS 8,0 |
0bd7b798 | 409 | movq %rax,ORIG_RAX-ARGOFFSET(%rsp) |
7effaa88 JB |
410 | movq %rcx,RIP-ARGOFFSET(%rsp) |
411 | CFI_REL_OFFSET rip,RIP-ARGOFFSET | |
46db09d3 | 412 | testl $_TIF_WORK_SYSCALL_ENTRY,TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET) |
1da177e4 | 413 | jnz tracesys |
86a1c34a | 414 | system_call_fastpath: |
fca460f9 | 415 | #if __SYSCALL_MASK == ~0 |
1da177e4 | 416 | cmpq $__NR_syscall_max,%rax |
fca460f9 PA |
417 | #else |
418 | andl $__SYSCALL_MASK,%eax | |
419 | cmpl $__NR_syscall_max,%eax | |
420 | #endif | |
1da177e4 LT |
421 | ja badsys |
422 | movq %r10,%rcx | |
423 | call *sys_call_table(,%rax,8) # XXX: rip relative | |
424 | movq %rax,RAX-ARGOFFSET(%rsp) | |
425 | /* | |
426 | * Syscall return path ending with SYSRET (fast path) | |
0bd7b798 AH |
427 | * Has incomplete stack frame and undefined top of stack. |
428 | */ | |
1da177e4 | 429 | ret_from_sys_call: |
11b854b2 | 430 | movl $_TIF_ALLWORK_MASK,%edi |
1da177e4 | 431 | /* edi: flagmask */ |
0bd7b798 | 432 | sysret_check: |
10cd706d | 433 | LOCKDEP_SYS_EXIT |
72fe4858 | 434 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 435 | TRACE_IRQS_OFF |
46db09d3 | 436 | movl TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET),%edx |
1da177e4 | 437 | andl %edi,%edx |
0bd7b798 | 438 | jnz sysret_careful |
bcddc015 | 439 | CFI_REMEMBER_STATE |
2601e64d IM |
440 | /* |
441 | * sysretq will re-enable interrupts: | |
442 | */ | |
443 | TRACE_IRQS_ON | |
1da177e4 | 444 | movq RIP-ARGOFFSET(%rsp),%rcx |
7effaa88 | 445 | CFI_REGISTER rip,rcx |
838feb47 | 446 | RESTORE_ARGS 1,-ARG_SKIP,0 |
7effaa88 | 447 | /*CFI_REGISTER rflags,r11*/ |
3d1e42a7 | 448 | movq PER_CPU_VAR(old_rsp), %rsp |
2be29982 | 449 | USERGS_SYSRET64 |
1da177e4 | 450 | |
bcddc015 | 451 | CFI_RESTORE_STATE |
1da177e4 | 452 | /* Handle reschedules */ |
0bd7b798 | 453 | /* edx: work, edi: workmask */ |
1da177e4 LT |
454 | sysret_careful: |
455 | bt $TIF_NEED_RESCHED,%edx | |
456 | jnc sysret_signal | |
2601e64d | 457 | TRACE_IRQS_ON |
72fe4858 | 458 | ENABLE_INTERRUPTS(CLBR_NONE) |
df5d1874 | 459 | pushq_cfi %rdi |
0430499c | 460 | SCHEDULE_USER |
df5d1874 | 461 | popq_cfi %rdi |
1da177e4 LT |
462 | jmp sysret_check |
463 | ||
0bd7b798 | 464 | /* Handle a signal */ |
1da177e4 | 465 | sysret_signal: |
2601e64d | 466 | TRACE_IRQS_ON |
72fe4858 | 467 | ENABLE_INTERRUPTS(CLBR_NONE) |
86a1c34a RM |
468 | #ifdef CONFIG_AUDITSYSCALL |
469 | bt $TIF_SYSCALL_AUDIT,%edx | |
470 | jc sysret_audit | |
471 | #endif | |
b60e714d RM |
472 | /* |
473 | * We have a signal, or exit tracing or single-step. | |
474 | * These all wind up with the iret return path anyway, | |
475 | * so just join that path right now. | |
476 | */ | |
477 | FIXUP_TOP_OF_STACK %r11, -ARGOFFSET | |
478 | jmp int_check_syscall_exit_work | |
0bd7b798 | 479 | |
7effaa88 JB |
480 | badsys: |
481 | movq $-ENOSYS,RAX-ARGOFFSET(%rsp) | |
482 | jmp ret_from_sys_call | |
483 | ||
86a1c34a RM |
484 | #ifdef CONFIG_AUDITSYSCALL |
485 | /* | |
486 | * Fast path for syscall audit without full syscall trace. | |
b05d8447 | 487 | * We just call __audit_syscall_entry() directly, and then |
86a1c34a RM |
488 | * jump back to the normal fast path. |
489 | */ | |
490 | auditsys: | |
491 | movq %r10,%r9 /* 6th arg: 4th syscall arg */ | |
492 | movq %rdx,%r8 /* 5th arg: 3rd syscall arg */ | |
493 | movq %rsi,%rcx /* 4th arg: 2nd syscall arg */ | |
494 | movq %rdi,%rdx /* 3rd arg: 1st syscall arg */ | |
495 | movq %rax,%rsi /* 2nd arg: syscall number */ | |
496 | movl $AUDIT_ARCH_X86_64,%edi /* 1st arg: audit arch */ | |
b05d8447 | 497 | call __audit_syscall_entry |
86a1c34a RM |
498 | LOAD_ARGS 0 /* reload call-clobbered registers */ |
499 | jmp system_call_fastpath | |
500 | ||
501 | /* | |
d7e7528b | 502 | * Return fast path for syscall audit. Call __audit_syscall_exit() |
86a1c34a RM |
503 | * directly and then jump back to the fast path with TIF_SYSCALL_AUDIT |
504 | * masked off. | |
505 | */ | |
506 | sysret_audit: | |
03275591 | 507 | movq RAX-ARGOFFSET(%rsp),%rsi /* second arg, syscall return value */ |
d7e7528b EP |
508 | cmpq $-MAX_ERRNO,%rsi /* is it < -MAX_ERRNO? */ |
509 | setbe %al /* 1 if so, 0 if not */ | |
86a1c34a | 510 | movzbl %al,%edi /* zero-extend that into %edi */ |
d7e7528b | 511 | call __audit_syscall_exit |
86a1c34a RM |
512 | movl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT),%edi |
513 | jmp sysret_check | |
514 | #endif /* CONFIG_AUDITSYSCALL */ | |
515 | ||
1da177e4 | 516 | /* Do syscall tracing */ |
0bd7b798 | 517 | tracesys: |
86a1c34a | 518 | #ifdef CONFIG_AUDITSYSCALL |
46db09d3 | 519 | testl $(_TIF_WORK_SYSCALL_ENTRY & ~_TIF_SYSCALL_AUDIT),TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET) |
86a1c34a RM |
520 | jz auditsys |
521 | #endif | |
1da177e4 | 522 | SAVE_REST |
a31f8dd7 | 523 | movq $-ENOSYS,RAX(%rsp) /* ptrace can change this for a bad syscall */ |
1da177e4 LT |
524 | FIXUP_TOP_OF_STACK %rdi |
525 | movq %rsp,%rdi | |
526 | call syscall_trace_enter | |
d4d67150 RM |
527 | /* |
528 | * Reload arg registers from stack in case ptrace changed them. | |
529 | * We don't reload %rax because syscall_trace_enter() returned | |
530 | * the value it wants us to use in the table lookup. | |
531 | */ | |
532 | LOAD_ARGS ARGOFFSET, 1 | |
1da177e4 | 533 | RESTORE_REST |
fca460f9 | 534 | #if __SYSCALL_MASK == ~0 |
1da177e4 | 535 | cmpq $__NR_syscall_max,%rax |
fca460f9 PA |
536 | #else |
537 | andl $__SYSCALL_MASK,%eax | |
538 | cmpl $__NR_syscall_max,%eax | |
539 | #endif | |
a31f8dd7 | 540 | ja int_ret_from_sys_call /* RAX(%rsp) set to -ENOSYS above */ |
1da177e4 LT |
541 | movq %r10,%rcx /* fixup for C */ |
542 | call *sys_call_table(,%rax,8) | |
a31f8dd7 | 543 | movq %rax,RAX-ARGOFFSET(%rsp) |
7bf36bbc | 544 | /* Use IRET because user could have changed frame */ |
0bd7b798 AH |
545 | |
546 | /* | |
1da177e4 LT |
547 | * Syscall return path ending with IRET. |
548 | * Has correct top of stack, but partial stack frame. | |
bcddc015 | 549 | */ |
bc8b2b92 | 550 | GLOBAL(int_ret_from_sys_call) |
72fe4858 | 551 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 552 | TRACE_IRQS_OFF |
1da177e4 LT |
553 | movl $_TIF_ALLWORK_MASK,%edi |
554 | /* edi: mask to check */ | |
bc8b2b92 | 555 | GLOBAL(int_with_check) |
10cd706d | 556 | LOCKDEP_SYS_EXIT_IRQ |
1da177e4 | 557 | GET_THREAD_INFO(%rcx) |
26ccb8a7 | 558 | movl TI_flags(%rcx),%edx |
1da177e4 LT |
559 | andl %edi,%edx |
560 | jnz int_careful | |
26ccb8a7 | 561 | andl $~TS_COMPAT,TI_status(%rcx) |
1da177e4 LT |
562 | jmp retint_swapgs |
563 | ||
564 | /* Either reschedule or signal or syscall exit tracking needed. */ | |
565 | /* First do a reschedule test. */ | |
566 | /* edx: work, edi: workmask */ | |
567 | int_careful: | |
568 | bt $TIF_NEED_RESCHED,%edx | |
569 | jnc int_very_careful | |
2601e64d | 570 | TRACE_IRQS_ON |
72fe4858 | 571 | ENABLE_INTERRUPTS(CLBR_NONE) |
df5d1874 | 572 | pushq_cfi %rdi |
0430499c | 573 | SCHEDULE_USER |
df5d1874 | 574 | popq_cfi %rdi |
72fe4858 | 575 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 576 | TRACE_IRQS_OFF |
1da177e4 LT |
577 | jmp int_with_check |
578 | ||
579 | /* handle signals and tracing -- both require a full stack frame */ | |
580 | int_very_careful: | |
2601e64d | 581 | TRACE_IRQS_ON |
72fe4858 | 582 | ENABLE_INTERRUPTS(CLBR_NONE) |
b60e714d | 583 | int_check_syscall_exit_work: |
1da177e4 | 584 | SAVE_REST |
0bd7b798 | 585 | /* Check for syscall exit trace */ |
d4d67150 | 586 | testl $_TIF_WORK_SYSCALL_EXIT,%edx |
1da177e4 | 587 | jz int_signal |
df5d1874 | 588 | pushq_cfi %rdi |
0bd7b798 | 589 | leaq 8(%rsp),%rdi # &ptregs -> arg1 |
1da177e4 | 590 | call syscall_trace_leave |
df5d1874 | 591 | popq_cfi %rdi |
d4d67150 | 592 | andl $~(_TIF_WORK_SYSCALL_EXIT|_TIF_SYSCALL_EMU),%edi |
1da177e4 | 593 | jmp int_restore_rest |
0bd7b798 | 594 | |
1da177e4 | 595 | int_signal: |
8f4d37ec | 596 | testl $_TIF_DO_NOTIFY_MASK,%edx |
1da177e4 LT |
597 | jz 1f |
598 | movq %rsp,%rdi # &ptregs -> arg1 | |
599 | xorl %esi,%esi # oldset -> arg2 | |
600 | call do_notify_resume | |
eca91e78 | 601 | 1: movl $_TIF_WORK_MASK,%edi |
1da177e4 LT |
602 | int_restore_rest: |
603 | RESTORE_REST | |
72fe4858 | 604 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 605 | TRACE_IRQS_OFF |
1da177e4 LT |
606 | jmp int_with_check |
607 | CFI_ENDPROC | |
bcddc015 | 608 | END(system_call) |
0bd7b798 | 609 | |
1d4b4b29 AV |
610 | .macro FORK_LIKE func |
611 | ENTRY(stub_\func) | |
612 | CFI_STARTPROC | |
613 | popq %r11 /* save return address */ | |
614 | PARTIAL_FRAME 0 | |
615 | SAVE_REST | |
616 | pushq %r11 /* put it back on stack */ | |
617 | FIXUP_TOP_OF_STACK %r11, 8 | |
618 | DEFAULT_FRAME 0 8 /* offset 8: return address */ | |
619 | call sys_\func | |
620 | RESTORE_TOP_OF_STACK %r11, 8 | |
621 | ret $REST_SKIP /* pop extended registers */ | |
622 | CFI_ENDPROC | |
623 | END(stub_\func) | |
624 | .endm | |
625 | ||
b3af11af AV |
626 | .macro FIXED_FRAME label,func |
627 | ENTRY(\label) | |
628 | CFI_STARTPROC | |
629 | PARTIAL_FRAME 0 8 /* offset 8: return address */ | |
630 | FIXUP_TOP_OF_STACK %r11, 8-ARGOFFSET | |
631 | call \func | |
632 | RESTORE_TOP_OF_STACK %r11, 8-ARGOFFSET | |
633 | ret | |
634 | CFI_ENDPROC | |
635 | END(\label) | |
636 | .endm | |
637 | ||
1d4b4b29 AV |
638 | FORK_LIKE clone |
639 | FORK_LIKE fork | |
640 | FORK_LIKE vfork | |
b3af11af | 641 | FIXED_FRAME stub_iopl, sys_iopl |
1da177e4 LT |
642 | |
643 | ENTRY(ptregscall_common) | |
c002a1e6 AH |
644 | DEFAULT_FRAME 1 8 /* offset 8: return address */ |
645 | RESTORE_TOP_OF_STACK %r11, 8 | |
646 | movq_cfi_restore R15+8, r15 | |
647 | movq_cfi_restore R14+8, r14 | |
648 | movq_cfi_restore R13+8, r13 | |
649 | movq_cfi_restore R12+8, r12 | |
650 | movq_cfi_restore RBP+8, rbp | |
651 | movq_cfi_restore RBX+8, rbx | |
652 | ret $REST_SKIP /* pop extended registers */ | |
1da177e4 | 653 | CFI_ENDPROC |
4b787e0b | 654 | END(ptregscall_common) |
0bd7b798 | 655 | |
1da177e4 LT |
656 | ENTRY(stub_execve) |
657 | CFI_STARTPROC | |
e6b04b6b JB |
658 | addq $8, %rsp |
659 | PARTIAL_FRAME 0 | |
1da177e4 | 660 | SAVE_REST |
1da177e4 LT |
661 | FIXUP_TOP_OF_STACK %r11 |
662 | call sys_execve | |
1da177e4 LT |
663 | movq %rax,RAX(%rsp) |
664 | RESTORE_REST | |
665 | jmp int_ret_from_sys_call | |
666 | CFI_ENDPROC | |
4b787e0b | 667 | END(stub_execve) |
0bd7b798 | 668 | |
1da177e4 LT |
669 | /* |
670 | * sigreturn is special because it needs to restore all registers on return. | |
671 | * This cannot be done with SYSRET, so use the IRET return path instead. | |
0bd7b798 | 672 | */ |
1da177e4 LT |
673 | ENTRY(stub_rt_sigreturn) |
674 | CFI_STARTPROC | |
7effaa88 | 675 | addq $8, %rsp |
e6b04b6b | 676 | PARTIAL_FRAME 0 |
1da177e4 | 677 | SAVE_REST |
1da177e4 LT |
678 | FIXUP_TOP_OF_STACK %r11 |
679 | call sys_rt_sigreturn | |
680 | movq %rax,RAX(%rsp) # fixme, this could be done at the higher layer | |
681 | RESTORE_REST | |
682 | jmp int_ret_from_sys_call | |
683 | CFI_ENDPROC | |
4b787e0b | 684 | END(stub_rt_sigreturn) |
1da177e4 | 685 | |
c5a37394 | 686 | #ifdef CONFIG_X86_X32_ABI |
c5a37394 PA |
687 | ENTRY(stub_x32_rt_sigreturn) |
688 | CFI_STARTPROC | |
689 | addq $8, %rsp | |
690 | PARTIAL_FRAME 0 | |
691 | SAVE_REST | |
c5a37394 PA |
692 | FIXUP_TOP_OF_STACK %r11 |
693 | call sys32_x32_rt_sigreturn | |
694 | movq %rax,RAX(%rsp) # fixme, this could be done at the higher layer | |
695 | RESTORE_REST | |
696 | jmp int_ret_from_sys_call | |
697 | CFI_ENDPROC | |
698 | END(stub_x32_rt_sigreturn) | |
699 | ||
d1a797f3 PA |
700 | ENTRY(stub_x32_execve) |
701 | CFI_STARTPROC | |
702 | addq $8, %rsp | |
703 | PARTIAL_FRAME 0 | |
704 | SAVE_REST | |
705 | FIXUP_TOP_OF_STACK %r11 | |
6783eaa2 | 706 | call compat_sys_execve |
d1a797f3 PA |
707 | RESTORE_TOP_OF_STACK %r11 |
708 | movq %rax,RAX(%rsp) | |
709 | RESTORE_REST | |
710 | jmp int_ret_from_sys_call | |
711 | CFI_ENDPROC | |
712 | END(stub_x32_execve) | |
713 | ||
c5a37394 PA |
714 | #endif |
715 | ||
939b7871 PA |
716 | /* |
717 | * Build the entry stubs and pointer table with some assembler magic. | |
718 | * We pack 7 stubs into a single 32-byte chunk, which will fit in a | |
719 | * single cache line on all modern x86 implementations. | |
720 | */ | |
721 | .section .init.rodata,"a" | |
722 | ENTRY(interrupt) | |
ea714547 | 723 | .section .entry.text |
939b7871 PA |
724 | .p2align 5 |
725 | .p2align CONFIG_X86_L1_CACHE_SHIFT | |
726 | ENTRY(irq_entries_start) | |
727 | INTR_FRAME | |
728 | vector=FIRST_EXTERNAL_VECTOR | |
729 | .rept (NR_VECTORS-FIRST_EXTERNAL_VECTOR+6)/7 | |
730 | .balign 32 | |
731 | .rept 7 | |
732 | .if vector < NR_VECTORS | |
8665596e | 733 | .if vector <> FIRST_EXTERNAL_VECTOR |
939b7871 PA |
734 | CFI_ADJUST_CFA_OFFSET -8 |
735 | .endif | |
df5d1874 | 736 | 1: pushq_cfi $(~vector+0x80) /* Note: always in signed byte range */ |
8665596e | 737 | .if ((vector-FIRST_EXTERNAL_VECTOR)%7) <> 6 |
939b7871 PA |
738 | jmp 2f |
739 | .endif | |
740 | .previous | |
741 | .quad 1b | |
ea714547 | 742 | .section .entry.text |
939b7871 PA |
743 | vector=vector+1 |
744 | .endif | |
745 | .endr | |
746 | 2: jmp common_interrupt | |
747 | .endr | |
748 | CFI_ENDPROC | |
749 | END(irq_entries_start) | |
750 | ||
751 | .previous | |
752 | END(interrupt) | |
753 | .previous | |
754 | ||
d99015b1 | 755 | /* |
1da177e4 LT |
756 | * Interrupt entry/exit. |
757 | * | |
758 | * Interrupt entry points save only callee clobbered registers in fast path. | |
d99015b1 AH |
759 | * |
760 | * Entry runs with interrupts off. | |
761 | */ | |
1da177e4 | 762 | |
722024db | 763 | /* 0(%rsp): ~(interrupt number) */ |
1da177e4 | 764 | .macro interrupt func |
625dbc3b FW |
765 | /* reserve pt_regs for scratch regs and rbp */ |
766 | subq $ORIG_RAX-RBP, %rsp | |
767 | CFI_ADJUST_CFA_OFFSET ORIG_RAX-RBP | |
1871853f | 768 | SAVE_ARGS_IRQ |
1da177e4 LT |
769 | call \func |
770 | .endm | |
771 | ||
722024db AH |
772 | /* |
773 | * The interrupt stubs push (~vector+0x80) onto the stack and | |
774 | * then jump to common_interrupt. | |
775 | */ | |
939b7871 PA |
776 | .p2align CONFIG_X86_L1_CACHE_SHIFT |
777 | common_interrupt: | |
7effaa88 | 778 | XCPT_FRAME |
ee4eb87b | 779 | ASM_CLAC |
722024db | 780 | addq $-0x80,(%rsp) /* Adjust vector to [-256,-1] range */ |
1da177e4 | 781 | interrupt do_IRQ |
3d1e42a7 | 782 | /* 0(%rsp): old_rsp-ARGOFFSET */ |
7effaa88 | 783 | ret_from_intr: |
72fe4858 | 784 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 785 | TRACE_IRQS_OFF |
56895530 | 786 | decl PER_CPU_VAR(irq_count) |
625dbc3b | 787 | |
a2bbe750 FW |
788 | /* Restore saved previous stack */ |
789 | popq %rsi | |
928282e4 | 790 | CFI_DEF_CFA rsi,SS+8-RBP /* reg/off reset after def_cfa_expr */ |
eab9e613 | 791 | leaq ARGOFFSET-RBP(%rsi), %rsp |
7effaa88 | 792 | CFI_DEF_CFA_REGISTER rsp |
eab9e613 | 793 | CFI_ADJUST_CFA_OFFSET RBP-ARGOFFSET |
625dbc3b | 794 | |
7effaa88 | 795 | exit_intr: |
1da177e4 LT |
796 | GET_THREAD_INFO(%rcx) |
797 | testl $3,CS-ARGOFFSET(%rsp) | |
798 | je retint_kernel | |
0bd7b798 | 799 | |
1da177e4 LT |
800 | /* Interrupt came from user space */ |
801 | /* | |
802 | * Has a correct top of stack, but a partial stack frame | |
803 | * %rcx: thread info. Interrupts off. | |
0bd7b798 | 804 | */ |
1da177e4 LT |
805 | retint_with_reschedule: |
806 | movl $_TIF_WORK_MASK,%edi | |
7effaa88 | 807 | retint_check: |
10cd706d | 808 | LOCKDEP_SYS_EXIT_IRQ |
26ccb8a7 | 809 | movl TI_flags(%rcx),%edx |
1da177e4 | 810 | andl %edi,%edx |
7effaa88 | 811 | CFI_REMEMBER_STATE |
1da177e4 | 812 | jnz retint_careful |
10cd706d PZ |
813 | |
814 | retint_swapgs: /* return to user-space */ | |
2601e64d IM |
815 | /* |
816 | * The iretq could re-enable interrupts: | |
817 | */ | |
72fe4858 | 818 | DISABLE_INTERRUPTS(CLBR_ANY) |
2601e64d | 819 | TRACE_IRQS_IRETQ |
72fe4858 | 820 | SWAPGS |
2601e64d IM |
821 | jmp restore_args |
822 | ||
10cd706d | 823 | retint_restore_args: /* return to kernel space */ |
72fe4858 | 824 | DISABLE_INTERRUPTS(CLBR_ANY) |
2601e64d IM |
825 | /* |
826 | * The iretq could re-enable interrupts: | |
827 | */ | |
828 | TRACE_IRQS_IRETQ | |
829 | restore_args: | |
838feb47 | 830 | RESTORE_ARGS 1,8,1 |
3701d863 | 831 | |
f7f3d791 | 832 | irq_return: |
3891a04a PA |
833 | /* |
834 | * Are we returning to a stack segment from the LDT? Note: in | |
835 | * 64-bit mode SS:RSP on the exception stack is always valid. | |
836 | */ | |
34273f41 | 837 | #ifdef CONFIG_X86_ESPFIX64 |
3891a04a PA |
838 | testb $4,(SS-RIP)(%rsp) |
839 | jnz irq_return_ldt | |
34273f41 | 840 | #endif |
3891a04a PA |
841 | |
842 | irq_return_iret: | |
72fe4858 | 843 | INTERRUPT_RETURN |
3891a04a | 844 | _ASM_EXTABLE(irq_return_iret, bad_iret) |
3701d863 IM |
845 | |
846 | #ifdef CONFIG_PARAVIRT | |
72fe4858 | 847 | ENTRY(native_iret) |
1da177e4 | 848 | iretq |
d7abc0fa | 849 | _ASM_EXTABLE(native_iret, bad_iret) |
3701d863 IM |
850 | #endif |
851 | ||
34273f41 | 852 | #ifdef CONFIG_X86_ESPFIX64 |
3891a04a PA |
853 | irq_return_ldt: |
854 | pushq_cfi %rax | |
855 | pushq_cfi %rdi | |
856 | SWAPGS | |
857 | movq PER_CPU_VAR(espfix_waddr),%rdi | |
858 | movq %rax,(0*8)(%rdi) /* RAX */ | |
859 | movq (2*8)(%rsp),%rax /* RIP */ | |
860 | movq %rax,(1*8)(%rdi) | |
861 | movq (3*8)(%rsp),%rax /* CS */ | |
862 | movq %rax,(2*8)(%rdi) | |
863 | movq (4*8)(%rsp),%rax /* RFLAGS */ | |
864 | movq %rax,(3*8)(%rdi) | |
865 | movq (6*8)(%rsp),%rax /* SS */ | |
866 | movq %rax,(5*8)(%rdi) | |
867 | movq (5*8)(%rsp),%rax /* RSP */ | |
868 | movq %rax,(4*8)(%rdi) | |
869 | andl $0xffff0000,%eax | |
870 | popq_cfi %rdi | |
871 | orq PER_CPU_VAR(espfix_stack),%rax | |
872 | SWAPGS | |
873 | movq %rax,%rsp | |
874 | popq_cfi %rax | |
875 | jmp irq_return_iret | |
34273f41 | 876 | #endif |
3891a04a | 877 | |
1da177e4 | 878 | .section .fixup,"ax" |
1da177e4 | 879 | bad_iret: |
3aa4b37d RM |
880 | /* |
881 | * The iret traps when the %cs or %ss being restored is bogus. | |
882 | * We've lost the original trap vector and error code. | |
883 | * #GPF is the most likely one to get for an invalid selector. | |
884 | * So pretend we completed the iret and took the #GPF in user mode. | |
885 | * | |
886 | * We are now running with the kernel GS after exception recovery. | |
887 | * But error_entry expects us to have user GS to match the user %cs, | |
888 | * so swap back. | |
889 | */ | |
890 | pushq $0 | |
891 | ||
892 | SWAPGS | |
893 | jmp general_protection | |
894 | ||
72fe4858 GOC |
895 | .previous |
896 | ||
7effaa88 | 897 | /* edi: workmask, edx: work */ |
1da177e4 | 898 | retint_careful: |
7effaa88 | 899 | CFI_RESTORE_STATE |
1da177e4 LT |
900 | bt $TIF_NEED_RESCHED,%edx |
901 | jnc retint_signal | |
2601e64d | 902 | TRACE_IRQS_ON |
72fe4858 | 903 | ENABLE_INTERRUPTS(CLBR_NONE) |
df5d1874 | 904 | pushq_cfi %rdi |
0430499c | 905 | SCHEDULE_USER |
df5d1874 | 906 | popq_cfi %rdi |
1da177e4 | 907 | GET_THREAD_INFO(%rcx) |
72fe4858 | 908 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 909 | TRACE_IRQS_OFF |
1da177e4 | 910 | jmp retint_check |
0bd7b798 | 911 | |
1da177e4 | 912 | retint_signal: |
8f4d37ec | 913 | testl $_TIF_DO_NOTIFY_MASK,%edx |
10ffdbb8 | 914 | jz retint_swapgs |
2601e64d | 915 | TRACE_IRQS_ON |
72fe4858 | 916 | ENABLE_INTERRUPTS(CLBR_NONE) |
1da177e4 | 917 | SAVE_REST |
0bd7b798 | 918 | movq $-1,ORIG_RAX(%rsp) |
3829ee6b | 919 | xorl %esi,%esi # oldset |
1da177e4 LT |
920 | movq %rsp,%rdi # &pt_regs |
921 | call do_notify_resume | |
922 | RESTORE_REST | |
72fe4858 | 923 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 924 | TRACE_IRQS_OFF |
be9e6870 | 925 | GET_THREAD_INFO(%rcx) |
eca91e78 | 926 | jmp retint_with_reschedule |
1da177e4 LT |
927 | |
928 | #ifdef CONFIG_PREEMPT | |
929 | /* Returning to kernel space. Check if we need preemption */ | |
930 | /* rcx: threadinfo. interrupts off. */ | |
b06babac | 931 | ENTRY(retint_kernel) |
c2daa3be | 932 | cmpl $0,PER_CPU_VAR(__preempt_count) |
1da177e4 | 933 | jnz retint_restore_args |
1da177e4 LT |
934 | bt $9,EFLAGS-ARGOFFSET(%rsp) /* interrupts off? */ |
935 | jnc retint_restore_args | |
936 | call preempt_schedule_irq | |
937 | jmp exit_intr | |
0bd7b798 | 938 | #endif |
1da177e4 | 939 | CFI_ENDPROC |
4b787e0b | 940 | END(common_interrupt) |
3891a04a PA |
941 | |
942 | /* | |
943 | * If IRET takes a fault on the espfix stack, then we | |
944 | * end up promoting it to a doublefault. In that case, | |
945 | * modify the stack to make it look like we just entered | |
946 | * the #GP handler from user space, similar to bad_iret. | |
947 | */ | |
34273f41 | 948 | #ifdef CONFIG_X86_ESPFIX64 |
3891a04a PA |
949 | ALIGN |
950 | __do_double_fault: | |
951 | XCPT_FRAME 1 RDI+8 | |
952 | movq RSP(%rdi),%rax /* Trap on the espfix stack? */ | |
953 | sarq $PGDIR_SHIFT,%rax | |
954 | cmpl $ESPFIX_PGD_ENTRY,%eax | |
955 | jne do_double_fault /* No, just deliver the fault */ | |
956 | cmpl $__KERNEL_CS,CS(%rdi) | |
957 | jne do_double_fault | |
958 | movq RIP(%rdi),%rax | |
959 | cmpq $irq_return_iret,%rax | |
960 | #ifdef CONFIG_PARAVIRT | |
961 | je 1f | |
962 | cmpq $native_iret,%rax | |
963 | #endif | |
964 | jne do_double_fault /* This shouldn't happen... */ | |
965 | 1: | |
966 | movq PER_CPU_VAR(kernel_stack),%rax | |
967 | subq $(6*8-KERNEL_STACK_OFFSET),%rax /* Reset to original stack */ | |
968 | movq %rax,RSP(%rdi) | |
969 | movq $0,(%rax) /* Missing (lost) #GP error code */ | |
970 | movq $general_protection,RIP(%rdi) | |
971 | retq | |
972 | CFI_ENDPROC | |
973 | END(__do_double_fault) | |
34273f41 PA |
974 | #else |
975 | # define __do_double_fault do_double_fault | |
976 | #endif | |
3891a04a | 977 | |
1da177e4 LT |
978 | /* |
979 | * APIC interrupts. | |
0bd7b798 | 980 | */ |
cf910e83 | 981 | .macro apicinterrupt3 num sym do_sym |
322648d1 | 982 | ENTRY(\sym) |
7effaa88 | 983 | INTR_FRAME |
ee4eb87b | 984 | ASM_CLAC |
df5d1874 | 985 | pushq_cfi $~(\num) |
39e95433 | 986 | .Lcommon_\sym: |
322648d1 | 987 | interrupt \do_sym |
1da177e4 LT |
988 | jmp ret_from_intr |
989 | CFI_ENDPROC | |
322648d1 AH |
990 | END(\sym) |
991 | .endm | |
1da177e4 | 992 | |
cf910e83 SA |
993 | #ifdef CONFIG_TRACING |
994 | #define trace(sym) trace_##sym | |
995 | #define smp_trace(sym) smp_trace_##sym | |
996 | ||
997 | .macro trace_apicinterrupt num sym | |
998 | apicinterrupt3 \num trace(\sym) smp_trace(\sym) | |
999 | .endm | |
1000 | #else | |
1001 | .macro trace_apicinterrupt num sym do_sym | |
1002 | .endm | |
1003 | #endif | |
1004 | ||
1005 | .macro apicinterrupt num sym do_sym | |
1006 | apicinterrupt3 \num \sym \do_sym | |
1007 | trace_apicinterrupt \num \sym | |
1008 | .endm | |
1009 | ||
322648d1 | 1010 | #ifdef CONFIG_SMP |
cf910e83 | 1011 | apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR \ |
322648d1 | 1012 | irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt |
cf910e83 | 1013 | apicinterrupt3 REBOOT_VECTOR \ |
4ef702c1 | 1014 | reboot_interrupt smp_reboot_interrupt |
322648d1 | 1015 | #endif |
1da177e4 | 1016 | |
03b48632 | 1017 | #ifdef CONFIG_X86_UV |
cf910e83 | 1018 | apicinterrupt3 UV_BAU_MESSAGE \ |
322648d1 | 1019 | uv_bau_message_intr1 uv_bau_message_interrupt |
03b48632 | 1020 | #endif |
322648d1 AH |
1021 | apicinterrupt LOCAL_TIMER_VECTOR \ |
1022 | apic_timer_interrupt smp_apic_timer_interrupt | |
4a4de9c7 DS |
1023 | apicinterrupt X86_PLATFORM_IPI_VECTOR \ |
1024 | x86_platform_ipi smp_x86_platform_ipi | |
89b831ef | 1025 | |
d78f2664 | 1026 | #ifdef CONFIG_HAVE_KVM |
cf910e83 | 1027 | apicinterrupt3 POSTED_INTR_VECTOR \ |
d78f2664 YZ |
1028 | kvm_posted_intr_ipi smp_kvm_posted_intr_ipi |
1029 | #endif | |
1030 | ||
33e5ff63 | 1031 | #ifdef CONFIG_X86_MCE_THRESHOLD |
322648d1 | 1032 | apicinterrupt THRESHOLD_APIC_VECTOR \ |
7856f6cc | 1033 | threshold_interrupt smp_threshold_interrupt |
33e5ff63 SA |
1034 | #endif |
1035 | ||
1036 | #ifdef CONFIG_X86_THERMAL_VECTOR | |
322648d1 AH |
1037 | apicinterrupt THERMAL_APIC_VECTOR \ |
1038 | thermal_interrupt smp_thermal_interrupt | |
33e5ff63 | 1039 | #endif |
1812924b | 1040 | |
322648d1 AH |
1041 | #ifdef CONFIG_SMP |
1042 | apicinterrupt CALL_FUNCTION_SINGLE_VECTOR \ | |
1043 | call_function_single_interrupt smp_call_function_single_interrupt | |
1044 | apicinterrupt CALL_FUNCTION_VECTOR \ | |
1045 | call_function_interrupt smp_call_function_interrupt | |
1046 | apicinterrupt RESCHEDULE_VECTOR \ | |
1047 | reschedule_interrupt smp_reschedule_interrupt | |
1048 | #endif | |
1da177e4 | 1049 | |
322648d1 AH |
1050 | apicinterrupt ERROR_APIC_VECTOR \ |
1051 | error_interrupt smp_error_interrupt | |
1052 | apicinterrupt SPURIOUS_APIC_VECTOR \ | |
1053 | spurious_interrupt smp_spurious_interrupt | |
0bd7b798 | 1054 | |
e360adbe PZ |
1055 | #ifdef CONFIG_IRQ_WORK |
1056 | apicinterrupt IRQ_WORK_VECTOR \ | |
1057 | irq_work_interrupt smp_irq_work_interrupt | |
241771ef IM |
1058 | #endif |
1059 | ||
1da177e4 LT |
1060 | /* |
1061 | * Exception entry points. | |
0bd7b798 | 1062 | */ |
577ed45e AL |
1063 | #define INIT_TSS_IST(x) PER_CPU_VAR(init_tss) + (TSS_ist + ((x) - 1) * 8) |
1064 | ||
1065 | .macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1 | |
322648d1 | 1066 | ENTRY(\sym) |
577ed45e AL |
1067 | /* Sanity check */ |
1068 | .if \shift_ist != -1 && \paranoid == 0 | |
1069 | .error "using shift_ist requires paranoid=1" | |
1070 | .endif | |
1071 | ||
cb5dd2c5 AL |
1072 | .if \has_error_code |
1073 | XCPT_FRAME | |
1074 | .else | |
7effaa88 | 1075 | INTR_FRAME |
cb5dd2c5 | 1076 | .endif |
1da177e4 | 1077 | |
ee4eb87b | 1078 | ASM_CLAC |
b8b1d08b | 1079 | PARAVIRT_ADJUST_EXCEPTION_FRAME |
cb5dd2c5 AL |
1080 | |
1081 | .ifeq \has_error_code | |
1082 | pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */ | |
1083 | .endif | |
1084 | ||
b1cccb1b JB |
1085 | subq $ORIG_RAX-R15, %rsp |
1086 | CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15 | |
cb5dd2c5 AL |
1087 | |
1088 | .if \paranoid | |
b8b1d08b | 1089 | call save_paranoid |
cb5dd2c5 AL |
1090 | .else |
1091 | call error_entry | |
1092 | .endif | |
1093 | ||
1bd24efc | 1094 | DEFAULT_FRAME 0 |
cb5dd2c5 AL |
1095 | |
1096 | .if \paranoid | |
577ed45e AL |
1097 | .if \shift_ist != -1 |
1098 | TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */ | |
1099 | .else | |
b8b1d08b | 1100 | TRACE_IRQS_OFF |
cb5dd2c5 | 1101 | .endif |
577ed45e | 1102 | .endif |
cb5dd2c5 AL |
1103 | |
1104 | movq %rsp,%rdi /* pt_regs pointer */ | |
1105 | ||
1106 | .if \has_error_code | |
1107 | movq ORIG_RAX(%rsp),%rsi /* get error code */ | |
1108 | movq $-1,ORIG_RAX(%rsp) /* no syscall to restart */ | |
1109 | .else | |
1110 | xorl %esi,%esi /* no error code */ | |
1111 | .endif | |
1112 | ||
577ed45e AL |
1113 | .if \shift_ist != -1 |
1114 | subq $EXCEPTION_STKSZ, INIT_TSS_IST(\shift_ist) | |
1115 | .endif | |
1116 | ||
322648d1 | 1117 | call \do_sym |
cb5dd2c5 | 1118 | |
577ed45e AL |
1119 | .if \shift_ist != -1 |
1120 | addq $EXCEPTION_STKSZ, INIT_TSS_IST(\shift_ist) | |
1121 | .endif | |
1122 | ||
cb5dd2c5 AL |
1123 | .if \paranoid |
1124 | jmp paranoid_exit /* %ebx: no swapgs flag */ | |
1125 | .else | |
1126 | jmp error_exit /* %ebx: no swapgs flag */ | |
1127 | .endif | |
1128 | ||
b8b1d08b | 1129 | CFI_ENDPROC |
ddeb8f21 | 1130 | END(\sym) |
322648d1 | 1131 | .endm |
b8b1d08b | 1132 | |
25c74b10 | 1133 | #ifdef CONFIG_TRACING |
cb5dd2c5 AL |
1134 | .macro trace_idtentry sym do_sym has_error_code:req |
1135 | idtentry trace(\sym) trace(\do_sym) has_error_code=\has_error_code | |
1136 | idtentry \sym \do_sym has_error_code=\has_error_code | |
25c74b10 SA |
1137 | .endm |
1138 | #else | |
cb5dd2c5 AL |
1139 | .macro trace_idtentry sym do_sym has_error_code:req |
1140 | idtentry \sym \do_sym has_error_code=\has_error_code | |
25c74b10 SA |
1141 | .endm |
1142 | #endif | |
1143 | ||
cb5dd2c5 AL |
1144 | idtentry divide_error do_divide_error has_error_code=0 |
1145 | idtentry overflow do_overflow has_error_code=0 | |
1146 | idtentry bounds do_bounds has_error_code=0 | |
1147 | idtentry invalid_op do_invalid_op has_error_code=0 | |
1148 | idtentry device_not_available do_device_not_available has_error_code=0 | |
2071b3e3 | 1149 | idtentry double_fault __do_double_fault has_error_code=1 paranoid=1 |
cb5dd2c5 AL |
1150 | idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0 |
1151 | idtentry invalid_TSS do_invalid_TSS has_error_code=1 | |
1152 | idtentry segment_not_present do_segment_not_present has_error_code=1 | |
1153 | idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0 | |
1154 | idtentry coprocessor_error do_coprocessor_error has_error_code=0 | |
1155 | idtentry alignment_check do_alignment_check has_error_code=1 | |
1156 | idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0 | |
5cec93c2 | 1157 | |
2601e64d | 1158 | |
9f1e87ea CG |
1159 | /* Reload gs selector with exception handling */ |
1160 | /* edi: new selector */ | |
9f9d489a | 1161 | ENTRY(native_load_gs_index) |
7effaa88 | 1162 | CFI_STARTPROC |
df5d1874 | 1163 | pushfq_cfi |
b8aa287f | 1164 | DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI) |
9f1e87ea | 1165 | SWAPGS |
0bd7b798 | 1166 | gs_change: |
9f1e87ea | 1167 | movl %edi,%gs |
1da177e4 | 1168 | 2: mfence /* workaround */ |
72fe4858 | 1169 | SWAPGS |
df5d1874 | 1170 | popfq_cfi |
9f1e87ea | 1171 | ret |
7effaa88 | 1172 | CFI_ENDPROC |
6efdcfaf | 1173 | END(native_load_gs_index) |
0bd7b798 | 1174 | |
d7abc0fa | 1175 | _ASM_EXTABLE(gs_change,bad_gs) |
9f1e87ea | 1176 | .section .fixup,"ax" |
1da177e4 | 1177 | /* running with kernelgs */ |
0bd7b798 | 1178 | bad_gs: |
72fe4858 | 1179 | SWAPGS /* switch back to user gs */ |
1da177e4 | 1180 | xorl %eax,%eax |
9f1e87ea CG |
1181 | movl %eax,%gs |
1182 | jmp 2b | |
1183 | .previous | |
0bd7b798 | 1184 | |
2699500b | 1185 | /* Call softirq on interrupt stack. Interrupts are off. */ |
7d65f4a6 | 1186 | ENTRY(do_softirq_own_stack) |
7effaa88 | 1187 | CFI_STARTPROC |
df5d1874 | 1188 | pushq_cfi %rbp |
2699500b AK |
1189 | CFI_REL_OFFSET rbp,0 |
1190 | mov %rsp,%rbp | |
1191 | CFI_DEF_CFA_REGISTER rbp | |
56895530 | 1192 | incl PER_CPU_VAR(irq_count) |
26f80bd6 | 1193 | cmove PER_CPU_VAR(irq_stack_ptr),%rsp |
2699500b | 1194 | push %rbp # backlink for old unwinder |
ed6b676c | 1195 | call __do_softirq |
2699500b | 1196 | leaveq |
df5d1874 | 1197 | CFI_RESTORE rbp |
7effaa88 | 1198 | CFI_DEF_CFA_REGISTER rsp |
2699500b | 1199 | CFI_ADJUST_CFA_OFFSET -8 |
56895530 | 1200 | decl PER_CPU_VAR(irq_count) |
ed6b676c | 1201 | ret |
7effaa88 | 1202 | CFI_ENDPROC |
7d65f4a6 | 1203 | END(do_softirq_own_stack) |
75154f40 | 1204 | |
3d75e1b8 | 1205 | #ifdef CONFIG_XEN |
cb5dd2c5 | 1206 | idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0 |
3d75e1b8 JF |
1207 | |
1208 | /* | |
9f1e87ea CG |
1209 | * A note on the "critical region" in our callback handler. |
1210 | * We want to avoid stacking callback handlers due to events occurring | |
1211 | * during handling of the last event. To do this, we keep events disabled | |
1212 | * until we've done all processing. HOWEVER, we must enable events before | |
1213 | * popping the stack frame (can't be done atomically) and so it would still | |
1214 | * be possible to get enough handler activations to overflow the stack. | |
1215 | * Although unlikely, bugs of that kind are hard to track down, so we'd | |
1216 | * like to avoid the possibility. | |
1217 | * So, on entry to the handler we detect whether we interrupted an | |
1218 | * existing activation in its critical region -- if so, we pop the current | |
1219 | * activation and restart the handler using the previous one. | |
1220 | */ | |
3d75e1b8 JF |
1221 | ENTRY(xen_do_hypervisor_callback) # do_hypervisor_callback(struct *pt_regs) |
1222 | CFI_STARTPROC | |
9f1e87ea CG |
1223 | /* |
1224 | * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will | |
1225 | * see the correct pointer to the pt_regs | |
1226 | */ | |
3d75e1b8 JF |
1227 | movq %rdi, %rsp # we don't return, adjust the stack frame |
1228 | CFI_ENDPROC | |
dcd072e2 | 1229 | DEFAULT_FRAME |
56895530 | 1230 | 11: incl PER_CPU_VAR(irq_count) |
3d75e1b8 JF |
1231 | movq %rsp,%rbp |
1232 | CFI_DEF_CFA_REGISTER rbp | |
26f80bd6 | 1233 | cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp |
3d75e1b8 JF |
1234 | pushq %rbp # backlink for old unwinder |
1235 | call xen_evtchn_do_upcall | |
1236 | popq %rsp | |
1237 | CFI_DEF_CFA_REGISTER rsp | |
56895530 | 1238 | decl PER_CPU_VAR(irq_count) |
3d75e1b8 JF |
1239 | jmp error_exit |
1240 | CFI_ENDPROC | |
371c394a | 1241 | END(xen_do_hypervisor_callback) |
3d75e1b8 JF |
1242 | |
1243 | /* | |
9f1e87ea CG |
1244 | * Hypervisor uses this for application faults while it executes. |
1245 | * We get here for two reasons: | |
1246 | * 1. Fault while reloading DS, ES, FS or GS | |
1247 | * 2. Fault while executing IRET | |
1248 | * Category 1 we do not need to fix up as Xen has already reloaded all segment | |
1249 | * registers that could be reloaded and zeroed the others. | |
1250 | * Category 2 we fix up by killing the current process. We cannot use the | |
1251 | * normal Linux return path in this case because if we use the IRET hypercall | |
1252 | * to pop the stack frame we end up in an infinite loop of failsafe callbacks. | |
1253 | * We distinguish between categories by comparing each saved segment register | |
1254 | * with its current contents: any discrepancy means we in category 1. | |
1255 | */ | |
3d75e1b8 | 1256 | ENTRY(xen_failsafe_callback) |
dcd072e2 AH |
1257 | INTR_FRAME 1 (6*8) |
1258 | /*CFI_REL_OFFSET gs,GS*/ | |
1259 | /*CFI_REL_OFFSET fs,FS*/ | |
1260 | /*CFI_REL_OFFSET es,ES*/ | |
1261 | /*CFI_REL_OFFSET ds,DS*/ | |
1262 | CFI_REL_OFFSET r11,8 | |
1263 | CFI_REL_OFFSET rcx,0 | |
3d75e1b8 JF |
1264 | movw %ds,%cx |
1265 | cmpw %cx,0x10(%rsp) | |
1266 | CFI_REMEMBER_STATE | |
1267 | jne 1f | |
1268 | movw %es,%cx | |
1269 | cmpw %cx,0x18(%rsp) | |
1270 | jne 1f | |
1271 | movw %fs,%cx | |
1272 | cmpw %cx,0x20(%rsp) | |
1273 | jne 1f | |
1274 | movw %gs,%cx | |
1275 | cmpw %cx,0x28(%rsp) | |
1276 | jne 1f | |
1277 | /* All segments match their saved values => Category 2 (Bad IRET). */ | |
1278 | movq (%rsp),%rcx | |
1279 | CFI_RESTORE rcx | |
1280 | movq 8(%rsp),%r11 | |
1281 | CFI_RESTORE r11 | |
1282 | addq $0x30,%rsp | |
1283 | CFI_ADJUST_CFA_OFFSET -0x30 | |
14ae22ba IM |
1284 | pushq_cfi $0 /* RIP */ |
1285 | pushq_cfi %r11 | |
1286 | pushq_cfi %rcx | |
4a5c3e77 | 1287 | jmp general_protection |
3d75e1b8 JF |
1288 | CFI_RESTORE_STATE |
1289 | 1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */ | |
1290 | movq (%rsp),%rcx | |
1291 | CFI_RESTORE rcx | |
1292 | movq 8(%rsp),%r11 | |
1293 | CFI_RESTORE r11 | |
1294 | addq $0x30,%rsp | |
1295 | CFI_ADJUST_CFA_OFFSET -0x30 | |
a349e23d | 1296 | pushq_cfi $-1 /* orig_ax = -1 => not a system call */ |
3d75e1b8 JF |
1297 | SAVE_ALL |
1298 | jmp error_exit | |
1299 | CFI_ENDPROC | |
3d75e1b8 JF |
1300 | END(xen_failsafe_callback) |
1301 | ||
cf910e83 | 1302 | apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \ |
38e20b07 SY |
1303 | xen_hvm_callback_vector xen_evtchn_do_upcall |
1304 | ||
3d75e1b8 | 1305 | #endif /* CONFIG_XEN */ |
ddeb8f21 | 1306 | |
bc2b0331 | 1307 | #if IS_ENABLED(CONFIG_HYPERV) |
cf910e83 | 1308 | apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \ |
bc2b0331 S |
1309 | hyperv_callback_vector hyperv_vector_handler |
1310 | #endif /* CONFIG_HYPERV */ | |
1311 | ||
577ed45e AL |
1312 | idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK |
1313 | idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK | |
cb5dd2c5 | 1314 | idtentry stack_segment do_stack_segment has_error_code=1 paranoid=1 |
6cac5a92 | 1315 | #ifdef CONFIG_XEN |
cb5dd2c5 AL |
1316 | idtentry xen_debug do_debug has_error_code=0 |
1317 | idtentry xen_int3 do_int3 has_error_code=0 | |
1318 | idtentry xen_stack_segment do_stack_segment has_error_code=1 | |
6cac5a92 | 1319 | #endif |
cb5dd2c5 AL |
1320 | idtentry general_protection do_general_protection has_error_code=1 |
1321 | trace_idtentry page_fault do_page_fault has_error_code=1 | |
631bc487 | 1322 | #ifdef CONFIG_KVM_GUEST |
cb5dd2c5 | 1323 | idtentry async_page_fault do_async_page_fault has_error_code=1 |
631bc487 | 1324 | #endif |
ddeb8f21 | 1325 | #ifdef CONFIG_X86_MCE |
cb5dd2c5 | 1326 | idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip) |
ddeb8f21 AH |
1327 | #endif |
1328 | ||
1329 | /* | |
9f1e87ea CG |
1330 | * "Paranoid" exit path from exception stack. |
1331 | * Paranoid because this is used by NMIs and cannot take | |
ddeb8f21 AH |
1332 | * any kernel state for granted. |
1333 | * We don't do kernel preemption checks here, because only | |
1334 | * NMI should be common and it does not enable IRQs and | |
1335 | * cannot get reschedule ticks. | |
1336 | * | |
1337 | * "trace" is 0 for the NMI handler only, because irq-tracing | |
1338 | * is fundamentally NMI-unsafe. (we cannot change the soft and | |
1339 | * hard flags at once, atomically) | |
1340 | */ | |
1341 | ||
1342 | /* ebx: no swapgs flag */ | |
1343 | ENTRY(paranoid_exit) | |
1f130a78 | 1344 | DEFAULT_FRAME |
ddeb8f21 | 1345 | DISABLE_INTERRUPTS(CLBR_NONE) |
5963e317 | 1346 | TRACE_IRQS_OFF_DEBUG |
ddeb8f21 AH |
1347 | testl %ebx,%ebx /* swapgs needed? */ |
1348 | jnz paranoid_restore | |
1349 | testl $3,CS(%rsp) | |
1350 | jnz paranoid_userspace | |
1351 | paranoid_swapgs: | |
1352 | TRACE_IRQS_IRETQ 0 | |
1353 | SWAPGS_UNSAFE_STACK | |
0300e7f1 SR |
1354 | RESTORE_ALL 8 |
1355 | jmp irq_return | |
ddeb8f21 | 1356 | paranoid_restore: |
5963e317 | 1357 | TRACE_IRQS_IRETQ_DEBUG 0 |
ddeb8f21 AH |
1358 | RESTORE_ALL 8 |
1359 | jmp irq_return | |
1360 | paranoid_userspace: | |
1361 | GET_THREAD_INFO(%rcx) | |
1362 | movl TI_flags(%rcx),%ebx | |
1363 | andl $_TIF_WORK_MASK,%ebx | |
1364 | jz paranoid_swapgs | |
1365 | movq %rsp,%rdi /* &pt_regs */ | |
1366 | call sync_regs | |
1367 | movq %rax,%rsp /* switch stack for scheduling */ | |
1368 | testl $_TIF_NEED_RESCHED,%ebx | |
1369 | jnz paranoid_schedule | |
1370 | movl %ebx,%edx /* arg3: thread flags */ | |
1371 | TRACE_IRQS_ON | |
1372 | ENABLE_INTERRUPTS(CLBR_NONE) | |
1373 | xorl %esi,%esi /* arg2: oldset */ | |
1374 | movq %rsp,%rdi /* arg1: &pt_regs */ | |
1375 | call do_notify_resume | |
1376 | DISABLE_INTERRUPTS(CLBR_NONE) | |
1377 | TRACE_IRQS_OFF | |
1378 | jmp paranoid_userspace | |
1379 | paranoid_schedule: | |
1380 | TRACE_IRQS_ON | |
1381 | ENABLE_INTERRUPTS(CLBR_ANY) | |
0430499c | 1382 | SCHEDULE_USER |
ddeb8f21 AH |
1383 | DISABLE_INTERRUPTS(CLBR_ANY) |
1384 | TRACE_IRQS_OFF | |
1385 | jmp paranoid_userspace | |
1386 | CFI_ENDPROC | |
1387 | END(paranoid_exit) | |
1388 | ||
1389 | /* | |
1390 | * Exception entry point. This expects an error code/orig_rax on the stack. | |
1391 | * returns in "no swapgs flag" in %ebx. | |
1392 | */ | |
1393 | ENTRY(error_entry) | |
1394 | XCPT_FRAME | |
1395 | CFI_ADJUST_CFA_OFFSET 15*8 | |
1396 | /* oldrax contains error code */ | |
1397 | cld | |
1398 | movq_cfi rdi, RDI+8 | |
1399 | movq_cfi rsi, RSI+8 | |
1400 | movq_cfi rdx, RDX+8 | |
1401 | movq_cfi rcx, RCX+8 | |
1402 | movq_cfi rax, RAX+8 | |
1403 | movq_cfi r8, R8+8 | |
1404 | movq_cfi r9, R9+8 | |
1405 | movq_cfi r10, R10+8 | |
1406 | movq_cfi r11, R11+8 | |
1407 | movq_cfi rbx, RBX+8 | |
1408 | movq_cfi rbp, RBP+8 | |
1409 | movq_cfi r12, R12+8 | |
1410 | movq_cfi r13, R13+8 | |
1411 | movq_cfi r14, R14+8 | |
1412 | movq_cfi r15, R15+8 | |
1413 | xorl %ebx,%ebx | |
1414 | testl $3,CS+8(%rsp) | |
1415 | je error_kernelspace | |
1416 | error_swapgs: | |
1417 | SWAPGS | |
1418 | error_sti: | |
1419 | TRACE_IRQS_OFF | |
1420 | ret | |
ddeb8f21 AH |
1421 | |
1422 | /* | |
1423 | * There are two places in the kernel that can potentially fault with | |
1424 | * usergs. Handle them here. The exception handlers after iret run with | |
1425 | * kernel gs again, so don't set the user space flag. B stepping K8s | |
1426 | * sometimes report an truncated RIP for IRET exceptions returning to | |
1427 | * compat mode. Check for these here too. | |
1428 | */ | |
1429 | error_kernelspace: | |
1430 | incl %ebx | |
3891a04a | 1431 | leaq irq_return_iret(%rip),%rcx |
ddeb8f21 AH |
1432 | cmpq %rcx,RIP+8(%rsp) |
1433 | je error_swapgs | |
ae24ffe5 BG |
1434 | movl %ecx,%eax /* zero extend */ |
1435 | cmpq %rax,RIP+8(%rsp) | |
1436 | je bstep_iret | |
ddeb8f21 | 1437 | cmpq $gs_change,RIP+8(%rsp) |
9f1e87ea | 1438 | je error_swapgs |
ddeb8f21 | 1439 | jmp error_sti |
ae24ffe5 BG |
1440 | |
1441 | bstep_iret: | |
1442 | /* Fix truncated RIP */ | |
1443 | movq %rcx,RIP+8(%rsp) | |
97829de5 | 1444 | jmp error_swapgs |
e6b04b6b | 1445 | CFI_ENDPROC |
ddeb8f21 AH |
1446 | END(error_entry) |
1447 | ||
1448 | ||
1449 | /* ebx: no swapgs flag (1: don't need swapgs, 0: need it) */ | |
1450 | ENTRY(error_exit) | |
1451 | DEFAULT_FRAME | |
1452 | movl %ebx,%eax | |
1453 | RESTORE_REST | |
1454 | DISABLE_INTERRUPTS(CLBR_NONE) | |
1455 | TRACE_IRQS_OFF | |
1456 | GET_THREAD_INFO(%rcx) | |
1457 | testl %eax,%eax | |
1458 | jne retint_kernel | |
1459 | LOCKDEP_SYS_EXIT_IRQ | |
1460 | movl TI_flags(%rcx),%edx | |
1461 | movl $_TIF_WORK_MASK,%edi | |
1462 | andl %edi,%edx | |
1463 | jnz retint_careful | |
1464 | jmp retint_swapgs | |
1465 | CFI_ENDPROC | |
1466 | END(error_exit) | |
1467 | ||
3f3c8b8c SR |
1468 | /* |
1469 | * Test if a given stack is an NMI stack or not. | |
1470 | */ | |
1471 | .macro test_in_nmi reg stack nmi_ret normal_ret | |
1472 | cmpq %\reg, \stack | |
1473 | ja \normal_ret | |
1474 | subq $EXCEPTION_STKSZ, %\reg | |
1475 | cmpq %\reg, \stack | |
1476 | jb \normal_ret | |
1477 | jmp \nmi_ret | |
1478 | .endm | |
ddeb8f21 AH |
1479 | |
1480 | /* runs on exception stack */ | |
1481 | ENTRY(nmi) | |
1482 | INTR_FRAME | |
1483 | PARAVIRT_ADJUST_EXCEPTION_FRAME | |
3f3c8b8c SR |
1484 | /* |
1485 | * We allow breakpoints in NMIs. If a breakpoint occurs, then | |
1486 | * the iretq it performs will take us out of NMI context. | |
1487 | * This means that we can have nested NMIs where the next | |
1488 | * NMI is using the top of the stack of the previous NMI. We | |
1489 | * can't let it execute because the nested NMI will corrupt the | |
1490 | * stack of the previous NMI. NMI handlers are not re-entrant | |
1491 | * anyway. | |
1492 | * | |
1493 | * To handle this case we do the following: | |
1494 | * Check the a special location on the stack that contains | |
1495 | * a variable that is set when NMIs are executing. | |
1496 | * The interrupted task's stack is also checked to see if it | |
1497 | * is an NMI stack. | |
1498 | * If the variable is not set and the stack is not the NMI | |
1499 | * stack then: | |
1500 | * o Set the special variable on the stack | |
1501 | * o Copy the interrupt frame into a "saved" location on the stack | |
1502 | * o Copy the interrupt frame into a "copy" location on the stack | |
1503 | * o Continue processing the NMI | |
1504 | * If the variable is set or the previous stack is the NMI stack: | |
1505 | * o Modify the "copy" location to jump to the repeate_nmi | |
1506 | * o return back to the first NMI | |
1507 | * | |
1508 | * Now on exit of the first NMI, we first clear the stack variable | |
1509 | * The NMI stack will tell any nested NMIs at that point that it is | |
1510 | * nested. Then we pop the stack normally with iret, and if there was | |
1511 | * a nested NMI that updated the copy interrupt stack frame, a | |
1512 | * jump will be made to the repeat_nmi code that will handle the second | |
1513 | * NMI. | |
1514 | */ | |
1515 | ||
1516 | /* Use %rdx as out temp variable throughout */ | |
1517 | pushq_cfi %rdx | |
62610913 | 1518 | CFI_REL_OFFSET rdx, 0 |
3f3c8b8c | 1519 | |
45d5a168 SR |
1520 | /* |
1521 | * If %cs was not the kernel segment, then the NMI triggered in user | |
1522 | * space, which means it is definitely not nested. | |
1523 | */ | |
a38449ef | 1524 | cmpl $__KERNEL_CS, 16(%rsp) |
45d5a168 SR |
1525 | jne first_nmi |
1526 | ||
3f3c8b8c SR |
1527 | /* |
1528 | * Check the special variable on the stack to see if NMIs are | |
1529 | * executing. | |
1530 | */ | |
a38449ef | 1531 | cmpl $1, -8(%rsp) |
3f3c8b8c SR |
1532 | je nested_nmi |
1533 | ||
1534 | /* | |
1535 | * Now test if the previous stack was an NMI stack. | |
1536 | * We need the double check. We check the NMI stack to satisfy the | |
1537 | * race when the first NMI clears the variable before returning. | |
1538 | * We check the variable because the first NMI could be in a | |
1539 | * breakpoint routine using a breakpoint stack. | |
1540 | */ | |
1541 | lea 6*8(%rsp), %rdx | |
1542 | test_in_nmi rdx, 4*8(%rsp), nested_nmi, first_nmi | |
62610913 | 1543 | CFI_REMEMBER_STATE |
3f3c8b8c SR |
1544 | |
1545 | nested_nmi: | |
1546 | /* | |
1547 | * Do nothing if we interrupted the fixup in repeat_nmi. | |
1548 | * It's about to repeat the NMI handler, so we are fine | |
1549 | * with ignoring this one. | |
1550 | */ | |
1551 | movq $repeat_nmi, %rdx | |
1552 | cmpq 8(%rsp), %rdx | |
1553 | ja 1f | |
1554 | movq $end_repeat_nmi, %rdx | |
1555 | cmpq 8(%rsp), %rdx | |
1556 | ja nested_nmi_out | |
1557 | ||
1558 | 1: | |
1559 | /* Set up the interrupted NMIs stack to jump to repeat_nmi */ | |
28696f43 | 1560 | leaq -1*8(%rsp), %rdx |
3f3c8b8c | 1561 | movq %rdx, %rsp |
28696f43 SQ |
1562 | CFI_ADJUST_CFA_OFFSET 1*8 |
1563 | leaq -10*8(%rsp), %rdx | |
3f3c8b8c SR |
1564 | pushq_cfi $__KERNEL_DS |
1565 | pushq_cfi %rdx | |
1566 | pushfq_cfi | |
1567 | pushq_cfi $__KERNEL_CS | |
1568 | pushq_cfi $repeat_nmi | |
1569 | ||
1570 | /* Put stack back */ | |
28696f43 SQ |
1571 | addq $(6*8), %rsp |
1572 | CFI_ADJUST_CFA_OFFSET -6*8 | |
3f3c8b8c SR |
1573 | |
1574 | nested_nmi_out: | |
1575 | popq_cfi %rdx | |
62610913 | 1576 | CFI_RESTORE rdx |
3f3c8b8c SR |
1577 | |
1578 | /* No need to check faults here */ | |
1579 | INTERRUPT_RETURN | |
1580 | ||
62610913 | 1581 | CFI_RESTORE_STATE |
3f3c8b8c SR |
1582 | first_nmi: |
1583 | /* | |
1584 | * Because nested NMIs will use the pushed location that we | |
1585 | * stored in rdx, we must keep that space available. | |
1586 | * Here's what our stack frame will look like: | |
1587 | * +-------------------------+ | |
1588 | * | original SS | | |
1589 | * | original Return RSP | | |
1590 | * | original RFLAGS | | |
1591 | * | original CS | | |
1592 | * | original RIP | | |
1593 | * +-------------------------+ | |
1594 | * | temp storage for rdx | | |
1595 | * +-------------------------+ | |
1596 | * | NMI executing variable | | |
1597 | * +-------------------------+ | |
3f3c8b8c SR |
1598 | * | copied SS | |
1599 | * | copied Return RSP | | |
1600 | * | copied RFLAGS | | |
1601 | * | copied CS | | |
1602 | * | copied RIP | | |
1603 | * +-------------------------+ | |
28696f43 SQ |
1604 | * | Saved SS | |
1605 | * | Saved Return RSP | | |
1606 | * | Saved RFLAGS | | |
1607 | * | Saved CS | | |
1608 | * | Saved RIP | | |
1609 | * +-------------------------+ | |
3f3c8b8c SR |
1610 | * | pt_regs | |
1611 | * +-------------------------+ | |
1612 | * | |
79fb4ad6 SR |
1613 | * The saved stack frame is used to fix up the copied stack frame |
1614 | * that a nested NMI may change to make the interrupted NMI iret jump | |
1615 | * to the repeat_nmi. The original stack frame and the temp storage | |
3f3c8b8c SR |
1616 | * is also used by nested NMIs and can not be trusted on exit. |
1617 | */ | |
79fb4ad6 | 1618 | /* Do not pop rdx, nested NMIs will corrupt that part of the stack */ |
62610913 JB |
1619 | movq (%rsp), %rdx |
1620 | CFI_RESTORE rdx | |
1621 | ||
3f3c8b8c SR |
1622 | /* Set the NMI executing variable on the stack. */ |
1623 | pushq_cfi $1 | |
1624 | ||
28696f43 SQ |
1625 | /* |
1626 | * Leave room for the "copied" frame | |
1627 | */ | |
1628 | subq $(5*8), %rsp | |
444723dc | 1629 | CFI_ADJUST_CFA_OFFSET 5*8 |
28696f43 | 1630 | |
3f3c8b8c SR |
1631 | /* Copy the stack frame to the Saved frame */ |
1632 | .rept 5 | |
28696f43 | 1633 | pushq_cfi 11*8(%rsp) |
3f3c8b8c | 1634 | .endr |
62610913 JB |
1635 | CFI_DEF_CFA_OFFSET SS+8-RIP |
1636 | ||
79fb4ad6 SR |
1637 | /* Everything up to here is safe from nested NMIs */ |
1638 | ||
62610913 JB |
1639 | /* |
1640 | * If there was a nested NMI, the first NMI's iret will return | |
1641 | * here. But NMIs are still enabled and we can take another | |
1642 | * nested NMI. The nested NMI checks the interrupted RIP to see | |
1643 | * if it is between repeat_nmi and end_repeat_nmi, and if so | |
1644 | * it will just return, as we are about to repeat an NMI anyway. | |
1645 | * This makes it safe to copy to the stack frame that a nested | |
1646 | * NMI will update. | |
1647 | */ | |
1648 | repeat_nmi: | |
1649 | /* | |
1650 | * Update the stack variable to say we are still in NMI (the update | |
1651 | * is benign for the non-repeat case, where 1 was pushed just above | |
1652 | * to this very stack slot). | |
1653 | */ | |
28696f43 | 1654 | movq $1, 10*8(%rsp) |
3f3c8b8c SR |
1655 | |
1656 | /* Make another copy, this one may be modified by nested NMIs */ | |
28696f43 SQ |
1657 | addq $(10*8), %rsp |
1658 | CFI_ADJUST_CFA_OFFSET -10*8 | |
3f3c8b8c | 1659 | .rept 5 |
28696f43 | 1660 | pushq_cfi -6*8(%rsp) |
3f3c8b8c | 1661 | .endr |
28696f43 | 1662 | subq $(5*8), %rsp |
62610913 JB |
1663 | CFI_DEF_CFA_OFFSET SS+8-RIP |
1664 | end_repeat_nmi: | |
3f3c8b8c SR |
1665 | |
1666 | /* | |
1667 | * Everything below this point can be preempted by a nested | |
79fb4ad6 SR |
1668 | * NMI if the first NMI took an exception and reset our iret stack |
1669 | * so that we repeat another NMI. | |
3f3c8b8c | 1670 | */ |
1fd466ef | 1671 | pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */ |
b1cccb1b JB |
1672 | subq $ORIG_RAX-R15, %rsp |
1673 | CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15 | |
1fd466ef SR |
1674 | /* |
1675 | * Use save_paranoid to handle SWAPGS, but no need to use paranoid_exit | |
1676 | * as we should not be calling schedule in NMI context. | |
1677 | * Even with normal interrupts enabled. An NMI should not be | |
1678 | * setting NEED_RESCHED or anything that normal interrupts and | |
1679 | * exceptions might do. | |
1680 | */ | |
ddeb8f21 AH |
1681 | call save_paranoid |
1682 | DEFAULT_FRAME 0 | |
7fbb98c5 SR |
1683 | |
1684 | /* | |
1685 | * Save off the CR2 register. If we take a page fault in the NMI then | |
1686 | * it could corrupt the CR2 value. If the NMI preempts a page fault | |
1687 | * handler before it was able to read the CR2 register, and then the | |
1688 | * NMI itself takes a page fault, the page fault that was preempted | |
1689 | * will read the information from the NMI page fault and not the | |
1690 | * origin fault. Save it off and restore it if it changes. | |
1691 | * Use the r12 callee-saved register. | |
1692 | */ | |
1693 | movq %cr2, %r12 | |
1694 | ||
ddeb8f21 AH |
1695 | /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */ |
1696 | movq %rsp,%rdi | |
1697 | movq $-1,%rsi | |
1698 | call do_nmi | |
7fbb98c5 SR |
1699 | |
1700 | /* Did the NMI take a page fault? Restore cr2 if it did */ | |
1701 | movq %cr2, %rcx | |
1702 | cmpq %rcx, %r12 | |
1703 | je 1f | |
1704 | movq %r12, %cr2 | |
1705 | 1: | |
1706 | ||
ddeb8f21 AH |
1707 | testl %ebx,%ebx /* swapgs needed? */ |
1708 | jnz nmi_restore | |
ddeb8f21 AH |
1709 | nmi_swapgs: |
1710 | SWAPGS_UNSAFE_STACK | |
1711 | nmi_restore: | |
444723dc JB |
1712 | /* Pop the extra iret frame at once */ |
1713 | RESTORE_ALL 6*8 | |
28696f43 | 1714 | |
3f3c8b8c | 1715 | /* Clear the NMI executing stack variable */ |
28696f43 | 1716 | movq $0, 5*8(%rsp) |
ddeb8f21 | 1717 | jmp irq_return |
9f1e87ea | 1718 | CFI_ENDPROC |
ddeb8f21 AH |
1719 | END(nmi) |
1720 | ||
1721 | ENTRY(ignore_sysret) | |
1722 | CFI_STARTPROC | |
1723 | mov $-ENOSYS,%eax | |
1724 | sysret | |
1725 | CFI_ENDPROC | |
1726 | END(ignore_sysret) | |
1727 |