Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * linux/arch/x86_64/entry.S | |
3 | * | |
4 | * Copyright (C) 1991, 1992 Linus Torvalds | |
5 | * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs | |
6 | * Copyright (C) 2000 Pavel Machek <pavel@suse.cz> | |
1da177e4 LT |
7 | */ |
8 | ||
9 | /* | |
10 | * entry.S contains the system-call and fault low-level handling routines. | |
11 | * | |
8b4777a4 AL |
12 | * Some of this is documented in Documentation/x86/entry_64.txt |
13 | * | |
1da177e4 LT |
14 | * NOTE: This code handles signal-recognition, which happens every time |
15 | * after an interrupt and after each system call. | |
0bd7b798 AH |
16 | * |
17 | * Normal syscalls and interrupts don't save a full stack frame, this is | |
1da177e4 | 18 | * only done for syscall tracing, signals or fork/exec et.al. |
0bd7b798 AH |
19 | * |
20 | * A note on terminology: | |
21 | * - top of stack: Architecture defined interrupt frame from SS to RIP | |
22 | * at the top of the kernel process stack. | |
0d2eb44f | 23 | * - partial stack frame: partially saved registers up to R11. |
0bd7b798 | 24 | * - full stack frame: Like partial stack frame, but all register saved. |
2e91a17b AK |
25 | * |
26 | * Some macro usage: | |
27 | * - CFI macros are used to generate dwarf2 unwind information for better | |
28 | * backtraces. They don't change any code. | |
29 | * - SAVE_ALL/RESTORE_ALL - Save/restore all registers | |
30 | * - SAVE_ARGS/RESTORE_ARGS - Save/restore registers that C functions modify. | |
31 | * There are unfortunately lots of special cases where some registers | |
32 | * not touched. The macro is a big mess that should be cleaned up. | |
33 | * - SAVE_REST/RESTORE_REST - Handle the registers not saved by SAVE_ARGS. | |
34 | * Gives a full stack frame. | |
35 | * - ENTRY/END Define functions in the symbol table. | |
36 | * - FIXUP_TOP_OF_STACK/RESTORE_TOP_OF_STACK - Fix up the hardware stack | |
37 | * frame that is otherwise undefined after a SYSCALL | |
38 | * - TRACE_IRQ_* - Trace hard interrupt state for lock debugging. | |
39 | * - errorentry/paranoidentry/zeroentry - Define exception entry points. | |
1da177e4 LT |
40 | */ |
41 | ||
1da177e4 LT |
42 | #include <linux/linkage.h> |
43 | #include <asm/segment.h> | |
1da177e4 LT |
44 | #include <asm/cache.h> |
45 | #include <asm/errno.h> | |
46 | #include <asm/dwarf2.h> | |
47 | #include <asm/calling.h> | |
e2d5df93 | 48 | #include <asm/asm-offsets.h> |
1da177e4 LT |
49 | #include <asm/msr.h> |
50 | #include <asm/unistd.h> | |
51 | #include <asm/thread_info.h> | |
52 | #include <asm/hw_irq.h> | |
0341c14d | 53 | #include <asm/page_types.h> |
2601e64d | 54 | #include <asm/irqflags.h> |
72fe4858 | 55 | #include <asm/paravirt.h> |
395a59d0 | 56 | #include <asm/ftrace.h> |
9939ddaf | 57 | #include <asm/percpu.h> |
d7abc0fa | 58 | #include <asm/asm.h> |
d7e7528b | 59 | #include <linux/err.h> |
1da177e4 | 60 | |
86a1c34a RM |
61 | /* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this. */ |
62 | #include <linux/elf-em.h> | |
63 | #define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE) | |
64 | #define __AUDIT_ARCH_64BIT 0x80000000 | |
65 | #define __AUDIT_ARCH_LE 0x40000000 | |
66 | ||
1da177e4 | 67 | .code64 |
ea714547 JO |
68 | .section .entry.text, "ax" |
69 | ||
606576ce | 70 | #ifdef CONFIG_FUNCTION_TRACER |
d61f82d0 SR |
71 | #ifdef CONFIG_DYNAMIC_FTRACE |
72 | ENTRY(mcount) | |
d61f82d0 SR |
73 | retq |
74 | END(mcount) | |
75 | ||
76 | ENTRY(ftrace_caller) | |
60a7ecf4 SR |
77 | cmpl $0, function_trace_stop |
78 | jne ftrace_stub | |
d61f82d0 | 79 | |
d680fe44 | 80 | MCOUNT_SAVE_FRAME |
d61f82d0 SR |
81 | |
82 | movq 0x38(%rsp), %rdi | |
83 | movq 8(%rbp), %rsi | |
395a59d0 | 84 | subq $MCOUNT_INSN_SIZE, %rdi |
d61f82d0 | 85 | |
bc8b2b92 | 86 | GLOBAL(ftrace_call) |
d61f82d0 SR |
87 | call ftrace_stub |
88 | ||
d680fe44 | 89 | MCOUNT_RESTORE_FRAME |
d61f82d0 | 90 | |
48d68b20 | 91 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER |
bc8b2b92 | 92 | GLOBAL(ftrace_graph_call) |
48d68b20 FW |
93 | jmp ftrace_stub |
94 | #endif | |
d61f82d0 | 95 | |
bc8b2b92 | 96 | GLOBAL(ftrace_stub) |
d61f82d0 SR |
97 | retq |
98 | END(ftrace_caller) | |
99 | ||
100 | #else /* ! CONFIG_DYNAMIC_FTRACE */ | |
16444a8a | 101 | ENTRY(mcount) |
60a7ecf4 SR |
102 | cmpl $0, function_trace_stop |
103 | jne ftrace_stub | |
104 | ||
16444a8a ACM |
105 | cmpq $ftrace_stub, ftrace_trace_function |
106 | jnz trace | |
48d68b20 FW |
107 | |
108 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER | |
109 | cmpq $ftrace_stub, ftrace_graph_return | |
110 | jnz ftrace_graph_caller | |
e49dc19c SR |
111 | |
112 | cmpq $ftrace_graph_entry_stub, ftrace_graph_entry | |
113 | jnz ftrace_graph_caller | |
48d68b20 FW |
114 | #endif |
115 | ||
bc8b2b92 | 116 | GLOBAL(ftrace_stub) |
16444a8a ACM |
117 | retq |
118 | ||
119 | trace: | |
d680fe44 | 120 | MCOUNT_SAVE_FRAME |
16444a8a ACM |
121 | |
122 | movq 0x38(%rsp), %rdi | |
123 | movq 8(%rbp), %rsi | |
395a59d0 | 124 | subq $MCOUNT_INSN_SIZE, %rdi |
16444a8a ACM |
125 | |
126 | call *ftrace_trace_function | |
127 | ||
d680fe44 | 128 | MCOUNT_RESTORE_FRAME |
16444a8a ACM |
129 | |
130 | jmp ftrace_stub | |
131 | END(mcount) | |
d61f82d0 | 132 | #endif /* CONFIG_DYNAMIC_FTRACE */ |
606576ce | 133 | #endif /* CONFIG_FUNCTION_TRACER */ |
16444a8a | 134 | |
48d68b20 FW |
135 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER |
136 | ENTRY(ftrace_graph_caller) | |
137 | cmpl $0, function_trace_stop | |
138 | jne ftrace_stub | |
139 | ||
d680fe44 | 140 | MCOUNT_SAVE_FRAME |
48d68b20 FW |
141 | |
142 | leaq 8(%rbp), %rdi | |
143 | movq 0x38(%rsp), %rsi | |
71e308a2 | 144 | movq (%rbp), %rdx |
bb4304c7 | 145 | subq $MCOUNT_INSN_SIZE, %rsi |
48d68b20 FW |
146 | |
147 | call prepare_ftrace_return | |
148 | ||
d680fe44 CG |
149 | MCOUNT_RESTORE_FRAME |
150 | ||
48d68b20 FW |
151 | retq |
152 | END(ftrace_graph_caller) | |
153 | ||
bc8b2b92 | 154 | GLOBAL(return_to_handler) |
4818d809 | 155 | subq $24, %rsp |
48d68b20 | 156 | |
e71e99c2 | 157 | /* Save the return values */ |
16444a8a | 158 | movq %rax, (%rsp) |
e71e99c2 | 159 | movq %rdx, 8(%rsp) |
71e308a2 | 160 | movq %rbp, %rdi |
16444a8a | 161 | |
48d68b20 | 162 | call ftrace_return_to_handler |
16444a8a | 163 | |
194ec341 | 164 | movq %rax, %rdi |
e71e99c2 | 165 | movq 8(%rsp), %rdx |
16444a8a | 166 | movq (%rsp), %rax |
194ec341 SR |
167 | addq $24, %rsp |
168 | jmp *%rdi | |
48d68b20 | 169 | #endif |
16444a8a | 170 | |
16444a8a | 171 | |
dc37db4d | 172 | #ifndef CONFIG_PREEMPT |
1da177e4 | 173 | #define retint_kernel retint_restore_args |
0bd7b798 | 174 | #endif |
2601e64d | 175 | |
72fe4858 | 176 | #ifdef CONFIG_PARAVIRT |
2be29982 | 177 | ENTRY(native_usergs_sysret64) |
72fe4858 GOC |
178 | swapgs |
179 | sysretq | |
b3baaa13 | 180 | ENDPROC(native_usergs_sysret64) |
72fe4858 GOC |
181 | #endif /* CONFIG_PARAVIRT */ |
182 | ||
2601e64d IM |
183 | |
184 | .macro TRACE_IRQS_IRETQ offset=ARGOFFSET | |
185 | #ifdef CONFIG_TRACE_IRQFLAGS | |
186 | bt $9,EFLAGS-\offset(%rsp) /* interrupts off? */ | |
187 | jnc 1f | |
188 | TRACE_IRQS_ON | |
189 | 1: | |
190 | #endif | |
191 | .endm | |
192 | ||
5963e317 SR |
193 | /* |
194 | * When dynamic function tracer is enabled it will add a breakpoint | |
195 | * to all locations that it is about to modify, sync CPUs, update | |
196 | * all the code, sync CPUs, then remove the breakpoints. In this time | |
197 | * if lockdep is enabled, it might jump back into the debug handler | |
198 | * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF). | |
199 | * | |
200 | * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to | |
201 | * make sure the stack pointer does not get reset back to the top | |
202 | * of the debug stack, and instead just reuses the current stack. | |
203 | */ | |
204 | #if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS) | |
205 | ||
206 | .macro TRACE_IRQS_OFF_DEBUG | |
207 | call debug_stack_set_zero | |
208 | TRACE_IRQS_OFF | |
209 | call debug_stack_reset | |
210 | .endm | |
211 | ||
212 | .macro TRACE_IRQS_ON_DEBUG | |
213 | call debug_stack_set_zero | |
214 | TRACE_IRQS_ON | |
215 | call debug_stack_reset | |
216 | .endm | |
217 | ||
218 | .macro TRACE_IRQS_IRETQ_DEBUG offset=ARGOFFSET | |
219 | bt $9,EFLAGS-\offset(%rsp) /* interrupts off? */ | |
220 | jnc 1f | |
221 | TRACE_IRQS_ON_DEBUG | |
222 | 1: | |
223 | .endm | |
224 | ||
225 | #else | |
226 | # define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF | |
227 | # define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON | |
228 | # define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ | |
229 | #endif | |
230 | ||
1da177e4 | 231 | /* |
0bd7b798 AH |
232 | * C code is not supposed to know about undefined top of stack. Every time |
233 | * a C function with an pt_regs argument is called from the SYSCALL based | |
1da177e4 LT |
234 | * fast path FIXUP_TOP_OF_STACK is needed. |
235 | * RESTORE_TOP_OF_STACK syncs the syscall state after any possible ptregs | |
236 | * manipulation. | |
0bd7b798 AH |
237 | */ |
238 | ||
239 | /* %rsp:at FRAMEEND */ | |
c002a1e6 | 240 | .macro FIXUP_TOP_OF_STACK tmp offset=0 |
3d1e42a7 | 241 | movq PER_CPU_VAR(old_rsp),\tmp |
c002a1e6 AH |
242 | movq \tmp,RSP+\offset(%rsp) |
243 | movq $__USER_DS,SS+\offset(%rsp) | |
244 | movq $__USER_CS,CS+\offset(%rsp) | |
245 | movq $-1,RCX+\offset(%rsp) | |
246 | movq R11+\offset(%rsp),\tmp /* get eflags */ | |
247 | movq \tmp,EFLAGS+\offset(%rsp) | |
1da177e4 LT |
248 | .endm |
249 | ||
c002a1e6 AH |
250 | .macro RESTORE_TOP_OF_STACK tmp offset=0 |
251 | movq RSP+\offset(%rsp),\tmp | |
3d1e42a7 | 252 | movq \tmp,PER_CPU_VAR(old_rsp) |
c002a1e6 AH |
253 | movq EFLAGS+\offset(%rsp),\tmp |
254 | movq \tmp,R11+\offset(%rsp) | |
1da177e4 LT |
255 | .endm |
256 | ||
257 | .macro FAKE_STACK_FRAME child_rip | |
258 | /* push in order ss, rsp, eflags, cs, rip */ | |
3829ee6b | 259 | xorl %eax, %eax |
df5d1874 | 260 | pushq_cfi $__KERNEL_DS /* ss */ |
7effaa88 | 261 | /*CFI_REL_OFFSET ss,0*/ |
df5d1874 | 262 | pushq_cfi %rax /* rsp */ |
7effaa88 | 263 | CFI_REL_OFFSET rsp,0 |
1cf8343f | 264 | pushq_cfi $(X86_EFLAGS_IF|X86_EFLAGS_BIT1) /* eflags - interrupts on */ |
7effaa88 | 265 | /*CFI_REL_OFFSET rflags,0*/ |
df5d1874 | 266 | pushq_cfi $__KERNEL_CS /* cs */ |
7effaa88 | 267 | /*CFI_REL_OFFSET cs,0*/ |
df5d1874 | 268 | pushq_cfi \child_rip /* rip */ |
7effaa88 | 269 | CFI_REL_OFFSET rip,0 |
df5d1874 | 270 | pushq_cfi %rax /* orig rax */ |
1da177e4 LT |
271 | .endm |
272 | ||
273 | .macro UNFAKE_STACK_FRAME | |
274 | addq $8*6, %rsp | |
275 | CFI_ADJUST_CFA_OFFSET -(6*8) | |
276 | .endm | |
277 | ||
dcd072e2 AH |
278 | /* |
279 | * initial frame state for interrupts (and exceptions without error code) | |
280 | */ | |
281 | .macro EMPTY_FRAME start=1 offset=0 | |
7effaa88 | 282 | .if \start |
dcd072e2 | 283 | CFI_STARTPROC simple |
adf14236 | 284 | CFI_SIGNAL_FRAME |
dcd072e2 | 285 | CFI_DEF_CFA rsp,8+\offset |
7effaa88 | 286 | .else |
dcd072e2 | 287 | CFI_DEF_CFA_OFFSET 8+\offset |
7effaa88 | 288 | .endif |
1da177e4 | 289 | .endm |
d99015b1 AH |
290 | |
291 | /* | |
dcd072e2 | 292 | * initial frame state for interrupts (and exceptions without error code) |
d99015b1 | 293 | */ |
dcd072e2 | 294 | .macro INTR_FRAME start=1 offset=0 |
e8a0e276 IM |
295 | EMPTY_FRAME \start, SS+8+\offset-RIP |
296 | /*CFI_REL_OFFSET ss, SS+\offset-RIP*/ | |
297 | CFI_REL_OFFSET rsp, RSP+\offset-RIP | |
298 | /*CFI_REL_OFFSET rflags, EFLAGS+\offset-RIP*/ | |
299 | /*CFI_REL_OFFSET cs, CS+\offset-RIP*/ | |
300 | CFI_REL_OFFSET rip, RIP+\offset-RIP | |
d99015b1 AH |
301 | .endm |
302 | ||
d99015b1 AH |
303 | /* |
304 | * initial frame state for exceptions with error code (and interrupts | |
305 | * with vector already pushed) | |
306 | */ | |
dcd072e2 | 307 | .macro XCPT_FRAME start=1 offset=0 |
e8a0e276 | 308 | INTR_FRAME \start, RIP+\offset-ORIG_RAX |
dcd072e2 AH |
309 | /*CFI_REL_OFFSET orig_rax, ORIG_RAX-ORIG_RAX*/ |
310 | .endm | |
311 | ||
312 | /* | |
313 | * frame that enables calling into C. | |
314 | */ | |
315 | .macro PARTIAL_FRAME start=1 offset=0 | |
e8a0e276 IM |
316 | XCPT_FRAME \start, ORIG_RAX+\offset-ARGOFFSET |
317 | CFI_REL_OFFSET rdi, RDI+\offset-ARGOFFSET | |
318 | CFI_REL_OFFSET rsi, RSI+\offset-ARGOFFSET | |
319 | CFI_REL_OFFSET rdx, RDX+\offset-ARGOFFSET | |
320 | CFI_REL_OFFSET rcx, RCX+\offset-ARGOFFSET | |
321 | CFI_REL_OFFSET rax, RAX+\offset-ARGOFFSET | |
322 | CFI_REL_OFFSET r8, R8+\offset-ARGOFFSET | |
323 | CFI_REL_OFFSET r9, R9+\offset-ARGOFFSET | |
324 | CFI_REL_OFFSET r10, R10+\offset-ARGOFFSET | |
325 | CFI_REL_OFFSET r11, R11+\offset-ARGOFFSET | |
dcd072e2 AH |
326 | .endm |
327 | ||
328 | /* | |
329 | * frame that enables passing a complete pt_regs to a C function. | |
330 | */ | |
331 | .macro DEFAULT_FRAME start=1 offset=0 | |
e8a0e276 | 332 | PARTIAL_FRAME \start, R11+\offset-R15 |
dcd072e2 AH |
333 | CFI_REL_OFFSET rbx, RBX+\offset |
334 | CFI_REL_OFFSET rbp, RBP+\offset | |
335 | CFI_REL_OFFSET r12, R12+\offset | |
336 | CFI_REL_OFFSET r13, R13+\offset | |
337 | CFI_REL_OFFSET r14, R14+\offset | |
338 | CFI_REL_OFFSET r15, R15+\offset | |
339 | .endm | |
d99015b1 AH |
340 | |
341 | /* save partial stack frame */ | |
1871853f | 342 | .macro SAVE_ARGS_IRQ |
d99015b1 | 343 | cld |
1871853f FW |
344 | /* start from rbp in pt_regs and jump over */ |
345 | movq_cfi rdi, RDI-RBP | |
346 | movq_cfi rsi, RSI-RBP | |
347 | movq_cfi rdx, RDX-RBP | |
348 | movq_cfi rcx, RCX-RBP | |
349 | movq_cfi rax, RAX-RBP | |
350 | movq_cfi r8, R8-RBP | |
351 | movq_cfi r9, R9-RBP | |
352 | movq_cfi r10, R10-RBP | |
353 | movq_cfi r11, R11-RBP | |
354 | ||
a2bbe750 FW |
355 | /* Save rbp so that we can unwind from get_irq_regs() */ |
356 | movq_cfi rbp, 0 | |
357 | ||
358 | /* Save previous stack value */ | |
359 | movq %rsp, %rsi | |
3b99a3ef FW |
360 | |
361 | leaq -RBP(%rsp),%rdi /* arg1 for handler */ | |
69466466 | 362 | testl $3, CS-RBP(%rsi) |
d99015b1 AH |
363 | je 1f |
364 | SWAPGS | |
365 | /* | |
56895530 | 366 | * irq_count is used to check if a CPU is already on an interrupt stack |
d99015b1 AH |
367 | * or not. While this is essentially redundant with preempt_count it is |
368 | * a little cheaper to use a separate counter in the PDA (short of | |
369 | * moving irq_enter into assembly, which would be too much work) | |
370 | */ | |
56895530 | 371 | 1: incl PER_CPU_VAR(irq_count) |
69466466 | 372 | cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp |
eab9e613 | 373 | CFI_DEF_CFA_REGISTER rsi |
a2bbe750 | 374 | |
69466466 | 375 | /* Store previous stack value */ |
a2bbe750 | 376 | pushq %rsi |
eab9e613 JB |
377 | CFI_ESCAPE 0x0f /* DW_CFA_def_cfa_expression */, 6, \ |
378 | 0x77 /* DW_OP_breg7 */, 0, \ | |
379 | 0x06 /* DW_OP_deref */, \ | |
380 | 0x08 /* DW_OP_const1u */, SS+8-RBP, \ | |
381 | 0x22 /* DW_OP_plus */ | |
a2bbe750 FW |
382 | /* We entered an interrupt context - irqs are off: */ |
383 | TRACE_IRQS_OFF | |
1871853f | 384 | .endm |
d99015b1 | 385 | |
c002a1e6 AH |
386 | ENTRY(save_rest) |
387 | PARTIAL_FRAME 1 REST_SKIP+8 | |
388 | movq 5*8+16(%rsp), %r11 /* save return address */ | |
389 | movq_cfi rbx, RBX+16 | |
390 | movq_cfi rbp, RBP+16 | |
391 | movq_cfi r12, R12+16 | |
392 | movq_cfi r13, R13+16 | |
393 | movq_cfi r14, R14+16 | |
394 | movq_cfi r15, R15+16 | |
395 | movq %r11, 8(%rsp) /* return address */ | |
396 | FIXUP_TOP_OF_STACK %r11, 16 | |
397 | ret | |
398 | CFI_ENDPROC | |
399 | END(save_rest) | |
400 | ||
e2f6bc25 | 401 | /* save complete stack frame */ |
c2810188 | 402 | .pushsection .kprobes.text, "ax" |
e2f6bc25 AH |
403 | ENTRY(save_paranoid) |
404 | XCPT_FRAME 1 RDI+8 | |
405 | cld | |
406 | movq_cfi rdi, RDI+8 | |
407 | movq_cfi rsi, RSI+8 | |
408 | movq_cfi rdx, RDX+8 | |
409 | movq_cfi rcx, RCX+8 | |
410 | movq_cfi rax, RAX+8 | |
411 | movq_cfi r8, R8+8 | |
412 | movq_cfi r9, R9+8 | |
413 | movq_cfi r10, R10+8 | |
414 | movq_cfi r11, R11+8 | |
415 | movq_cfi rbx, RBX+8 | |
416 | movq_cfi rbp, RBP+8 | |
417 | movq_cfi r12, R12+8 | |
418 | movq_cfi r13, R13+8 | |
419 | movq_cfi r14, R14+8 | |
420 | movq_cfi r15, R15+8 | |
421 | movl $1,%ebx | |
422 | movl $MSR_GS_BASE,%ecx | |
423 | rdmsr | |
424 | testl %edx,%edx | |
425 | js 1f /* negative -> in kernel */ | |
426 | SWAPGS | |
427 | xorl %ebx,%ebx | |
428 | 1: ret | |
429 | CFI_ENDPROC | |
430 | END(save_paranoid) | |
c2810188 | 431 | .popsection |
e2f6bc25 | 432 | |
1da177e4 | 433 | /* |
5b3eec0c IM |
434 | * A newly forked process directly context switches into this address. |
435 | * | |
436 | * rdi: prev task we switched from | |
0bd7b798 | 437 | */ |
1da177e4 | 438 | ENTRY(ret_from_fork) |
dcd072e2 | 439 | DEFAULT_FRAME |
5b3eec0c | 440 | |
7106a5ab BL |
441 | LOCK ; btr $TIF_FORK,TI_flags(%r8) |
442 | ||
df5d1874 JB |
443 | pushq_cfi kernel_eflags(%rip) |
444 | popfq_cfi # reset kernel eflags | |
5b3eec0c IM |
445 | |
446 | call schedule_tail # rdi: 'prev' task parameter | |
447 | ||
1da177e4 | 448 | GET_THREAD_INFO(%rcx) |
5b3eec0c | 449 | |
1da177e4 | 450 | RESTORE_REST |
5b3eec0c IM |
451 | |
452 | testl $3, CS-ARGOFFSET(%rsp) # from kernel_thread? | |
70ea6855 | 453 | jz retint_restore_args |
5b3eec0c IM |
454 | |
455 | testl $_TIF_IA32, TI_flags(%rcx) # 32-bit compat task needs IRET | |
1da177e4 | 456 | jnz int_ret_from_sys_call |
5b3eec0c | 457 | |
c002a1e6 | 458 | RESTORE_TOP_OF_STACK %rdi, -ARGOFFSET |
5b3eec0c IM |
459 | jmp ret_from_sys_call # go to the SYSRET fastpath |
460 | ||
1da177e4 | 461 | CFI_ENDPROC |
4b787e0b | 462 | END(ret_from_fork) |
1da177e4 LT |
463 | |
464 | /* | |
0d2eb44f | 465 | * System call entry. Up to 6 arguments in registers are supported. |
1da177e4 LT |
466 | * |
467 | * SYSCALL does not save anything on the stack and does not change the | |
468 | * stack pointer. | |
469 | */ | |
0bd7b798 | 470 | |
1da177e4 | 471 | /* |
0bd7b798 | 472 | * Register setup: |
1da177e4 LT |
473 | * rax system call number |
474 | * rdi arg0 | |
0bd7b798 | 475 | * rcx return address for syscall/sysret, C arg3 |
1da177e4 | 476 | * rsi arg1 |
0bd7b798 | 477 | * rdx arg2 |
1da177e4 LT |
478 | * r10 arg3 (--> moved to rcx for C) |
479 | * r8 arg4 | |
480 | * r9 arg5 | |
481 | * r11 eflags for syscall/sysret, temporary for C | |
0bd7b798 AH |
482 | * r12-r15,rbp,rbx saved by C code, not touched. |
483 | * | |
1da177e4 LT |
484 | * Interrupts are off on entry. |
485 | * Only called from user space. | |
486 | * | |
487 | * XXX if we had a free scratch register we could save the RSP into the stack frame | |
488 | * and report it properly in ps. Unfortunately we haven't. | |
7bf36bbc AK |
489 | * |
490 | * When user can change the frames always force IRET. That is because | |
491 | * it deals with uncanonical addresses better. SYSRET has trouble | |
492 | * with them due to bugs in both AMD and Intel CPUs. | |
0bd7b798 | 493 | */ |
1da177e4 LT |
494 | |
495 | ENTRY(system_call) | |
7effaa88 | 496 | CFI_STARTPROC simple |
adf14236 | 497 | CFI_SIGNAL_FRAME |
9af45651 | 498 | CFI_DEF_CFA rsp,KERNEL_STACK_OFFSET |
7effaa88 JB |
499 | CFI_REGISTER rip,rcx |
500 | /*CFI_REGISTER rflags,r11*/ | |
72fe4858 GOC |
501 | SWAPGS_UNSAFE_STACK |
502 | /* | |
503 | * A hypervisor implementation might want to use a label | |
504 | * after the swapgs, so that it can do the swapgs | |
505 | * for the guest and jump here on syscall. | |
506 | */ | |
f6b2bc84 | 507 | GLOBAL(system_call_after_swapgs) |
72fe4858 | 508 | |
3d1e42a7 | 509 | movq %rsp,PER_CPU_VAR(old_rsp) |
9af45651 | 510 | movq PER_CPU_VAR(kernel_stack),%rsp |
2601e64d IM |
511 | /* |
512 | * No need to follow this irqs off/on section - it's straight | |
513 | * and short: | |
514 | */ | |
72fe4858 | 515 | ENABLE_INTERRUPTS(CLBR_NONE) |
cac0e0a7 | 516 | SAVE_ARGS 8,0 |
0bd7b798 | 517 | movq %rax,ORIG_RAX-ARGOFFSET(%rsp) |
7effaa88 JB |
518 | movq %rcx,RIP-ARGOFFSET(%rsp) |
519 | CFI_REL_OFFSET rip,RIP-ARGOFFSET | |
46db09d3 | 520 | testl $_TIF_WORK_SYSCALL_ENTRY,TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET) |
1da177e4 | 521 | jnz tracesys |
86a1c34a | 522 | system_call_fastpath: |
fca460f9 | 523 | #if __SYSCALL_MASK == ~0 |
1da177e4 | 524 | cmpq $__NR_syscall_max,%rax |
fca460f9 PA |
525 | #else |
526 | andl $__SYSCALL_MASK,%eax | |
527 | cmpl $__NR_syscall_max,%eax | |
528 | #endif | |
1da177e4 LT |
529 | ja badsys |
530 | movq %r10,%rcx | |
531 | call *sys_call_table(,%rax,8) # XXX: rip relative | |
532 | movq %rax,RAX-ARGOFFSET(%rsp) | |
533 | /* | |
534 | * Syscall return path ending with SYSRET (fast path) | |
0bd7b798 AH |
535 | * Has incomplete stack frame and undefined top of stack. |
536 | */ | |
1da177e4 | 537 | ret_from_sys_call: |
11b854b2 | 538 | movl $_TIF_ALLWORK_MASK,%edi |
1da177e4 | 539 | /* edi: flagmask */ |
0bd7b798 | 540 | sysret_check: |
10cd706d | 541 | LOCKDEP_SYS_EXIT |
72fe4858 | 542 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 543 | TRACE_IRQS_OFF |
46db09d3 | 544 | movl TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET),%edx |
1da177e4 | 545 | andl %edi,%edx |
0bd7b798 | 546 | jnz sysret_careful |
bcddc015 | 547 | CFI_REMEMBER_STATE |
2601e64d IM |
548 | /* |
549 | * sysretq will re-enable interrupts: | |
550 | */ | |
551 | TRACE_IRQS_ON | |
1da177e4 | 552 | movq RIP-ARGOFFSET(%rsp),%rcx |
7effaa88 | 553 | CFI_REGISTER rip,rcx |
838feb47 | 554 | RESTORE_ARGS 1,-ARG_SKIP,0 |
7effaa88 | 555 | /*CFI_REGISTER rflags,r11*/ |
3d1e42a7 | 556 | movq PER_CPU_VAR(old_rsp), %rsp |
2be29982 | 557 | USERGS_SYSRET64 |
1da177e4 | 558 | |
bcddc015 | 559 | CFI_RESTORE_STATE |
1da177e4 | 560 | /* Handle reschedules */ |
0bd7b798 | 561 | /* edx: work, edi: workmask */ |
1da177e4 LT |
562 | sysret_careful: |
563 | bt $TIF_NEED_RESCHED,%edx | |
564 | jnc sysret_signal | |
2601e64d | 565 | TRACE_IRQS_ON |
72fe4858 | 566 | ENABLE_INTERRUPTS(CLBR_NONE) |
df5d1874 | 567 | pushq_cfi %rdi |
1da177e4 | 568 | call schedule |
df5d1874 | 569 | popq_cfi %rdi |
1da177e4 LT |
570 | jmp sysret_check |
571 | ||
0bd7b798 | 572 | /* Handle a signal */ |
1da177e4 | 573 | sysret_signal: |
2601e64d | 574 | TRACE_IRQS_ON |
72fe4858 | 575 | ENABLE_INTERRUPTS(CLBR_NONE) |
86a1c34a RM |
576 | #ifdef CONFIG_AUDITSYSCALL |
577 | bt $TIF_SYSCALL_AUDIT,%edx | |
578 | jc sysret_audit | |
579 | #endif | |
b60e714d RM |
580 | /* |
581 | * We have a signal, or exit tracing or single-step. | |
582 | * These all wind up with the iret return path anyway, | |
583 | * so just join that path right now. | |
584 | */ | |
585 | FIXUP_TOP_OF_STACK %r11, -ARGOFFSET | |
586 | jmp int_check_syscall_exit_work | |
0bd7b798 | 587 | |
7effaa88 JB |
588 | badsys: |
589 | movq $-ENOSYS,RAX-ARGOFFSET(%rsp) | |
590 | jmp ret_from_sys_call | |
591 | ||
86a1c34a RM |
592 | #ifdef CONFIG_AUDITSYSCALL |
593 | /* | |
594 | * Fast path for syscall audit without full syscall trace. | |
b05d8447 | 595 | * We just call __audit_syscall_entry() directly, and then |
86a1c34a RM |
596 | * jump back to the normal fast path. |
597 | */ | |
598 | auditsys: | |
599 | movq %r10,%r9 /* 6th arg: 4th syscall arg */ | |
600 | movq %rdx,%r8 /* 5th arg: 3rd syscall arg */ | |
601 | movq %rsi,%rcx /* 4th arg: 2nd syscall arg */ | |
602 | movq %rdi,%rdx /* 3rd arg: 1st syscall arg */ | |
603 | movq %rax,%rsi /* 2nd arg: syscall number */ | |
604 | movl $AUDIT_ARCH_X86_64,%edi /* 1st arg: audit arch */ | |
b05d8447 | 605 | call __audit_syscall_entry |
86a1c34a RM |
606 | LOAD_ARGS 0 /* reload call-clobbered registers */ |
607 | jmp system_call_fastpath | |
608 | ||
609 | /* | |
d7e7528b | 610 | * Return fast path for syscall audit. Call __audit_syscall_exit() |
86a1c34a RM |
611 | * directly and then jump back to the fast path with TIF_SYSCALL_AUDIT |
612 | * masked off. | |
613 | */ | |
614 | sysret_audit: | |
03275591 | 615 | movq RAX-ARGOFFSET(%rsp),%rsi /* second arg, syscall return value */ |
d7e7528b EP |
616 | cmpq $-MAX_ERRNO,%rsi /* is it < -MAX_ERRNO? */ |
617 | setbe %al /* 1 if so, 0 if not */ | |
86a1c34a | 618 | movzbl %al,%edi /* zero-extend that into %edi */ |
d7e7528b | 619 | call __audit_syscall_exit |
86a1c34a RM |
620 | movl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT),%edi |
621 | jmp sysret_check | |
622 | #endif /* CONFIG_AUDITSYSCALL */ | |
623 | ||
1da177e4 | 624 | /* Do syscall tracing */ |
0bd7b798 | 625 | tracesys: |
86a1c34a | 626 | #ifdef CONFIG_AUDITSYSCALL |
46db09d3 | 627 | testl $(_TIF_WORK_SYSCALL_ENTRY & ~_TIF_SYSCALL_AUDIT),TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET) |
86a1c34a RM |
628 | jz auditsys |
629 | #endif | |
1da177e4 | 630 | SAVE_REST |
a31f8dd7 | 631 | movq $-ENOSYS,RAX(%rsp) /* ptrace can change this for a bad syscall */ |
1da177e4 LT |
632 | FIXUP_TOP_OF_STACK %rdi |
633 | movq %rsp,%rdi | |
634 | call syscall_trace_enter | |
d4d67150 RM |
635 | /* |
636 | * Reload arg registers from stack in case ptrace changed them. | |
637 | * We don't reload %rax because syscall_trace_enter() returned | |
638 | * the value it wants us to use in the table lookup. | |
639 | */ | |
640 | LOAD_ARGS ARGOFFSET, 1 | |
1da177e4 | 641 | RESTORE_REST |
fca460f9 | 642 | #if __SYSCALL_MASK == ~0 |
1da177e4 | 643 | cmpq $__NR_syscall_max,%rax |
fca460f9 PA |
644 | #else |
645 | andl $__SYSCALL_MASK,%eax | |
646 | cmpl $__NR_syscall_max,%eax | |
647 | #endif | |
a31f8dd7 | 648 | ja int_ret_from_sys_call /* RAX(%rsp) set to -ENOSYS above */ |
1da177e4 LT |
649 | movq %r10,%rcx /* fixup for C */ |
650 | call *sys_call_table(,%rax,8) | |
a31f8dd7 | 651 | movq %rax,RAX-ARGOFFSET(%rsp) |
7bf36bbc | 652 | /* Use IRET because user could have changed frame */ |
0bd7b798 AH |
653 | |
654 | /* | |
1da177e4 LT |
655 | * Syscall return path ending with IRET. |
656 | * Has correct top of stack, but partial stack frame. | |
bcddc015 | 657 | */ |
bc8b2b92 | 658 | GLOBAL(int_ret_from_sys_call) |
72fe4858 | 659 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 660 | TRACE_IRQS_OFF |
1da177e4 LT |
661 | movl $_TIF_ALLWORK_MASK,%edi |
662 | /* edi: mask to check */ | |
bc8b2b92 | 663 | GLOBAL(int_with_check) |
10cd706d | 664 | LOCKDEP_SYS_EXIT_IRQ |
1da177e4 | 665 | GET_THREAD_INFO(%rcx) |
26ccb8a7 | 666 | movl TI_flags(%rcx),%edx |
1da177e4 LT |
667 | andl %edi,%edx |
668 | jnz int_careful | |
26ccb8a7 | 669 | andl $~TS_COMPAT,TI_status(%rcx) |
1da177e4 LT |
670 | jmp retint_swapgs |
671 | ||
672 | /* Either reschedule or signal or syscall exit tracking needed. */ | |
673 | /* First do a reschedule test. */ | |
674 | /* edx: work, edi: workmask */ | |
675 | int_careful: | |
676 | bt $TIF_NEED_RESCHED,%edx | |
677 | jnc int_very_careful | |
2601e64d | 678 | TRACE_IRQS_ON |
72fe4858 | 679 | ENABLE_INTERRUPTS(CLBR_NONE) |
df5d1874 | 680 | pushq_cfi %rdi |
1da177e4 | 681 | call schedule |
df5d1874 | 682 | popq_cfi %rdi |
72fe4858 | 683 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 684 | TRACE_IRQS_OFF |
1da177e4 LT |
685 | jmp int_with_check |
686 | ||
687 | /* handle signals and tracing -- both require a full stack frame */ | |
688 | int_very_careful: | |
2601e64d | 689 | TRACE_IRQS_ON |
72fe4858 | 690 | ENABLE_INTERRUPTS(CLBR_NONE) |
b60e714d | 691 | int_check_syscall_exit_work: |
1da177e4 | 692 | SAVE_REST |
0bd7b798 | 693 | /* Check for syscall exit trace */ |
d4d67150 | 694 | testl $_TIF_WORK_SYSCALL_EXIT,%edx |
1da177e4 | 695 | jz int_signal |
df5d1874 | 696 | pushq_cfi %rdi |
0bd7b798 | 697 | leaq 8(%rsp),%rdi # &ptregs -> arg1 |
1da177e4 | 698 | call syscall_trace_leave |
df5d1874 | 699 | popq_cfi %rdi |
d4d67150 | 700 | andl $~(_TIF_WORK_SYSCALL_EXIT|_TIF_SYSCALL_EMU),%edi |
1da177e4 | 701 | jmp int_restore_rest |
0bd7b798 | 702 | |
1da177e4 | 703 | int_signal: |
8f4d37ec | 704 | testl $_TIF_DO_NOTIFY_MASK,%edx |
1da177e4 LT |
705 | jz 1f |
706 | movq %rsp,%rdi # &ptregs -> arg1 | |
707 | xorl %esi,%esi # oldset -> arg2 | |
708 | call do_notify_resume | |
eca91e78 | 709 | 1: movl $_TIF_WORK_MASK,%edi |
1da177e4 LT |
710 | int_restore_rest: |
711 | RESTORE_REST | |
72fe4858 | 712 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 713 | TRACE_IRQS_OFF |
1da177e4 LT |
714 | jmp int_with_check |
715 | CFI_ENDPROC | |
bcddc015 | 716 | END(system_call) |
0bd7b798 AH |
717 | |
718 | /* | |
1da177e4 | 719 | * Certain special system calls that need to save a complete full stack frame. |
0bd7b798 | 720 | */ |
1da177e4 | 721 | .macro PTREGSCALL label,func,arg |
c002a1e6 AH |
722 | ENTRY(\label) |
723 | PARTIAL_FRAME 1 8 /* offset 8: return address */ | |
724 | subq $REST_SKIP, %rsp | |
725 | CFI_ADJUST_CFA_OFFSET REST_SKIP | |
726 | call save_rest | |
727 | DEFAULT_FRAME 0 8 /* offset 8: return address */ | |
728 | leaq 8(%rsp), \arg /* pt_regs pointer */ | |
729 | call \func | |
730 | jmp ptregscall_common | |
731 | CFI_ENDPROC | |
4b787e0b | 732 | END(\label) |
1da177e4 LT |
733 | .endm |
734 | ||
735 | PTREGSCALL stub_clone, sys_clone, %r8 | |
736 | PTREGSCALL stub_fork, sys_fork, %rdi | |
737 | PTREGSCALL stub_vfork, sys_vfork, %rdi | |
1da177e4 LT |
738 | PTREGSCALL stub_sigaltstack, sys_sigaltstack, %rdx |
739 | PTREGSCALL stub_iopl, sys_iopl, %rsi | |
740 | ||
741 | ENTRY(ptregscall_common) | |
c002a1e6 AH |
742 | DEFAULT_FRAME 1 8 /* offset 8: return address */ |
743 | RESTORE_TOP_OF_STACK %r11, 8 | |
744 | movq_cfi_restore R15+8, r15 | |
745 | movq_cfi_restore R14+8, r14 | |
746 | movq_cfi_restore R13+8, r13 | |
747 | movq_cfi_restore R12+8, r12 | |
748 | movq_cfi_restore RBP+8, rbp | |
749 | movq_cfi_restore RBX+8, rbx | |
750 | ret $REST_SKIP /* pop extended registers */ | |
1da177e4 | 751 | CFI_ENDPROC |
4b787e0b | 752 | END(ptregscall_common) |
0bd7b798 | 753 | |
1da177e4 LT |
754 | ENTRY(stub_execve) |
755 | CFI_STARTPROC | |
e6b04b6b JB |
756 | addq $8, %rsp |
757 | PARTIAL_FRAME 0 | |
1da177e4 | 758 | SAVE_REST |
1da177e4 | 759 | FIXUP_TOP_OF_STACK %r11 |
5d119b2c | 760 | movq %rsp, %rcx |
1da177e4 | 761 | call sys_execve |
1da177e4 | 762 | RESTORE_TOP_OF_STACK %r11 |
1da177e4 LT |
763 | movq %rax,RAX(%rsp) |
764 | RESTORE_REST | |
765 | jmp int_ret_from_sys_call | |
766 | CFI_ENDPROC | |
4b787e0b | 767 | END(stub_execve) |
0bd7b798 | 768 | |
1da177e4 LT |
769 | /* |
770 | * sigreturn is special because it needs to restore all registers on return. | |
771 | * This cannot be done with SYSRET, so use the IRET return path instead. | |
0bd7b798 | 772 | */ |
1da177e4 LT |
773 | ENTRY(stub_rt_sigreturn) |
774 | CFI_STARTPROC | |
7effaa88 | 775 | addq $8, %rsp |
e6b04b6b | 776 | PARTIAL_FRAME 0 |
1da177e4 LT |
777 | SAVE_REST |
778 | movq %rsp,%rdi | |
779 | FIXUP_TOP_OF_STACK %r11 | |
780 | call sys_rt_sigreturn | |
781 | movq %rax,RAX(%rsp) # fixme, this could be done at the higher layer | |
782 | RESTORE_REST | |
783 | jmp int_ret_from_sys_call | |
784 | CFI_ENDPROC | |
4b787e0b | 785 | END(stub_rt_sigreturn) |
1da177e4 | 786 | |
c5a37394 PA |
787 | #ifdef CONFIG_X86_X32_ABI |
788 | PTREGSCALL stub_x32_sigaltstack, sys32_sigaltstack, %rdx | |
789 | ||
790 | ENTRY(stub_x32_rt_sigreturn) | |
791 | CFI_STARTPROC | |
792 | addq $8, %rsp | |
793 | PARTIAL_FRAME 0 | |
794 | SAVE_REST | |
795 | movq %rsp,%rdi | |
796 | FIXUP_TOP_OF_STACK %r11 | |
797 | call sys32_x32_rt_sigreturn | |
798 | movq %rax,RAX(%rsp) # fixme, this could be done at the higher layer | |
799 | RESTORE_REST | |
800 | jmp int_ret_from_sys_call | |
801 | CFI_ENDPROC | |
802 | END(stub_x32_rt_sigreturn) | |
803 | ||
d1a797f3 PA |
804 | ENTRY(stub_x32_execve) |
805 | CFI_STARTPROC | |
806 | addq $8, %rsp | |
807 | PARTIAL_FRAME 0 | |
808 | SAVE_REST | |
809 | FIXUP_TOP_OF_STACK %r11 | |
810 | movq %rsp, %rcx | |
811 | call sys32_execve | |
812 | RESTORE_TOP_OF_STACK %r11 | |
813 | movq %rax,RAX(%rsp) | |
814 | RESTORE_REST | |
815 | jmp int_ret_from_sys_call | |
816 | CFI_ENDPROC | |
817 | END(stub_x32_execve) | |
818 | ||
c5a37394 PA |
819 | #endif |
820 | ||
939b7871 PA |
821 | /* |
822 | * Build the entry stubs and pointer table with some assembler magic. | |
823 | * We pack 7 stubs into a single 32-byte chunk, which will fit in a | |
824 | * single cache line on all modern x86 implementations. | |
825 | */ | |
826 | .section .init.rodata,"a" | |
827 | ENTRY(interrupt) | |
ea714547 | 828 | .section .entry.text |
939b7871 PA |
829 | .p2align 5 |
830 | .p2align CONFIG_X86_L1_CACHE_SHIFT | |
831 | ENTRY(irq_entries_start) | |
832 | INTR_FRAME | |
833 | vector=FIRST_EXTERNAL_VECTOR | |
834 | .rept (NR_VECTORS-FIRST_EXTERNAL_VECTOR+6)/7 | |
835 | .balign 32 | |
836 | .rept 7 | |
837 | .if vector < NR_VECTORS | |
8665596e | 838 | .if vector <> FIRST_EXTERNAL_VECTOR |
939b7871 PA |
839 | CFI_ADJUST_CFA_OFFSET -8 |
840 | .endif | |
df5d1874 | 841 | 1: pushq_cfi $(~vector+0x80) /* Note: always in signed byte range */ |
8665596e | 842 | .if ((vector-FIRST_EXTERNAL_VECTOR)%7) <> 6 |
939b7871 PA |
843 | jmp 2f |
844 | .endif | |
845 | .previous | |
846 | .quad 1b | |
ea714547 | 847 | .section .entry.text |
939b7871 PA |
848 | vector=vector+1 |
849 | .endif | |
850 | .endr | |
851 | 2: jmp common_interrupt | |
852 | .endr | |
853 | CFI_ENDPROC | |
854 | END(irq_entries_start) | |
855 | ||
856 | .previous | |
857 | END(interrupt) | |
858 | .previous | |
859 | ||
d99015b1 | 860 | /* |
1da177e4 LT |
861 | * Interrupt entry/exit. |
862 | * | |
863 | * Interrupt entry points save only callee clobbered registers in fast path. | |
d99015b1 AH |
864 | * |
865 | * Entry runs with interrupts off. | |
866 | */ | |
1da177e4 | 867 | |
722024db | 868 | /* 0(%rsp): ~(interrupt number) */ |
1da177e4 | 869 | .macro interrupt func |
625dbc3b FW |
870 | /* reserve pt_regs for scratch regs and rbp */ |
871 | subq $ORIG_RAX-RBP, %rsp | |
872 | CFI_ADJUST_CFA_OFFSET ORIG_RAX-RBP | |
1871853f | 873 | SAVE_ARGS_IRQ |
1da177e4 LT |
874 | call \func |
875 | .endm | |
876 | ||
8222d718 MH |
877 | /* |
878 | * Interrupt entry/exit should be protected against kprobes | |
879 | */ | |
880 | .pushsection .kprobes.text, "ax" | |
722024db AH |
881 | /* |
882 | * The interrupt stubs push (~vector+0x80) onto the stack and | |
883 | * then jump to common_interrupt. | |
884 | */ | |
939b7871 PA |
885 | .p2align CONFIG_X86_L1_CACHE_SHIFT |
886 | common_interrupt: | |
7effaa88 | 887 | XCPT_FRAME |
722024db | 888 | addq $-0x80,(%rsp) /* Adjust vector to [-256,-1] range */ |
1da177e4 | 889 | interrupt do_IRQ |
3d1e42a7 | 890 | /* 0(%rsp): old_rsp-ARGOFFSET */ |
7effaa88 | 891 | ret_from_intr: |
72fe4858 | 892 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 893 | TRACE_IRQS_OFF |
56895530 | 894 | decl PER_CPU_VAR(irq_count) |
625dbc3b | 895 | |
a2bbe750 FW |
896 | /* Restore saved previous stack */ |
897 | popq %rsi | |
928282e4 | 898 | CFI_DEF_CFA rsi,SS+8-RBP /* reg/off reset after def_cfa_expr */ |
eab9e613 | 899 | leaq ARGOFFSET-RBP(%rsi), %rsp |
7effaa88 | 900 | CFI_DEF_CFA_REGISTER rsp |
eab9e613 | 901 | CFI_ADJUST_CFA_OFFSET RBP-ARGOFFSET |
625dbc3b | 902 | |
7effaa88 | 903 | exit_intr: |
1da177e4 LT |
904 | GET_THREAD_INFO(%rcx) |
905 | testl $3,CS-ARGOFFSET(%rsp) | |
906 | je retint_kernel | |
0bd7b798 | 907 | |
1da177e4 LT |
908 | /* Interrupt came from user space */ |
909 | /* | |
910 | * Has a correct top of stack, but a partial stack frame | |
911 | * %rcx: thread info. Interrupts off. | |
0bd7b798 | 912 | */ |
1da177e4 LT |
913 | retint_with_reschedule: |
914 | movl $_TIF_WORK_MASK,%edi | |
7effaa88 | 915 | retint_check: |
10cd706d | 916 | LOCKDEP_SYS_EXIT_IRQ |
26ccb8a7 | 917 | movl TI_flags(%rcx),%edx |
1da177e4 | 918 | andl %edi,%edx |
7effaa88 | 919 | CFI_REMEMBER_STATE |
1da177e4 | 920 | jnz retint_careful |
10cd706d PZ |
921 | |
922 | retint_swapgs: /* return to user-space */ | |
2601e64d IM |
923 | /* |
924 | * The iretq could re-enable interrupts: | |
925 | */ | |
72fe4858 | 926 | DISABLE_INTERRUPTS(CLBR_ANY) |
2601e64d | 927 | TRACE_IRQS_IRETQ |
72fe4858 | 928 | SWAPGS |
2601e64d IM |
929 | jmp restore_args |
930 | ||
10cd706d | 931 | retint_restore_args: /* return to kernel space */ |
72fe4858 | 932 | DISABLE_INTERRUPTS(CLBR_ANY) |
2601e64d IM |
933 | /* |
934 | * The iretq could re-enable interrupts: | |
935 | */ | |
936 | TRACE_IRQS_IRETQ | |
937 | restore_args: | |
838feb47 | 938 | RESTORE_ARGS 1,8,1 |
3701d863 | 939 | |
f7f3d791 | 940 | irq_return: |
72fe4858 | 941 | INTERRUPT_RETURN |
d7abc0fa | 942 | _ASM_EXTABLE(irq_return, bad_iret) |
3701d863 IM |
943 | |
944 | #ifdef CONFIG_PARAVIRT | |
72fe4858 | 945 | ENTRY(native_iret) |
1da177e4 | 946 | iretq |
d7abc0fa | 947 | _ASM_EXTABLE(native_iret, bad_iret) |
3701d863 IM |
948 | #endif |
949 | ||
1da177e4 | 950 | .section .fixup,"ax" |
1da177e4 | 951 | bad_iret: |
3aa4b37d RM |
952 | /* |
953 | * The iret traps when the %cs or %ss being restored is bogus. | |
954 | * We've lost the original trap vector and error code. | |
955 | * #GPF is the most likely one to get for an invalid selector. | |
956 | * So pretend we completed the iret and took the #GPF in user mode. | |
957 | * | |
958 | * We are now running with the kernel GS after exception recovery. | |
959 | * But error_entry expects us to have user GS to match the user %cs, | |
960 | * so swap back. | |
961 | */ | |
962 | pushq $0 | |
963 | ||
964 | SWAPGS | |
965 | jmp general_protection | |
966 | ||
72fe4858 GOC |
967 | .previous |
968 | ||
7effaa88 | 969 | /* edi: workmask, edx: work */ |
1da177e4 | 970 | retint_careful: |
7effaa88 | 971 | CFI_RESTORE_STATE |
1da177e4 LT |
972 | bt $TIF_NEED_RESCHED,%edx |
973 | jnc retint_signal | |
2601e64d | 974 | TRACE_IRQS_ON |
72fe4858 | 975 | ENABLE_INTERRUPTS(CLBR_NONE) |
df5d1874 | 976 | pushq_cfi %rdi |
1da177e4 | 977 | call schedule |
df5d1874 | 978 | popq_cfi %rdi |
1da177e4 | 979 | GET_THREAD_INFO(%rcx) |
72fe4858 | 980 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 981 | TRACE_IRQS_OFF |
1da177e4 | 982 | jmp retint_check |
0bd7b798 | 983 | |
1da177e4 | 984 | retint_signal: |
8f4d37ec | 985 | testl $_TIF_DO_NOTIFY_MASK,%edx |
10ffdbb8 | 986 | jz retint_swapgs |
2601e64d | 987 | TRACE_IRQS_ON |
72fe4858 | 988 | ENABLE_INTERRUPTS(CLBR_NONE) |
1da177e4 | 989 | SAVE_REST |
0bd7b798 | 990 | movq $-1,ORIG_RAX(%rsp) |
3829ee6b | 991 | xorl %esi,%esi # oldset |
1da177e4 LT |
992 | movq %rsp,%rdi # &pt_regs |
993 | call do_notify_resume | |
994 | RESTORE_REST | |
72fe4858 | 995 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 996 | TRACE_IRQS_OFF |
be9e6870 | 997 | GET_THREAD_INFO(%rcx) |
eca91e78 | 998 | jmp retint_with_reschedule |
1da177e4 LT |
999 | |
1000 | #ifdef CONFIG_PREEMPT | |
1001 | /* Returning to kernel space. Check if we need preemption */ | |
1002 | /* rcx: threadinfo. interrupts off. */ | |
b06babac | 1003 | ENTRY(retint_kernel) |
26ccb8a7 | 1004 | cmpl $0,TI_preempt_count(%rcx) |
1da177e4 | 1005 | jnz retint_restore_args |
26ccb8a7 | 1006 | bt $TIF_NEED_RESCHED,TI_flags(%rcx) |
1da177e4 LT |
1007 | jnc retint_restore_args |
1008 | bt $9,EFLAGS-ARGOFFSET(%rsp) /* interrupts off? */ | |
1009 | jnc retint_restore_args | |
1010 | call preempt_schedule_irq | |
1011 | jmp exit_intr | |
0bd7b798 | 1012 | #endif |
4b787e0b | 1013 | |
1da177e4 | 1014 | CFI_ENDPROC |
4b787e0b | 1015 | END(common_interrupt) |
8222d718 MH |
1016 | /* |
1017 | * End of kprobes section | |
1018 | */ | |
1019 | .popsection | |
0bd7b798 | 1020 | |
1da177e4 LT |
1021 | /* |
1022 | * APIC interrupts. | |
0bd7b798 | 1023 | */ |
322648d1 AH |
1024 | .macro apicinterrupt num sym do_sym |
1025 | ENTRY(\sym) | |
7effaa88 | 1026 | INTR_FRAME |
df5d1874 | 1027 | pushq_cfi $~(\num) |
39e95433 | 1028 | .Lcommon_\sym: |
322648d1 | 1029 | interrupt \do_sym |
1da177e4 LT |
1030 | jmp ret_from_intr |
1031 | CFI_ENDPROC | |
322648d1 AH |
1032 | END(\sym) |
1033 | .endm | |
1da177e4 | 1034 | |
322648d1 AH |
1035 | #ifdef CONFIG_SMP |
1036 | apicinterrupt IRQ_MOVE_CLEANUP_VECTOR \ | |
1037 | irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt | |
4ef702c1 AK |
1038 | apicinterrupt REBOOT_VECTOR \ |
1039 | reboot_interrupt smp_reboot_interrupt | |
322648d1 | 1040 | #endif |
1da177e4 | 1041 | |
03b48632 | 1042 | #ifdef CONFIG_X86_UV |
5ae3a139 | 1043 | apicinterrupt UV_BAU_MESSAGE \ |
322648d1 | 1044 | uv_bau_message_intr1 uv_bau_message_interrupt |
03b48632 | 1045 | #endif |
322648d1 AH |
1046 | apicinterrupt LOCAL_TIMER_VECTOR \ |
1047 | apic_timer_interrupt smp_apic_timer_interrupt | |
4a4de9c7 DS |
1048 | apicinterrupt X86_PLATFORM_IPI_VECTOR \ |
1049 | x86_platform_ipi smp_x86_platform_ipi | |
89b831ef | 1050 | |
0bd7b798 | 1051 | #ifdef CONFIG_SMP |
39e95433 JB |
1052 | ALIGN |
1053 | INTR_FRAME | |
1054 | .irp idx,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15, \ | |
3a09fb45 SL |
1055 | 16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 |
1056 | .if NUM_INVALIDATE_TLB_VECTORS > \idx | |
39e95433 JB |
1057 | ENTRY(invalidate_interrupt\idx) |
1058 | pushq_cfi $~(INVALIDATE_TLB_VECTOR_START+\idx) | |
1059 | jmp .Lcommon_invalidate_interrupt0 | |
1060 | CFI_ADJUST_CFA_OFFSET -8 | |
1061 | END(invalidate_interrupt\idx) | |
3a09fb45 | 1062 | .endif |
3234282f | 1063 | .endr |
39e95433 JB |
1064 | CFI_ENDPROC |
1065 | apicinterrupt INVALIDATE_TLB_VECTOR_START, \ | |
1066 | invalidate_interrupt0, smp_invalidate_interrupt | |
1da177e4 LT |
1067 | #endif |
1068 | ||
322648d1 | 1069 | apicinterrupt THRESHOLD_APIC_VECTOR \ |
7856f6cc | 1070 | threshold_interrupt smp_threshold_interrupt |
322648d1 AH |
1071 | apicinterrupt THERMAL_APIC_VECTOR \ |
1072 | thermal_interrupt smp_thermal_interrupt | |
1812924b | 1073 | |
322648d1 AH |
1074 | #ifdef CONFIG_SMP |
1075 | apicinterrupt CALL_FUNCTION_SINGLE_VECTOR \ | |
1076 | call_function_single_interrupt smp_call_function_single_interrupt | |
1077 | apicinterrupt CALL_FUNCTION_VECTOR \ | |
1078 | call_function_interrupt smp_call_function_interrupt | |
1079 | apicinterrupt RESCHEDULE_VECTOR \ | |
1080 | reschedule_interrupt smp_reschedule_interrupt | |
1081 | #endif | |
1da177e4 | 1082 | |
322648d1 AH |
1083 | apicinterrupt ERROR_APIC_VECTOR \ |
1084 | error_interrupt smp_error_interrupt | |
1085 | apicinterrupt SPURIOUS_APIC_VECTOR \ | |
1086 | spurious_interrupt smp_spurious_interrupt | |
0bd7b798 | 1087 | |
e360adbe PZ |
1088 | #ifdef CONFIG_IRQ_WORK |
1089 | apicinterrupt IRQ_WORK_VECTOR \ | |
1090 | irq_work_interrupt smp_irq_work_interrupt | |
241771ef IM |
1091 | #endif |
1092 | ||
1da177e4 LT |
1093 | /* |
1094 | * Exception entry points. | |
0bd7b798 | 1095 | */ |
322648d1 AH |
1096 | .macro zeroentry sym do_sym |
1097 | ENTRY(\sym) | |
7effaa88 | 1098 | INTR_FRAME |
fab58420 | 1099 | PARAVIRT_ADJUST_EXCEPTION_FRAME |
14ae22ba | 1100 | pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */ |
b1cccb1b JB |
1101 | subq $ORIG_RAX-R15, %rsp |
1102 | CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15 | |
d99015b1 | 1103 | call error_entry |
dcd072e2 | 1104 | DEFAULT_FRAME 0 |
d99015b1 AH |
1105 | movq %rsp,%rdi /* pt_regs pointer */ |
1106 | xorl %esi,%esi /* no error code */ | |
322648d1 | 1107 | call \do_sym |
d99015b1 | 1108 | jmp error_exit /* %ebx: no swapgs flag */ |
7effaa88 | 1109 | CFI_ENDPROC |
322648d1 AH |
1110 | END(\sym) |
1111 | .endm | |
1da177e4 | 1112 | |
322648d1 | 1113 | .macro paranoidzeroentry sym do_sym |
ddeb8f21 | 1114 | ENTRY(\sym) |
b8b1d08b AH |
1115 | INTR_FRAME |
1116 | PARAVIRT_ADJUST_EXCEPTION_FRAME | |
b1cccb1b JB |
1117 | pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */ |
1118 | subq $ORIG_RAX-R15, %rsp | |
1119 | CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15 | |
b8b1d08b AH |
1120 | call save_paranoid |
1121 | TRACE_IRQS_OFF | |
1122 | movq %rsp,%rdi /* pt_regs pointer */ | |
1123 | xorl %esi,%esi /* no error code */ | |
322648d1 | 1124 | call \do_sym |
b8b1d08b AH |
1125 | jmp paranoid_exit /* %ebx: no swapgs flag */ |
1126 | CFI_ENDPROC | |
ddeb8f21 | 1127 | END(\sym) |
322648d1 | 1128 | .endm |
b8b1d08b | 1129 | |
c15a5958 | 1130 | #define INIT_TSS_IST(x) PER_CPU_VAR(init_tss) + (TSS_ist + ((x) - 1) * 8) |
322648d1 | 1131 | .macro paranoidzeroentry_ist sym do_sym ist |
ddeb8f21 | 1132 | ENTRY(\sym) |
9f1e87ea | 1133 | INTR_FRAME |
b8b1d08b | 1134 | PARAVIRT_ADJUST_EXCEPTION_FRAME |
b1cccb1b JB |
1135 | pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */ |
1136 | subq $ORIG_RAX-R15, %rsp | |
1137 | CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15 | |
b8b1d08b | 1138 | call save_paranoid |
5963e317 | 1139 | TRACE_IRQS_OFF_DEBUG |
b8b1d08b AH |
1140 | movq %rsp,%rdi /* pt_regs pointer */ |
1141 | xorl %esi,%esi /* no error code */ | |
c15a5958 | 1142 | subq $EXCEPTION_STKSZ, INIT_TSS_IST(\ist) |
322648d1 | 1143 | call \do_sym |
c15a5958 | 1144 | addq $EXCEPTION_STKSZ, INIT_TSS_IST(\ist) |
b8b1d08b AH |
1145 | jmp paranoid_exit /* %ebx: no swapgs flag */ |
1146 | CFI_ENDPROC | |
ddeb8f21 | 1147 | END(\sym) |
322648d1 | 1148 | .endm |
b8b1d08b | 1149 | |
ddeb8f21 | 1150 | .macro errorentry sym do_sym |
322648d1 | 1151 | ENTRY(\sym) |
7effaa88 | 1152 | XCPT_FRAME |
fab58420 | 1153 | PARAVIRT_ADJUST_EXCEPTION_FRAME |
b1cccb1b JB |
1154 | subq $ORIG_RAX-R15, %rsp |
1155 | CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15 | |
d99015b1 | 1156 | call error_entry |
dcd072e2 | 1157 | DEFAULT_FRAME 0 |
d99015b1 AH |
1158 | movq %rsp,%rdi /* pt_regs pointer */ |
1159 | movq ORIG_RAX(%rsp),%rsi /* get error code */ | |
1160 | movq $-1,ORIG_RAX(%rsp) /* no syscall to restart */ | |
322648d1 | 1161 | call \do_sym |
d99015b1 | 1162 | jmp error_exit /* %ebx: no swapgs flag */ |
7effaa88 | 1163 | CFI_ENDPROC |
322648d1 | 1164 | END(\sym) |
322648d1 | 1165 | .endm |
1da177e4 LT |
1166 | |
1167 | /* error code is on the stack already */ | |
ddeb8f21 | 1168 | .macro paranoiderrorentry sym do_sym |
322648d1 | 1169 | ENTRY(\sym) |
b8b1d08b AH |
1170 | XCPT_FRAME |
1171 | PARAVIRT_ADJUST_EXCEPTION_FRAME | |
b1cccb1b JB |
1172 | subq $ORIG_RAX-R15, %rsp |
1173 | CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15 | |
e2f6bc25 AH |
1174 | call save_paranoid |
1175 | DEFAULT_FRAME 0 | |
7e61a793 | 1176 | TRACE_IRQS_OFF |
b8b1d08b AH |
1177 | movq %rsp,%rdi /* pt_regs pointer */ |
1178 | movq ORIG_RAX(%rsp),%rsi /* get error code */ | |
1179 | movq $-1,ORIG_RAX(%rsp) /* no syscall to restart */ | |
322648d1 | 1180 | call \do_sym |
b8b1d08b AH |
1181 | jmp paranoid_exit /* %ebx: no swapgs flag */ |
1182 | CFI_ENDPROC | |
322648d1 | 1183 | END(\sym) |
322648d1 AH |
1184 | .endm |
1185 | ||
1186 | zeroentry divide_error do_divide_error | |
322648d1 AH |
1187 | zeroentry overflow do_overflow |
1188 | zeroentry bounds do_bounds | |
1189 | zeroentry invalid_op do_invalid_op | |
1190 | zeroentry device_not_available do_device_not_available | |
ddeb8f21 | 1191 | paranoiderrorentry double_fault do_double_fault |
322648d1 AH |
1192 | zeroentry coprocessor_segment_overrun do_coprocessor_segment_overrun |
1193 | errorentry invalid_TSS do_invalid_TSS | |
1194 | errorentry segment_not_present do_segment_not_present | |
322648d1 AH |
1195 | zeroentry spurious_interrupt_bug do_spurious_interrupt_bug |
1196 | zeroentry coprocessor_error do_coprocessor_error | |
1197 | errorentry alignment_check do_alignment_check | |
322648d1 | 1198 | zeroentry simd_coprocessor_error do_simd_coprocessor_error |
5cec93c2 | 1199 | |
2601e64d | 1200 | |
9f1e87ea CG |
1201 | /* Reload gs selector with exception handling */ |
1202 | /* edi: new selector */ | |
9f9d489a | 1203 | ENTRY(native_load_gs_index) |
7effaa88 | 1204 | CFI_STARTPROC |
df5d1874 | 1205 | pushfq_cfi |
b8aa287f | 1206 | DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI) |
9f1e87ea | 1207 | SWAPGS |
0bd7b798 | 1208 | gs_change: |
9f1e87ea | 1209 | movl %edi,%gs |
1da177e4 | 1210 | 2: mfence /* workaround */ |
72fe4858 | 1211 | SWAPGS |
df5d1874 | 1212 | popfq_cfi |
9f1e87ea | 1213 | ret |
7effaa88 | 1214 | CFI_ENDPROC |
6efdcfaf | 1215 | END(native_load_gs_index) |
0bd7b798 | 1216 | |
d7abc0fa | 1217 | _ASM_EXTABLE(gs_change,bad_gs) |
9f1e87ea | 1218 | .section .fixup,"ax" |
1da177e4 | 1219 | /* running with kernelgs */ |
0bd7b798 | 1220 | bad_gs: |
72fe4858 | 1221 | SWAPGS /* switch back to user gs */ |
1da177e4 | 1222 | xorl %eax,%eax |
9f1e87ea CG |
1223 | movl %eax,%gs |
1224 | jmp 2b | |
1225 | .previous | |
0bd7b798 | 1226 | |
3bd95dfb | 1227 | ENTRY(kernel_thread_helper) |
c05991ed AK |
1228 | pushq $0 # fake return address |
1229 | CFI_STARTPROC | |
1da177e4 LT |
1230 | /* |
1231 | * Here we are in the child and the registers are set as they were | |
1232 | * at kernel_thread() invocation in the parent. | |
1233 | */ | |
3bd95dfb | 1234 | call *%rsi |
1da177e4 | 1235 | # exit |
1c5b5cfd | 1236 | mov %eax, %edi |
1da177e4 | 1237 | call do_exit |
5f5db591 | 1238 | ud2 # padding for call trace |
c05991ed | 1239 | CFI_ENDPROC |
3bd95dfb | 1240 | END(kernel_thread_helper) |
1da177e4 LT |
1241 | |
1242 | /* | |
1243 | * execve(). This function needs to use IRET, not SYSRET, to set up all state properly. | |
1244 | * | |
1245 | * C extern interface: | |
c7887325 | 1246 | * extern long execve(const char *name, char **argv, char **envp) |
1da177e4 LT |
1247 | * |
1248 | * asm input arguments: | |
1249 | * rdi: name, rsi: argv, rdx: envp | |
1250 | * | |
1251 | * We want to fallback into: | |
c7887325 | 1252 | * extern long sys_execve(const char *name, char **argv,char **envp, struct pt_regs *regs) |
1da177e4 LT |
1253 | * |
1254 | * do_sys_execve asm fallback arguments: | |
5d119b2c | 1255 | * rdi: name, rsi: argv, rdx: envp, rcx: fake frame on the stack |
1da177e4 | 1256 | */ |
3db03b4a | 1257 | ENTRY(kernel_execve) |
1da177e4 LT |
1258 | CFI_STARTPROC |
1259 | FAKE_STACK_FRAME $0 | |
0bd7b798 | 1260 | SAVE_ALL |
5d119b2c | 1261 | movq %rsp,%rcx |
1da177e4 | 1262 | call sys_execve |
0bd7b798 | 1263 | movq %rax, RAX(%rsp) |
1da177e4 LT |
1264 | RESTORE_REST |
1265 | testq %rax,%rax | |
1266 | je int_ret_from_sys_call | |
1267 | RESTORE_ARGS | |
1268 | UNFAKE_STACK_FRAME | |
1269 | ret | |
1270 | CFI_ENDPROC | |
6efdcfaf | 1271 | END(kernel_execve) |
1da177e4 | 1272 | |
2699500b | 1273 | /* Call softirq on interrupt stack. Interrupts are off. */ |
ed6b676c | 1274 | ENTRY(call_softirq) |
7effaa88 | 1275 | CFI_STARTPROC |
df5d1874 | 1276 | pushq_cfi %rbp |
2699500b AK |
1277 | CFI_REL_OFFSET rbp,0 |
1278 | mov %rsp,%rbp | |
1279 | CFI_DEF_CFA_REGISTER rbp | |
56895530 | 1280 | incl PER_CPU_VAR(irq_count) |
26f80bd6 | 1281 | cmove PER_CPU_VAR(irq_stack_ptr),%rsp |
2699500b | 1282 | push %rbp # backlink for old unwinder |
ed6b676c | 1283 | call __do_softirq |
2699500b | 1284 | leaveq |
df5d1874 | 1285 | CFI_RESTORE rbp |
7effaa88 | 1286 | CFI_DEF_CFA_REGISTER rsp |
2699500b | 1287 | CFI_ADJUST_CFA_OFFSET -8 |
56895530 | 1288 | decl PER_CPU_VAR(irq_count) |
ed6b676c | 1289 | ret |
7effaa88 | 1290 | CFI_ENDPROC |
6efdcfaf | 1291 | END(call_softirq) |
75154f40 | 1292 | |
3d75e1b8 | 1293 | #ifdef CONFIG_XEN |
322648d1 | 1294 | zeroentry xen_hypervisor_callback xen_do_hypervisor_callback |
3d75e1b8 JF |
1295 | |
1296 | /* | |
9f1e87ea CG |
1297 | * A note on the "critical region" in our callback handler. |
1298 | * We want to avoid stacking callback handlers due to events occurring | |
1299 | * during handling of the last event. To do this, we keep events disabled | |
1300 | * until we've done all processing. HOWEVER, we must enable events before | |
1301 | * popping the stack frame (can't be done atomically) and so it would still | |
1302 | * be possible to get enough handler activations to overflow the stack. | |
1303 | * Although unlikely, bugs of that kind are hard to track down, so we'd | |
1304 | * like to avoid the possibility. | |
1305 | * So, on entry to the handler we detect whether we interrupted an | |
1306 | * existing activation in its critical region -- if so, we pop the current | |
1307 | * activation and restart the handler using the previous one. | |
1308 | */ | |
3d75e1b8 JF |
1309 | ENTRY(xen_do_hypervisor_callback) # do_hypervisor_callback(struct *pt_regs) |
1310 | CFI_STARTPROC | |
9f1e87ea CG |
1311 | /* |
1312 | * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will | |
1313 | * see the correct pointer to the pt_regs | |
1314 | */ | |
3d75e1b8 JF |
1315 | movq %rdi, %rsp # we don't return, adjust the stack frame |
1316 | CFI_ENDPROC | |
dcd072e2 | 1317 | DEFAULT_FRAME |
56895530 | 1318 | 11: incl PER_CPU_VAR(irq_count) |
3d75e1b8 JF |
1319 | movq %rsp,%rbp |
1320 | CFI_DEF_CFA_REGISTER rbp | |
26f80bd6 | 1321 | cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp |
3d75e1b8 JF |
1322 | pushq %rbp # backlink for old unwinder |
1323 | call xen_evtchn_do_upcall | |
1324 | popq %rsp | |
1325 | CFI_DEF_CFA_REGISTER rsp | |
56895530 | 1326 | decl PER_CPU_VAR(irq_count) |
3d75e1b8 JF |
1327 | jmp error_exit |
1328 | CFI_ENDPROC | |
371c394a | 1329 | END(xen_do_hypervisor_callback) |
3d75e1b8 JF |
1330 | |
1331 | /* | |
9f1e87ea CG |
1332 | * Hypervisor uses this for application faults while it executes. |
1333 | * We get here for two reasons: | |
1334 | * 1. Fault while reloading DS, ES, FS or GS | |
1335 | * 2. Fault while executing IRET | |
1336 | * Category 1 we do not need to fix up as Xen has already reloaded all segment | |
1337 | * registers that could be reloaded and zeroed the others. | |
1338 | * Category 2 we fix up by killing the current process. We cannot use the | |
1339 | * normal Linux return path in this case because if we use the IRET hypercall | |
1340 | * to pop the stack frame we end up in an infinite loop of failsafe callbacks. | |
1341 | * We distinguish between categories by comparing each saved segment register | |
1342 | * with its current contents: any discrepancy means we in category 1. | |
1343 | */ | |
3d75e1b8 | 1344 | ENTRY(xen_failsafe_callback) |
dcd072e2 AH |
1345 | INTR_FRAME 1 (6*8) |
1346 | /*CFI_REL_OFFSET gs,GS*/ | |
1347 | /*CFI_REL_OFFSET fs,FS*/ | |
1348 | /*CFI_REL_OFFSET es,ES*/ | |
1349 | /*CFI_REL_OFFSET ds,DS*/ | |
1350 | CFI_REL_OFFSET r11,8 | |
1351 | CFI_REL_OFFSET rcx,0 | |
3d75e1b8 JF |
1352 | movw %ds,%cx |
1353 | cmpw %cx,0x10(%rsp) | |
1354 | CFI_REMEMBER_STATE | |
1355 | jne 1f | |
1356 | movw %es,%cx | |
1357 | cmpw %cx,0x18(%rsp) | |
1358 | jne 1f | |
1359 | movw %fs,%cx | |
1360 | cmpw %cx,0x20(%rsp) | |
1361 | jne 1f | |
1362 | movw %gs,%cx | |
1363 | cmpw %cx,0x28(%rsp) | |
1364 | jne 1f | |
1365 | /* All segments match their saved values => Category 2 (Bad IRET). */ | |
1366 | movq (%rsp),%rcx | |
1367 | CFI_RESTORE rcx | |
1368 | movq 8(%rsp),%r11 | |
1369 | CFI_RESTORE r11 | |
1370 | addq $0x30,%rsp | |
1371 | CFI_ADJUST_CFA_OFFSET -0x30 | |
14ae22ba IM |
1372 | pushq_cfi $0 /* RIP */ |
1373 | pushq_cfi %r11 | |
1374 | pushq_cfi %rcx | |
4a5c3e77 | 1375 | jmp general_protection |
3d75e1b8 JF |
1376 | CFI_RESTORE_STATE |
1377 | 1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */ | |
1378 | movq (%rsp),%rcx | |
1379 | CFI_RESTORE rcx | |
1380 | movq 8(%rsp),%r11 | |
1381 | CFI_RESTORE r11 | |
1382 | addq $0x30,%rsp | |
1383 | CFI_ADJUST_CFA_OFFSET -0x30 | |
14ae22ba | 1384 | pushq_cfi $0 |
3d75e1b8 JF |
1385 | SAVE_ALL |
1386 | jmp error_exit | |
1387 | CFI_ENDPROC | |
3d75e1b8 JF |
1388 | END(xen_failsafe_callback) |
1389 | ||
38e20b07 SY |
1390 | apicinterrupt XEN_HVM_EVTCHN_CALLBACK \ |
1391 | xen_hvm_callback_vector xen_evtchn_do_upcall | |
1392 | ||
3d75e1b8 | 1393 | #endif /* CONFIG_XEN */ |
ddeb8f21 AH |
1394 | |
1395 | /* | |
1396 | * Some functions should be protected against kprobes | |
1397 | */ | |
1398 | .pushsection .kprobes.text, "ax" | |
1399 | ||
1400 | paranoidzeroentry_ist debug do_debug DEBUG_STACK | |
1401 | paranoidzeroentry_ist int3 do_int3 DEBUG_STACK | |
1402 | paranoiderrorentry stack_segment do_stack_segment | |
6cac5a92 JF |
1403 | #ifdef CONFIG_XEN |
1404 | zeroentry xen_debug do_debug | |
1405 | zeroentry xen_int3 do_int3 | |
1406 | errorentry xen_stack_segment do_stack_segment | |
1407 | #endif | |
ddeb8f21 AH |
1408 | errorentry general_protection do_general_protection |
1409 | errorentry page_fault do_page_fault | |
631bc487 GN |
1410 | #ifdef CONFIG_KVM_GUEST |
1411 | errorentry async_page_fault do_async_page_fault | |
1412 | #endif | |
ddeb8f21 | 1413 | #ifdef CONFIG_X86_MCE |
5d727926 | 1414 | paranoidzeroentry machine_check *machine_check_vector(%rip) |
ddeb8f21 AH |
1415 | #endif |
1416 | ||
1417 | /* | |
9f1e87ea CG |
1418 | * "Paranoid" exit path from exception stack. |
1419 | * Paranoid because this is used by NMIs and cannot take | |
ddeb8f21 AH |
1420 | * any kernel state for granted. |
1421 | * We don't do kernel preemption checks here, because only | |
1422 | * NMI should be common and it does not enable IRQs and | |
1423 | * cannot get reschedule ticks. | |
1424 | * | |
1425 | * "trace" is 0 for the NMI handler only, because irq-tracing | |
1426 | * is fundamentally NMI-unsafe. (we cannot change the soft and | |
1427 | * hard flags at once, atomically) | |
1428 | */ | |
1429 | ||
1430 | /* ebx: no swapgs flag */ | |
1431 | ENTRY(paranoid_exit) | |
1f130a78 | 1432 | DEFAULT_FRAME |
ddeb8f21 | 1433 | DISABLE_INTERRUPTS(CLBR_NONE) |
5963e317 | 1434 | TRACE_IRQS_OFF_DEBUG |
ddeb8f21 AH |
1435 | testl %ebx,%ebx /* swapgs needed? */ |
1436 | jnz paranoid_restore | |
1437 | testl $3,CS(%rsp) | |
1438 | jnz paranoid_userspace | |
1439 | paranoid_swapgs: | |
1440 | TRACE_IRQS_IRETQ 0 | |
1441 | SWAPGS_UNSAFE_STACK | |
0300e7f1 SR |
1442 | RESTORE_ALL 8 |
1443 | jmp irq_return | |
ddeb8f21 | 1444 | paranoid_restore: |
5963e317 | 1445 | TRACE_IRQS_IRETQ_DEBUG 0 |
ddeb8f21 AH |
1446 | RESTORE_ALL 8 |
1447 | jmp irq_return | |
1448 | paranoid_userspace: | |
1449 | GET_THREAD_INFO(%rcx) | |
1450 | movl TI_flags(%rcx),%ebx | |
1451 | andl $_TIF_WORK_MASK,%ebx | |
1452 | jz paranoid_swapgs | |
1453 | movq %rsp,%rdi /* &pt_regs */ | |
1454 | call sync_regs | |
1455 | movq %rax,%rsp /* switch stack for scheduling */ | |
1456 | testl $_TIF_NEED_RESCHED,%ebx | |
1457 | jnz paranoid_schedule | |
1458 | movl %ebx,%edx /* arg3: thread flags */ | |
1459 | TRACE_IRQS_ON | |
1460 | ENABLE_INTERRUPTS(CLBR_NONE) | |
1461 | xorl %esi,%esi /* arg2: oldset */ | |
1462 | movq %rsp,%rdi /* arg1: &pt_regs */ | |
1463 | call do_notify_resume | |
1464 | DISABLE_INTERRUPTS(CLBR_NONE) | |
1465 | TRACE_IRQS_OFF | |
1466 | jmp paranoid_userspace | |
1467 | paranoid_schedule: | |
1468 | TRACE_IRQS_ON | |
1469 | ENABLE_INTERRUPTS(CLBR_ANY) | |
1470 | call schedule | |
1471 | DISABLE_INTERRUPTS(CLBR_ANY) | |
1472 | TRACE_IRQS_OFF | |
1473 | jmp paranoid_userspace | |
1474 | CFI_ENDPROC | |
1475 | END(paranoid_exit) | |
1476 | ||
1477 | /* | |
1478 | * Exception entry point. This expects an error code/orig_rax on the stack. | |
1479 | * returns in "no swapgs flag" in %ebx. | |
1480 | */ | |
1481 | ENTRY(error_entry) | |
1482 | XCPT_FRAME | |
1483 | CFI_ADJUST_CFA_OFFSET 15*8 | |
1484 | /* oldrax contains error code */ | |
1485 | cld | |
1486 | movq_cfi rdi, RDI+8 | |
1487 | movq_cfi rsi, RSI+8 | |
1488 | movq_cfi rdx, RDX+8 | |
1489 | movq_cfi rcx, RCX+8 | |
1490 | movq_cfi rax, RAX+8 | |
1491 | movq_cfi r8, R8+8 | |
1492 | movq_cfi r9, R9+8 | |
1493 | movq_cfi r10, R10+8 | |
1494 | movq_cfi r11, R11+8 | |
1495 | movq_cfi rbx, RBX+8 | |
1496 | movq_cfi rbp, RBP+8 | |
1497 | movq_cfi r12, R12+8 | |
1498 | movq_cfi r13, R13+8 | |
1499 | movq_cfi r14, R14+8 | |
1500 | movq_cfi r15, R15+8 | |
1501 | xorl %ebx,%ebx | |
1502 | testl $3,CS+8(%rsp) | |
1503 | je error_kernelspace | |
1504 | error_swapgs: | |
1505 | SWAPGS | |
1506 | error_sti: | |
1507 | TRACE_IRQS_OFF | |
1508 | ret | |
ddeb8f21 AH |
1509 | |
1510 | /* | |
1511 | * There are two places in the kernel that can potentially fault with | |
1512 | * usergs. Handle them here. The exception handlers after iret run with | |
1513 | * kernel gs again, so don't set the user space flag. B stepping K8s | |
1514 | * sometimes report an truncated RIP for IRET exceptions returning to | |
1515 | * compat mode. Check for these here too. | |
1516 | */ | |
1517 | error_kernelspace: | |
1518 | incl %ebx | |
1519 | leaq irq_return(%rip),%rcx | |
1520 | cmpq %rcx,RIP+8(%rsp) | |
1521 | je error_swapgs | |
ae24ffe5 BG |
1522 | movl %ecx,%eax /* zero extend */ |
1523 | cmpq %rax,RIP+8(%rsp) | |
1524 | je bstep_iret | |
ddeb8f21 | 1525 | cmpq $gs_change,RIP+8(%rsp) |
9f1e87ea | 1526 | je error_swapgs |
ddeb8f21 | 1527 | jmp error_sti |
ae24ffe5 BG |
1528 | |
1529 | bstep_iret: | |
1530 | /* Fix truncated RIP */ | |
1531 | movq %rcx,RIP+8(%rsp) | |
97829de5 | 1532 | jmp error_swapgs |
e6b04b6b | 1533 | CFI_ENDPROC |
ddeb8f21 AH |
1534 | END(error_entry) |
1535 | ||
1536 | ||
1537 | /* ebx: no swapgs flag (1: don't need swapgs, 0: need it) */ | |
1538 | ENTRY(error_exit) | |
1539 | DEFAULT_FRAME | |
1540 | movl %ebx,%eax | |
1541 | RESTORE_REST | |
1542 | DISABLE_INTERRUPTS(CLBR_NONE) | |
1543 | TRACE_IRQS_OFF | |
1544 | GET_THREAD_INFO(%rcx) | |
1545 | testl %eax,%eax | |
1546 | jne retint_kernel | |
1547 | LOCKDEP_SYS_EXIT_IRQ | |
1548 | movl TI_flags(%rcx),%edx | |
1549 | movl $_TIF_WORK_MASK,%edi | |
1550 | andl %edi,%edx | |
1551 | jnz retint_careful | |
1552 | jmp retint_swapgs | |
1553 | CFI_ENDPROC | |
1554 | END(error_exit) | |
1555 | ||
3f3c8b8c SR |
1556 | /* |
1557 | * Test if a given stack is an NMI stack or not. | |
1558 | */ | |
1559 | .macro test_in_nmi reg stack nmi_ret normal_ret | |
1560 | cmpq %\reg, \stack | |
1561 | ja \normal_ret | |
1562 | subq $EXCEPTION_STKSZ, %\reg | |
1563 | cmpq %\reg, \stack | |
1564 | jb \normal_ret | |
1565 | jmp \nmi_ret | |
1566 | .endm | |
ddeb8f21 AH |
1567 | |
1568 | /* runs on exception stack */ | |
1569 | ENTRY(nmi) | |
1570 | INTR_FRAME | |
1571 | PARAVIRT_ADJUST_EXCEPTION_FRAME | |
3f3c8b8c SR |
1572 | /* |
1573 | * We allow breakpoints in NMIs. If a breakpoint occurs, then | |
1574 | * the iretq it performs will take us out of NMI context. | |
1575 | * This means that we can have nested NMIs where the next | |
1576 | * NMI is using the top of the stack of the previous NMI. We | |
1577 | * can't let it execute because the nested NMI will corrupt the | |
1578 | * stack of the previous NMI. NMI handlers are not re-entrant | |
1579 | * anyway. | |
1580 | * | |
1581 | * To handle this case we do the following: | |
1582 | * Check the a special location on the stack that contains | |
1583 | * a variable that is set when NMIs are executing. | |
1584 | * The interrupted task's stack is also checked to see if it | |
1585 | * is an NMI stack. | |
1586 | * If the variable is not set and the stack is not the NMI | |
1587 | * stack then: | |
1588 | * o Set the special variable on the stack | |
1589 | * o Copy the interrupt frame into a "saved" location on the stack | |
1590 | * o Copy the interrupt frame into a "copy" location on the stack | |
1591 | * o Continue processing the NMI | |
1592 | * If the variable is set or the previous stack is the NMI stack: | |
1593 | * o Modify the "copy" location to jump to the repeate_nmi | |
1594 | * o return back to the first NMI | |
1595 | * | |
1596 | * Now on exit of the first NMI, we first clear the stack variable | |
1597 | * The NMI stack will tell any nested NMIs at that point that it is | |
1598 | * nested. Then we pop the stack normally with iret, and if there was | |
1599 | * a nested NMI that updated the copy interrupt stack frame, a | |
1600 | * jump will be made to the repeat_nmi code that will handle the second | |
1601 | * NMI. | |
1602 | */ | |
1603 | ||
1604 | /* Use %rdx as out temp variable throughout */ | |
1605 | pushq_cfi %rdx | |
62610913 | 1606 | CFI_REL_OFFSET rdx, 0 |
3f3c8b8c | 1607 | |
45d5a168 SR |
1608 | /* |
1609 | * If %cs was not the kernel segment, then the NMI triggered in user | |
1610 | * space, which means it is definitely not nested. | |
1611 | */ | |
a38449ef | 1612 | cmpl $__KERNEL_CS, 16(%rsp) |
45d5a168 SR |
1613 | jne first_nmi |
1614 | ||
3f3c8b8c SR |
1615 | /* |
1616 | * Check the special variable on the stack to see if NMIs are | |
1617 | * executing. | |
1618 | */ | |
a38449ef | 1619 | cmpl $1, -8(%rsp) |
3f3c8b8c SR |
1620 | je nested_nmi |
1621 | ||
1622 | /* | |
1623 | * Now test if the previous stack was an NMI stack. | |
1624 | * We need the double check. We check the NMI stack to satisfy the | |
1625 | * race when the first NMI clears the variable before returning. | |
1626 | * We check the variable because the first NMI could be in a | |
1627 | * breakpoint routine using a breakpoint stack. | |
1628 | */ | |
1629 | lea 6*8(%rsp), %rdx | |
1630 | test_in_nmi rdx, 4*8(%rsp), nested_nmi, first_nmi | |
62610913 | 1631 | CFI_REMEMBER_STATE |
3f3c8b8c SR |
1632 | |
1633 | nested_nmi: | |
1634 | /* | |
1635 | * Do nothing if we interrupted the fixup in repeat_nmi. | |
1636 | * It's about to repeat the NMI handler, so we are fine | |
1637 | * with ignoring this one. | |
1638 | */ | |
1639 | movq $repeat_nmi, %rdx | |
1640 | cmpq 8(%rsp), %rdx | |
1641 | ja 1f | |
1642 | movq $end_repeat_nmi, %rdx | |
1643 | cmpq 8(%rsp), %rdx | |
1644 | ja nested_nmi_out | |
1645 | ||
1646 | 1: | |
1647 | /* Set up the interrupted NMIs stack to jump to repeat_nmi */ | |
1648 | leaq -6*8(%rsp), %rdx | |
1649 | movq %rdx, %rsp | |
1650 | CFI_ADJUST_CFA_OFFSET 6*8 | |
1651 | pushq_cfi $__KERNEL_DS | |
1652 | pushq_cfi %rdx | |
1653 | pushfq_cfi | |
1654 | pushq_cfi $__KERNEL_CS | |
1655 | pushq_cfi $repeat_nmi | |
1656 | ||
1657 | /* Put stack back */ | |
1658 | addq $(11*8), %rsp | |
1659 | CFI_ADJUST_CFA_OFFSET -11*8 | |
1660 | ||
1661 | nested_nmi_out: | |
1662 | popq_cfi %rdx | |
62610913 | 1663 | CFI_RESTORE rdx |
3f3c8b8c SR |
1664 | |
1665 | /* No need to check faults here */ | |
1666 | INTERRUPT_RETURN | |
1667 | ||
62610913 | 1668 | CFI_RESTORE_STATE |
3f3c8b8c SR |
1669 | first_nmi: |
1670 | /* | |
1671 | * Because nested NMIs will use the pushed location that we | |
1672 | * stored in rdx, we must keep that space available. | |
1673 | * Here's what our stack frame will look like: | |
1674 | * +-------------------------+ | |
1675 | * | original SS | | |
1676 | * | original Return RSP | | |
1677 | * | original RFLAGS | | |
1678 | * | original CS | | |
1679 | * | original RIP | | |
1680 | * +-------------------------+ | |
1681 | * | temp storage for rdx | | |
1682 | * +-------------------------+ | |
1683 | * | NMI executing variable | | |
1684 | * +-------------------------+ | |
1685 | * | Saved SS | | |
1686 | * | Saved Return RSP | | |
1687 | * | Saved RFLAGS | | |
1688 | * | Saved CS | | |
1689 | * | Saved RIP | | |
1690 | * +-------------------------+ | |
1691 | * | copied SS | | |
1692 | * | copied Return RSP | | |
1693 | * | copied RFLAGS | | |
1694 | * | copied CS | | |
1695 | * | copied RIP | | |
1696 | * +-------------------------+ | |
1697 | * | pt_regs | | |
1698 | * +-------------------------+ | |
1699 | * | |
79fb4ad6 SR |
1700 | * The saved stack frame is used to fix up the copied stack frame |
1701 | * that a nested NMI may change to make the interrupted NMI iret jump | |
1702 | * to the repeat_nmi. The original stack frame and the temp storage | |
3f3c8b8c SR |
1703 | * is also used by nested NMIs and can not be trusted on exit. |
1704 | */ | |
79fb4ad6 | 1705 | /* Do not pop rdx, nested NMIs will corrupt that part of the stack */ |
62610913 JB |
1706 | movq (%rsp), %rdx |
1707 | CFI_RESTORE rdx | |
1708 | ||
3f3c8b8c SR |
1709 | /* Set the NMI executing variable on the stack. */ |
1710 | pushq_cfi $1 | |
1711 | ||
1712 | /* Copy the stack frame to the Saved frame */ | |
1713 | .rept 5 | |
1714 | pushq_cfi 6*8(%rsp) | |
1715 | .endr | |
62610913 JB |
1716 | CFI_DEF_CFA_OFFSET SS+8-RIP |
1717 | ||
79fb4ad6 SR |
1718 | /* Everything up to here is safe from nested NMIs */ |
1719 | ||
62610913 JB |
1720 | /* |
1721 | * If there was a nested NMI, the first NMI's iret will return | |
1722 | * here. But NMIs are still enabled and we can take another | |
1723 | * nested NMI. The nested NMI checks the interrupted RIP to see | |
1724 | * if it is between repeat_nmi and end_repeat_nmi, and if so | |
1725 | * it will just return, as we are about to repeat an NMI anyway. | |
1726 | * This makes it safe to copy to the stack frame that a nested | |
1727 | * NMI will update. | |
1728 | */ | |
1729 | repeat_nmi: | |
1730 | /* | |
1731 | * Update the stack variable to say we are still in NMI (the update | |
1732 | * is benign for the non-repeat case, where 1 was pushed just above | |
1733 | * to this very stack slot). | |
1734 | */ | |
1735 | movq $1, 5*8(%rsp) | |
3f3c8b8c SR |
1736 | |
1737 | /* Make another copy, this one may be modified by nested NMIs */ | |
1738 | .rept 5 | |
1739 | pushq_cfi 4*8(%rsp) | |
1740 | .endr | |
62610913 JB |
1741 | CFI_DEF_CFA_OFFSET SS+8-RIP |
1742 | end_repeat_nmi: | |
3f3c8b8c SR |
1743 | |
1744 | /* | |
1745 | * Everything below this point can be preempted by a nested | |
79fb4ad6 SR |
1746 | * NMI if the first NMI took an exception and reset our iret stack |
1747 | * so that we repeat another NMI. | |
3f3c8b8c | 1748 | */ |
1fd466ef | 1749 | pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */ |
b1cccb1b JB |
1750 | subq $ORIG_RAX-R15, %rsp |
1751 | CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15 | |
1fd466ef SR |
1752 | /* |
1753 | * Use save_paranoid to handle SWAPGS, but no need to use paranoid_exit | |
1754 | * as we should not be calling schedule in NMI context. | |
1755 | * Even with normal interrupts enabled. An NMI should not be | |
1756 | * setting NEED_RESCHED or anything that normal interrupts and | |
1757 | * exceptions might do. | |
1758 | */ | |
ddeb8f21 AH |
1759 | call save_paranoid |
1760 | DEFAULT_FRAME 0 | |
7fbb98c5 SR |
1761 | |
1762 | /* | |
1763 | * Save off the CR2 register. If we take a page fault in the NMI then | |
1764 | * it could corrupt the CR2 value. If the NMI preempts a page fault | |
1765 | * handler before it was able to read the CR2 register, and then the | |
1766 | * NMI itself takes a page fault, the page fault that was preempted | |
1767 | * will read the information from the NMI page fault and not the | |
1768 | * origin fault. Save it off and restore it if it changes. | |
1769 | * Use the r12 callee-saved register. | |
1770 | */ | |
1771 | movq %cr2, %r12 | |
1772 | ||
ddeb8f21 AH |
1773 | /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */ |
1774 | movq %rsp,%rdi | |
1775 | movq $-1,%rsi | |
1776 | call do_nmi | |
7fbb98c5 SR |
1777 | |
1778 | /* Did the NMI take a page fault? Restore cr2 if it did */ | |
1779 | movq %cr2, %rcx | |
1780 | cmpq %rcx, %r12 | |
1781 | je 1f | |
1782 | movq %r12, %cr2 | |
1783 | 1: | |
1784 | ||
ddeb8f21 AH |
1785 | testl %ebx,%ebx /* swapgs needed? */ |
1786 | jnz nmi_restore | |
ddeb8f21 AH |
1787 | nmi_swapgs: |
1788 | SWAPGS_UNSAFE_STACK | |
1789 | nmi_restore: | |
1790 | RESTORE_ALL 8 | |
3f3c8b8c SR |
1791 | /* Clear the NMI executing stack variable */ |
1792 | movq $0, 10*8(%rsp) | |
ddeb8f21 | 1793 | jmp irq_return |
9f1e87ea | 1794 | CFI_ENDPROC |
ddeb8f21 AH |
1795 | END(nmi) |
1796 | ||
1797 | ENTRY(ignore_sysret) | |
1798 | CFI_STARTPROC | |
1799 | mov $-ENOSYS,%eax | |
1800 | sysret | |
1801 | CFI_ENDPROC | |
1802 | END(ignore_sysret) | |
1803 | ||
1804 | /* | |
1805 | * End of kprobes section | |
1806 | */ | |
1807 | .popsection |