Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * linux/arch/x86_64/entry.S | |
3 | * | |
4 | * Copyright (C) 1991, 1992 Linus Torvalds | |
5 | * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs | |
6 | * Copyright (C) 2000 Pavel Machek <pavel@suse.cz> | |
1da177e4 LT |
7 | */ |
8 | ||
9 | /* | |
10 | * entry.S contains the system-call and fault low-level handling routines. | |
11 | * | |
8b4777a4 AL |
12 | * Some of this is documented in Documentation/x86/entry_64.txt |
13 | * | |
1da177e4 LT |
14 | * NOTE: This code handles signal-recognition, which happens every time |
15 | * after an interrupt and after each system call. | |
0bd7b798 AH |
16 | * |
17 | * Normal syscalls and interrupts don't save a full stack frame, this is | |
1da177e4 | 18 | * only done for syscall tracing, signals or fork/exec et.al. |
0bd7b798 AH |
19 | * |
20 | * A note on terminology: | |
21 | * - top of stack: Architecture defined interrupt frame from SS to RIP | |
22 | * at the top of the kernel process stack. | |
0d2eb44f | 23 | * - partial stack frame: partially saved registers up to R11. |
0bd7b798 | 24 | * - full stack frame: Like partial stack frame, but all register saved. |
2e91a17b AK |
25 | * |
26 | * Some macro usage: | |
27 | * - CFI macros are used to generate dwarf2 unwind information for better | |
28 | * backtraces. They don't change any code. | |
29 | * - SAVE_ALL/RESTORE_ALL - Save/restore all registers | |
30 | * - SAVE_ARGS/RESTORE_ARGS - Save/restore registers that C functions modify. | |
31 | * There are unfortunately lots of special cases where some registers | |
32 | * not touched. The macro is a big mess that should be cleaned up. | |
33 | * - SAVE_REST/RESTORE_REST - Handle the registers not saved by SAVE_ARGS. | |
34 | * Gives a full stack frame. | |
35 | * - ENTRY/END Define functions in the symbol table. | |
36 | * - FIXUP_TOP_OF_STACK/RESTORE_TOP_OF_STACK - Fix up the hardware stack | |
37 | * frame that is otherwise undefined after a SYSCALL | |
38 | * - TRACE_IRQ_* - Trace hard interrupt state for lock debugging. | |
39 | * - errorentry/paranoidentry/zeroentry - Define exception entry points. | |
1da177e4 LT |
40 | */ |
41 | ||
1da177e4 LT |
42 | #include <linux/linkage.h> |
43 | #include <asm/segment.h> | |
1da177e4 LT |
44 | #include <asm/cache.h> |
45 | #include <asm/errno.h> | |
46 | #include <asm/dwarf2.h> | |
47 | #include <asm/calling.h> | |
e2d5df93 | 48 | #include <asm/asm-offsets.h> |
1da177e4 LT |
49 | #include <asm/msr.h> |
50 | #include <asm/unistd.h> | |
51 | #include <asm/thread_info.h> | |
52 | #include <asm/hw_irq.h> | |
0341c14d | 53 | #include <asm/page_types.h> |
2601e64d | 54 | #include <asm/irqflags.h> |
72fe4858 | 55 | #include <asm/paravirt.h> |
395a59d0 | 56 | #include <asm/ftrace.h> |
9939ddaf | 57 | #include <asm/percpu.h> |
d7abc0fa | 58 | #include <asm/asm.h> |
d7e7528b | 59 | #include <linux/err.h> |
1da177e4 | 60 | |
86a1c34a RM |
61 | /* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this. */ |
62 | #include <linux/elf-em.h> | |
63 | #define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE) | |
64 | #define __AUDIT_ARCH_64BIT 0x80000000 | |
65 | #define __AUDIT_ARCH_LE 0x40000000 | |
66 | ||
1da177e4 | 67 | .code64 |
ea714547 JO |
68 | .section .entry.text, "ax" |
69 | ||
606576ce | 70 | #ifdef CONFIG_FUNCTION_TRACER |
d61f82d0 SR |
71 | #ifdef CONFIG_DYNAMIC_FTRACE |
72 | ENTRY(mcount) | |
d61f82d0 SR |
73 | retq |
74 | END(mcount) | |
75 | ||
76 | ENTRY(ftrace_caller) | |
60a7ecf4 SR |
77 | cmpl $0, function_trace_stop |
78 | jne ftrace_stub | |
d61f82d0 | 79 | |
d680fe44 | 80 | MCOUNT_SAVE_FRAME |
d61f82d0 SR |
81 | |
82 | movq 0x38(%rsp), %rdi | |
83 | movq 8(%rbp), %rsi | |
395a59d0 | 84 | subq $MCOUNT_INSN_SIZE, %rdi |
d61f82d0 | 85 | |
bc8b2b92 | 86 | GLOBAL(ftrace_call) |
d61f82d0 SR |
87 | call ftrace_stub |
88 | ||
d680fe44 | 89 | MCOUNT_RESTORE_FRAME |
d61f82d0 | 90 | |
48d68b20 | 91 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER |
bc8b2b92 | 92 | GLOBAL(ftrace_graph_call) |
48d68b20 FW |
93 | jmp ftrace_stub |
94 | #endif | |
d61f82d0 | 95 | |
bc8b2b92 | 96 | GLOBAL(ftrace_stub) |
d61f82d0 SR |
97 | retq |
98 | END(ftrace_caller) | |
99 | ||
100 | #else /* ! CONFIG_DYNAMIC_FTRACE */ | |
16444a8a | 101 | ENTRY(mcount) |
60a7ecf4 SR |
102 | cmpl $0, function_trace_stop |
103 | jne ftrace_stub | |
104 | ||
16444a8a ACM |
105 | cmpq $ftrace_stub, ftrace_trace_function |
106 | jnz trace | |
48d68b20 FW |
107 | |
108 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER | |
109 | cmpq $ftrace_stub, ftrace_graph_return | |
110 | jnz ftrace_graph_caller | |
e49dc19c SR |
111 | |
112 | cmpq $ftrace_graph_entry_stub, ftrace_graph_entry | |
113 | jnz ftrace_graph_caller | |
48d68b20 FW |
114 | #endif |
115 | ||
bc8b2b92 | 116 | GLOBAL(ftrace_stub) |
16444a8a ACM |
117 | retq |
118 | ||
119 | trace: | |
d680fe44 | 120 | MCOUNT_SAVE_FRAME |
16444a8a ACM |
121 | |
122 | movq 0x38(%rsp), %rdi | |
123 | movq 8(%rbp), %rsi | |
395a59d0 | 124 | subq $MCOUNT_INSN_SIZE, %rdi |
16444a8a ACM |
125 | |
126 | call *ftrace_trace_function | |
127 | ||
d680fe44 | 128 | MCOUNT_RESTORE_FRAME |
16444a8a ACM |
129 | |
130 | jmp ftrace_stub | |
131 | END(mcount) | |
d61f82d0 | 132 | #endif /* CONFIG_DYNAMIC_FTRACE */ |
606576ce | 133 | #endif /* CONFIG_FUNCTION_TRACER */ |
16444a8a | 134 | |
48d68b20 FW |
135 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER |
136 | ENTRY(ftrace_graph_caller) | |
137 | cmpl $0, function_trace_stop | |
138 | jne ftrace_stub | |
139 | ||
d680fe44 | 140 | MCOUNT_SAVE_FRAME |
48d68b20 FW |
141 | |
142 | leaq 8(%rbp), %rdi | |
143 | movq 0x38(%rsp), %rsi | |
71e308a2 | 144 | movq (%rbp), %rdx |
bb4304c7 | 145 | subq $MCOUNT_INSN_SIZE, %rsi |
48d68b20 FW |
146 | |
147 | call prepare_ftrace_return | |
148 | ||
d680fe44 CG |
149 | MCOUNT_RESTORE_FRAME |
150 | ||
48d68b20 FW |
151 | retq |
152 | END(ftrace_graph_caller) | |
153 | ||
bc8b2b92 | 154 | GLOBAL(return_to_handler) |
4818d809 | 155 | subq $24, %rsp |
48d68b20 | 156 | |
e71e99c2 | 157 | /* Save the return values */ |
16444a8a | 158 | movq %rax, (%rsp) |
e71e99c2 | 159 | movq %rdx, 8(%rsp) |
71e308a2 | 160 | movq %rbp, %rdi |
16444a8a | 161 | |
48d68b20 | 162 | call ftrace_return_to_handler |
16444a8a | 163 | |
194ec341 | 164 | movq %rax, %rdi |
e71e99c2 | 165 | movq 8(%rsp), %rdx |
16444a8a | 166 | movq (%rsp), %rax |
194ec341 SR |
167 | addq $24, %rsp |
168 | jmp *%rdi | |
48d68b20 | 169 | #endif |
16444a8a | 170 | |
16444a8a | 171 | |
dc37db4d | 172 | #ifndef CONFIG_PREEMPT |
1da177e4 | 173 | #define retint_kernel retint_restore_args |
0bd7b798 | 174 | #endif |
2601e64d | 175 | |
72fe4858 | 176 | #ifdef CONFIG_PARAVIRT |
2be29982 | 177 | ENTRY(native_usergs_sysret64) |
72fe4858 GOC |
178 | swapgs |
179 | sysretq | |
b3baaa13 | 180 | ENDPROC(native_usergs_sysret64) |
72fe4858 GOC |
181 | #endif /* CONFIG_PARAVIRT */ |
182 | ||
2601e64d IM |
183 | |
184 | .macro TRACE_IRQS_IRETQ offset=ARGOFFSET | |
185 | #ifdef CONFIG_TRACE_IRQFLAGS | |
186 | bt $9,EFLAGS-\offset(%rsp) /* interrupts off? */ | |
187 | jnc 1f | |
188 | TRACE_IRQS_ON | |
189 | 1: | |
190 | #endif | |
191 | .endm | |
192 | ||
5963e317 SR |
193 | /* |
194 | * When dynamic function tracer is enabled it will add a breakpoint | |
195 | * to all locations that it is about to modify, sync CPUs, update | |
196 | * all the code, sync CPUs, then remove the breakpoints. In this time | |
197 | * if lockdep is enabled, it might jump back into the debug handler | |
198 | * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF). | |
199 | * | |
200 | * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to | |
201 | * make sure the stack pointer does not get reset back to the top | |
202 | * of the debug stack, and instead just reuses the current stack. | |
203 | */ | |
204 | #if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS) | |
205 | ||
206 | .macro TRACE_IRQS_OFF_DEBUG | |
207 | call debug_stack_set_zero | |
208 | TRACE_IRQS_OFF | |
209 | call debug_stack_reset | |
210 | .endm | |
211 | ||
212 | .macro TRACE_IRQS_ON_DEBUG | |
213 | call debug_stack_set_zero | |
214 | TRACE_IRQS_ON | |
215 | call debug_stack_reset | |
216 | .endm | |
217 | ||
218 | .macro TRACE_IRQS_IRETQ_DEBUG offset=ARGOFFSET | |
219 | bt $9,EFLAGS-\offset(%rsp) /* interrupts off? */ | |
220 | jnc 1f | |
221 | TRACE_IRQS_ON_DEBUG | |
222 | 1: | |
223 | .endm | |
224 | ||
225 | #else | |
226 | # define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF | |
227 | # define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON | |
228 | # define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ | |
229 | #endif | |
230 | ||
1da177e4 | 231 | /* |
0bd7b798 AH |
232 | * C code is not supposed to know about undefined top of stack. Every time |
233 | * a C function with an pt_regs argument is called from the SYSCALL based | |
1da177e4 LT |
234 | * fast path FIXUP_TOP_OF_STACK is needed. |
235 | * RESTORE_TOP_OF_STACK syncs the syscall state after any possible ptregs | |
236 | * manipulation. | |
0bd7b798 AH |
237 | */ |
238 | ||
239 | /* %rsp:at FRAMEEND */ | |
c002a1e6 | 240 | .macro FIXUP_TOP_OF_STACK tmp offset=0 |
3d1e42a7 | 241 | movq PER_CPU_VAR(old_rsp),\tmp |
c002a1e6 AH |
242 | movq \tmp,RSP+\offset(%rsp) |
243 | movq $__USER_DS,SS+\offset(%rsp) | |
244 | movq $__USER_CS,CS+\offset(%rsp) | |
245 | movq $-1,RCX+\offset(%rsp) | |
246 | movq R11+\offset(%rsp),\tmp /* get eflags */ | |
247 | movq \tmp,EFLAGS+\offset(%rsp) | |
1da177e4 LT |
248 | .endm |
249 | ||
c002a1e6 AH |
250 | .macro RESTORE_TOP_OF_STACK tmp offset=0 |
251 | movq RSP+\offset(%rsp),\tmp | |
3d1e42a7 | 252 | movq \tmp,PER_CPU_VAR(old_rsp) |
c002a1e6 AH |
253 | movq EFLAGS+\offset(%rsp),\tmp |
254 | movq \tmp,R11+\offset(%rsp) | |
1da177e4 LT |
255 | .endm |
256 | ||
257 | .macro FAKE_STACK_FRAME child_rip | |
258 | /* push in order ss, rsp, eflags, cs, rip */ | |
3829ee6b | 259 | xorl %eax, %eax |
df5d1874 | 260 | pushq_cfi $__KERNEL_DS /* ss */ |
7effaa88 | 261 | /*CFI_REL_OFFSET ss,0*/ |
df5d1874 | 262 | pushq_cfi %rax /* rsp */ |
7effaa88 | 263 | CFI_REL_OFFSET rsp,0 |
1cf8343f | 264 | pushq_cfi $(X86_EFLAGS_IF|X86_EFLAGS_BIT1) /* eflags - interrupts on */ |
7effaa88 | 265 | /*CFI_REL_OFFSET rflags,0*/ |
df5d1874 | 266 | pushq_cfi $__KERNEL_CS /* cs */ |
7effaa88 | 267 | /*CFI_REL_OFFSET cs,0*/ |
df5d1874 | 268 | pushq_cfi \child_rip /* rip */ |
7effaa88 | 269 | CFI_REL_OFFSET rip,0 |
df5d1874 | 270 | pushq_cfi %rax /* orig rax */ |
1da177e4 LT |
271 | .endm |
272 | ||
273 | .macro UNFAKE_STACK_FRAME | |
274 | addq $8*6, %rsp | |
275 | CFI_ADJUST_CFA_OFFSET -(6*8) | |
276 | .endm | |
277 | ||
dcd072e2 AH |
278 | /* |
279 | * initial frame state for interrupts (and exceptions without error code) | |
280 | */ | |
281 | .macro EMPTY_FRAME start=1 offset=0 | |
7effaa88 | 282 | .if \start |
dcd072e2 | 283 | CFI_STARTPROC simple |
adf14236 | 284 | CFI_SIGNAL_FRAME |
dcd072e2 | 285 | CFI_DEF_CFA rsp,8+\offset |
7effaa88 | 286 | .else |
dcd072e2 | 287 | CFI_DEF_CFA_OFFSET 8+\offset |
7effaa88 | 288 | .endif |
1da177e4 | 289 | .endm |
d99015b1 AH |
290 | |
291 | /* | |
dcd072e2 | 292 | * initial frame state for interrupts (and exceptions without error code) |
d99015b1 | 293 | */ |
dcd072e2 | 294 | .macro INTR_FRAME start=1 offset=0 |
e8a0e276 IM |
295 | EMPTY_FRAME \start, SS+8+\offset-RIP |
296 | /*CFI_REL_OFFSET ss, SS+\offset-RIP*/ | |
297 | CFI_REL_OFFSET rsp, RSP+\offset-RIP | |
298 | /*CFI_REL_OFFSET rflags, EFLAGS+\offset-RIP*/ | |
299 | /*CFI_REL_OFFSET cs, CS+\offset-RIP*/ | |
300 | CFI_REL_OFFSET rip, RIP+\offset-RIP | |
d99015b1 AH |
301 | .endm |
302 | ||
d99015b1 AH |
303 | /* |
304 | * initial frame state for exceptions with error code (and interrupts | |
305 | * with vector already pushed) | |
306 | */ | |
dcd072e2 | 307 | .macro XCPT_FRAME start=1 offset=0 |
e8a0e276 | 308 | INTR_FRAME \start, RIP+\offset-ORIG_RAX |
dcd072e2 AH |
309 | /*CFI_REL_OFFSET orig_rax, ORIG_RAX-ORIG_RAX*/ |
310 | .endm | |
311 | ||
312 | /* | |
313 | * frame that enables calling into C. | |
314 | */ | |
315 | .macro PARTIAL_FRAME start=1 offset=0 | |
e8a0e276 IM |
316 | XCPT_FRAME \start, ORIG_RAX+\offset-ARGOFFSET |
317 | CFI_REL_OFFSET rdi, RDI+\offset-ARGOFFSET | |
318 | CFI_REL_OFFSET rsi, RSI+\offset-ARGOFFSET | |
319 | CFI_REL_OFFSET rdx, RDX+\offset-ARGOFFSET | |
320 | CFI_REL_OFFSET rcx, RCX+\offset-ARGOFFSET | |
321 | CFI_REL_OFFSET rax, RAX+\offset-ARGOFFSET | |
322 | CFI_REL_OFFSET r8, R8+\offset-ARGOFFSET | |
323 | CFI_REL_OFFSET r9, R9+\offset-ARGOFFSET | |
324 | CFI_REL_OFFSET r10, R10+\offset-ARGOFFSET | |
325 | CFI_REL_OFFSET r11, R11+\offset-ARGOFFSET | |
dcd072e2 AH |
326 | .endm |
327 | ||
328 | /* | |
329 | * frame that enables passing a complete pt_regs to a C function. | |
330 | */ | |
331 | .macro DEFAULT_FRAME start=1 offset=0 | |
e8a0e276 | 332 | PARTIAL_FRAME \start, R11+\offset-R15 |
dcd072e2 AH |
333 | CFI_REL_OFFSET rbx, RBX+\offset |
334 | CFI_REL_OFFSET rbp, RBP+\offset | |
335 | CFI_REL_OFFSET r12, R12+\offset | |
336 | CFI_REL_OFFSET r13, R13+\offset | |
337 | CFI_REL_OFFSET r14, R14+\offset | |
338 | CFI_REL_OFFSET r15, R15+\offset | |
339 | .endm | |
d99015b1 AH |
340 | |
341 | /* save partial stack frame */ | |
1871853f | 342 | .macro SAVE_ARGS_IRQ |
d99015b1 | 343 | cld |
1871853f FW |
344 | /* start from rbp in pt_regs and jump over */ |
345 | movq_cfi rdi, RDI-RBP | |
346 | movq_cfi rsi, RSI-RBP | |
347 | movq_cfi rdx, RDX-RBP | |
348 | movq_cfi rcx, RCX-RBP | |
349 | movq_cfi rax, RAX-RBP | |
350 | movq_cfi r8, R8-RBP | |
351 | movq_cfi r9, R9-RBP | |
352 | movq_cfi r10, R10-RBP | |
353 | movq_cfi r11, R11-RBP | |
354 | ||
a2bbe750 FW |
355 | /* Save rbp so that we can unwind from get_irq_regs() */ |
356 | movq_cfi rbp, 0 | |
357 | ||
358 | /* Save previous stack value */ | |
359 | movq %rsp, %rsi | |
3b99a3ef FW |
360 | |
361 | leaq -RBP(%rsp),%rdi /* arg1 for handler */ | |
69466466 | 362 | testl $3, CS-RBP(%rsi) |
d99015b1 AH |
363 | je 1f |
364 | SWAPGS | |
365 | /* | |
56895530 | 366 | * irq_count is used to check if a CPU is already on an interrupt stack |
d99015b1 AH |
367 | * or not. While this is essentially redundant with preempt_count it is |
368 | * a little cheaper to use a separate counter in the PDA (short of | |
369 | * moving irq_enter into assembly, which would be too much work) | |
370 | */ | |
56895530 | 371 | 1: incl PER_CPU_VAR(irq_count) |
69466466 | 372 | cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp |
eab9e613 | 373 | CFI_DEF_CFA_REGISTER rsi |
a2bbe750 | 374 | |
69466466 | 375 | /* Store previous stack value */ |
a2bbe750 | 376 | pushq %rsi |
eab9e613 JB |
377 | CFI_ESCAPE 0x0f /* DW_CFA_def_cfa_expression */, 6, \ |
378 | 0x77 /* DW_OP_breg7 */, 0, \ | |
379 | 0x06 /* DW_OP_deref */, \ | |
380 | 0x08 /* DW_OP_const1u */, SS+8-RBP, \ | |
381 | 0x22 /* DW_OP_plus */ | |
a2bbe750 FW |
382 | /* We entered an interrupt context - irqs are off: */ |
383 | TRACE_IRQS_OFF | |
1871853f | 384 | .endm |
d99015b1 | 385 | |
c002a1e6 AH |
386 | ENTRY(save_rest) |
387 | PARTIAL_FRAME 1 REST_SKIP+8 | |
388 | movq 5*8+16(%rsp), %r11 /* save return address */ | |
389 | movq_cfi rbx, RBX+16 | |
390 | movq_cfi rbp, RBP+16 | |
391 | movq_cfi r12, R12+16 | |
392 | movq_cfi r13, R13+16 | |
393 | movq_cfi r14, R14+16 | |
394 | movq_cfi r15, R15+16 | |
395 | movq %r11, 8(%rsp) /* return address */ | |
396 | FIXUP_TOP_OF_STACK %r11, 16 | |
397 | ret | |
398 | CFI_ENDPROC | |
399 | END(save_rest) | |
400 | ||
e2f6bc25 | 401 | /* save complete stack frame */ |
c2810188 | 402 | .pushsection .kprobes.text, "ax" |
e2f6bc25 AH |
403 | ENTRY(save_paranoid) |
404 | XCPT_FRAME 1 RDI+8 | |
405 | cld | |
406 | movq_cfi rdi, RDI+8 | |
407 | movq_cfi rsi, RSI+8 | |
408 | movq_cfi rdx, RDX+8 | |
409 | movq_cfi rcx, RCX+8 | |
410 | movq_cfi rax, RAX+8 | |
411 | movq_cfi r8, R8+8 | |
412 | movq_cfi r9, R9+8 | |
413 | movq_cfi r10, R10+8 | |
414 | movq_cfi r11, R11+8 | |
415 | movq_cfi rbx, RBX+8 | |
416 | movq_cfi rbp, RBP+8 | |
417 | movq_cfi r12, R12+8 | |
418 | movq_cfi r13, R13+8 | |
419 | movq_cfi r14, R14+8 | |
420 | movq_cfi r15, R15+8 | |
421 | movl $1,%ebx | |
422 | movl $MSR_GS_BASE,%ecx | |
423 | rdmsr | |
424 | testl %edx,%edx | |
425 | js 1f /* negative -> in kernel */ | |
426 | SWAPGS | |
427 | xorl %ebx,%ebx | |
428 | 1: ret | |
429 | CFI_ENDPROC | |
430 | END(save_paranoid) | |
c2810188 | 431 | .popsection |
e2f6bc25 | 432 | |
1da177e4 | 433 | /* |
5b3eec0c IM |
434 | * A newly forked process directly context switches into this address. |
435 | * | |
436 | * rdi: prev task we switched from | |
0bd7b798 | 437 | */ |
1da177e4 | 438 | ENTRY(ret_from_fork) |
dcd072e2 | 439 | DEFAULT_FRAME |
5b3eec0c | 440 | |
7106a5ab BL |
441 | LOCK ; btr $TIF_FORK,TI_flags(%r8) |
442 | ||
df5d1874 JB |
443 | pushq_cfi kernel_eflags(%rip) |
444 | popfq_cfi # reset kernel eflags | |
5b3eec0c IM |
445 | |
446 | call schedule_tail # rdi: 'prev' task parameter | |
447 | ||
1da177e4 | 448 | GET_THREAD_INFO(%rcx) |
5b3eec0c | 449 | |
1da177e4 | 450 | RESTORE_REST |
5b3eec0c IM |
451 | |
452 | testl $3, CS-ARGOFFSET(%rsp) # from kernel_thread? | |
7076aada | 453 | jz 1f |
5b3eec0c IM |
454 | |
455 | testl $_TIF_IA32, TI_flags(%rcx) # 32-bit compat task needs IRET | |
1da177e4 | 456 | jnz int_ret_from_sys_call |
5b3eec0c | 457 | |
c002a1e6 | 458 | RESTORE_TOP_OF_STACK %rdi, -ARGOFFSET |
5b3eec0c IM |
459 | jmp ret_from_sys_call # go to the SYSRET fastpath |
460 | ||
7076aada AV |
461 | 1: |
462 | subq $REST_SKIP, %rsp # move the stack pointer back | |
463 | CFI_ADJUST_CFA_OFFSET REST_SKIP | |
464 | movq %rbp, %rdi | |
465 | call *%rbx | |
466 | # exit | |
467 | mov %eax, %edi | |
468 | call do_exit | |
469 | ud2 # padding for call trace | |
470 | ||
1da177e4 | 471 | CFI_ENDPROC |
4b787e0b | 472 | END(ret_from_fork) |
1da177e4 LT |
473 | |
474 | /* | |
0d2eb44f | 475 | * System call entry. Up to 6 arguments in registers are supported. |
1da177e4 LT |
476 | * |
477 | * SYSCALL does not save anything on the stack and does not change the | |
478 | * stack pointer. | |
479 | */ | |
0bd7b798 | 480 | |
1da177e4 | 481 | /* |
0bd7b798 | 482 | * Register setup: |
1da177e4 LT |
483 | * rax system call number |
484 | * rdi arg0 | |
0bd7b798 | 485 | * rcx return address for syscall/sysret, C arg3 |
1da177e4 | 486 | * rsi arg1 |
0bd7b798 | 487 | * rdx arg2 |
1da177e4 LT |
488 | * r10 arg3 (--> moved to rcx for C) |
489 | * r8 arg4 | |
490 | * r9 arg5 | |
491 | * r11 eflags for syscall/sysret, temporary for C | |
0bd7b798 AH |
492 | * r12-r15,rbp,rbx saved by C code, not touched. |
493 | * | |
1da177e4 LT |
494 | * Interrupts are off on entry. |
495 | * Only called from user space. | |
496 | * | |
497 | * XXX if we had a free scratch register we could save the RSP into the stack frame | |
498 | * and report it properly in ps. Unfortunately we haven't. | |
7bf36bbc AK |
499 | * |
500 | * When user can change the frames always force IRET. That is because | |
501 | * it deals with uncanonical addresses better. SYSRET has trouble | |
502 | * with them due to bugs in both AMD and Intel CPUs. | |
0bd7b798 | 503 | */ |
1da177e4 LT |
504 | |
505 | ENTRY(system_call) | |
7effaa88 | 506 | CFI_STARTPROC simple |
adf14236 | 507 | CFI_SIGNAL_FRAME |
9af45651 | 508 | CFI_DEF_CFA rsp,KERNEL_STACK_OFFSET |
7effaa88 JB |
509 | CFI_REGISTER rip,rcx |
510 | /*CFI_REGISTER rflags,r11*/ | |
72fe4858 GOC |
511 | SWAPGS_UNSAFE_STACK |
512 | /* | |
513 | * A hypervisor implementation might want to use a label | |
514 | * after the swapgs, so that it can do the swapgs | |
515 | * for the guest and jump here on syscall. | |
516 | */ | |
f6b2bc84 | 517 | GLOBAL(system_call_after_swapgs) |
72fe4858 | 518 | |
3d1e42a7 | 519 | movq %rsp,PER_CPU_VAR(old_rsp) |
9af45651 | 520 | movq PER_CPU_VAR(kernel_stack),%rsp |
2601e64d IM |
521 | /* |
522 | * No need to follow this irqs off/on section - it's straight | |
523 | * and short: | |
524 | */ | |
72fe4858 | 525 | ENABLE_INTERRUPTS(CLBR_NONE) |
cac0e0a7 | 526 | SAVE_ARGS 8,0 |
0bd7b798 | 527 | movq %rax,ORIG_RAX-ARGOFFSET(%rsp) |
7effaa88 JB |
528 | movq %rcx,RIP-ARGOFFSET(%rsp) |
529 | CFI_REL_OFFSET rip,RIP-ARGOFFSET | |
46db09d3 | 530 | testl $_TIF_WORK_SYSCALL_ENTRY,TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET) |
1da177e4 | 531 | jnz tracesys |
86a1c34a | 532 | system_call_fastpath: |
fca460f9 | 533 | #if __SYSCALL_MASK == ~0 |
1da177e4 | 534 | cmpq $__NR_syscall_max,%rax |
fca460f9 PA |
535 | #else |
536 | andl $__SYSCALL_MASK,%eax | |
537 | cmpl $__NR_syscall_max,%eax | |
538 | #endif | |
1da177e4 LT |
539 | ja badsys |
540 | movq %r10,%rcx | |
541 | call *sys_call_table(,%rax,8) # XXX: rip relative | |
542 | movq %rax,RAX-ARGOFFSET(%rsp) | |
543 | /* | |
544 | * Syscall return path ending with SYSRET (fast path) | |
0bd7b798 AH |
545 | * Has incomplete stack frame and undefined top of stack. |
546 | */ | |
1da177e4 | 547 | ret_from_sys_call: |
11b854b2 | 548 | movl $_TIF_ALLWORK_MASK,%edi |
1da177e4 | 549 | /* edi: flagmask */ |
0bd7b798 | 550 | sysret_check: |
10cd706d | 551 | LOCKDEP_SYS_EXIT |
72fe4858 | 552 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 553 | TRACE_IRQS_OFF |
46db09d3 | 554 | movl TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET),%edx |
1da177e4 | 555 | andl %edi,%edx |
0bd7b798 | 556 | jnz sysret_careful |
bcddc015 | 557 | CFI_REMEMBER_STATE |
2601e64d IM |
558 | /* |
559 | * sysretq will re-enable interrupts: | |
560 | */ | |
561 | TRACE_IRQS_ON | |
1da177e4 | 562 | movq RIP-ARGOFFSET(%rsp),%rcx |
7effaa88 | 563 | CFI_REGISTER rip,rcx |
838feb47 | 564 | RESTORE_ARGS 1,-ARG_SKIP,0 |
7effaa88 | 565 | /*CFI_REGISTER rflags,r11*/ |
3d1e42a7 | 566 | movq PER_CPU_VAR(old_rsp), %rsp |
2be29982 | 567 | USERGS_SYSRET64 |
1da177e4 | 568 | |
bcddc015 | 569 | CFI_RESTORE_STATE |
1da177e4 | 570 | /* Handle reschedules */ |
0bd7b798 | 571 | /* edx: work, edi: workmask */ |
1da177e4 LT |
572 | sysret_careful: |
573 | bt $TIF_NEED_RESCHED,%edx | |
574 | jnc sysret_signal | |
2601e64d | 575 | TRACE_IRQS_ON |
72fe4858 | 576 | ENABLE_INTERRUPTS(CLBR_NONE) |
df5d1874 | 577 | pushq_cfi %rdi |
1da177e4 | 578 | call schedule |
df5d1874 | 579 | popq_cfi %rdi |
1da177e4 LT |
580 | jmp sysret_check |
581 | ||
0bd7b798 | 582 | /* Handle a signal */ |
1da177e4 | 583 | sysret_signal: |
2601e64d | 584 | TRACE_IRQS_ON |
72fe4858 | 585 | ENABLE_INTERRUPTS(CLBR_NONE) |
86a1c34a RM |
586 | #ifdef CONFIG_AUDITSYSCALL |
587 | bt $TIF_SYSCALL_AUDIT,%edx | |
588 | jc sysret_audit | |
589 | #endif | |
b60e714d RM |
590 | /* |
591 | * We have a signal, or exit tracing or single-step. | |
592 | * These all wind up with the iret return path anyway, | |
593 | * so just join that path right now. | |
594 | */ | |
595 | FIXUP_TOP_OF_STACK %r11, -ARGOFFSET | |
596 | jmp int_check_syscall_exit_work | |
0bd7b798 | 597 | |
7effaa88 JB |
598 | badsys: |
599 | movq $-ENOSYS,RAX-ARGOFFSET(%rsp) | |
600 | jmp ret_from_sys_call | |
601 | ||
86a1c34a RM |
602 | #ifdef CONFIG_AUDITSYSCALL |
603 | /* | |
604 | * Fast path for syscall audit without full syscall trace. | |
b05d8447 | 605 | * We just call __audit_syscall_entry() directly, and then |
86a1c34a RM |
606 | * jump back to the normal fast path. |
607 | */ | |
608 | auditsys: | |
609 | movq %r10,%r9 /* 6th arg: 4th syscall arg */ | |
610 | movq %rdx,%r8 /* 5th arg: 3rd syscall arg */ | |
611 | movq %rsi,%rcx /* 4th arg: 2nd syscall arg */ | |
612 | movq %rdi,%rdx /* 3rd arg: 1st syscall arg */ | |
613 | movq %rax,%rsi /* 2nd arg: syscall number */ | |
614 | movl $AUDIT_ARCH_X86_64,%edi /* 1st arg: audit arch */ | |
b05d8447 | 615 | call __audit_syscall_entry |
86a1c34a RM |
616 | LOAD_ARGS 0 /* reload call-clobbered registers */ |
617 | jmp system_call_fastpath | |
618 | ||
619 | /* | |
d7e7528b | 620 | * Return fast path for syscall audit. Call __audit_syscall_exit() |
86a1c34a RM |
621 | * directly and then jump back to the fast path with TIF_SYSCALL_AUDIT |
622 | * masked off. | |
623 | */ | |
624 | sysret_audit: | |
03275591 | 625 | movq RAX-ARGOFFSET(%rsp),%rsi /* second arg, syscall return value */ |
d7e7528b EP |
626 | cmpq $-MAX_ERRNO,%rsi /* is it < -MAX_ERRNO? */ |
627 | setbe %al /* 1 if so, 0 if not */ | |
86a1c34a | 628 | movzbl %al,%edi /* zero-extend that into %edi */ |
d7e7528b | 629 | call __audit_syscall_exit |
86a1c34a RM |
630 | movl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT),%edi |
631 | jmp sysret_check | |
632 | #endif /* CONFIG_AUDITSYSCALL */ | |
633 | ||
1da177e4 | 634 | /* Do syscall tracing */ |
0bd7b798 | 635 | tracesys: |
86a1c34a | 636 | #ifdef CONFIG_AUDITSYSCALL |
46db09d3 | 637 | testl $(_TIF_WORK_SYSCALL_ENTRY & ~_TIF_SYSCALL_AUDIT),TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET) |
86a1c34a RM |
638 | jz auditsys |
639 | #endif | |
1da177e4 | 640 | SAVE_REST |
a31f8dd7 | 641 | movq $-ENOSYS,RAX(%rsp) /* ptrace can change this for a bad syscall */ |
1da177e4 LT |
642 | FIXUP_TOP_OF_STACK %rdi |
643 | movq %rsp,%rdi | |
644 | call syscall_trace_enter | |
d4d67150 RM |
645 | /* |
646 | * Reload arg registers from stack in case ptrace changed them. | |
647 | * We don't reload %rax because syscall_trace_enter() returned | |
648 | * the value it wants us to use in the table lookup. | |
649 | */ | |
650 | LOAD_ARGS ARGOFFSET, 1 | |
1da177e4 | 651 | RESTORE_REST |
fca460f9 | 652 | #if __SYSCALL_MASK == ~0 |
1da177e4 | 653 | cmpq $__NR_syscall_max,%rax |
fca460f9 PA |
654 | #else |
655 | andl $__SYSCALL_MASK,%eax | |
656 | cmpl $__NR_syscall_max,%eax | |
657 | #endif | |
a31f8dd7 | 658 | ja int_ret_from_sys_call /* RAX(%rsp) set to -ENOSYS above */ |
1da177e4 LT |
659 | movq %r10,%rcx /* fixup for C */ |
660 | call *sys_call_table(,%rax,8) | |
a31f8dd7 | 661 | movq %rax,RAX-ARGOFFSET(%rsp) |
7bf36bbc | 662 | /* Use IRET because user could have changed frame */ |
0bd7b798 AH |
663 | |
664 | /* | |
1da177e4 LT |
665 | * Syscall return path ending with IRET. |
666 | * Has correct top of stack, but partial stack frame. | |
bcddc015 | 667 | */ |
bc8b2b92 | 668 | GLOBAL(int_ret_from_sys_call) |
72fe4858 | 669 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 670 | TRACE_IRQS_OFF |
1da177e4 LT |
671 | movl $_TIF_ALLWORK_MASK,%edi |
672 | /* edi: mask to check */ | |
bc8b2b92 | 673 | GLOBAL(int_with_check) |
10cd706d | 674 | LOCKDEP_SYS_EXIT_IRQ |
1da177e4 | 675 | GET_THREAD_INFO(%rcx) |
26ccb8a7 | 676 | movl TI_flags(%rcx),%edx |
1da177e4 LT |
677 | andl %edi,%edx |
678 | jnz int_careful | |
26ccb8a7 | 679 | andl $~TS_COMPAT,TI_status(%rcx) |
1da177e4 LT |
680 | jmp retint_swapgs |
681 | ||
682 | /* Either reschedule or signal or syscall exit tracking needed. */ | |
683 | /* First do a reschedule test. */ | |
684 | /* edx: work, edi: workmask */ | |
685 | int_careful: | |
686 | bt $TIF_NEED_RESCHED,%edx | |
687 | jnc int_very_careful | |
2601e64d | 688 | TRACE_IRQS_ON |
72fe4858 | 689 | ENABLE_INTERRUPTS(CLBR_NONE) |
df5d1874 | 690 | pushq_cfi %rdi |
1da177e4 | 691 | call schedule |
df5d1874 | 692 | popq_cfi %rdi |
72fe4858 | 693 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 694 | TRACE_IRQS_OFF |
1da177e4 LT |
695 | jmp int_with_check |
696 | ||
697 | /* handle signals and tracing -- both require a full stack frame */ | |
698 | int_very_careful: | |
2601e64d | 699 | TRACE_IRQS_ON |
72fe4858 | 700 | ENABLE_INTERRUPTS(CLBR_NONE) |
b60e714d | 701 | int_check_syscall_exit_work: |
1da177e4 | 702 | SAVE_REST |
0bd7b798 | 703 | /* Check for syscall exit trace */ |
d4d67150 | 704 | testl $_TIF_WORK_SYSCALL_EXIT,%edx |
1da177e4 | 705 | jz int_signal |
df5d1874 | 706 | pushq_cfi %rdi |
0bd7b798 | 707 | leaq 8(%rsp),%rdi # &ptregs -> arg1 |
1da177e4 | 708 | call syscall_trace_leave |
df5d1874 | 709 | popq_cfi %rdi |
d4d67150 | 710 | andl $~(_TIF_WORK_SYSCALL_EXIT|_TIF_SYSCALL_EMU),%edi |
1da177e4 | 711 | jmp int_restore_rest |
0bd7b798 | 712 | |
1da177e4 | 713 | int_signal: |
8f4d37ec | 714 | testl $_TIF_DO_NOTIFY_MASK,%edx |
1da177e4 LT |
715 | jz 1f |
716 | movq %rsp,%rdi # &ptregs -> arg1 | |
717 | xorl %esi,%esi # oldset -> arg2 | |
718 | call do_notify_resume | |
eca91e78 | 719 | 1: movl $_TIF_WORK_MASK,%edi |
1da177e4 LT |
720 | int_restore_rest: |
721 | RESTORE_REST | |
72fe4858 | 722 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 723 | TRACE_IRQS_OFF |
1da177e4 LT |
724 | jmp int_with_check |
725 | CFI_ENDPROC | |
bcddc015 | 726 | END(system_call) |
0bd7b798 AH |
727 | |
728 | /* | |
1da177e4 | 729 | * Certain special system calls that need to save a complete full stack frame. |
0bd7b798 | 730 | */ |
1da177e4 | 731 | .macro PTREGSCALL label,func,arg |
c002a1e6 AH |
732 | ENTRY(\label) |
733 | PARTIAL_FRAME 1 8 /* offset 8: return address */ | |
734 | subq $REST_SKIP, %rsp | |
735 | CFI_ADJUST_CFA_OFFSET REST_SKIP | |
736 | call save_rest | |
737 | DEFAULT_FRAME 0 8 /* offset 8: return address */ | |
738 | leaq 8(%rsp), \arg /* pt_regs pointer */ | |
739 | call \func | |
740 | jmp ptregscall_common | |
741 | CFI_ENDPROC | |
4b787e0b | 742 | END(\label) |
1da177e4 LT |
743 | .endm |
744 | ||
745 | PTREGSCALL stub_clone, sys_clone, %r8 | |
746 | PTREGSCALL stub_fork, sys_fork, %rdi | |
747 | PTREGSCALL stub_vfork, sys_vfork, %rdi | |
1da177e4 LT |
748 | PTREGSCALL stub_sigaltstack, sys_sigaltstack, %rdx |
749 | PTREGSCALL stub_iopl, sys_iopl, %rsi | |
750 | ||
751 | ENTRY(ptregscall_common) | |
c002a1e6 AH |
752 | DEFAULT_FRAME 1 8 /* offset 8: return address */ |
753 | RESTORE_TOP_OF_STACK %r11, 8 | |
754 | movq_cfi_restore R15+8, r15 | |
755 | movq_cfi_restore R14+8, r14 | |
756 | movq_cfi_restore R13+8, r13 | |
757 | movq_cfi_restore R12+8, r12 | |
758 | movq_cfi_restore RBP+8, rbp | |
759 | movq_cfi_restore RBX+8, rbx | |
760 | ret $REST_SKIP /* pop extended registers */ | |
1da177e4 | 761 | CFI_ENDPROC |
4b787e0b | 762 | END(ptregscall_common) |
0bd7b798 | 763 | |
1da177e4 LT |
764 | ENTRY(stub_execve) |
765 | CFI_STARTPROC | |
e6b04b6b JB |
766 | addq $8, %rsp |
767 | PARTIAL_FRAME 0 | |
1da177e4 | 768 | SAVE_REST |
1da177e4 | 769 | FIXUP_TOP_OF_STACK %r11 |
5d119b2c | 770 | movq %rsp, %rcx |
1da177e4 | 771 | call sys_execve |
1da177e4 | 772 | RESTORE_TOP_OF_STACK %r11 |
1da177e4 LT |
773 | movq %rax,RAX(%rsp) |
774 | RESTORE_REST | |
775 | jmp int_ret_from_sys_call | |
776 | CFI_ENDPROC | |
4b787e0b | 777 | END(stub_execve) |
0bd7b798 | 778 | |
1da177e4 LT |
779 | /* |
780 | * sigreturn is special because it needs to restore all registers on return. | |
781 | * This cannot be done with SYSRET, so use the IRET return path instead. | |
0bd7b798 | 782 | */ |
1da177e4 LT |
783 | ENTRY(stub_rt_sigreturn) |
784 | CFI_STARTPROC | |
7effaa88 | 785 | addq $8, %rsp |
e6b04b6b | 786 | PARTIAL_FRAME 0 |
1da177e4 LT |
787 | SAVE_REST |
788 | movq %rsp,%rdi | |
789 | FIXUP_TOP_OF_STACK %r11 | |
790 | call sys_rt_sigreturn | |
791 | movq %rax,RAX(%rsp) # fixme, this could be done at the higher layer | |
792 | RESTORE_REST | |
793 | jmp int_ret_from_sys_call | |
794 | CFI_ENDPROC | |
4b787e0b | 795 | END(stub_rt_sigreturn) |
1da177e4 | 796 | |
c5a37394 PA |
797 | #ifdef CONFIG_X86_X32_ABI |
798 | PTREGSCALL stub_x32_sigaltstack, sys32_sigaltstack, %rdx | |
799 | ||
800 | ENTRY(stub_x32_rt_sigreturn) | |
801 | CFI_STARTPROC | |
802 | addq $8, %rsp | |
803 | PARTIAL_FRAME 0 | |
804 | SAVE_REST | |
805 | movq %rsp,%rdi | |
806 | FIXUP_TOP_OF_STACK %r11 | |
807 | call sys32_x32_rt_sigreturn | |
808 | movq %rax,RAX(%rsp) # fixme, this could be done at the higher layer | |
809 | RESTORE_REST | |
810 | jmp int_ret_from_sys_call | |
811 | CFI_ENDPROC | |
812 | END(stub_x32_rt_sigreturn) | |
813 | ||
d1a797f3 PA |
814 | ENTRY(stub_x32_execve) |
815 | CFI_STARTPROC | |
816 | addq $8, %rsp | |
817 | PARTIAL_FRAME 0 | |
818 | SAVE_REST | |
819 | FIXUP_TOP_OF_STACK %r11 | |
820 | movq %rsp, %rcx | |
821 | call sys32_execve | |
822 | RESTORE_TOP_OF_STACK %r11 | |
823 | movq %rax,RAX(%rsp) | |
824 | RESTORE_REST | |
825 | jmp int_ret_from_sys_call | |
826 | CFI_ENDPROC | |
827 | END(stub_x32_execve) | |
828 | ||
c5a37394 PA |
829 | #endif |
830 | ||
939b7871 PA |
831 | /* |
832 | * Build the entry stubs and pointer table with some assembler magic. | |
833 | * We pack 7 stubs into a single 32-byte chunk, which will fit in a | |
834 | * single cache line on all modern x86 implementations. | |
835 | */ | |
836 | .section .init.rodata,"a" | |
837 | ENTRY(interrupt) | |
ea714547 | 838 | .section .entry.text |
939b7871 PA |
839 | .p2align 5 |
840 | .p2align CONFIG_X86_L1_CACHE_SHIFT | |
841 | ENTRY(irq_entries_start) | |
842 | INTR_FRAME | |
843 | vector=FIRST_EXTERNAL_VECTOR | |
844 | .rept (NR_VECTORS-FIRST_EXTERNAL_VECTOR+6)/7 | |
845 | .balign 32 | |
846 | .rept 7 | |
847 | .if vector < NR_VECTORS | |
8665596e | 848 | .if vector <> FIRST_EXTERNAL_VECTOR |
939b7871 PA |
849 | CFI_ADJUST_CFA_OFFSET -8 |
850 | .endif | |
df5d1874 | 851 | 1: pushq_cfi $(~vector+0x80) /* Note: always in signed byte range */ |
8665596e | 852 | .if ((vector-FIRST_EXTERNAL_VECTOR)%7) <> 6 |
939b7871 PA |
853 | jmp 2f |
854 | .endif | |
855 | .previous | |
856 | .quad 1b | |
ea714547 | 857 | .section .entry.text |
939b7871 PA |
858 | vector=vector+1 |
859 | .endif | |
860 | .endr | |
861 | 2: jmp common_interrupt | |
862 | .endr | |
863 | CFI_ENDPROC | |
864 | END(irq_entries_start) | |
865 | ||
866 | .previous | |
867 | END(interrupt) | |
868 | .previous | |
869 | ||
d99015b1 | 870 | /* |
1da177e4 LT |
871 | * Interrupt entry/exit. |
872 | * | |
873 | * Interrupt entry points save only callee clobbered registers in fast path. | |
d99015b1 AH |
874 | * |
875 | * Entry runs with interrupts off. | |
876 | */ | |
1da177e4 | 877 | |
722024db | 878 | /* 0(%rsp): ~(interrupt number) */ |
1da177e4 | 879 | .macro interrupt func |
625dbc3b FW |
880 | /* reserve pt_regs for scratch regs and rbp */ |
881 | subq $ORIG_RAX-RBP, %rsp | |
882 | CFI_ADJUST_CFA_OFFSET ORIG_RAX-RBP | |
1871853f | 883 | SAVE_ARGS_IRQ |
1da177e4 LT |
884 | call \func |
885 | .endm | |
886 | ||
8222d718 MH |
887 | /* |
888 | * Interrupt entry/exit should be protected against kprobes | |
889 | */ | |
890 | .pushsection .kprobes.text, "ax" | |
722024db AH |
891 | /* |
892 | * The interrupt stubs push (~vector+0x80) onto the stack and | |
893 | * then jump to common_interrupt. | |
894 | */ | |
939b7871 PA |
895 | .p2align CONFIG_X86_L1_CACHE_SHIFT |
896 | common_interrupt: | |
7effaa88 | 897 | XCPT_FRAME |
722024db | 898 | addq $-0x80,(%rsp) /* Adjust vector to [-256,-1] range */ |
1da177e4 | 899 | interrupt do_IRQ |
3d1e42a7 | 900 | /* 0(%rsp): old_rsp-ARGOFFSET */ |
7effaa88 | 901 | ret_from_intr: |
72fe4858 | 902 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 903 | TRACE_IRQS_OFF |
56895530 | 904 | decl PER_CPU_VAR(irq_count) |
625dbc3b | 905 | |
a2bbe750 FW |
906 | /* Restore saved previous stack */ |
907 | popq %rsi | |
928282e4 | 908 | CFI_DEF_CFA rsi,SS+8-RBP /* reg/off reset after def_cfa_expr */ |
eab9e613 | 909 | leaq ARGOFFSET-RBP(%rsi), %rsp |
7effaa88 | 910 | CFI_DEF_CFA_REGISTER rsp |
eab9e613 | 911 | CFI_ADJUST_CFA_OFFSET RBP-ARGOFFSET |
625dbc3b | 912 | |
7effaa88 | 913 | exit_intr: |
1da177e4 LT |
914 | GET_THREAD_INFO(%rcx) |
915 | testl $3,CS-ARGOFFSET(%rsp) | |
916 | je retint_kernel | |
0bd7b798 | 917 | |
1da177e4 LT |
918 | /* Interrupt came from user space */ |
919 | /* | |
920 | * Has a correct top of stack, but a partial stack frame | |
921 | * %rcx: thread info. Interrupts off. | |
0bd7b798 | 922 | */ |
1da177e4 LT |
923 | retint_with_reschedule: |
924 | movl $_TIF_WORK_MASK,%edi | |
7effaa88 | 925 | retint_check: |
10cd706d | 926 | LOCKDEP_SYS_EXIT_IRQ |
26ccb8a7 | 927 | movl TI_flags(%rcx),%edx |
1da177e4 | 928 | andl %edi,%edx |
7effaa88 | 929 | CFI_REMEMBER_STATE |
1da177e4 | 930 | jnz retint_careful |
10cd706d PZ |
931 | |
932 | retint_swapgs: /* return to user-space */ | |
2601e64d IM |
933 | /* |
934 | * The iretq could re-enable interrupts: | |
935 | */ | |
72fe4858 | 936 | DISABLE_INTERRUPTS(CLBR_ANY) |
2601e64d | 937 | TRACE_IRQS_IRETQ |
72fe4858 | 938 | SWAPGS |
2601e64d IM |
939 | jmp restore_args |
940 | ||
10cd706d | 941 | retint_restore_args: /* return to kernel space */ |
72fe4858 | 942 | DISABLE_INTERRUPTS(CLBR_ANY) |
2601e64d IM |
943 | /* |
944 | * The iretq could re-enable interrupts: | |
945 | */ | |
946 | TRACE_IRQS_IRETQ | |
947 | restore_args: | |
838feb47 | 948 | RESTORE_ARGS 1,8,1 |
3701d863 | 949 | |
f7f3d791 | 950 | irq_return: |
72fe4858 | 951 | INTERRUPT_RETURN |
d7abc0fa | 952 | _ASM_EXTABLE(irq_return, bad_iret) |
3701d863 IM |
953 | |
954 | #ifdef CONFIG_PARAVIRT | |
72fe4858 | 955 | ENTRY(native_iret) |
1da177e4 | 956 | iretq |
d7abc0fa | 957 | _ASM_EXTABLE(native_iret, bad_iret) |
3701d863 IM |
958 | #endif |
959 | ||
1da177e4 | 960 | .section .fixup,"ax" |
1da177e4 | 961 | bad_iret: |
3aa4b37d RM |
962 | /* |
963 | * The iret traps when the %cs or %ss being restored is bogus. | |
964 | * We've lost the original trap vector and error code. | |
965 | * #GPF is the most likely one to get for an invalid selector. | |
966 | * So pretend we completed the iret and took the #GPF in user mode. | |
967 | * | |
968 | * We are now running with the kernel GS after exception recovery. | |
969 | * But error_entry expects us to have user GS to match the user %cs, | |
970 | * so swap back. | |
971 | */ | |
972 | pushq $0 | |
973 | ||
974 | SWAPGS | |
975 | jmp general_protection | |
976 | ||
72fe4858 GOC |
977 | .previous |
978 | ||
7effaa88 | 979 | /* edi: workmask, edx: work */ |
1da177e4 | 980 | retint_careful: |
7effaa88 | 981 | CFI_RESTORE_STATE |
1da177e4 LT |
982 | bt $TIF_NEED_RESCHED,%edx |
983 | jnc retint_signal | |
2601e64d | 984 | TRACE_IRQS_ON |
72fe4858 | 985 | ENABLE_INTERRUPTS(CLBR_NONE) |
df5d1874 | 986 | pushq_cfi %rdi |
1da177e4 | 987 | call schedule |
df5d1874 | 988 | popq_cfi %rdi |
1da177e4 | 989 | GET_THREAD_INFO(%rcx) |
72fe4858 | 990 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 991 | TRACE_IRQS_OFF |
1da177e4 | 992 | jmp retint_check |
0bd7b798 | 993 | |
1da177e4 | 994 | retint_signal: |
8f4d37ec | 995 | testl $_TIF_DO_NOTIFY_MASK,%edx |
10ffdbb8 | 996 | jz retint_swapgs |
2601e64d | 997 | TRACE_IRQS_ON |
72fe4858 | 998 | ENABLE_INTERRUPTS(CLBR_NONE) |
1da177e4 | 999 | SAVE_REST |
0bd7b798 | 1000 | movq $-1,ORIG_RAX(%rsp) |
3829ee6b | 1001 | xorl %esi,%esi # oldset |
1da177e4 LT |
1002 | movq %rsp,%rdi # &pt_regs |
1003 | call do_notify_resume | |
1004 | RESTORE_REST | |
72fe4858 | 1005 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 1006 | TRACE_IRQS_OFF |
be9e6870 | 1007 | GET_THREAD_INFO(%rcx) |
eca91e78 | 1008 | jmp retint_with_reschedule |
1da177e4 LT |
1009 | |
1010 | #ifdef CONFIG_PREEMPT | |
1011 | /* Returning to kernel space. Check if we need preemption */ | |
1012 | /* rcx: threadinfo. interrupts off. */ | |
b06babac | 1013 | ENTRY(retint_kernel) |
26ccb8a7 | 1014 | cmpl $0,TI_preempt_count(%rcx) |
1da177e4 | 1015 | jnz retint_restore_args |
26ccb8a7 | 1016 | bt $TIF_NEED_RESCHED,TI_flags(%rcx) |
1da177e4 LT |
1017 | jnc retint_restore_args |
1018 | bt $9,EFLAGS-ARGOFFSET(%rsp) /* interrupts off? */ | |
1019 | jnc retint_restore_args | |
1020 | call preempt_schedule_irq | |
1021 | jmp exit_intr | |
0bd7b798 | 1022 | #endif |
4b787e0b | 1023 | |
1da177e4 | 1024 | CFI_ENDPROC |
4b787e0b | 1025 | END(common_interrupt) |
8222d718 MH |
1026 | /* |
1027 | * End of kprobes section | |
1028 | */ | |
1029 | .popsection | |
0bd7b798 | 1030 | |
1da177e4 LT |
1031 | /* |
1032 | * APIC interrupts. | |
0bd7b798 | 1033 | */ |
322648d1 AH |
1034 | .macro apicinterrupt num sym do_sym |
1035 | ENTRY(\sym) | |
7effaa88 | 1036 | INTR_FRAME |
df5d1874 | 1037 | pushq_cfi $~(\num) |
39e95433 | 1038 | .Lcommon_\sym: |
322648d1 | 1039 | interrupt \do_sym |
1da177e4 LT |
1040 | jmp ret_from_intr |
1041 | CFI_ENDPROC | |
322648d1 AH |
1042 | END(\sym) |
1043 | .endm | |
1da177e4 | 1044 | |
322648d1 AH |
1045 | #ifdef CONFIG_SMP |
1046 | apicinterrupt IRQ_MOVE_CLEANUP_VECTOR \ | |
1047 | irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt | |
4ef702c1 AK |
1048 | apicinterrupt REBOOT_VECTOR \ |
1049 | reboot_interrupt smp_reboot_interrupt | |
322648d1 | 1050 | #endif |
1da177e4 | 1051 | |
03b48632 | 1052 | #ifdef CONFIG_X86_UV |
5ae3a139 | 1053 | apicinterrupt UV_BAU_MESSAGE \ |
322648d1 | 1054 | uv_bau_message_intr1 uv_bau_message_interrupt |
03b48632 | 1055 | #endif |
322648d1 AH |
1056 | apicinterrupt LOCAL_TIMER_VECTOR \ |
1057 | apic_timer_interrupt smp_apic_timer_interrupt | |
4a4de9c7 DS |
1058 | apicinterrupt X86_PLATFORM_IPI_VECTOR \ |
1059 | x86_platform_ipi smp_x86_platform_ipi | |
89b831ef | 1060 | |
322648d1 | 1061 | apicinterrupt THRESHOLD_APIC_VECTOR \ |
7856f6cc | 1062 | threshold_interrupt smp_threshold_interrupt |
322648d1 AH |
1063 | apicinterrupt THERMAL_APIC_VECTOR \ |
1064 | thermal_interrupt smp_thermal_interrupt | |
1812924b | 1065 | |
322648d1 AH |
1066 | #ifdef CONFIG_SMP |
1067 | apicinterrupt CALL_FUNCTION_SINGLE_VECTOR \ | |
1068 | call_function_single_interrupt smp_call_function_single_interrupt | |
1069 | apicinterrupt CALL_FUNCTION_VECTOR \ | |
1070 | call_function_interrupt smp_call_function_interrupt | |
1071 | apicinterrupt RESCHEDULE_VECTOR \ | |
1072 | reschedule_interrupt smp_reschedule_interrupt | |
1073 | #endif | |
1da177e4 | 1074 | |
322648d1 AH |
1075 | apicinterrupt ERROR_APIC_VECTOR \ |
1076 | error_interrupt smp_error_interrupt | |
1077 | apicinterrupt SPURIOUS_APIC_VECTOR \ | |
1078 | spurious_interrupt smp_spurious_interrupt | |
0bd7b798 | 1079 | |
e360adbe PZ |
1080 | #ifdef CONFIG_IRQ_WORK |
1081 | apicinterrupt IRQ_WORK_VECTOR \ | |
1082 | irq_work_interrupt smp_irq_work_interrupt | |
241771ef IM |
1083 | #endif |
1084 | ||
1da177e4 LT |
1085 | /* |
1086 | * Exception entry points. | |
0bd7b798 | 1087 | */ |
322648d1 AH |
1088 | .macro zeroentry sym do_sym |
1089 | ENTRY(\sym) | |
7effaa88 | 1090 | INTR_FRAME |
fab58420 | 1091 | PARAVIRT_ADJUST_EXCEPTION_FRAME |
14ae22ba | 1092 | pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */ |
b1cccb1b JB |
1093 | subq $ORIG_RAX-R15, %rsp |
1094 | CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15 | |
d99015b1 | 1095 | call error_entry |
dcd072e2 | 1096 | DEFAULT_FRAME 0 |
d99015b1 AH |
1097 | movq %rsp,%rdi /* pt_regs pointer */ |
1098 | xorl %esi,%esi /* no error code */ | |
322648d1 | 1099 | call \do_sym |
d99015b1 | 1100 | jmp error_exit /* %ebx: no swapgs flag */ |
7effaa88 | 1101 | CFI_ENDPROC |
322648d1 AH |
1102 | END(\sym) |
1103 | .endm | |
1da177e4 | 1104 | |
322648d1 | 1105 | .macro paranoidzeroentry sym do_sym |
ddeb8f21 | 1106 | ENTRY(\sym) |
b8b1d08b AH |
1107 | INTR_FRAME |
1108 | PARAVIRT_ADJUST_EXCEPTION_FRAME | |
b1cccb1b JB |
1109 | pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */ |
1110 | subq $ORIG_RAX-R15, %rsp | |
1111 | CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15 | |
b8b1d08b AH |
1112 | call save_paranoid |
1113 | TRACE_IRQS_OFF | |
1114 | movq %rsp,%rdi /* pt_regs pointer */ | |
1115 | xorl %esi,%esi /* no error code */ | |
322648d1 | 1116 | call \do_sym |
b8b1d08b AH |
1117 | jmp paranoid_exit /* %ebx: no swapgs flag */ |
1118 | CFI_ENDPROC | |
ddeb8f21 | 1119 | END(\sym) |
322648d1 | 1120 | .endm |
b8b1d08b | 1121 | |
c15a5958 | 1122 | #define INIT_TSS_IST(x) PER_CPU_VAR(init_tss) + (TSS_ist + ((x) - 1) * 8) |
322648d1 | 1123 | .macro paranoidzeroentry_ist sym do_sym ist |
ddeb8f21 | 1124 | ENTRY(\sym) |
9f1e87ea | 1125 | INTR_FRAME |
b8b1d08b | 1126 | PARAVIRT_ADJUST_EXCEPTION_FRAME |
b1cccb1b JB |
1127 | pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */ |
1128 | subq $ORIG_RAX-R15, %rsp | |
1129 | CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15 | |
b8b1d08b | 1130 | call save_paranoid |
5963e317 | 1131 | TRACE_IRQS_OFF_DEBUG |
b8b1d08b AH |
1132 | movq %rsp,%rdi /* pt_regs pointer */ |
1133 | xorl %esi,%esi /* no error code */ | |
c15a5958 | 1134 | subq $EXCEPTION_STKSZ, INIT_TSS_IST(\ist) |
322648d1 | 1135 | call \do_sym |
c15a5958 | 1136 | addq $EXCEPTION_STKSZ, INIT_TSS_IST(\ist) |
b8b1d08b AH |
1137 | jmp paranoid_exit /* %ebx: no swapgs flag */ |
1138 | CFI_ENDPROC | |
ddeb8f21 | 1139 | END(\sym) |
322648d1 | 1140 | .endm |
b8b1d08b | 1141 | |
ddeb8f21 | 1142 | .macro errorentry sym do_sym |
322648d1 | 1143 | ENTRY(\sym) |
7effaa88 | 1144 | XCPT_FRAME |
fab58420 | 1145 | PARAVIRT_ADJUST_EXCEPTION_FRAME |
b1cccb1b JB |
1146 | subq $ORIG_RAX-R15, %rsp |
1147 | CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15 | |
d99015b1 | 1148 | call error_entry |
dcd072e2 | 1149 | DEFAULT_FRAME 0 |
d99015b1 AH |
1150 | movq %rsp,%rdi /* pt_regs pointer */ |
1151 | movq ORIG_RAX(%rsp),%rsi /* get error code */ | |
1152 | movq $-1,ORIG_RAX(%rsp) /* no syscall to restart */ | |
322648d1 | 1153 | call \do_sym |
d99015b1 | 1154 | jmp error_exit /* %ebx: no swapgs flag */ |
7effaa88 | 1155 | CFI_ENDPROC |
322648d1 | 1156 | END(\sym) |
322648d1 | 1157 | .endm |
1da177e4 LT |
1158 | |
1159 | /* error code is on the stack already */ | |
ddeb8f21 | 1160 | .macro paranoiderrorentry sym do_sym |
322648d1 | 1161 | ENTRY(\sym) |
b8b1d08b AH |
1162 | XCPT_FRAME |
1163 | PARAVIRT_ADJUST_EXCEPTION_FRAME | |
b1cccb1b JB |
1164 | subq $ORIG_RAX-R15, %rsp |
1165 | CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15 | |
e2f6bc25 AH |
1166 | call save_paranoid |
1167 | DEFAULT_FRAME 0 | |
7e61a793 | 1168 | TRACE_IRQS_OFF |
b8b1d08b AH |
1169 | movq %rsp,%rdi /* pt_regs pointer */ |
1170 | movq ORIG_RAX(%rsp),%rsi /* get error code */ | |
1171 | movq $-1,ORIG_RAX(%rsp) /* no syscall to restart */ | |
322648d1 | 1172 | call \do_sym |
b8b1d08b AH |
1173 | jmp paranoid_exit /* %ebx: no swapgs flag */ |
1174 | CFI_ENDPROC | |
322648d1 | 1175 | END(\sym) |
322648d1 AH |
1176 | .endm |
1177 | ||
1178 | zeroentry divide_error do_divide_error | |
322648d1 AH |
1179 | zeroentry overflow do_overflow |
1180 | zeroentry bounds do_bounds | |
1181 | zeroentry invalid_op do_invalid_op | |
1182 | zeroentry device_not_available do_device_not_available | |
ddeb8f21 | 1183 | paranoiderrorentry double_fault do_double_fault |
322648d1 AH |
1184 | zeroentry coprocessor_segment_overrun do_coprocessor_segment_overrun |
1185 | errorentry invalid_TSS do_invalid_TSS | |
1186 | errorentry segment_not_present do_segment_not_present | |
322648d1 AH |
1187 | zeroentry spurious_interrupt_bug do_spurious_interrupt_bug |
1188 | zeroentry coprocessor_error do_coprocessor_error | |
1189 | errorentry alignment_check do_alignment_check | |
322648d1 | 1190 | zeroentry simd_coprocessor_error do_simd_coprocessor_error |
5cec93c2 | 1191 | |
2601e64d | 1192 | |
9f1e87ea CG |
1193 | /* Reload gs selector with exception handling */ |
1194 | /* edi: new selector */ | |
9f9d489a | 1195 | ENTRY(native_load_gs_index) |
7effaa88 | 1196 | CFI_STARTPROC |
df5d1874 | 1197 | pushfq_cfi |
b8aa287f | 1198 | DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI) |
9f1e87ea | 1199 | SWAPGS |
0bd7b798 | 1200 | gs_change: |
9f1e87ea | 1201 | movl %edi,%gs |
1da177e4 | 1202 | 2: mfence /* workaround */ |
72fe4858 | 1203 | SWAPGS |
df5d1874 | 1204 | popfq_cfi |
9f1e87ea | 1205 | ret |
7effaa88 | 1206 | CFI_ENDPROC |
6efdcfaf | 1207 | END(native_load_gs_index) |
0bd7b798 | 1208 | |
d7abc0fa | 1209 | _ASM_EXTABLE(gs_change,bad_gs) |
9f1e87ea | 1210 | .section .fixup,"ax" |
1da177e4 | 1211 | /* running with kernelgs */ |
0bd7b798 | 1212 | bad_gs: |
72fe4858 | 1213 | SWAPGS /* switch back to user gs */ |
1da177e4 | 1214 | xorl %eax,%eax |
9f1e87ea CG |
1215 | movl %eax,%gs |
1216 | jmp 2b | |
1217 | .previous | |
0bd7b798 | 1218 | |
1da177e4 LT |
1219 | /* |
1220 | * execve(). This function needs to use IRET, not SYSRET, to set up all state properly. | |
1221 | * | |
1222 | * C extern interface: | |
c7887325 | 1223 | * extern long execve(const char *name, char **argv, char **envp) |
1da177e4 LT |
1224 | * |
1225 | * asm input arguments: | |
1226 | * rdi: name, rsi: argv, rdx: envp | |
1227 | * | |
1228 | * We want to fallback into: | |
c7887325 | 1229 | * extern long sys_execve(const char *name, char **argv,char **envp, struct pt_regs *regs) |
1da177e4 LT |
1230 | * |
1231 | * do_sys_execve asm fallback arguments: | |
5d119b2c | 1232 | * rdi: name, rsi: argv, rdx: envp, rcx: fake frame on the stack |
1da177e4 | 1233 | */ |
3db03b4a | 1234 | ENTRY(kernel_execve) |
1da177e4 LT |
1235 | CFI_STARTPROC |
1236 | FAKE_STACK_FRAME $0 | |
0bd7b798 | 1237 | SAVE_ALL |
5d119b2c | 1238 | movq %rsp,%rcx |
1da177e4 | 1239 | call sys_execve |
0bd7b798 | 1240 | movq %rax, RAX(%rsp) |
1da177e4 LT |
1241 | RESTORE_REST |
1242 | testq %rax,%rax | |
1243 | je int_ret_from_sys_call | |
1244 | RESTORE_ARGS | |
1245 | UNFAKE_STACK_FRAME | |
1246 | ret | |
1247 | CFI_ENDPROC | |
6efdcfaf | 1248 | END(kernel_execve) |
1da177e4 | 1249 | |
2699500b | 1250 | /* Call softirq on interrupt stack. Interrupts are off. */ |
ed6b676c | 1251 | ENTRY(call_softirq) |
7effaa88 | 1252 | CFI_STARTPROC |
df5d1874 | 1253 | pushq_cfi %rbp |
2699500b AK |
1254 | CFI_REL_OFFSET rbp,0 |
1255 | mov %rsp,%rbp | |
1256 | CFI_DEF_CFA_REGISTER rbp | |
56895530 | 1257 | incl PER_CPU_VAR(irq_count) |
26f80bd6 | 1258 | cmove PER_CPU_VAR(irq_stack_ptr),%rsp |
2699500b | 1259 | push %rbp # backlink for old unwinder |
ed6b676c | 1260 | call __do_softirq |
2699500b | 1261 | leaveq |
df5d1874 | 1262 | CFI_RESTORE rbp |
7effaa88 | 1263 | CFI_DEF_CFA_REGISTER rsp |
2699500b | 1264 | CFI_ADJUST_CFA_OFFSET -8 |
56895530 | 1265 | decl PER_CPU_VAR(irq_count) |
ed6b676c | 1266 | ret |
7effaa88 | 1267 | CFI_ENDPROC |
6efdcfaf | 1268 | END(call_softirq) |
75154f40 | 1269 | |
3d75e1b8 | 1270 | #ifdef CONFIG_XEN |
322648d1 | 1271 | zeroentry xen_hypervisor_callback xen_do_hypervisor_callback |
3d75e1b8 JF |
1272 | |
1273 | /* | |
9f1e87ea CG |
1274 | * A note on the "critical region" in our callback handler. |
1275 | * We want to avoid stacking callback handlers due to events occurring | |
1276 | * during handling of the last event. To do this, we keep events disabled | |
1277 | * until we've done all processing. HOWEVER, we must enable events before | |
1278 | * popping the stack frame (can't be done atomically) and so it would still | |
1279 | * be possible to get enough handler activations to overflow the stack. | |
1280 | * Although unlikely, bugs of that kind are hard to track down, so we'd | |
1281 | * like to avoid the possibility. | |
1282 | * So, on entry to the handler we detect whether we interrupted an | |
1283 | * existing activation in its critical region -- if so, we pop the current | |
1284 | * activation and restart the handler using the previous one. | |
1285 | */ | |
3d75e1b8 JF |
1286 | ENTRY(xen_do_hypervisor_callback) # do_hypervisor_callback(struct *pt_regs) |
1287 | CFI_STARTPROC | |
9f1e87ea CG |
1288 | /* |
1289 | * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will | |
1290 | * see the correct pointer to the pt_regs | |
1291 | */ | |
3d75e1b8 JF |
1292 | movq %rdi, %rsp # we don't return, adjust the stack frame |
1293 | CFI_ENDPROC | |
dcd072e2 | 1294 | DEFAULT_FRAME |
56895530 | 1295 | 11: incl PER_CPU_VAR(irq_count) |
3d75e1b8 JF |
1296 | movq %rsp,%rbp |
1297 | CFI_DEF_CFA_REGISTER rbp | |
26f80bd6 | 1298 | cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp |
3d75e1b8 JF |
1299 | pushq %rbp # backlink for old unwinder |
1300 | call xen_evtchn_do_upcall | |
1301 | popq %rsp | |
1302 | CFI_DEF_CFA_REGISTER rsp | |
56895530 | 1303 | decl PER_CPU_VAR(irq_count) |
3d75e1b8 JF |
1304 | jmp error_exit |
1305 | CFI_ENDPROC | |
371c394a | 1306 | END(xen_do_hypervisor_callback) |
3d75e1b8 JF |
1307 | |
1308 | /* | |
9f1e87ea CG |
1309 | * Hypervisor uses this for application faults while it executes. |
1310 | * We get here for two reasons: | |
1311 | * 1. Fault while reloading DS, ES, FS or GS | |
1312 | * 2. Fault while executing IRET | |
1313 | * Category 1 we do not need to fix up as Xen has already reloaded all segment | |
1314 | * registers that could be reloaded and zeroed the others. | |
1315 | * Category 2 we fix up by killing the current process. We cannot use the | |
1316 | * normal Linux return path in this case because if we use the IRET hypercall | |
1317 | * to pop the stack frame we end up in an infinite loop of failsafe callbacks. | |
1318 | * We distinguish between categories by comparing each saved segment register | |
1319 | * with its current contents: any discrepancy means we in category 1. | |
1320 | */ | |
3d75e1b8 | 1321 | ENTRY(xen_failsafe_callback) |
dcd072e2 AH |
1322 | INTR_FRAME 1 (6*8) |
1323 | /*CFI_REL_OFFSET gs,GS*/ | |
1324 | /*CFI_REL_OFFSET fs,FS*/ | |
1325 | /*CFI_REL_OFFSET es,ES*/ | |
1326 | /*CFI_REL_OFFSET ds,DS*/ | |
1327 | CFI_REL_OFFSET r11,8 | |
1328 | CFI_REL_OFFSET rcx,0 | |
3d75e1b8 JF |
1329 | movw %ds,%cx |
1330 | cmpw %cx,0x10(%rsp) | |
1331 | CFI_REMEMBER_STATE | |
1332 | jne 1f | |
1333 | movw %es,%cx | |
1334 | cmpw %cx,0x18(%rsp) | |
1335 | jne 1f | |
1336 | movw %fs,%cx | |
1337 | cmpw %cx,0x20(%rsp) | |
1338 | jne 1f | |
1339 | movw %gs,%cx | |
1340 | cmpw %cx,0x28(%rsp) | |
1341 | jne 1f | |
1342 | /* All segments match their saved values => Category 2 (Bad IRET). */ | |
1343 | movq (%rsp),%rcx | |
1344 | CFI_RESTORE rcx | |
1345 | movq 8(%rsp),%r11 | |
1346 | CFI_RESTORE r11 | |
1347 | addq $0x30,%rsp | |
1348 | CFI_ADJUST_CFA_OFFSET -0x30 | |
14ae22ba IM |
1349 | pushq_cfi $0 /* RIP */ |
1350 | pushq_cfi %r11 | |
1351 | pushq_cfi %rcx | |
4a5c3e77 | 1352 | jmp general_protection |
3d75e1b8 JF |
1353 | CFI_RESTORE_STATE |
1354 | 1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */ | |
1355 | movq (%rsp),%rcx | |
1356 | CFI_RESTORE rcx | |
1357 | movq 8(%rsp),%r11 | |
1358 | CFI_RESTORE r11 | |
1359 | addq $0x30,%rsp | |
1360 | CFI_ADJUST_CFA_OFFSET -0x30 | |
14ae22ba | 1361 | pushq_cfi $0 |
3d75e1b8 JF |
1362 | SAVE_ALL |
1363 | jmp error_exit | |
1364 | CFI_ENDPROC | |
3d75e1b8 JF |
1365 | END(xen_failsafe_callback) |
1366 | ||
38e20b07 SY |
1367 | apicinterrupt XEN_HVM_EVTCHN_CALLBACK \ |
1368 | xen_hvm_callback_vector xen_evtchn_do_upcall | |
1369 | ||
3d75e1b8 | 1370 | #endif /* CONFIG_XEN */ |
ddeb8f21 AH |
1371 | |
1372 | /* | |
1373 | * Some functions should be protected against kprobes | |
1374 | */ | |
1375 | .pushsection .kprobes.text, "ax" | |
1376 | ||
1377 | paranoidzeroentry_ist debug do_debug DEBUG_STACK | |
1378 | paranoidzeroentry_ist int3 do_int3 DEBUG_STACK | |
1379 | paranoiderrorentry stack_segment do_stack_segment | |
6cac5a92 JF |
1380 | #ifdef CONFIG_XEN |
1381 | zeroentry xen_debug do_debug | |
1382 | zeroentry xen_int3 do_int3 | |
1383 | errorentry xen_stack_segment do_stack_segment | |
1384 | #endif | |
ddeb8f21 AH |
1385 | errorentry general_protection do_general_protection |
1386 | errorentry page_fault do_page_fault | |
631bc487 GN |
1387 | #ifdef CONFIG_KVM_GUEST |
1388 | errorentry async_page_fault do_async_page_fault | |
1389 | #endif | |
ddeb8f21 | 1390 | #ifdef CONFIG_X86_MCE |
5d727926 | 1391 | paranoidzeroentry machine_check *machine_check_vector(%rip) |
ddeb8f21 AH |
1392 | #endif |
1393 | ||
1394 | /* | |
9f1e87ea CG |
1395 | * "Paranoid" exit path from exception stack. |
1396 | * Paranoid because this is used by NMIs and cannot take | |
ddeb8f21 AH |
1397 | * any kernel state for granted. |
1398 | * We don't do kernel preemption checks here, because only | |
1399 | * NMI should be common and it does not enable IRQs and | |
1400 | * cannot get reschedule ticks. | |
1401 | * | |
1402 | * "trace" is 0 for the NMI handler only, because irq-tracing | |
1403 | * is fundamentally NMI-unsafe. (we cannot change the soft and | |
1404 | * hard flags at once, atomically) | |
1405 | */ | |
1406 | ||
1407 | /* ebx: no swapgs flag */ | |
1408 | ENTRY(paranoid_exit) | |
1f130a78 | 1409 | DEFAULT_FRAME |
ddeb8f21 | 1410 | DISABLE_INTERRUPTS(CLBR_NONE) |
5963e317 | 1411 | TRACE_IRQS_OFF_DEBUG |
ddeb8f21 AH |
1412 | testl %ebx,%ebx /* swapgs needed? */ |
1413 | jnz paranoid_restore | |
1414 | testl $3,CS(%rsp) | |
1415 | jnz paranoid_userspace | |
1416 | paranoid_swapgs: | |
1417 | TRACE_IRQS_IRETQ 0 | |
1418 | SWAPGS_UNSAFE_STACK | |
0300e7f1 SR |
1419 | RESTORE_ALL 8 |
1420 | jmp irq_return | |
ddeb8f21 | 1421 | paranoid_restore: |
5963e317 | 1422 | TRACE_IRQS_IRETQ_DEBUG 0 |
ddeb8f21 AH |
1423 | RESTORE_ALL 8 |
1424 | jmp irq_return | |
1425 | paranoid_userspace: | |
1426 | GET_THREAD_INFO(%rcx) | |
1427 | movl TI_flags(%rcx),%ebx | |
1428 | andl $_TIF_WORK_MASK,%ebx | |
1429 | jz paranoid_swapgs | |
1430 | movq %rsp,%rdi /* &pt_regs */ | |
1431 | call sync_regs | |
1432 | movq %rax,%rsp /* switch stack for scheduling */ | |
1433 | testl $_TIF_NEED_RESCHED,%ebx | |
1434 | jnz paranoid_schedule | |
1435 | movl %ebx,%edx /* arg3: thread flags */ | |
1436 | TRACE_IRQS_ON | |
1437 | ENABLE_INTERRUPTS(CLBR_NONE) | |
1438 | xorl %esi,%esi /* arg2: oldset */ | |
1439 | movq %rsp,%rdi /* arg1: &pt_regs */ | |
1440 | call do_notify_resume | |
1441 | DISABLE_INTERRUPTS(CLBR_NONE) | |
1442 | TRACE_IRQS_OFF | |
1443 | jmp paranoid_userspace | |
1444 | paranoid_schedule: | |
1445 | TRACE_IRQS_ON | |
1446 | ENABLE_INTERRUPTS(CLBR_ANY) | |
1447 | call schedule | |
1448 | DISABLE_INTERRUPTS(CLBR_ANY) | |
1449 | TRACE_IRQS_OFF | |
1450 | jmp paranoid_userspace | |
1451 | CFI_ENDPROC | |
1452 | END(paranoid_exit) | |
1453 | ||
1454 | /* | |
1455 | * Exception entry point. This expects an error code/orig_rax on the stack. | |
1456 | * returns in "no swapgs flag" in %ebx. | |
1457 | */ | |
1458 | ENTRY(error_entry) | |
1459 | XCPT_FRAME | |
1460 | CFI_ADJUST_CFA_OFFSET 15*8 | |
1461 | /* oldrax contains error code */ | |
1462 | cld | |
1463 | movq_cfi rdi, RDI+8 | |
1464 | movq_cfi rsi, RSI+8 | |
1465 | movq_cfi rdx, RDX+8 | |
1466 | movq_cfi rcx, RCX+8 | |
1467 | movq_cfi rax, RAX+8 | |
1468 | movq_cfi r8, R8+8 | |
1469 | movq_cfi r9, R9+8 | |
1470 | movq_cfi r10, R10+8 | |
1471 | movq_cfi r11, R11+8 | |
1472 | movq_cfi rbx, RBX+8 | |
1473 | movq_cfi rbp, RBP+8 | |
1474 | movq_cfi r12, R12+8 | |
1475 | movq_cfi r13, R13+8 | |
1476 | movq_cfi r14, R14+8 | |
1477 | movq_cfi r15, R15+8 | |
1478 | xorl %ebx,%ebx | |
1479 | testl $3,CS+8(%rsp) | |
1480 | je error_kernelspace | |
1481 | error_swapgs: | |
1482 | SWAPGS | |
1483 | error_sti: | |
1484 | TRACE_IRQS_OFF | |
1485 | ret | |
ddeb8f21 AH |
1486 | |
1487 | /* | |
1488 | * There are two places in the kernel that can potentially fault with | |
1489 | * usergs. Handle them here. The exception handlers after iret run with | |
1490 | * kernel gs again, so don't set the user space flag. B stepping K8s | |
1491 | * sometimes report an truncated RIP for IRET exceptions returning to | |
1492 | * compat mode. Check for these here too. | |
1493 | */ | |
1494 | error_kernelspace: | |
1495 | incl %ebx | |
1496 | leaq irq_return(%rip),%rcx | |
1497 | cmpq %rcx,RIP+8(%rsp) | |
1498 | je error_swapgs | |
ae24ffe5 BG |
1499 | movl %ecx,%eax /* zero extend */ |
1500 | cmpq %rax,RIP+8(%rsp) | |
1501 | je bstep_iret | |
ddeb8f21 | 1502 | cmpq $gs_change,RIP+8(%rsp) |
9f1e87ea | 1503 | je error_swapgs |
ddeb8f21 | 1504 | jmp error_sti |
ae24ffe5 BG |
1505 | |
1506 | bstep_iret: | |
1507 | /* Fix truncated RIP */ | |
1508 | movq %rcx,RIP+8(%rsp) | |
97829de5 | 1509 | jmp error_swapgs |
e6b04b6b | 1510 | CFI_ENDPROC |
ddeb8f21 AH |
1511 | END(error_entry) |
1512 | ||
1513 | ||
1514 | /* ebx: no swapgs flag (1: don't need swapgs, 0: need it) */ | |
1515 | ENTRY(error_exit) | |
1516 | DEFAULT_FRAME | |
1517 | movl %ebx,%eax | |
1518 | RESTORE_REST | |
1519 | DISABLE_INTERRUPTS(CLBR_NONE) | |
1520 | TRACE_IRQS_OFF | |
1521 | GET_THREAD_INFO(%rcx) | |
1522 | testl %eax,%eax | |
1523 | jne retint_kernel | |
1524 | LOCKDEP_SYS_EXIT_IRQ | |
1525 | movl TI_flags(%rcx),%edx | |
1526 | movl $_TIF_WORK_MASK,%edi | |
1527 | andl %edi,%edx | |
1528 | jnz retint_careful | |
1529 | jmp retint_swapgs | |
1530 | CFI_ENDPROC | |
1531 | END(error_exit) | |
1532 | ||
3f3c8b8c SR |
1533 | /* |
1534 | * Test if a given stack is an NMI stack or not. | |
1535 | */ | |
1536 | .macro test_in_nmi reg stack nmi_ret normal_ret | |
1537 | cmpq %\reg, \stack | |
1538 | ja \normal_ret | |
1539 | subq $EXCEPTION_STKSZ, %\reg | |
1540 | cmpq %\reg, \stack | |
1541 | jb \normal_ret | |
1542 | jmp \nmi_ret | |
1543 | .endm | |
ddeb8f21 AH |
1544 | |
1545 | /* runs on exception stack */ | |
1546 | ENTRY(nmi) | |
1547 | INTR_FRAME | |
1548 | PARAVIRT_ADJUST_EXCEPTION_FRAME | |
3f3c8b8c SR |
1549 | /* |
1550 | * We allow breakpoints in NMIs. If a breakpoint occurs, then | |
1551 | * the iretq it performs will take us out of NMI context. | |
1552 | * This means that we can have nested NMIs where the next | |
1553 | * NMI is using the top of the stack of the previous NMI. We | |
1554 | * can't let it execute because the nested NMI will corrupt the | |
1555 | * stack of the previous NMI. NMI handlers are not re-entrant | |
1556 | * anyway. | |
1557 | * | |
1558 | * To handle this case we do the following: | |
1559 | * Check the a special location on the stack that contains | |
1560 | * a variable that is set when NMIs are executing. | |
1561 | * The interrupted task's stack is also checked to see if it | |
1562 | * is an NMI stack. | |
1563 | * If the variable is not set and the stack is not the NMI | |
1564 | * stack then: | |
1565 | * o Set the special variable on the stack | |
1566 | * o Copy the interrupt frame into a "saved" location on the stack | |
1567 | * o Copy the interrupt frame into a "copy" location on the stack | |
1568 | * o Continue processing the NMI | |
1569 | * If the variable is set or the previous stack is the NMI stack: | |
1570 | * o Modify the "copy" location to jump to the repeate_nmi | |
1571 | * o return back to the first NMI | |
1572 | * | |
1573 | * Now on exit of the first NMI, we first clear the stack variable | |
1574 | * The NMI stack will tell any nested NMIs at that point that it is | |
1575 | * nested. Then we pop the stack normally with iret, and if there was | |
1576 | * a nested NMI that updated the copy interrupt stack frame, a | |
1577 | * jump will be made to the repeat_nmi code that will handle the second | |
1578 | * NMI. | |
1579 | */ | |
1580 | ||
1581 | /* Use %rdx as out temp variable throughout */ | |
1582 | pushq_cfi %rdx | |
62610913 | 1583 | CFI_REL_OFFSET rdx, 0 |
3f3c8b8c | 1584 | |
45d5a168 SR |
1585 | /* |
1586 | * If %cs was not the kernel segment, then the NMI triggered in user | |
1587 | * space, which means it is definitely not nested. | |
1588 | */ | |
a38449ef | 1589 | cmpl $__KERNEL_CS, 16(%rsp) |
45d5a168 SR |
1590 | jne first_nmi |
1591 | ||
3f3c8b8c SR |
1592 | /* |
1593 | * Check the special variable on the stack to see if NMIs are | |
1594 | * executing. | |
1595 | */ | |
a38449ef | 1596 | cmpl $1, -8(%rsp) |
3f3c8b8c SR |
1597 | je nested_nmi |
1598 | ||
1599 | /* | |
1600 | * Now test if the previous stack was an NMI stack. | |
1601 | * We need the double check. We check the NMI stack to satisfy the | |
1602 | * race when the first NMI clears the variable before returning. | |
1603 | * We check the variable because the first NMI could be in a | |
1604 | * breakpoint routine using a breakpoint stack. | |
1605 | */ | |
1606 | lea 6*8(%rsp), %rdx | |
1607 | test_in_nmi rdx, 4*8(%rsp), nested_nmi, first_nmi | |
62610913 | 1608 | CFI_REMEMBER_STATE |
3f3c8b8c SR |
1609 | |
1610 | nested_nmi: | |
1611 | /* | |
1612 | * Do nothing if we interrupted the fixup in repeat_nmi. | |
1613 | * It's about to repeat the NMI handler, so we are fine | |
1614 | * with ignoring this one. | |
1615 | */ | |
1616 | movq $repeat_nmi, %rdx | |
1617 | cmpq 8(%rsp), %rdx | |
1618 | ja 1f | |
1619 | movq $end_repeat_nmi, %rdx | |
1620 | cmpq 8(%rsp), %rdx | |
1621 | ja nested_nmi_out | |
1622 | ||
1623 | 1: | |
1624 | /* Set up the interrupted NMIs stack to jump to repeat_nmi */ | |
1625 | leaq -6*8(%rsp), %rdx | |
1626 | movq %rdx, %rsp | |
1627 | CFI_ADJUST_CFA_OFFSET 6*8 | |
1628 | pushq_cfi $__KERNEL_DS | |
1629 | pushq_cfi %rdx | |
1630 | pushfq_cfi | |
1631 | pushq_cfi $__KERNEL_CS | |
1632 | pushq_cfi $repeat_nmi | |
1633 | ||
1634 | /* Put stack back */ | |
1635 | addq $(11*8), %rsp | |
1636 | CFI_ADJUST_CFA_OFFSET -11*8 | |
1637 | ||
1638 | nested_nmi_out: | |
1639 | popq_cfi %rdx | |
62610913 | 1640 | CFI_RESTORE rdx |
3f3c8b8c SR |
1641 | |
1642 | /* No need to check faults here */ | |
1643 | INTERRUPT_RETURN | |
1644 | ||
62610913 | 1645 | CFI_RESTORE_STATE |
3f3c8b8c SR |
1646 | first_nmi: |
1647 | /* | |
1648 | * Because nested NMIs will use the pushed location that we | |
1649 | * stored in rdx, we must keep that space available. | |
1650 | * Here's what our stack frame will look like: | |
1651 | * +-------------------------+ | |
1652 | * | original SS | | |
1653 | * | original Return RSP | | |
1654 | * | original RFLAGS | | |
1655 | * | original CS | | |
1656 | * | original RIP | | |
1657 | * +-------------------------+ | |
1658 | * | temp storage for rdx | | |
1659 | * +-------------------------+ | |
1660 | * | NMI executing variable | | |
1661 | * +-------------------------+ | |
1662 | * | Saved SS | | |
1663 | * | Saved Return RSP | | |
1664 | * | Saved RFLAGS | | |
1665 | * | Saved CS | | |
1666 | * | Saved RIP | | |
1667 | * +-------------------------+ | |
1668 | * | copied SS | | |
1669 | * | copied Return RSP | | |
1670 | * | copied RFLAGS | | |
1671 | * | copied CS | | |
1672 | * | copied RIP | | |
1673 | * +-------------------------+ | |
1674 | * | pt_regs | | |
1675 | * +-------------------------+ | |
1676 | * | |
79fb4ad6 SR |
1677 | * The saved stack frame is used to fix up the copied stack frame |
1678 | * that a nested NMI may change to make the interrupted NMI iret jump | |
1679 | * to the repeat_nmi. The original stack frame and the temp storage | |
3f3c8b8c SR |
1680 | * is also used by nested NMIs and can not be trusted on exit. |
1681 | */ | |
79fb4ad6 | 1682 | /* Do not pop rdx, nested NMIs will corrupt that part of the stack */ |
62610913 JB |
1683 | movq (%rsp), %rdx |
1684 | CFI_RESTORE rdx | |
1685 | ||
3f3c8b8c SR |
1686 | /* Set the NMI executing variable on the stack. */ |
1687 | pushq_cfi $1 | |
1688 | ||
1689 | /* Copy the stack frame to the Saved frame */ | |
1690 | .rept 5 | |
1691 | pushq_cfi 6*8(%rsp) | |
1692 | .endr | |
62610913 JB |
1693 | CFI_DEF_CFA_OFFSET SS+8-RIP |
1694 | ||
79fb4ad6 SR |
1695 | /* Everything up to here is safe from nested NMIs */ |
1696 | ||
62610913 JB |
1697 | /* |
1698 | * If there was a nested NMI, the first NMI's iret will return | |
1699 | * here. But NMIs are still enabled and we can take another | |
1700 | * nested NMI. The nested NMI checks the interrupted RIP to see | |
1701 | * if it is between repeat_nmi and end_repeat_nmi, and if so | |
1702 | * it will just return, as we are about to repeat an NMI anyway. | |
1703 | * This makes it safe to copy to the stack frame that a nested | |
1704 | * NMI will update. | |
1705 | */ | |
1706 | repeat_nmi: | |
1707 | /* | |
1708 | * Update the stack variable to say we are still in NMI (the update | |
1709 | * is benign for the non-repeat case, where 1 was pushed just above | |
1710 | * to this very stack slot). | |
1711 | */ | |
1712 | movq $1, 5*8(%rsp) | |
3f3c8b8c SR |
1713 | |
1714 | /* Make another copy, this one may be modified by nested NMIs */ | |
1715 | .rept 5 | |
1716 | pushq_cfi 4*8(%rsp) | |
1717 | .endr | |
62610913 JB |
1718 | CFI_DEF_CFA_OFFSET SS+8-RIP |
1719 | end_repeat_nmi: | |
3f3c8b8c SR |
1720 | |
1721 | /* | |
1722 | * Everything below this point can be preempted by a nested | |
79fb4ad6 SR |
1723 | * NMI if the first NMI took an exception and reset our iret stack |
1724 | * so that we repeat another NMI. | |
3f3c8b8c | 1725 | */ |
1fd466ef | 1726 | pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */ |
b1cccb1b JB |
1727 | subq $ORIG_RAX-R15, %rsp |
1728 | CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15 | |
1fd466ef SR |
1729 | /* |
1730 | * Use save_paranoid to handle SWAPGS, but no need to use paranoid_exit | |
1731 | * as we should not be calling schedule in NMI context. | |
1732 | * Even with normal interrupts enabled. An NMI should not be | |
1733 | * setting NEED_RESCHED or anything that normal interrupts and | |
1734 | * exceptions might do. | |
1735 | */ | |
ddeb8f21 AH |
1736 | call save_paranoid |
1737 | DEFAULT_FRAME 0 | |
7fbb98c5 SR |
1738 | |
1739 | /* | |
1740 | * Save off the CR2 register. If we take a page fault in the NMI then | |
1741 | * it could corrupt the CR2 value. If the NMI preempts a page fault | |
1742 | * handler before it was able to read the CR2 register, and then the | |
1743 | * NMI itself takes a page fault, the page fault that was preempted | |
1744 | * will read the information from the NMI page fault and not the | |
1745 | * origin fault. Save it off and restore it if it changes. | |
1746 | * Use the r12 callee-saved register. | |
1747 | */ | |
1748 | movq %cr2, %r12 | |
1749 | ||
ddeb8f21 AH |
1750 | /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */ |
1751 | movq %rsp,%rdi | |
1752 | movq $-1,%rsi | |
1753 | call do_nmi | |
7fbb98c5 SR |
1754 | |
1755 | /* Did the NMI take a page fault? Restore cr2 if it did */ | |
1756 | movq %cr2, %rcx | |
1757 | cmpq %rcx, %r12 | |
1758 | je 1f | |
1759 | movq %r12, %cr2 | |
1760 | 1: | |
1761 | ||
ddeb8f21 AH |
1762 | testl %ebx,%ebx /* swapgs needed? */ |
1763 | jnz nmi_restore | |
ddeb8f21 AH |
1764 | nmi_swapgs: |
1765 | SWAPGS_UNSAFE_STACK | |
1766 | nmi_restore: | |
1767 | RESTORE_ALL 8 | |
3f3c8b8c SR |
1768 | /* Clear the NMI executing stack variable */ |
1769 | movq $0, 10*8(%rsp) | |
ddeb8f21 | 1770 | jmp irq_return |
9f1e87ea | 1771 | CFI_ENDPROC |
ddeb8f21 AH |
1772 | END(nmi) |
1773 | ||
1774 | ENTRY(ignore_sysret) | |
1775 | CFI_STARTPROC | |
1776 | mov $-ENOSYS,%eax | |
1777 | sysret | |
1778 | CFI_ENDPROC | |
1779 | END(ignore_sysret) | |
1780 | ||
1781 | /* | |
1782 | * End of kprobes section | |
1783 | */ | |
1784 | .popsection |