Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * linux/arch/x86_64/entry.S | |
3 | * | |
4 | * Copyright (C) 1991, 1992 Linus Torvalds | |
5 | * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs | |
6 | * Copyright (C) 2000 Pavel Machek <pavel@suse.cz> | |
1da177e4 LT |
7 | */ |
8 | ||
9 | /* | |
10 | * entry.S contains the system-call and fault low-level handling routines. | |
11 | * | |
8b4777a4 AL |
12 | * Some of this is documented in Documentation/x86/entry_64.txt |
13 | * | |
1da177e4 LT |
14 | * NOTE: This code handles signal-recognition, which happens every time |
15 | * after an interrupt and after each system call. | |
0bd7b798 AH |
16 | * |
17 | * Normal syscalls and interrupts don't save a full stack frame, this is | |
1da177e4 | 18 | * only done for syscall tracing, signals or fork/exec et.al. |
0bd7b798 AH |
19 | * |
20 | * A note on terminology: | |
21 | * - top of stack: Architecture defined interrupt frame from SS to RIP | |
22 | * at the top of the kernel process stack. | |
0d2eb44f | 23 | * - partial stack frame: partially saved registers up to R11. |
0bd7b798 | 24 | * - full stack frame: Like partial stack frame, but all register saved. |
2e91a17b AK |
25 | * |
26 | * Some macro usage: | |
27 | * - CFI macros are used to generate dwarf2 unwind information for better | |
28 | * backtraces. They don't change any code. | |
29 | * - SAVE_ALL/RESTORE_ALL - Save/restore all registers | |
30 | * - SAVE_ARGS/RESTORE_ARGS - Save/restore registers that C functions modify. | |
31 | * There are unfortunately lots of special cases where some registers | |
32 | * not touched. The macro is a big mess that should be cleaned up. | |
33 | * - SAVE_REST/RESTORE_REST - Handle the registers not saved by SAVE_ARGS. | |
34 | * Gives a full stack frame. | |
35 | * - ENTRY/END Define functions in the symbol table. | |
36 | * - FIXUP_TOP_OF_STACK/RESTORE_TOP_OF_STACK - Fix up the hardware stack | |
37 | * frame that is otherwise undefined after a SYSCALL | |
38 | * - TRACE_IRQ_* - Trace hard interrupt state for lock debugging. | |
cb5dd2c5 | 39 | * - idtentry - Define exception entry points. |
1da177e4 LT |
40 | */ |
41 | ||
1da177e4 LT |
42 | #include <linux/linkage.h> |
43 | #include <asm/segment.h> | |
1da177e4 LT |
44 | #include <asm/cache.h> |
45 | #include <asm/errno.h> | |
46 | #include <asm/dwarf2.h> | |
47 | #include <asm/calling.h> | |
e2d5df93 | 48 | #include <asm/asm-offsets.h> |
1da177e4 LT |
49 | #include <asm/msr.h> |
50 | #include <asm/unistd.h> | |
51 | #include <asm/thread_info.h> | |
52 | #include <asm/hw_irq.h> | |
0341c14d | 53 | #include <asm/page_types.h> |
2601e64d | 54 | #include <asm/irqflags.h> |
72fe4858 | 55 | #include <asm/paravirt.h> |
9939ddaf | 56 | #include <asm/percpu.h> |
d7abc0fa | 57 | #include <asm/asm.h> |
91d1aa43 | 58 | #include <asm/context_tracking.h> |
63bcff2a | 59 | #include <asm/smap.h> |
3891a04a | 60 | #include <asm/pgtable_types.h> |
d7e7528b | 61 | #include <linux/err.h> |
1da177e4 | 62 | |
86a1c34a RM |
63 | /* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this. */ |
64 | #include <linux/elf-em.h> | |
65 | #define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE) | |
66 | #define __AUDIT_ARCH_64BIT 0x80000000 | |
67 | #define __AUDIT_ARCH_LE 0x40000000 | |
68 | ||
1da177e4 | 69 | .code64 |
ea714547 JO |
70 | .section .entry.text, "ax" |
71 | ||
16444a8a | 72 | |
dc37db4d | 73 | #ifndef CONFIG_PREEMPT |
1da177e4 | 74 | #define retint_kernel retint_restore_args |
0bd7b798 | 75 | #endif |
2601e64d | 76 | |
72fe4858 | 77 | #ifdef CONFIG_PARAVIRT |
2be29982 | 78 | ENTRY(native_usergs_sysret64) |
72fe4858 GOC |
79 | swapgs |
80 | sysretq | |
b3baaa13 | 81 | ENDPROC(native_usergs_sysret64) |
72fe4858 GOC |
82 | #endif /* CONFIG_PARAVIRT */ |
83 | ||
2601e64d IM |
84 | |
85 | .macro TRACE_IRQS_IRETQ offset=ARGOFFSET | |
86 | #ifdef CONFIG_TRACE_IRQFLAGS | |
87 | bt $9,EFLAGS-\offset(%rsp) /* interrupts off? */ | |
88 | jnc 1f | |
89 | TRACE_IRQS_ON | |
90 | 1: | |
91 | #endif | |
92 | .endm | |
93 | ||
5963e317 SR |
94 | /* |
95 | * When dynamic function tracer is enabled it will add a breakpoint | |
96 | * to all locations that it is about to modify, sync CPUs, update | |
97 | * all the code, sync CPUs, then remove the breakpoints. In this time | |
98 | * if lockdep is enabled, it might jump back into the debug handler | |
99 | * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF). | |
100 | * | |
101 | * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to | |
102 | * make sure the stack pointer does not get reset back to the top | |
103 | * of the debug stack, and instead just reuses the current stack. | |
104 | */ | |
105 | #if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS) | |
106 | ||
107 | .macro TRACE_IRQS_OFF_DEBUG | |
108 | call debug_stack_set_zero | |
109 | TRACE_IRQS_OFF | |
110 | call debug_stack_reset | |
111 | .endm | |
112 | ||
113 | .macro TRACE_IRQS_ON_DEBUG | |
114 | call debug_stack_set_zero | |
115 | TRACE_IRQS_ON | |
116 | call debug_stack_reset | |
117 | .endm | |
118 | ||
119 | .macro TRACE_IRQS_IRETQ_DEBUG offset=ARGOFFSET | |
120 | bt $9,EFLAGS-\offset(%rsp) /* interrupts off? */ | |
121 | jnc 1f | |
122 | TRACE_IRQS_ON_DEBUG | |
123 | 1: | |
124 | .endm | |
125 | ||
126 | #else | |
127 | # define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF | |
128 | # define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON | |
129 | # define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ | |
130 | #endif | |
131 | ||
1da177e4 | 132 | /* |
0bd7b798 AH |
133 | * C code is not supposed to know about undefined top of stack. Every time |
134 | * a C function with an pt_regs argument is called from the SYSCALL based | |
1da177e4 LT |
135 | * fast path FIXUP_TOP_OF_STACK is needed. |
136 | * RESTORE_TOP_OF_STACK syncs the syscall state after any possible ptregs | |
137 | * manipulation. | |
0bd7b798 AH |
138 | */ |
139 | ||
140 | /* %rsp:at FRAMEEND */ | |
c002a1e6 | 141 | .macro FIXUP_TOP_OF_STACK tmp offset=0 |
3d1e42a7 | 142 | movq PER_CPU_VAR(old_rsp),\tmp |
c002a1e6 AH |
143 | movq \tmp,RSP+\offset(%rsp) |
144 | movq $__USER_DS,SS+\offset(%rsp) | |
145 | movq $__USER_CS,CS+\offset(%rsp) | |
146 | movq $-1,RCX+\offset(%rsp) | |
147 | movq R11+\offset(%rsp),\tmp /* get eflags */ | |
148 | movq \tmp,EFLAGS+\offset(%rsp) | |
1da177e4 LT |
149 | .endm |
150 | ||
c002a1e6 AH |
151 | .macro RESTORE_TOP_OF_STACK tmp offset=0 |
152 | movq RSP+\offset(%rsp),\tmp | |
3d1e42a7 | 153 | movq \tmp,PER_CPU_VAR(old_rsp) |
c002a1e6 AH |
154 | movq EFLAGS+\offset(%rsp),\tmp |
155 | movq \tmp,R11+\offset(%rsp) | |
1da177e4 LT |
156 | .endm |
157 | ||
158 | .macro FAKE_STACK_FRAME child_rip | |
159 | /* push in order ss, rsp, eflags, cs, rip */ | |
3829ee6b | 160 | xorl %eax, %eax |
df5d1874 | 161 | pushq_cfi $__KERNEL_DS /* ss */ |
7effaa88 | 162 | /*CFI_REL_OFFSET ss,0*/ |
df5d1874 | 163 | pushq_cfi %rax /* rsp */ |
7effaa88 | 164 | CFI_REL_OFFSET rsp,0 |
1adfa76a | 165 | pushq_cfi $(X86_EFLAGS_IF|X86_EFLAGS_FIXED) /* eflags - interrupts on */ |
7effaa88 | 166 | /*CFI_REL_OFFSET rflags,0*/ |
df5d1874 | 167 | pushq_cfi $__KERNEL_CS /* cs */ |
7effaa88 | 168 | /*CFI_REL_OFFSET cs,0*/ |
df5d1874 | 169 | pushq_cfi \child_rip /* rip */ |
7effaa88 | 170 | CFI_REL_OFFSET rip,0 |
df5d1874 | 171 | pushq_cfi %rax /* orig rax */ |
1da177e4 LT |
172 | .endm |
173 | ||
174 | .macro UNFAKE_STACK_FRAME | |
175 | addq $8*6, %rsp | |
176 | CFI_ADJUST_CFA_OFFSET -(6*8) | |
177 | .endm | |
178 | ||
dcd072e2 AH |
179 | /* |
180 | * initial frame state for interrupts (and exceptions without error code) | |
181 | */ | |
182 | .macro EMPTY_FRAME start=1 offset=0 | |
7effaa88 | 183 | .if \start |
dcd072e2 | 184 | CFI_STARTPROC simple |
adf14236 | 185 | CFI_SIGNAL_FRAME |
dcd072e2 | 186 | CFI_DEF_CFA rsp,8+\offset |
7effaa88 | 187 | .else |
dcd072e2 | 188 | CFI_DEF_CFA_OFFSET 8+\offset |
7effaa88 | 189 | .endif |
1da177e4 | 190 | .endm |
d99015b1 AH |
191 | |
192 | /* | |
dcd072e2 | 193 | * initial frame state for interrupts (and exceptions without error code) |
d99015b1 | 194 | */ |
dcd072e2 | 195 | .macro INTR_FRAME start=1 offset=0 |
e8a0e276 IM |
196 | EMPTY_FRAME \start, SS+8+\offset-RIP |
197 | /*CFI_REL_OFFSET ss, SS+\offset-RIP*/ | |
198 | CFI_REL_OFFSET rsp, RSP+\offset-RIP | |
199 | /*CFI_REL_OFFSET rflags, EFLAGS+\offset-RIP*/ | |
200 | /*CFI_REL_OFFSET cs, CS+\offset-RIP*/ | |
201 | CFI_REL_OFFSET rip, RIP+\offset-RIP | |
d99015b1 AH |
202 | .endm |
203 | ||
d99015b1 AH |
204 | /* |
205 | * initial frame state for exceptions with error code (and interrupts | |
206 | * with vector already pushed) | |
207 | */ | |
dcd072e2 | 208 | .macro XCPT_FRAME start=1 offset=0 |
e8a0e276 | 209 | INTR_FRAME \start, RIP+\offset-ORIG_RAX |
dcd072e2 AH |
210 | .endm |
211 | ||
212 | /* | |
213 | * frame that enables calling into C. | |
214 | */ | |
215 | .macro PARTIAL_FRAME start=1 offset=0 | |
e8a0e276 IM |
216 | XCPT_FRAME \start, ORIG_RAX+\offset-ARGOFFSET |
217 | CFI_REL_OFFSET rdi, RDI+\offset-ARGOFFSET | |
218 | CFI_REL_OFFSET rsi, RSI+\offset-ARGOFFSET | |
219 | CFI_REL_OFFSET rdx, RDX+\offset-ARGOFFSET | |
220 | CFI_REL_OFFSET rcx, RCX+\offset-ARGOFFSET | |
221 | CFI_REL_OFFSET rax, RAX+\offset-ARGOFFSET | |
222 | CFI_REL_OFFSET r8, R8+\offset-ARGOFFSET | |
223 | CFI_REL_OFFSET r9, R9+\offset-ARGOFFSET | |
224 | CFI_REL_OFFSET r10, R10+\offset-ARGOFFSET | |
225 | CFI_REL_OFFSET r11, R11+\offset-ARGOFFSET | |
dcd072e2 AH |
226 | .endm |
227 | ||
228 | /* | |
229 | * frame that enables passing a complete pt_regs to a C function. | |
230 | */ | |
231 | .macro DEFAULT_FRAME start=1 offset=0 | |
e8a0e276 | 232 | PARTIAL_FRAME \start, R11+\offset-R15 |
dcd072e2 AH |
233 | CFI_REL_OFFSET rbx, RBX+\offset |
234 | CFI_REL_OFFSET rbp, RBP+\offset | |
235 | CFI_REL_OFFSET r12, R12+\offset | |
236 | CFI_REL_OFFSET r13, R13+\offset | |
237 | CFI_REL_OFFSET r14, R14+\offset | |
238 | CFI_REL_OFFSET r15, R15+\offset | |
239 | .endm | |
d99015b1 AH |
240 | |
241 | /* save partial stack frame */ | |
1871853f | 242 | .macro SAVE_ARGS_IRQ |
d99015b1 | 243 | cld |
1871853f | 244 | /* start from rbp in pt_regs and jump over */ |
1b2b23d8 TG |
245 | movq_cfi rdi, (RDI-RBP) |
246 | movq_cfi rsi, (RSI-RBP) | |
247 | movq_cfi rdx, (RDX-RBP) | |
248 | movq_cfi rcx, (RCX-RBP) | |
249 | movq_cfi rax, (RAX-RBP) | |
250 | movq_cfi r8, (R8-RBP) | |
251 | movq_cfi r9, (R9-RBP) | |
252 | movq_cfi r10, (R10-RBP) | |
253 | movq_cfi r11, (R11-RBP) | |
1871853f | 254 | |
a2bbe750 FW |
255 | /* Save rbp so that we can unwind from get_irq_regs() */ |
256 | movq_cfi rbp, 0 | |
257 | ||
258 | /* Save previous stack value */ | |
259 | movq %rsp, %rsi | |
3b99a3ef FW |
260 | |
261 | leaq -RBP(%rsp),%rdi /* arg1 for handler */ | |
69466466 | 262 | testl $3, CS-RBP(%rsi) |
d99015b1 AH |
263 | je 1f |
264 | SWAPGS | |
265 | /* | |
56895530 | 266 | * irq_count is used to check if a CPU is already on an interrupt stack |
d99015b1 AH |
267 | * or not. While this is essentially redundant with preempt_count it is |
268 | * a little cheaper to use a separate counter in the PDA (short of | |
269 | * moving irq_enter into assembly, which would be too much work) | |
270 | */ | |
56895530 | 271 | 1: incl PER_CPU_VAR(irq_count) |
69466466 | 272 | cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp |
eab9e613 | 273 | CFI_DEF_CFA_REGISTER rsi |
a2bbe750 | 274 | |
69466466 | 275 | /* Store previous stack value */ |
a2bbe750 | 276 | pushq %rsi |
eab9e613 JB |
277 | CFI_ESCAPE 0x0f /* DW_CFA_def_cfa_expression */, 6, \ |
278 | 0x77 /* DW_OP_breg7 */, 0, \ | |
279 | 0x06 /* DW_OP_deref */, \ | |
280 | 0x08 /* DW_OP_const1u */, SS+8-RBP, \ | |
281 | 0x22 /* DW_OP_plus */ | |
a2bbe750 FW |
282 | /* We entered an interrupt context - irqs are off: */ |
283 | TRACE_IRQS_OFF | |
1871853f | 284 | .endm |
d99015b1 | 285 | |
e2f6bc25 AH |
286 | ENTRY(save_paranoid) |
287 | XCPT_FRAME 1 RDI+8 | |
288 | cld | |
3bab13b0 JB |
289 | movq %rdi, RDI+8(%rsp) |
290 | movq %rsi, RSI+8(%rsp) | |
e2f6bc25 AH |
291 | movq_cfi rdx, RDX+8 |
292 | movq_cfi rcx, RCX+8 | |
293 | movq_cfi rax, RAX+8 | |
3bab13b0 JB |
294 | movq %r8, R8+8(%rsp) |
295 | movq %r9, R9+8(%rsp) | |
296 | movq %r10, R10+8(%rsp) | |
297 | movq %r11, R11+8(%rsp) | |
e2f6bc25 | 298 | movq_cfi rbx, RBX+8 |
3bab13b0 JB |
299 | movq %rbp, RBP+8(%rsp) |
300 | movq %r12, R12+8(%rsp) | |
301 | movq %r13, R13+8(%rsp) | |
302 | movq %r14, R14+8(%rsp) | |
303 | movq %r15, R15+8(%rsp) | |
e2f6bc25 AH |
304 | movl $1,%ebx |
305 | movl $MSR_GS_BASE,%ecx | |
306 | rdmsr | |
307 | testl %edx,%edx | |
308 | js 1f /* negative -> in kernel */ | |
309 | SWAPGS | |
310 | xorl %ebx,%ebx | |
311 | 1: ret | |
312 | CFI_ENDPROC | |
313 | END(save_paranoid) | |
314 | ||
1da177e4 | 315 | /* |
5b3eec0c IM |
316 | * A newly forked process directly context switches into this address. |
317 | * | |
318 | * rdi: prev task we switched from | |
0bd7b798 | 319 | */ |
1da177e4 | 320 | ENTRY(ret_from_fork) |
dcd072e2 | 321 | DEFAULT_FRAME |
5b3eec0c | 322 | |
7106a5ab BL |
323 | LOCK ; btr $TIF_FORK,TI_flags(%r8) |
324 | ||
6eebdda3 | 325 | pushq_cfi $0x0002 |
df5d1874 | 326 | popfq_cfi # reset kernel eflags |
5b3eec0c IM |
327 | |
328 | call schedule_tail # rdi: 'prev' task parameter | |
329 | ||
1da177e4 | 330 | GET_THREAD_INFO(%rcx) |
5b3eec0c | 331 | |
1da177e4 | 332 | RESTORE_REST |
5b3eec0c IM |
333 | |
334 | testl $3, CS-ARGOFFSET(%rsp) # from kernel_thread? | |
7076aada | 335 | jz 1f |
5b3eec0c IM |
336 | |
337 | testl $_TIF_IA32, TI_flags(%rcx) # 32-bit compat task needs IRET | |
1da177e4 | 338 | jnz int_ret_from_sys_call |
5b3eec0c | 339 | |
c002a1e6 | 340 | RESTORE_TOP_OF_STACK %rdi, -ARGOFFSET |
5b3eec0c IM |
341 | jmp ret_from_sys_call # go to the SYSRET fastpath |
342 | ||
7076aada | 343 | 1: |
22e2430d | 344 | subq $REST_SKIP, %rsp # leave space for volatiles |
7076aada AV |
345 | CFI_ADJUST_CFA_OFFSET REST_SKIP |
346 | movq %rbp, %rdi | |
347 | call *%rbx | |
22e2430d AV |
348 | movl $0, RAX(%rsp) |
349 | RESTORE_REST | |
350 | jmp int_ret_from_sys_call | |
1da177e4 | 351 | CFI_ENDPROC |
4b787e0b | 352 | END(ret_from_fork) |
1da177e4 LT |
353 | |
354 | /* | |
0d2eb44f | 355 | * System call entry. Up to 6 arguments in registers are supported. |
1da177e4 LT |
356 | * |
357 | * SYSCALL does not save anything on the stack and does not change the | |
63bcff2a PA |
358 | * stack pointer. However, it does mask the flags register for us, so |
359 | * CLD and CLAC are not needed. | |
1da177e4 | 360 | */ |
0bd7b798 | 361 | |
1da177e4 | 362 | /* |
0bd7b798 | 363 | * Register setup: |
1da177e4 LT |
364 | * rax system call number |
365 | * rdi arg0 | |
0bd7b798 | 366 | * rcx return address for syscall/sysret, C arg3 |
1da177e4 | 367 | * rsi arg1 |
0bd7b798 | 368 | * rdx arg2 |
1da177e4 LT |
369 | * r10 arg3 (--> moved to rcx for C) |
370 | * r8 arg4 | |
371 | * r9 arg5 | |
372 | * r11 eflags for syscall/sysret, temporary for C | |
0bd7b798 AH |
373 | * r12-r15,rbp,rbx saved by C code, not touched. |
374 | * | |
1da177e4 LT |
375 | * Interrupts are off on entry. |
376 | * Only called from user space. | |
377 | * | |
378 | * XXX if we had a free scratch register we could save the RSP into the stack frame | |
379 | * and report it properly in ps. Unfortunately we haven't. | |
7bf36bbc AK |
380 | * |
381 | * When user can change the frames always force IRET. That is because | |
382 | * it deals with uncanonical addresses better. SYSRET has trouble | |
383 | * with them due to bugs in both AMD and Intel CPUs. | |
0bd7b798 | 384 | */ |
1da177e4 LT |
385 | |
386 | ENTRY(system_call) | |
7effaa88 | 387 | CFI_STARTPROC simple |
adf14236 | 388 | CFI_SIGNAL_FRAME |
9af45651 | 389 | CFI_DEF_CFA rsp,KERNEL_STACK_OFFSET |
7effaa88 JB |
390 | CFI_REGISTER rip,rcx |
391 | /*CFI_REGISTER rflags,r11*/ | |
72fe4858 GOC |
392 | SWAPGS_UNSAFE_STACK |
393 | /* | |
394 | * A hypervisor implementation might want to use a label | |
395 | * after the swapgs, so that it can do the swapgs | |
396 | * for the guest and jump here on syscall. | |
397 | */ | |
f6b2bc84 | 398 | GLOBAL(system_call_after_swapgs) |
72fe4858 | 399 | |
3d1e42a7 | 400 | movq %rsp,PER_CPU_VAR(old_rsp) |
9af45651 | 401 | movq PER_CPU_VAR(kernel_stack),%rsp |
2601e64d IM |
402 | /* |
403 | * No need to follow this irqs off/on section - it's straight | |
404 | * and short: | |
405 | */ | |
72fe4858 | 406 | ENABLE_INTERRUPTS(CLBR_NONE) |
54eea995 AL |
407 | SAVE_ARGS 8, 0, rax_enosys=1 |
408 | movq_cfi rax,(ORIG_RAX-ARGOFFSET) | |
7effaa88 JB |
409 | movq %rcx,RIP-ARGOFFSET(%rsp) |
410 | CFI_REL_OFFSET rip,RIP-ARGOFFSET | |
46db09d3 | 411 | testl $_TIF_WORK_SYSCALL_ENTRY,TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET) |
1da177e4 | 412 | jnz tracesys |
86a1c34a | 413 | system_call_fastpath: |
fca460f9 | 414 | #if __SYSCALL_MASK == ~0 |
1da177e4 | 415 | cmpq $__NR_syscall_max,%rax |
fca460f9 PA |
416 | #else |
417 | andl $__SYSCALL_MASK,%eax | |
418 | cmpl $__NR_syscall_max,%eax | |
419 | #endif | |
54eea995 | 420 | ja ret_from_sys_call /* and return regs->ax */ |
1da177e4 LT |
421 | movq %r10,%rcx |
422 | call *sys_call_table(,%rax,8) # XXX: rip relative | |
423 | movq %rax,RAX-ARGOFFSET(%rsp) | |
424 | /* | |
425 | * Syscall return path ending with SYSRET (fast path) | |
0bd7b798 AH |
426 | * Has incomplete stack frame and undefined top of stack. |
427 | */ | |
1da177e4 | 428 | ret_from_sys_call: |
11b854b2 | 429 | movl $_TIF_ALLWORK_MASK,%edi |
1da177e4 | 430 | /* edi: flagmask */ |
0bd7b798 | 431 | sysret_check: |
10cd706d | 432 | LOCKDEP_SYS_EXIT |
72fe4858 | 433 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 434 | TRACE_IRQS_OFF |
46db09d3 | 435 | movl TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET),%edx |
1da177e4 | 436 | andl %edi,%edx |
0bd7b798 | 437 | jnz sysret_careful |
bcddc015 | 438 | CFI_REMEMBER_STATE |
2601e64d IM |
439 | /* |
440 | * sysretq will re-enable interrupts: | |
441 | */ | |
442 | TRACE_IRQS_ON | |
1da177e4 | 443 | movq RIP-ARGOFFSET(%rsp),%rcx |
7effaa88 | 444 | CFI_REGISTER rip,rcx |
838feb47 | 445 | RESTORE_ARGS 1,-ARG_SKIP,0 |
7effaa88 | 446 | /*CFI_REGISTER rflags,r11*/ |
3d1e42a7 | 447 | movq PER_CPU_VAR(old_rsp), %rsp |
2be29982 | 448 | USERGS_SYSRET64 |
1da177e4 | 449 | |
bcddc015 | 450 | CFI_RESTORE_STATE |
1da177e4 | 451 | /* Handle reschedules */ |
0bd7b798 | 452 | /* edx: work, edi: workmask */ |
1da177e4 LT |
453 | sysret_careful: |
454 | bt $TIF_NEED_RESCHED,%edx | |
455 | jnc sysret_signal | |
2601e64d | 456 | TRACE_IRQS_ON |
72fe4858 | 457 | ENABLE_INTERRUPTS(CLBR_NONE) |
df5d1874 | 458 | pushq_cfi %rdi |
0430499c | 459 | SCHEDULE_USER |
df5d1874 | 460 | popq_cfi %rdi |
1da177e4 LT |
461 | jmp sysret_check |
462 | ||
0bd7b798 | 463 | /* Handle a signal */ |
1da177e4 | 464 | sysret_signal: |
2601e64d | 465 | TRACE_IRQS_ON |
72fe4858 | 466 | ENABLE_INTERRUPTS(CLBR_NONE) |
86a1c34a RM |
467 | #ifdef CONFIG_AUDITSYSCALL |
468 | bt $TIF_SYSCALL_AUDIT,%edx | |
469 | jc sysret_audit | |
470 | #endif | |
b60e714d RM |
471 | /* |
472 | * We have a signal, or exit tracing or single-step. | |
473 | * These all wind up with the iret return path anyway, | |
474 | * so just join that path right now. | |
475 | */ | |
476 | FIXUP_TOP_OF_STACK %r11, -ARGOFFSET | |
477 | jmp int_check_syscall_exit_work | |
0bd7b798 | 478 | |
86a1c34a | 479 | #ifdef CONFIG_AUDITSYSCALL |
86a1c34a | 480 | /* |
d7e7528b | 481 | * Return fast path for syscall audit. Call __audit_syscall_exit() |
86a1c34a RM |
482 | * directly and then jump back to the fast path with TIF_SYSCALL_AUDIT |
483 | * masked off. | |
484 | */ | |
485 | sysret_audit: | |
03275591 | 486 | movq RAX-ARGOFFSET(%rsp),%rsi /* second arg, syscall return value */ |
d7e7528b EP |
487 | cmpq $-MAX_ERRNO,%rsi /* is it < -MAX_ERRNO? */ |
488 | setbe %al /* 1 if so, 0 if not */ | |
86a1c34a | 489 | movzbl %al,%edi /* zero-extend that into %edi */ |
d7e7528b | 490 | call __audit_syscall_exit |
86a1c34a RM |
491 | movl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT),%edi |
492 | jmp sysret_check | |
493 | #endif /* CONFIG_AUDITSYSCALL */ | |
494 | ||
1da177e4 | 495 | /* Do syscall tracing */ |
0bd7b798 | 496 | tracesys: |
1dcf74f6 AL |
497 | leaq -REST_SKIP(%rsp), %rdi |
498 | movq $AUDIT_ARCH_X86_64, %rsi | |
499 | call syscall_trace_enter_phase1 | |
500 | test %rax, %rax | |
501 | jnz tracesys_phase2 /* if needed, run the slow path */ | |
502 | LOAD_ARGS 0 /* else restore clobbered regs */ | |
503 | jmp system_call_fastpath /* and return to the fast path */ | |
504 | ||
505 | tracesys_phase2: | |
1da177e4 | 506 | SAVE_REST |
1da177e4 | 507 | FIXUP_TOP_OF_STACK %rdi |
1dcf74f6 AL |
508 | movq %rsp, %rdi |
509 | movq $AUDIT_ARCH_X86_64, %rsi | |
510 | movq %rax,%rdx | |
511 | call syscall_trace_enter_phase2 | |
512 | ||
d4d67150 RM |
513 | /* |
514 | * Reload arg registers from stack in case ptrace changed them. | |
1dcf74f6 | 515 | * We don't reload %rax because syscall_trace_entry_phase2() returned |
d4d67150 RM |
516 | * the value it wants us to use in the table lookup. |
517 | */ | |
518 | LOAD_ARGS ARGOFFSET, 1 | |
1da177e4 | 519 | RESTORE_REST |
fca460f9 | 520 | #if __SYSCALL_MASK == ~0 |
1da177e4 | 521 | cmpq $__NR_syscall_max,%rax |
fca460f9 PA |
522 | #else |
523 | andl $__SYSCALL_MASK,%eax | |
524 | cmpl $__NR_syscall_max,%eax | |
525 | #endif | |
54eea995 | 526 | ja int_ret_from_sys_call /* RAX(%rsp) is already set */ |
1da177e4 LT |
527 | movq %r10,%rcx /* fixup for C */ |
528 | call *sys_call_table(,%rax,8) | |
a31f8dd7 | 529 | movq %rax,RAX-ARGOFFSET(%rsp) |
7bf36bbc | 530 | /* Use IRET because user could have changed frame */ |
0bd7b798 AH |
531 | |
532 | /* | |
1da177e4 LT |
533 | * Syscall return path ending with IRET. |
534 | * Has correct top of stack, but partial stack frame. | |
bcddc015 | 535 | */ |
bc8b2b92 | 536 | GLOBAL(int_ret_from_sys_call) |
72fe4858 | 537 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 538 | TRACE_IRQS_OFF |
1da177e4 LT |
539 | movl $_TIF_ALLWORK_MASK,%edi |
540 | /* edi: mask to check */ | |
bc8b2b92 | 541 | GLOBAL(int_with_check) |
10cd706d | 542 | LOCKDEP_SYS_EXIT_IRQ |
1da177e4 | 543 | GET_THREAD_INFO(%rcx) |
26ccb8a7 | 544 | movl TI_flags(%rcx),%edx |
1da177e4 LT |
545 | andl %edi,%edx |
546 | jnz int_careful | |
26ccb8a7 | 547 | andl $~TS_COMPAT,TI_status(%rcx) |
1da177e4 LT |
548 | jmp retint_swapgs |
549 | ||
550 | /* Either reschedule or signal or syscall exit tracking needed. */ | |
551 | /* First do a reschedule test. */ | |
552 | /* edx: work, edi: workmask */ | |
553 | int_careful: | |
554 | bt $TIF_NEED_RESCHED,%edx | |
555 | jnc int_very_careful | |
2601e64d | 556 | TRACE_IRQS_ON |
72fe4858 | 557 | ENABLE_INTERRUPTS(CLBR_NONE) |
df5d1874 | 558 | pushq_cfi %rdi |
0430499c | 559 | SCHEDULE_USER |
df5d1874 | 560 | popq_cfi %rdi |
72fe4858 | 561 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 562 | TRACE_IRQS_OFF |
1da177e4 LT |
563 | jmp int_with_check |
564 | ||
565 | /* handle signals and tracing -- both require a full stack frame */ | |
566 | int_very_careful: | |
2601e64d | 567 | TRACE_IRQS_ON |
72fe4858 | 568 | ENABLE_INTERRUPTS(CLBR_NONE) |
b60e714d | 569 | int_check_syscall_exit_work: |
1da177e4 | 570 | SAVE_REST |
0bd7b798 | 571 | /* Check for syscall exit trace */ |
d4d67150 | 572 | testl $_TIF_WORK_SYSCALL_EXIT,%edx |
1da177e4 | 573 | jz int_signal |
df5d1874 | 574 | pushq_cfi %rdi |
0bd7b798 | 575 | leaq 8(%rsp),%rdi # &ptregs -> arg1 |
1da177e4 | 576 | call syscall_trace_leave |
df5d1874 | 577 | popq_cfi %rdi |
d4d67150 | 578 | andl $~(_TIF_WORK_SYSCALL_EXIT|_TIF_SYSCALL_EMU),%edi |
1da177e4 | 579 | jmp int_restore_rest |
0bd7b798 | 580 | |
1da177e4 | 581 | int_signal: |
8f4d37ec | 582 | testl $_TIF_DO_NOTIFY_MASK,%edx |
1da177e4 LT |
583 | jz 1f |
584 | movq %rsp,%rdi # &ptregs -> arg1 | |
585 | xorl %esi,%esi # oldset -> arg2 | |
586 | call do_notify_resume | |
eca91e78 | 587 | 1: movl $_TIF_WORK_MASK,%edi |
1da177e4 LT |
588 | int_restore_rest: |
589 | RESTORE_REST | |
72fe4858 | 590 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 591 | TRACE_IRQS_OFF |
1da177e4 LT |
592 | jmp int_with_check |
593 | CFI_ENDPROC | |
bcddc015 | 594 | END(system_call) |
0bd7b798 | 595 | |
1d4b4b29 AV |
596 | .macro FORK_LIKE func |
597 | ENTRY(stub_\func) | |
598 | CFI_STARTPROC | |
599 | popq %r11 /* save return address */ | |
600 | PARTIAL_FRAME 0 | |
601 | SAVE_REST | |
602 | pushq %r11 /* put it back on stack */ | |
603 | FIXUP_TOP_OF_STACK %r11, 8 | |
604 | DEFAULT_FRAME 0 8 /* offset 8: return address */ | |
605 | call sys_\func | |
606 | RESTORE_TOP_OF_STACK %r11, 8 | |
607 | ret $REST_SKIP /* pop extended registers */ | |
608 | CFI_ENDPROC | |
609 | END(stub_\func) | |
610 | .endm | |
611 | ||
b3af11af AV |
612 | .macro FIXED_FRAME label,func |
613 | ENTRY(\label) | |
614 | CFI_STARTPROC | |
615 | PARTIAL_FRAME 0 8 /* offset 8: return address */ | |
616 | FIXUP_TOP_OF_STACK %r11, 8-ARGOFFSET | |
617 | call \func | |
618 | RESTORE_TOP_OF_STACK %r11, 8-ARGOFFSET | |
619 | ret | |
620 | CFI_ENDPROC | |
621 | END(\label) | |
622 | .endm | |
623 | ||
1d4b4b29 AV |
624 | FORK_LIKE clone |
625 | FORK_LIKE fork | |
626 | FORK_LIKE vfork | |
b3af11af | 627 | FIXED_FRAME stub_iopl, sys_iopl |
1da177e4 LT |
628 | |
629 | ENTRY(ptregscall_common) | |
c002a1e6 AH |
630 | DEFAULT_FRAME 1 8 /* offset 8: return address */ |
631 | RESTORE_TOP_OF_STACK %r11, 8 | |
632 | movq_cfi_restore R15+8, r15 | |
633 | movq_cfi_restore R14+8, r14 | |
634 | movq_cfi_restore R13+8, r13 | |
635 | movq_cfi_restore R12+8, r12 | |
636 | movq_cfi_restore RBP+8, rbp | |
637 | movq_cfi_restore RBX+8, rbx | |
638 | ret $REST_SKIP /* pop extended registers */ | |
1da177e4 | 639 | CFI_ENDPROC |
4b787e0b | 640 | END(ptregscall_common) |
0bd7b798 | 641 | |
1da177e4 LT |
642 | ENTRY(stub_execve) |
643 | CFI_STARTPROC | |
e6b04b6b JB |
644 | addq $8, %rsp |
645 | PARTIAL_FRAME 0 | |
1da177e4 | 646 | SAVE_REST |
1da177e4 LT |
647 | FIXUP_TOP_OF_STACK %r11 |
648 | call sys_execve | |
1da177e4 LT |
649 | movq %rax,RAX(%rsp) |
650 | RESTORE_REST | |
651 | jmp int_ret_from_sys_call | |
652 | CFI_ENDPROC | |
4b787e0b | 653 | END(stub_execve) |
0bd7b798 | 654 | |
27d6ec7a DD |
655 | ENTRY(stub_execveat) |
656 | CFI_STARTPROC | |
657 | addq $8, %rsp | |
658 | PARTIAL_FRAME 0 | |
659 | SAVE_REST | |
660 | FIXUP_TOP_OF_STACK %r11 | |
661 | call sys_execveat | |
662 | RESTORE_TOP_OF_STACK %r11 | |
663 | movq %rax,RAX(%rsp) | |
664 | RESTORE_REST | |
665 | jmp int_ret_from_sys_call | |
666 | CFI_ENDPROC | |
667 | END(stub_execveat) | |
668 | ||
1da177e4 LT |
669 | /* |
670 | * sigreturn is special because it needs to restore all registers on return. | |
671 | * This cannot be done with SYSRET, so use the IRET return path instead. | |
0bd7b798 | 672 | */ |
1da177e4 LT |
673 | ENTRY(stub_rt_sigreturn) |
674 | CFI_STARTPROC | |
7effaa88 | 675 | addq $8, %rsp |
e6b04b6b | 676 | PARTIAL_FRAME 0 |
1da177e4 | 677 | SAVE_REST |
1da177e4 LT |
678 | FIXUP_TOP_OF_STACK %r11 |
679 | call sys_rt_sigreturn | |
680 | movq %rax,RAX(%rsp) # fixme, this could be done at the higher layer | |
681 | RESTORE_REST | |
682 | jmp int_ret_from_sys_call | |
683 | CFI_ENDPROC | |
4b787e0b | 684 | END(stub_rt_sigreturn) |
1da177e4 | 685 | |
c5a37394 | 686 | #ifdef CONFIG_X86_X32_ABI |
c5a37394 PA |
687 | ENTRY(stub_x32_rt_sigreturn) |
688 | CFI_STARTPROC | |
689 | addq $8, %rsp | |
690 | PARTIAL_FRAME 0 | |
691 | SAVE_REST | |
c5a37394 PA |
692 | FIXUP_TOP_OF_STACK %r11 |
693 | call sys32_x32_rt_sigreturn | |
694 | movq %rax,RAX(%rsp) # fixme, this could be done at the higher layer | |
695 | RESTORE_REST | |
696 | jmp int_ret_from_sys_call | |
697 | CFI_ENDPROC | |
698 | END(stub_x32_rt_sigreturn) | |
699 | ||
d1a797f3 PA |
700 | ENTRY(stub_x32_execve) |
701 | CFI_STARTPROC | |
702 | addq $8, %rsp | |
703 | PARTIAL_FRAME 0 | |
704 | SAVE_REST | |
705 | FIXUP_TOP_OF_STACK %r11 | |
6783eaa2 | 706 | call compat_sys_execve |
d1a797f3 PA |
707 | RESTORE_TOP_OF_STACK %r11 |
708 | movq %rax,RAX(%rsp) | |
709 | RESTORE_REST | |
710 | jmp int_ret_from_sys_call | |
711 | CFI_ENDPROC | |
712 | END(stub_x32_execve) | |
713 | ||
27d6ec7a DD |
714 | ENTRY(stub_x32_execveat) |
715 | CFI_STARTPROC | |
716 | addq $8, %rsp | |
717 | PARTIAL_FRAME 0 | |
718 | SAVE_REST | |
719 | FIXUP_TOP_OF_STACK %r11 | |
720 | call compat_sys_execveat | |
721 | RESTORE_TOP_OF_STACK %r11 | |
722 | movq %rax,RAX(%rsp) | |
723 | RESTORE_REST | |
724 | jmp int_ret_from_sys_call | |
725 | CFI_ENDPROC | |
726 | END(stub_x32_execveat) | |
727 | ||
c5a37394 PA |
728 | #endif |
729 | ||
939b7871 PA |
730 | /* |
731 | * Build the entry stubs and pointer table with some assembler magic. | |
732 | * We pack 7 stubs into a single 32-byte chunk, which will fit in a | |
733 | * single cache line on all modern x86 implementations. | |
734 | */ | |
735 | .section .init.rodata,"a" | |
736 | ENTRY(interrupt) | |
ea714547 | 737 | .section .entry.text |
939b7871 PA |
738 | .p2align 5 |
739 | .p2align CONFIG_X86_L1_CACHE_SHIFT | |
740 | ENTRY(irq_entries_start) | |
741 | INTR_FRAME | |
742 | vector=FIRST_EXTERNAL_VECTOR | |
2414e021 | 743 | .rept (FIRST_SYSTEM_VECTOR-FIRST_EXTERNAL_VECTOR+6)/7 |
939b7871 PA |
744 | .balign 32 |
745 | .rept 7 | |
2414e021 | 746 | .if vector < FIRST_SYSTEM_VECTOR |
8665596e | 747 | .if vector <> FIRST_EXTERNAL_VECTOR |
939b7871 PA |
748 | CFI_ADJUST_CFA_OFFSET -8 |
749 | .endif | |
df5d1874 | 750 | 1: pushq_cfi $(~vector+0x80) /* Note: always in signed byte range */ |
8665596e | 751 | .if ((vector-FIRST_EXTERNAL_VECTOR)%7) <> 6 |
939b7871 PA |
752 | jmp 2f |
753 | .endif | |
754 | .previous | |
755 | .quad 1b | |
ea714547 | 756 | .section .entry.text |
939b7871 PA |
757 | vector=vector+1 |
758 | .endif | |
759 | .endr | |
760 | 2: jmp common_interrupt | |
761 | .endr | |
762 | CFI_ENDPROC | |
763 | END(irq_entries_start) | |
764 | ||
765 | .previous | |
766 | END(interrupt) | |
767 | .previous | |
768 | ||
d99015b1 | 769 | /* |
1da177e4 LT |
770 | * Interrupt entry/exit. |
771 | * | |
772 | * Interrupt entry points save only callee clobbered registers in fast path. | |
d99015b1 AH |
773 | * |
774 | * Entry runs with interrupts off. | |
775 | */ | |
1da177e4 | 776 | |
722024db | 777 | /* 0(%rsp): ~(interrupt number) */ |
1da177e4 | 778 | .macro interrupt func |
625dbc3b FW |
779 | /* reserve pt_regs for scratch regs and rbp */ |
780 | subq $ORIG_RAX-RBP, %rsp | |
781 | CFI_ADJUST_CFA_OFFSET ORIG_RAX-RBP | |
1871853f | 782 | SAVE_ARGS_IRQ |
1da177e4 LT |
783 | call \func |
784 | .endm | |
785 | ||
722024db AH |
786 | /* |
787 | * The interrupt stubs push (~vector+0x80) onto the stack and | |
788 | * then jump to common_interrupt. | |
789 | */ | |
939b7871 PA |
790 | .p2align CONFIG_X86_L1_CACHE_SHIFT |
791 | common_interrupt: | |
7effaa88 | 792 | XCPT_FRAME |
ee4eb87b | 793 | ASM_CLAC |
722024db | 794 | addq $-0x80,(%rsp) /* Adjust vector to [-256,-1] range */ |
1da177e4 | 795 | interrupt do_IRQ |
3d1e42a7 | 796 | /* 0(%rsp): old_rsp-ARGOFFSET */ |
7effaa88 | 797 | ret_from_intr: |
72fe4858 | 798 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 799 | TRACE_IRQS_OFF |
56895530 | 800 | decl PER_CPU_VAR(irq_count) |
625dbc3b | 801 | |
a2bbe750 FW |
802 | /* Restore saved previous stack */ |
803 | popq %rsi | |
928282e4 | 804 | CFI_DEF_CFA rsi,SS+8-RBP /* reg/off reset after def_cfa_expr */ |
eab9e613 | 805 | leaq ARGOFFSET-RBP(%rsi), %rsp |
7effaa88 | 806 | CFI_DEF_CFA_REGISTER rsp |
eab9e613 | 807 | CFI_ADJUST_CFA_OFFSET RBP-ARGOFFSET |
625dbc3b | 808 | |
7effaa88 | 809 | exit_intr: |
1da177e4 LT |
810 | GET_THREAD_INFO(%rcx) |
811 | testl $3,CS-ARGOFFSET(%rsp) | |
812 | je retint_kernel | |
0bd7b798 | 813 | |
1da177e4 LT |
814 | /* Interrupt came from user space */ |
815 | /* | |
816 | * Has a correct top of stack, but a partial stack frame | |
817 | * %rcx: thread info. Interrupts off. | |
0bd7b798 | 818 | */ |
1da177e4 LT |
819 | retint_with_reschedule: |
820 | movl $_TIF_WORK_MASK,%edi | |
7effaa88 | 821 | retint_check: |
10cd706d | 822 | LOCKDEP_SYS_EXIT_IRQ |
26ccb8a7 | 823 | movl TI_flags(%rcx),%edx |
1da177e4 | 824 | andl %edi,%edx |
7effaa88 | 825 | CFI_REMEMBER_STATE |
1da177e4 | 826 | jnz retint_careful |
10cd706d PZ |
827 | |
828 | retint_swapgs: /* return to user-space */ | |
2601e64d IM |
829 | /* |
830 | * The iretq could re-enable interrupts: | |
831 | */ | |
72fe4858 | 832 | DISABLE_INTERRUPTS(CLBR_ANY) |
2601e64d | 833 | TRACE_IRQS_IRETQ |
72fe4858 | 834 | SWAPGS |
2601e64d IM |
835 | jmp restore_args |
836 | ||
10cd706d | 837 | retint_restore_args: /* return to kernel space */ |
72fe4858 | 838 | DISABLE_INTERRUPTS(CLBR_ANY) |
2601e64d IM |
839 | /* |
840 | * The iretq could re-enable interrupts: | |
841 | */ | |
842 | TRACE_IRQS_IRETQ | |
843 | restore_args: | |
838feb47 | 844 | RESTORE_ARGS 1,8,1 |
3701d863 | 845 | |
f7f3d791 | 846 | irq_return: |
7209a75d AL |
847 | INTERRUPT_RETURN |
848 | ||
849 | ENTRY(native_iret) | |
3891a04a PA |
850 | /* |
851 | * Are we returning to a stack segment from the LDT? Note: in | |
852 | * 64-bit mode SS:RSP on the exception stack is always valid. | |
853 | */ | |
34273f41 | 854 | #ifdef CONFIG_X86_ESPFIX64 |
3891a04a | 855 | testb $4,(SS-RIP)(%rsp) |
7209a75d | 856 | jnz native_irq_return_ldt |
34273f41 | 857 | #endif |
3891a04a | 858 | |
af726f21 | 859 | .global native_irq_return_iret |
7209a75d | 860 | native_irq_return_iret: |
b645af2d AL |
861 | /* |
862 | * This may fault. Non-paranoid faults on return to userspace are | |
863 | * handled by fixup_bad_iret. These include #SS, #GP, and #NP. | |
864 | * Double-faults due to espfix64 are handled in do_double_fault. | |
865 | * Other faults here are fatal. | |
866 | */ | |
1da177e4 | 867 | iretq |
3701d863 | 868 | |
34273f41 | 869 | #ifdef CONFIG_X86_ESPFIX64 |
7209a75d | 870 | native_irq_return_ldt: |
3891a04a PA |
871 | pushq_cfi %rax |
872 | pushq_cfi %rdi | |
873 | SWAPGS | |
874 | movq PER_CPU_VAR(espfix_waddr),%rdi | |
875 | movq %rax,(0*8)(%rdi) /* RAX */ | |
876 | movq (2*8)(%rsp),%rax /* RIP */ | |
877 | movq %rax,(1*8)(%rdi) | |
878 | movq (3*8)(%rsp),%rax /* CS */ | |
879 | movq %rax,(2*8)(%rdi) | |
880 | movq (4*8)(%rsp),%rax /* RFLAGS */ | |
881 | movq %rax,(3*8)(%rdi) | |
882 | movq (6*8)(%rsp),%rax /* SS */ | |
883 | movq %rax,(5*8)(%rdi) | |
884 | movq (5*8)(%rsp),%rax /* RSP */ | |
885 | movq %rax,(4*8)(%rdi) | |
886 | andl $0xffff0000,%eax | |
887 | popq_cfi %rdi | |
888 | orq PER_CPU_VAR(espfix_stack),%rax | |
889 | SWAPGS | |
890 | movq %rax,%rsp | |
891 | popq_cfi %rax | |
7209a75d | 892 | jmp native_irq_return_iret |
34273f41 | 893 | #endif |
3891a04a | 894 | |
7effaa88 | 895 | /* edi: workmask, edx: work */ |
1da177e4 | 896 | retint_careful: |
7effaa88 | 897 | CFI_RESTORE_STATE |
1da177e4 LT |
898 | bt $TIF_NEED_RESCHED,%edx |
899 | jnc retint_signal | |
2601e64d | 900 | TRACE_IRQS_ON |
72fe4858 | 901 | ENABLE_INTERRUPTS(CLBR_NONE) |
df5d1874 | 902 | pushq_cfi %rdi |
0430499c | 903 | SCHEDULE_USER |
df5d1874 | 904 | popq_cfi %rdi |
1da177e4 | 905 | GET_THREAD_INFO(%rcx) |
72fe4858 | 906 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 907 | TRACE_IRQS_OFF |
1da177e4 | 908 | jmp retint_check |
0bd7b798 | 909 | |
1da177e4 | 910 | retint_signal: |
8f4d37ec | 911 | testl $_TIF_DO_NOTIFY_MASK,%edx |
10ffdbb8 | 912 | jz retint_swapgs |
2601e64d | 913 | TRACE_IRQS_ON |
72fe4858 | 914 | ENABLE_INTERRUPTS(CLBR_NONE) |
1da177e4 | 915 | SAVE_REST |
0bd7b798 | 916 | movq $-1,ORIG_RAX(%rsp) |
3829ee6b | 917 | xorl %esi,%esi # oldset |
1da177e4 LT |
918 | movq %rsp,%rdi # &pt_regs |
919 | call do_notify_resume | |
920 | RESTORE_REST | |
72fe4858 | 921 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 922 | TRACE_IRQS_OFF |
be9e6870 | 923 | GET_THREAD_INFO(%rcx) |
eca91e78 | 924 | jmp retint_with_reschedule |
1da177e4 LT |
925 | |
926 | #ifdef CONFIG_PREEMPT | |
927 | /* Returning to kernel space. Check if we need preemption */ | |
928 | /* rcx: threadinfo. interrupts off. */ | |
b06babac | 929 | ENTRY(retint_kernel) |
c2daa3be | 930 | cmpl $0,PER_CPU_VAR(__preempt_count) |
1da177e4 | 931 | jnz retint_restore_args |
1da177e4 LT |
932 | bt $9,EFLAGS-ARGOFFSET(%rsp) /* interrupts off? */ |
933 | jnc retint_restore_args | |
934 | call preempt_schedule_irq | |
935 | jmp exit_intr | |
0bd7b798 | 936 | #endif |
1da177e4 | 937 | CFI_ENDPROC |
4b787e0b | 938 | END(common_interrupt) |
3891a04a | 939 | |
1da177e4 LT |
940 | /* |
941 | * APIC interrupts. | |
0bd7b798 | 942 | */ |
cf910e83 | 943 | .macro apicinterrupt3 num sym do_sym |
322648d1 | 944 | ENTRY(\sym) |
7effaa88 | 945 | INTR_FRAME |
ee4eb87b | 946 | ASM_CLAC |
df5d1874 | 947 | pushq_cfi $~(\num) |
39e95433 | 948 | .Lcommon_\sym: |
322648d1 | 949 | interrupt \do_sym |
1da177e4 LT |
950 | jmp ret_from_intr |
951 | CFI_ENDPROC | |
322648d1 AH |
952 | END(\sym) |
953 | .endm | |
1da177e4 | 954 | |
cf910e83 SA |
955 | #ifdef CONFIG_TRACING |
956 | #define trace(sym) trace_##sym | |
957 | #define smp_trace(sym) smp_trace_##sym | |
958 | ||
959 | .macro trace_apicinterrupt num sym | |
960 | apicinterrupt3 \num trace(\sym) smp_trace(\sym) | |
961 | .endm | |
962 | #else | |
963 | .macro trace_apicinterrupt num sym do_sym | |
964 | .endm | |
965 | #endif | |
966 | ||
967 | .macro apicinterrupt num sym do_sym | |
968 | apicinterrupt3 \num \sym \do_sym | |
969 | trace_apicinterrupt \num \sym | |
970 | .endm | |
971 | ||
322648d1 | 972 | #ifdef CONFIG_SMP |
cf910e83 | 973 | apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR \ |
322648d1 | 974 | irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt |
cf910e83 | 975 | apicinterrupt3 REBOOT_VECTOR \ |
4ef702c1 | 976 | reboot_interrupt smp_reboot_interrupt |
322648d1 | 977 | #endif |
1da177e4 | 978 | |
03b48632 | 979 | #ifdef CONFIG_X86_UV |
cf910e83 | 980 | apicinterrupt3 UV_BAU_MESSAGE \ |
322648d1 | 981 | uv_bau_message_intr1 uv_bau_message_interrupt |
03b48632 | 982 | #endif |
322648d1 AH |
983 | apicinterrupt LOCAL_TIMER_VECTOR \ |
984 | apic_timer_interrupt smp_apic_timer_interrupt | |
4a4de9c7 DS |
985 | apicinterrupt X86_PLATFORM_IPI_VECTOR \ |
986 | x86_platform_ipi smp_x86_platform_ipi | |
89b831ef | 987 | |
d78f2664 | 988 | #ifdef CONFIG_HAVE_KVM |
cf910e83 | 989 | apicinterrupt3 POSTED_INTR_VECTOR \ |
d78f2664 YZ |
990 | kvm_posted_intr_ipi smp_kvm_posted_intr_ipi |
991 | #endif | |
992 | ||
33e5ff63 | 993 | #ifdef CONFIG_X86_MCE_THRESHOLD |
322648d1 | 994 | apicinterrupt THRESHOLD_APIC_VECTOR \ |
7856f6cc | 995 | threshold_interrupt smp_threshold_interrupt |
33e5ff63 SA |
996 | #endif |
997 | ||
998 | #ifdef CONFIG_X86_THERMAL_VECTOR | |
322648d1 AH |
999 | apicinterrupt THERMAL_APIC_VECTOR \ |
1000 | thermal_interrupt smp_thermal_interrupt | |
33e5ff63 | 1001 | #endif |
1812924b | 1002 | |
322648d1 AH |
1003 | #ifdef CONFIG_SMP |
1004 | apicinterrupt CALL_FUNCTION_SINGLE_VECTOR \ | |
1005 | call_function_single_interrupt smp_call_function_single_interrupt | |
1006 | apicinterrupt CALL_FUNCTION_VECTOR \ | |
1007 | call_function_interrupt smp_call_function_interrupt | |
1008 | apicinterrupt RESCHEDULE_VECTOR \ | |
1009 | reschedule_interrupt smp_reschedule_interrupt | |
1010 | #endif | |
1da177e4 | 1011 | |
322648d1 AH |
1012 | apicinterrupt ERROR_APIC_VECTOR \ |
1013 | error_interrupt smp_error_interrupt | |
1014 | apicinterrupt SPURIOUS_APIC_VECTOR \ | |
1015 | spurious_interrupt smp_spurious_interrupt | |
0bd7b798 | 1016 | |
e360adbe PZ |
1017 | #ifdef CONFIG_IRQ_WORK |
1018 | apicinterrupt IRQ_WORK_VECTOR \ | |
1019 | irq_work_interrupt smp_irq_work_interrupt | |
241771ef IM |
1020 | #endif |
1021 | ||
1da177e4 LT |
1022 | /* |
1023 | * Exception entry points. | |
0bd7b798 | 1024 | */ |
577ed45e AL |
1025 | #define INIT_TSS_IST(x) PER_CPU_VAR(init_tss) + (TSS_ist + ((x) - 1) * 8) |
1026 | ||
1027 | .macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1 | |
322648d1 | 1028 | ENTRY(\sym) |
577ed45e AL |
1029 | /* Sanity check */ |
1030 | .if \shift_ist != -1 && \paranoid == 0 | |
1031 | .error "using shift_ist requires paranoid=1" | |
1032 | .endif | |
1033 | ||
cb5dd2c5 AL |
1034 | .if \has_error_code |
1035 | XCPT_FRAME | |
1036 | .else | |
7effaa88 | 1037 | INTR_FRAME |
cb5dd2c5 | 1038 | .endif |
1da177e4 | 1039 | |
ee4eb87b | 1040 | ASM_CLAC |
b8b1d08b | 1041 | PARAVIRT_ADJUST_EXCEPTION_FRAME |
cb5dd2c5 AL |
1042 | |
1043 | .ifeq \has_error_code | |
1044 | pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */ | |
1045 | .endif | |
1046 | ||
b1cccb1b JB |
1047 | subq $ORIG_RAX-R15, %rsp |
1048 | CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15 | |
cb5dd2c5 AL |
1049 | |
1050 | .if \paranoid | |
b8b1d08b | 1051 | call save_paranoid |
cb5dd2c5 AL |
1052 | .else |
1053 | call error_entry | |
1054 | .endif | |
1055 | ||
1bd24efc | 1056 | DEFAULT_FRAME 0 |
cb5dd2c5 AL |
1057 | |
1058 | .if \paranoid | |
577ed45e AL |
1059 | .if \shift_ist != -1 |
1060 | TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */ | |
1061 | .else | |
b8b1d08b | 1062 | TRACE_IRQS_OFF |
cb5dd2c5 | 1063 | .endif |
577ed45e | 1064 | .endif |
cb5dd2c5 AL |
1065 | |
1066 | movq %rsp,%rdi /* pt_regs pointer */ | |
1067 | ||
1068 | .if \has_error_code | |
1069 | movq ORIG_RAX(%rsp),%rsi /* get error code */ | |
1070 | movq $-1,ORIG_RAX(%rsp) /* no syscall to restart */ | |
1071 | .else | |
1072 | xorl %esi,%esi /* no error code */ | |
1073 | .endif | |
1074 | ||
577ed45e AL |
1075 | .if \shift_ist != -1 |
1076 | subq $EXCEPTION_STKSZ, INIT_TSS_IST(\shift_ist) | |
1077 | .endif | |
1078 | ||
322648d1 | 1079 | call \do_sym |
cb5dd2c5 | 1080 | |
577ed45e AL |
1081 | .if \shift_ist != -1 |
1082 | addq $EXCEPTION_STKSZ, INIT_TSS_IST(\shift_ist) | |
1083 | .endif | |
1084 | ||
cb5dd2c5 AL |
1085 | .if \paranoid |
1086 | jmp paranoid_exit /* %ebx: no swapgs flag */ | |
1087 | .else | |
1088 | jmp error_exit /* %ebx: no swapgs flag */ | |
1089 | .endif | |
1090 | ||
b8b1d08b | 1091 | CFI_ENDPROC |
ddeb8f21 | 1092 | END(\sym) |
322648d1 | 1093 | .endm |
b8b1d08b | 1094 | |
25c74b10 | 1095 | #ifdef CONFIG_TRACING |
cb5dd2c5 AL |
1096 | .macro trace_idtentry sym do_sym has_error_code:req |
1097 | idtentry trace(\sym) trace(\do_sym) has_error_code=\has_error_code | |
1098 | idtentry \sym \do_sym has_error_code=\has_error_code | |
25c74b10 SA |
1099 | .endm |
1100 | #else | |
cb5dd2c5 AL |
1101 | .macro trace_idtentry sym do_sym has_error_code:req |
1102 | idtentry \sym \do_sym has_error_code=\has_error_code | |
25c74b10 SA |
1103 | .endm |
1104 | #endif | |
1105 | ||
cb5dd2c5 AL |
1106 | idtentry divide_error do_divide_error has_error_code=0 |
1107 | idtentry overflow do_overflow has_error_code=0 | |
1108 | idtentry bounds do_bounds has_error_code=0 | |
1109 | idtentry invalid_op do_invalid_op has_error_code=0 | |
1110 | idtentry device_not_available do_device_not_available has_error_code=0 | |
af726f21 | 1111 | idtentry double_fault do_double_fault has_error_code=1 paranoid=1 |
cb5dd2c5 AL |
1112 | idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0 |
1113 | idtentry invalid_TSS do_invalid_TSS has_error_code=1 | |
1114 | idtentry segment_not_present do_segment_not_present has_error_code=1 | |
1115 | idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0 | |
1116 | idtentry coprocessor_error do_coprocessor_error has_error_code=0 | |
1117 | idtentry alignment_check do_alignment_check has_error_code=1 | |
1118 | idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0 | |
5cec93c2 | 1119 | |
2601e64d | 1120 | |
9f1e87ea CG |
1121 | /* Reload gs selector with exception handling */ |
1122 | /* edi: new selector */ | |
9f9d489a | 1123 | ENTRY(native_load_gs_index) |
7effaa88 | 1124 | CFI_STARTPROC |
df5d1874 | 1125 | pushfq_cfi |
b8aa287f | 1126 | DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI) |
9f1e87ea | 1127 | SWAPGS |
0bd7b798 | 1128 | gs_change: |
9f1e87ea | 1129 | movl %edi,%gs |
1da177e4 | 1130 | 2: mfence /* workaround */ |
72fe4858 | 1131 | SWAPGS |
df5d1874 | 1132 | popfq_cfi |
9f1e87ea | 1133 | ret |
7effaa88 | 1134 | CFI_ENDPROC |
6efdcfaf | 1135 | END(native_load_gs_index) |
0bd7b798 | 1136 | |
d7abc0fa | 1137 | _ASM_EXTABLE(gs_change,bad_gs) |
9f1e87ea | 1138 | .section .fixup,"ax" |
1da177e4 | 1139 | /* running with kernelgs */ |
0bd7b798 | 1140 | bad_gs: |
72fe4858 | 1141 | SWAPGS /* switch back to user gs */ |
1da177e4 | 1142 | xorl %eax,%eax |
9f1e87ea CG |
1143 | movl %eax,%gs |
1144 | jmp 2b | |
1145 | .previous | |
0bd7b798 | 1146 | |
2699500b | 1147 | /* Call softirq on interrupt stack. Interrupts are off. */ |
7d65f4a6 | 1148 | ENTRY(do_softirq_own_stack) |
7effaa88 | 1149 | CFI_STARTPROC |
df5d1874 | 1150 | pushq_cfi %rbp |
2699500b AK |
1151 | CFI_REL_OFFSET rbp,0 |
1152 | mov %rsp,%rbp | |
1153 | CFI_DEF_CFA_REGISTER rbp | |
56895530 | 1154 | incl PER_CPU_VAR(irq_count) |
26f80bd6 | 1155 | cmove PER_CPU_VAR(irq_stack_ptr),%rsp |
2699500b | 1156 | push %rbp # backlink for old unwinder |
ed6b676c | 1157 | call __do_softirq |
2699500b | 1158 | leaveq |
df5d1874 | 1159 | CFI_RESTORE rbp |
7effaa88 | 1160 | CFI_DEF_CFA_REGISTER rsp |
2699500b | 1161 | CFI_ADJUST_CFA_OFFSET -8 |
56895530 | 1162 | decl PER_CPU_VAR(irq_count) |
ed6b676c | 1163 | ret |
7effaa88 | 1164 | CFI_ENDPROC |
7d65f4a6 | 1165 | END(do_softirq_own_stack) |
75154f40 | 1166 | |
3d75e1b8 | 1167 | #ifdef CONFIG_XEN |
cb5dd2c5 | 1168 | idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0 |
3d75e1b8 JF |
1169 | |
1170 | /* | |
9f1e87ea CG |
1171 | * A note on the "critical region" in our callback handler. |
1172 | * We want to avoid stacking callback handlers due to events occurring | |
1173 | * during handling of the last event. To do this, we keep events disabled | |
1174 | * until we've done all processing. HOWEVER, we must enable events before | |
1175 | * popping the stack frame (can't be done atomically) and so it would still | |
1176 | * be possible to get enough handler activations to overflow the stack. | |
1177 | * Although unlikely, bugs of that kind are hard to track down, so we'd | |
1178 | * like to avoid the possibility. | |
1179 | * So, on entry to the handler we detect whether we interrupted an | |
1180 | * existing activation in its critical region -- if so, we pop the current | |
1181 | * activation and restart the handler using the previous one. | |
1182 | */ | |
3d75e1b8 JF |
1183 | ENTRY(xen_do_hypervisor_callback) # do_hypervisor_callback(struct *pt_regs) |
1184 | CFI_STARTPROC | |
9f1e87ea CG |
1185 | /* |
1186 | * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will | |
1187 | * see the correct pointer to the pt_regs | |
1188 | */ | |
3d75e1b8 JF |
1189 | movq %rdi, %rsp # we don't return, adjust the stack frame |
1190 | CFI_ENDPROC | |
dcd072e2 | 1191 | DEFAULT_FRAME |
56895530 | 1192 | 11: incl PER_CPU_VAR(irq_count) |
3d75e1b8 JF |
1193 | movq %rsp,%rbp |
1194 | CFI_DEF_CFA_REGISTER rbp | |
26f80bd6 | 1195 | cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp |
3d75e1b8 JF |
1196 | pushq %rbp # backlink for old unwinder |
1197 | call xen_evtchn_do_upcall | |
1198 | popq %rsp | |
1199 | CFI_DEF_CFA_REGISTER rsp | |
56895530 | 1200 | decl PER_CPU_VAR(irq_count) |
3d75e1b8 JF |
1201 | jmp error_exit |
1202 | CFI_ENDPROC | |
371c394a | 1203 | END(xen_do_hypervisor_callback) |
3d75e1b8 JF |
1204 | |
1205 | /* | |
9f1e87ea CG |
1206 | * Hypervisor uses this for application faults while it executes. |
1207 | * We get here for two reasons: | |
1208 | * 1. Fault while reloading DS, ES, FS or GS | |
1209 | * 2. Fault while executing IRET | |
1210 | * Category 1 we do not need to fix up as Xen has already reloaded all segment | |
1211 | * registers that could be reloaded and zeroed the others. | |
1212 | * Category 2 we fix up by killing the current process. We cannot use the | |
1213 | * normal Linux return path in this case because if we use the IRET hypercall | |
1214 | * to pop the stack frame we end up in an infinite loop of failsafe callbacks. | |
1215 | * We distinguish between categories by comparing each saved segment register | |
1216 | * with its current contents: any discrepancy means we in category 1. | |
1217 | */ | |
3d75e1b8 | 1218 | ENTRY(xen_failsafe_callback) |
dcd072e2 AH |
1219 | INTR_FRAME 1 (6*8) |
1220 | /*CFI_REL_OFFSET gs,GS*/ | |
1221 | /*CFI_REL_OFFSET fs,FS*/ | |
1222 | /*CFI_REL_OFFSET es,ES*/ | |
1223 | /*CFI_REL_OFFSET ds,DS*/ | |
1224 | CFI_REL_OFFSET r11,8 | |
1225 | CFI_REL_OFFSET rcx,0 | |
3d75e1b8 JF |
1226 | movw %ds,%cx |
1227 | cmpw %cx,0x10(%rsp) | |
1228 | CFI_REMEMBER_STATE | |
1229 | jne 1f | |
1230 | movw %es,%cx | |
1231 | cmpw %cx,0x18(%rsp) | |
1232 | jne 1f | |
1233 | movw %fs,%cx | |
1234 | cmpw %cx,0x20(%rsp) | |
1235 | jne 1f | |
1236 | movw %gs,%cx | |
1237 | cmpw %cx,0x28(%rsp) | |
1238 | jne 1f | |
1239 | /* All segments match their saved values => Category 2 (Bad IRET). */ | |
1240 | movq (%rsp),%rcx | |
1241 | CFI_RESTORE rcx | |
1242 | movq 8(%rsp),%r11 | |
1243 | CFI_RESTORE r11 | |
1244 | addq $0x30,%rsp | |
1245 | CFI_ADJUST_CFA_OFFSET -0x30 | |
14ae22ba IM |
1246 | pushq_cfi $0 /* RIP */ |
1247 | pushq_cfi %r11 | |
1248 | pushq_cfi %rcx | |
4a5c3e77 | 1249 | jmp general_protection |
3d75e1b8 JF |
1250 | CFI_RESTORE_STATE |
1251 | 1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */ | |
1252 | movq (%rsp),%rcx | |
1253 | CFI_RESTORE rcx | |
1254 | movq 8(%rsp),%r11 | |
1255 | CFI_RESTORE r11 | |
1256 | addq $0x30,%rsp | |
1257 | CFI_ADJUST_CFA_OFFSET -0x30 | |
a349e23d | 1258 | pushq_cfi $-1 /* orig_ax = -1 => not a system call */ |
3d75e1b8 JF |
1259 | SAVE_ALL |
1260 | jmp error_exit | |
1261 | CFI_ENDPROC | |
3d75e1b8 JF |
1262 | END(xen_failsafe_callback) |
1263 | ||
cf910e83 | 1264 | apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \ |
38e20b07 SY |
1265 | xen_hvm_callback_vector xen_evtchn_do_upcall |
1266 | ||
3d75e1b8 | 1267 | #endif /* CONFIG_XEN */ |
ddeb8f21 | 1268 | |
bc2b0331 | 1269 | #if IS_ENABLED(CONFIG_HYPERV) |
cf910e83 | 1270 | apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \ |
bc2b0331 S |
1271 | hyperv_callback_vector hyperv_vector_handler |
1272 | #endif /* CONFIG_HYPERV */ | |
1273 | ||
577ed45e AL |
1274 | idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK |
1275 | idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK | |
6f442be2 | 1276 | idtentry stack_segment do_stack_segment has_error_code=1 |
6cac5a92 | 1277 | #ifdef CONFIG_XEN |
cb5dd2c5 AL |
1278 | idtentry xen_debug do_debug has_error_code=0 |
1279 | idtentry xen_int3 do_int3 has_error_code=0 | |
1280 | idtentry xen_stack_segment do_stack_segment has_error_code=1 | |
6cac5a92 | 1281 | #endif |
cb5dd2c5 AL |
1282 | idtentry general_protection do_general_protection has_error_code=1 |
1283 | trace_idtentry page_fault do_page_fault has_error_code=1 | |
631bc487 | 1284 | #ifdef CONFIG_KVM_GUEST |
cb5dd2c5 | 1285 | idtentry async_page_fault do_async_page_fault has_error_code=1 |
631bc487 | 1286 | #endif |
ddeb8f21 | 1287 | #ifdef CONFIG_X86_MCE |
cb5dd2c5 | 1288 | idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip) |
ddeb8f21 AH |
1289 | #endif |
1290 | ||
1291 | /* | |
9f1e87ea CG |
1292 | * "Paranoid" exit path from exception stack. |
1293 | * Paranoid because this is used by NMIs and cannot take | |
ddeb8f21 AH |
1294 | * any kernel state for granted. |
1295 | * We don't do kernel preemption checks here, because only | |
1296 | * NMI should be common and it does not enable IRQs and | |
1297 | * cannot get reschedule ticks. | |
1298 | * | |
1299 | * "trace" is 0 for the NMI handler only, because irq-tracing | |
1300 | * is fundamentally NMI-unsafe. (we cannot change the soft and | |
1301 | * hard flags at once, atomically) | |
1302 | */ | |
1303 | ||
1304 | /* ebx: no swapgs flag */ | |
1305 | ENTRY(paranoid_exit) | |
1f130a78 | 1306 | DEFAULT_FRAME |
ddeb8f21 | 1307 | DISABLE_INTERRUPTS(CLBR_NONE) |
5963e317 | 1308 | TRACE_IRQS_OFF_DEBUG |
ddeb8f21 AH |
1309 | testl %ebx,%ebx /* swapgs needed? */ |
1310 | jnz paranoid_restore | |
1311 | testl $3,CS(%rsp) | |
1312 | jnz paranoid_userspace | |
1313 | paranoid_swapgs: | |
1314 | TRACE_IRQS_IRETQ 0 | |
1315 | SWAPGS_UNSAFE_STACK | |
0300e7f1 SR |
1316 | RESTORE_ALL 8 |
1317 | jmp irq_return | |
ddeb8f21 | 1318 | paranoid_restore: |
5963e317 | 1319 | TRACE_IRQS_IRETQ_DEBUG 0 |
ddeb8f21 AH |
1320 | RESTORE_ALL 8 |
1321 | jmp irq_return | |
1322 | paranoid_userspace: | |
1323 | GET_THREAD_INFO(%rcx) | |
1324 | movl TI_flags(%rcx),%ebx | |
1325 | andl $_TIF_WORK_MASK,%ebx | |
1326 | jz paranoid_swapgs | |
1327 | movq %rsp,%rdi /* &pt_regs */ | |
1328 | call sync_regs | |
1329 | movq %rax,%rsp /* switch stack for scheduling */ | |
1330 | testl $_TIF_NEED_RESCHED,%ebx | |
1331 | jnz paranoid_schedule | |
1332 | movl %ebx,%edx /* arg3: thread flags */ | |
1333 | TRACE_IRQS_ON | |
1334 | ENABLE_INTERRUPTS(CLBR_NONE) | |
1335 | xorl %esi,%esi /* arg2: oldset */ | |
1336 | movq %rsp,%rdi /* arg1: &pt_regs */ | |
1337 | call do_notify_resume | |
1338 | DISABLE_INTERRUPTS(CLBR_NONE) | |
1339 | TRACE_IRQS_OFF | |
1340 | jmp paranoid_userspace | |
1341 | paranoid_schedule: | |
1342 | TRACE_IRQS_ON | |
1343 | ENABLE_INTERRUPTS(CLBR_ANY) | |
0430499c | 1344 | SCHEDULE_USER |
ddeb8f21 AH |
1345 | DISABLE_INTERRUPTS(CLBR_ANY) |
1346 | TRACE_IRQS_OFF | |
1347 | jmp paranoid_userspace | |
1348 | CFI_ENDPROC | |
1349 | END(paranoid_exit) | |
1350 | ||
1351 | /* | |
1352 | * Exception entry point. This expects an error code/orig_rax on the stack. | |
1353 | * returns in "no swapgs flag" in %ebx. | |
1354 | */ | |
1355 | ENTRY(error_entry) | |
1356 | XCPT_FRAME | |
1357 | CFI_ADJUST_CFA_OFFSET 15*8 | |
1358 | /* oldrax contains error code */ | |
1359 | cld | |
3bab13b0 JB |
1360 | movq %rdi, RDI+8(%rsp) |
1361 | movq %rsi, RSI+8(%rsp) | |
1362 | movq %rdx, RDX+8(%rsp) | |
1363 | movq %rcx, RCX+8(%rsp) | |
1364 | movq %rax, RAX+8(%rsp) | |
1365 | movq %r8, R8+8(%rsp) | |
1366 | movq %r9, R9+8(%rsp) | |
1367 | movq %r10, R10+8(%rsp) | |
1368 | movq %r11, R11+8(%rsp) | |
ddeb8f21 | 1369 | movq_cfi rbx, RBX+8 |
3bab13b0 JB |
1370 | movq %rbp, RBP+8(%rsp) |
1371 | movq %r12, R12+8(%rsp) | |
1372 | movq %r13, R13+8(%rsp) | |
1373 | movq %r14, R14+8(%rsp) | |
1374 | movq %r15, R15+8(%rsp) | |
ddeb8f21 AH |
1375 | xorl %ebx,%ebx |
1376 | testl $3,CS+8(%rsp) | |
1377 | je error_kernelspace | |
1378 | error_swapgs: | |
1379 | SWAPGS | |
1380 | error_sti: | |
1381 | TRACE_IRQS_OFF | |
1382 | ret | |
ddeb8f21 AH |
1383 | |
1384 | /* | |
1385 | * There are two places in the kernel that can potentially fault with | |
b645af2d AL |
1386 | * usergs. Handle them here. B stepping K8s sometimes report a |
1387 | * truncated RIP for IRET exceptions returning to compat mode. Check | |
1388 | * for these here too. | |
ddeb8f21 AH |
1389 | */ |
1390 | error_kernelspace: | |
3bab13b0 | 1391 | CFI_REL_OFFSET rcx, RCX+8 |
ddeb8f21 | 1392 | incl %ebx |
7209a75d | 1393 | leaq native_irq_return_iret(%rip),%rcx |
ddeb8f21 | 1394 | cmpq %rcx,RIP+8(%rsp) |
b645af2d | 1395 | je error_bad_iret |
ae24ffe5 BG |
1396 | movl %ecx,%eax /* zero extend */ |
1397 | cmpq %rax,RIP+8(%rsp) | |
1398 | je bstep_iret | |
ddeb8f21 | 1399 | cmpq $gs_change,RIP+8(%rsp) |
9f1e87ea | 1400 | je error_swapgs |
ddeb8f21 | 1401 | jmp error_sti |
ae24ffe5 BG |
1402 | |
1403 | bstep_iret: | |
1404 | /* Fix truncated RIP */ | |
1405 | movq %rcx,RIP+8(%rsp) | |
b645af2d AL |
1406 | /* fall through */ |
1407 | ||
1408 | error_bad_iret: | |
1409 | SWAPGS | |
1410 | mov %rsp,%rdi | |
1411 | call fixup_bad_iret | |
1412 | mov %rax,%rsp | |
1413 | decl %ebx /* Return to usergs */ | |
1414 | jmp error_sti | |
e6b04b6b | 1415 | CFI_ENDPROC |
ddeb8f21 AH |
1416 | END(error_entry) |
1417 | ||
1418 | ||
1419 | /* ebx: no swapgs flag (1: don't need swapgs, 0: need it) */ | |
1420 | ENTRY(error_exit) | |
1421 | DEFAULT_FRAME | |
1422 | movl %ebx,%eax | |
1423 | RESTORE_REST | |
1424 | DISABLE_INTERRUPTS(CLBR_NONE) | |
1425 | TRACE_IRQS_OFF | |
1426 | GET_THREAD_INFO(%rcx) | |
1427 | testl %eax,%eax | |
1428 | jne retint_kernel | |
1429 | LOCKDEP_SYS_EXIT_IRQ | |
1430 | movl TI_flags(%rcx),%edx | |
1431 | movl $_TIF_WORK_MASK,%edi | |
1432 | andl %edi,%edx | |
1433 | jnz retint_careful | |
1434 | jmp retint_swapgs | |
1435 | CFI_ENDPROC | |
1436 | END(error_exit) | |
1437 | ||
3f3c8b8c SR |
1438 | /* |
1439 | * Test if a given stack is an NMI stack or not. | |
1440 | */ | |
1441 | .macro test_in_nmi reg stack nmi_ret normal_ret | |
1442 | cmpq %\reg, \stack | |
1443 | ja \normal_ret | |
1444 | subq $EXCEPTION_STKSZ, %\reg | |
1445 | cmpq %\reg, \stack | |
1446 | jb \normal_ret | |
1447 | jmp \nmi_ret | |
1448 | .endm | |
ddeb8f21 AH |
1449 | |
1450 | /* runs on exception stack */ | |
1451 | ENTRY(nmi) | |
1452 | INTR_FRAME | |
1453 | PARAVIRT_ADJUST_EXCEPTION_FRAME | |
3f3c8b8c SR |
1454 | /* |
1455 | * We allow breakpoints in NMIs. If a breakpoint occurs, then | |
1456 | * the iretq it performs will take us out of NMI context. | |
1457 | * This means that we can have nested NMIs where the next | |
1458 | * NMI is using the top of the stack of the previous NMI. We | |
1459 | * can't let it execute because the nested NMI will corrupt the | |
1460 | * stack of the previous NMI. NMI handlers are not re-entrant | |
1461 | * anyway. | |
1462 | * | |
1463 | * To handle this case we do the following: | |
1464 | * Check the a special location on the stack that contains | |
1465 | * a variable that is set when NMIs are executing. | |
1466 | * The interrupted task's stack is also checked to see if it | |
1467 | * is an NMI stack. | |
1468 | * If the variable is not set and the stack is not the NMI | |
1469 | * stack then: | |
1470 | * o Set the special variable on the stack | |
1471 | * o Copy the interrupt frame into a "saved" location on the stack | |
1472 | * o Copy the interrupt frame into a "copy" location on the stack | |
1473 | * o Continue processing the NMI | |
1474 | * If the variable is set or the previous stack is the NMI stack: | |
1475 | * o Modify the "copy" location to jump to the repeate_nmi | |
1476 | * o return back to the first NMI | |
1477 | * | |
1478 | * Now on exit of the first NMI, we first clear the stack variable | |
1479 | * The NMI stack will tell any nested NMIs at that point that it is | |
1480 | * nested. Then we pop the stack normally with iret, and if there was | |
1481 | * a nested NMI that updated the copy interrupt stack frame, a | |
1482 | * jump will be made to the repeat_nmi code that will handle the second | |
1483 | * NMI. | |
1484 | */ | |
1485 | ||
1486 | /* Use %rdx as out temp variable throughout */ | |
1487 | pushq_cfi %rdx | |
62610913 | 1488 | CFI_REL_OFFSET rdx, 0 |
3f3c8b8c | 1489 | |
45d5a168 SR |
1490 | /* |
1491 | * If %cs was not the kernel segment, then the NMI triggered in user | |
1492 | * space, which means it is definitely not nested. | |
1493 | */ | |
a38449ef | 1494 | cmpl $__KERNEL_CS, 16(%rsp) |
45d5a168 SR |
1495 | jne first_nmi |
1496 | ||
3f3c8b8c SR |
1497 | /* |
1498 | * Check the special variable on the stack to see if NMIs are | |
1499 | * executing. | |
1500 | */ | |
a38449ef | 1501 | cmpl $1, -8(%rsp) |
3f3c8b8c SR |
1502 | je nested_nmi |
1503 | ||
1504 | /* | |
1505 | * Now test if the previous stack was an NMI stack. | |
1506 | * We need the double check. We check the NMI stack to satisfy the | |
1507 | * race when the first NMI clears the variable before returning. | |
1508 | * We check the variable because the first NMI could be in a | |
1509 | * breakpoint routine using a breakpoint stack. | |
1510 | */ | |
1511 | lea 6*8(%rsp), %rdx | |
1512 | test_in_nmi rdx, 4*8(%rsp), nested_nmi, first_nmi | |
62610913 | 1513 | CFI_REMEMBER_STATE |
3f3c8b8c SR |
1514 | |
1515 | nested_nmi: | |
1516 | /* | |
1517 | * Do nothing if we interrupted the fixup in repeat_nmi. | |
1518 | * It's about to repeat the NMI handler, so we are fine | |
1519 | * with ignoring this one. | |
1520 | */ | |
1521 | movq $repeat_nmi, %rdx | |
1522 | cmpq 8(%rsp), %rdx | |
1523 | ja 1f | |
1524 | movq $end_repeat_nmi, %rdx | |
1525 | cmpq 8(%rsp), %rdx | |
1526 | ja nested_nmi_out | |
1527 | ||
1528 | 1: | |
1529 | /* Set up the interrupted NMIs stack to jump to repeat_nmi */ | |
28696f43 | 1530 | leaq -1*8(%rsp), %rdx |
3f3c8b8c | 1531 | movq %rdx, %rsp |
28696f43 SQ |
1532 | CFI_ADJUST_CFA_OFFSET 1*8 |
1533 | leaq -10*8(%rsp), %rdx | |
3f3c8b8c SR |
1534 | pushq_cfi $__KERNEL_DS |
1535 | pushq_cfi %rdx | |
1536 | pushfq_cfi | |
1537 | pushq_cfi $__KERNEL_CS | |
1538 | pushq_cfi $repeat_nmi | |
1539 | ||
1540 | /* Put stack back */ | |
28696f43 SQ |
1541 | addq $(6*8), %rsp |
1542 | CFI_ADJUST_CFA_OFFSET -6*8 | |
3f3c8b8c SR |
1543 | |
1544 | nested_nmi_out: | |
1545 | popq_cfi %rdx | |
62610913 | 1546 | CFI_RESTORE rdx |
3f3c8b8c SR |
1547 | |
1548 | /* No need to check faults here */ | |
1549 | INTERRUPT_RETURN | |
1550 | ||
62610913 | 1551 | CFI_RESTORE_STATE |
3f3c8b8c SR |
1552 | first_nmi: |
1553 | /* | |
1554 | * Because nested NMIs will use the pushed location that we | |
1555 | * stored in rdx, we must keep that space available. | |
1556 | * Here's what our stack frame will look like: | |
1557 | * +-------------------------+ | |
1558 | * | original SS | | |
1559 | * | original Return RSP | | |
1560 | * | original RFLAGS | | |
1561 | * | original CS | | |
1562 | * | original RIP | | |
1563 | * +-------------------------+ | |
1564 | * | temp storage for rdx | | |
1565 | * +-------------------------+ | |
1566 | * | NMI executing variable | | |
1567 | * +-------------------------+ | |
3f3c8b8c SR |
1568 | * | copied SS | |
1569 | * | copied Return RSP | | |
1570 | * | copied RFLAGS | | |
1571 | * | copied CS | | |
1572 | * | copied RIP | | |
1573 | * +-------------------------+ | |
28696f43 SQ |
1574 | * | Saved SS | |
1575 | * | Saved Return RSP | | |
1576 | * | Saved RFLAGS | | |
1577 | * | Saved CS | | |
1578 | * | Saved RIP | | |
1579 | * +-------------------------+ | |
3f3c8b8c SR |
1580 | * | pt_regs | |
1581 | * +-------------------------+ | |
1582 | * | |
79fb4ad6 SR |
1583 | * The saved stack frame is used to fix up the copied stack frame |
1584 | * that a nested NMI may change to make the interrupted NMI iret jump | |
1585 | * to the repeat_nmi. The original stack frame and the temp storage | |
3f3c8b8c SR |
1586 | * is also used by nested NMIs and can not be trusted on exit. |
1587 | */ | |
79fb4ad6 | 1588 | /* Do not pop rdx, nested NMIs will corrupt that part of the stack */ |
62610913 JB |
1589 | movq (%rsp), %rdx |
1590 | CFI_RESTORE rdx | |
1591 | ||
3f3c8b8c SR |
1592 | /* Set the NMI executing variable on the stack. */ |
1593 | pushq_cfi $1 | |
1594 | ||
28696f43 SQ |
1595 | /* |
1596 | * Leave room for the "copied" frame | |
1597 | */ | |
1598 | subq $(5*8), %rsp | |
444723dc | 1599 | CFI_ADJUST_CFA_OFFSET 5*8 |
28696f43 | 1600 | |
3f3c8b8c SR |
1601 | /* Copy the stack frame to the Saved frame */ |
1602 | .rept 5 | |
28696f43 | 1603 | pushq_cfi 11*8(%rsp) |
3f3c8b8c | 1604 | .endr |
62610913 JB |
1605 | CFI_DEF_CFA_OFFSET SS+8-RIP |
1606 | ||
79fb4ad6 SR |
1607 | /* Everything up to here is safe from nested NMIs */ |
1608 | ||
62610913 JB |
1609 | /* |
1610 | * If there was a nested NMI, the first NMI's iret will return | |
1611 | * here. But NMIs are still enabled and we can take another | |
1612 | * nested NMI. The nested NMI checks the interrupted RIP to see | |
1613 | * if it is between repeat_nmi and end_repeat_nmi, and if so | |
1614 | * it will just return, as we are about to repeat an NMI anyway. | |
1615 | * This makes it safe to copy to the stack frame that a nested | |
1616 | * NMI will update. | |
1617 | */ | |
1618 | repeat_nmi: | |
1619 | /* | |
1620 | * Update the stack variable to say we are still in NMI (the update | |
1621 | * is benign for the non-repeat case, where 1 was pushed just above | |
1622 | * to this very stack slot). | |
1623 | */ | |
28696f43 | 1624 | movq $1, 10*8(%rsp) |
3f3c8b8c SR |
1625 | |
1626 | /* Make another copy, this one may be modified by nested NMIs */ | |
28696f43 SQ |
1627 | addq $(10*8), %rsp |
1628 | CFI_ADJUST_CFA_OFFSET -10*8 | |
3f3c8b8c | 1629 | .rept 5 |
28696f43 | 1630 | pushq_cfi -6*8(%rsp) |
3f3c8b8c | 1631 | .endr |
28696f43 | 1632 | subq $(5*8), %rsp |
62610913 JB |
1633 | CFI_DEF_CFA_OFFSET SS+8-RIP |
1634 | end_repeat_nmi: | |
3f3c8b8c SR |
1635 | |
1636 | /* | |
1637 | * Everything below this point can be preempted by a nested | |
79fb4ad6 SR |
1638 | * NMI if the first NMI took an exception and reset our iret stack |
1639 | * so that we repeat another NMI. | |
3f3c8b8c | 1640 | */ |
1fd466ef | 1641 | pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */ |
b1cccb1b JB |
1642 | subq $ORIG_RAX-R15, %rsp |
1643 | CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15 | |
1fd466ef SR |
1644 | /* |
1645 | * Use save_paranoid to handle SWAPGS, but no need to use paranoid_exit | |
1646 | * as we should not be calling schedule in NMI context. | |
1647 | * Even with normal interrupts enabled. An NMI should not be | |
1648 | * setting NEED_RESCHED or anything that normal interrupts and | |
1649 | * exceptions might do. | |
1650 | */ | |
ddeb8f21 AH |
1651 | call save_paranoid |
1652 | DEFAULT_FRAME 0 | |
7fbb98c5 SR |
1653 | |
1654 | /* | |
1655 | * Save off the CR2 register. If we take a page fault in the NMI then | |
1656 | * it could corrupt the CR2 value. If the NMI preempts a page fault | |
1657 | * handler before it was able to read the CR2 register, and then the | |
1658 | * NMI itself takes a page fault, the page fault that was preempted | |
1659 | * will read the information from the NMI page fault and not the | |
1660 | * origin fault. Save it off and restore it if it changes. | |
1661 | * Use the r12 callee-saved register. | |
1662 | */ | |
1663 | movq %cr2, %r12 | |
1664 | ||
ddeb8f21 AH |
1665 | /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */ |
1666 | movq %rsp,%rdi | |
1667 | movq $-1,%rsi | |
1668 | call do_nmi | |
7fbb98c5 SR |
1669 | |
1670 | /* Did the NMI take a page fault? Restore cr2 if it did */ | |
1671 | movq %cr2, %rcx | |
1672 | cmpq %rcx, %r12 | |
1673 | je 1f | |
1674 | movq %r12, %cr2 | |
1675 | 1: | |
1676 | ||
ddeb8f21 AH |
1677 | testl %ebx,%ebx /* swapgs needed? */ |
1678 | jnz nmi_restore | |
ddeb8f21 AH |
1679 | nmi_swapgs: |
1680 | SWAPGS_UNSAFE_STACK | |
1681 | nmi_restore: | |
444723dc JB |
1682 | /* Pop the extra iret frame at once */ |
1683 | RESTORE_ALL 6*8 | |
28696f43 | 1684 | |
3f3c8b8c | 1685 | /* Clear the NMI executing stack variable */ |
28696f43 | 1686 | movq $0, 5*8(%rsp) |
ddeb8f21 | 1687 | jmp irq_return |
9f1e87ea | 1688 | CFI_ENDPROC |
ddeb8f21 AH |
1689 | END(nmi) |
1690 | ||
1691 | ENTRY(ignore_sysret) | |
1692 | CFI_STARTPROC | |
1693 | mov $-ENOSYS,%eax | |
1694 | sysret | |
1695 | CFI_ENDPROC | |
1696 | END(ignore_sysret) | |
1697 |