Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * linux/arch/x86_64/entry.S | |
3 | * | |
4 | * Copyright (C) 1991, 1992 Linus Torvalds | |
5 | * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs | |
6 | * Copyright (C) 2000 Pavel Machek <pavel@suse.cz> | |
1da177e4 LT |
7 | */ |
8 | ||
9 | /* | |
10 | * entry.S contains the system-call and fault low-level handling routines. | |
11 | * | |
8b4777a4 AL |
12 | * Some of this is documented in Documentation/x86/entry_64.txt |
13 | * | |
1da177e4 LT |
14 | * NOTE: This code handles signal-recognition, which happens every time |
15 | * after an interrupt and after each system call. | |
0bd7b798 AH |
16 | * |
17 | * Normal syscalls and interrupts don't save a full stack frame, this is | |
1da177e4 | 18 | * only done for syscall tracing, signals or fork/exec et.al. |
0bd7b798 AH |
19 | * |
20 | * A note on terminology: | |
21 | * - top of stack: Architecture defined interrupt frame from SS to RIP | |
22 | * at the top of the kernel process stack. | |
0d2eb44f | 23 | * - partial stack frame: partially saved registers up to R11. |
0bd7b798 | 24 | * - full stack frame: Like partial stack frame, but all register saved. |
2e91a17b AK |
25 | * |
26 | * Some macro usage: | |
27 | * - CFI macros are used to generate dwarf2 unwind information for better | |
28 | * backtraces. They don't change any code. | |
29 | * - SAVE_ALL/RESTORE_ALL - Save/restore all registers | |
30 | * - SAVE_ARGS/RESTORE_ARGS - Save/restore registers that C functions modify. | |
31 | * There are unfortunately lots of special cases where some registers | |
32 | * not touched. The macro is a big mess that should be cleaned up. | |
33 | * - SAVE_REST/RESTORE_REST - Handle the registers not saved by SAVE_ARGS. | |
34 | * Gives a full stack frame. | |
35 | * - ENTRY/END Define functions in the symbol table. | |
36 | * - FIXUP_TOP_OF_STACK/RESTORE_TOP_OF_STACK - Fix up the hardware stack | |
37 | * frame that is otherwise undefined after a SYSCALL | |
38 | * - TRACE_IRQ_* - Trace hard interrupt state for lock debugging. | |
cb5dd2c5 | 39 | * - idtentry - Define exception entry points. |
1da177e4 LT |
40 | */ |
41 | ||
1da177e4 LT |
42 | #include <linux/linkage.h> |
43 | #include <asm/segment.h> | |
1da177e4 LT |
44 | #include <asm/cache.h> |
45 | #include <asm/errno.h> | |
46 | #include <asm/dwarf2.h> | |
47 | #include <asm/calling.h> | |
e2d5df93 | 48 | #include <asm/asm-offsets.h> |
1da177e4 LT |
49 | #include <asm/msr.h> |
50 | #include <asm/unistd.h> | |
51 | #include <asm/thread_info.h> | |
52 | #include <asm/hw_irq.h> | |
0341c14d | 53 | #include <asm/page_types.h> |
2601e64d | 54 | #include <asm/irqflags.h> |
72fe4858 | 55 | #include <asm/paravirt.h> |
9939ddaf | 56 | #include <asm/percpu.h> |
d7abc0fa | 57 | #include <asm/asm.h> |
91d1aa43 | 58 | #include <asm/context_tracking.h> |
63bcff2a | 59 | #include <asm/smap.h> |
3891a04a | 60 | #include <asm/pgtable_types.h> |
d7e7528b | 61 | #include <linux/err.h> |
1da177e4 | 62 | |
86a1c34a RM |
63 | /* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this. */ |
64 | #include <linux/elf-em.h> | |
65 | #define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE) | |
66 | #define __AUDIT_ARCH_64BIT 0x80000000 | |
67 | #define __AUDIT_ARCH_LE 0x40000000 | |
68 | ||
1da177e4 | 69 | .code64 |
ea714547 JO |
70 | .section .entry.text, "ax" |
71 | ||
16444a8a | 72 | |
dc37db4d | 73 | #ifndef CONFIG_PREEMPT |
1da177e4 | 74 | #define retint_kernel retint_restore_args |
0bd7b798 | 75 | #endif |
2601e64d | 76 | |
72fe4858 | 77 | #ifdef CONFIG_PARAVIRT |
2be29982 | 78 | ENTRY(native_usergs_sysret64) |
72fe4858 GOC |
79 | swapgs |
80 | sysretq | |
b3baaa13 | 81 | ENDPROC(native_usergs_sysret64) |
72fe4858 GOC |
82 | #endif /* CONFIG_PARAVIRT */ |
83 | ||
2601e64d IM |
84 | |
85 | .macro TRACE_IRQS_IRETQ offset=ARGOFFSET | |
86 | #ifdef CONFIG_TRACE_IRQFLAGS | |
87 | bt $9,EFLAGS-\offset(%rsp) /* interrupts off? */ | |
88 | jnc 1f | |
89 | TRACE_IRQS_ON | |
90 | 1: | |
91 | #endif | |
92 | .endm | |
93 | ||
5963e317 SR |
94 | /* |
95 | * When dynamic function tracer is enabled it will add a breakpoint | |
96 | * to all locations that it is about to modify, sync CPUs, update | |
97 | * all the code, sync CPUs, then remove the breakpoints. In this time | |
98 | * if lockdep is enabled, it might jump back into the debug handler | |
99 | * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF). | |
100 | * | |
101 | * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to | |
102 | * make sure the stack pointer does not get reset back to the top | |
103 | * of the debug stack, and instead just reuses the current stack. | |
104 | */ | |
105 | #if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS) | |
106 | ||
107 | .macro TRACE_IRQS_OFF_DEBUG | |
108 | call debug_stack_set_zero | |
109 | TRACE_IRQS_OFF | |
110 | call debug_stack_reset | |
111 | .endm | |
112 | ||
113 | .macro TRACE_IRQS_ON_DEBUG | |
114 | call debug_stack_set_zero | |
115 | TRACE_IRQS_ON | |
116 | call debug_stack_reset | |
117 | .endm | |
118 | ||
119 | .macro TRACE_IRQS_IRETQ_DEBUG offset=ARGOFFSET | |
120 | bt $9,EFLAGS-\offset(%rsp) /* interrupts off? */ | |
121 | jnc 1f | |
122 | TRACE_IRQS_ON_DEBUG | |
123 | 1: | |
124 | .endm | |
125 | ||
126 | #else | |
127 | # define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF | |
128 | # define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON | |
129 | # define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ | |
130 | #endif | |
131 | ||
1da177e4 | 132 | /* |
0bd7b798 AH |
133 | * C code is not supposed to know about undefined top of stack. Every time |
134 | * a C function with an pt_regs argument is called from the SYSCALL based | |
1da177e4 LT |
135 | * fast path FIXUP_TOP_OF_STACK is needed. |
136 | * RESTORE_TOP_OF_STACK syncs the syscall state after any possible ptregs | |
137 | * manipulation. | |
0bd7b798 AH |
138 | */ |
139 | ||
140 | /* %rsp:at FRAMEEND */ | |
c002a1e6 | 141 | .macro FIXUP_TOP_OF_STACK tmp offset=0 |
3d1e42a7 | 142 | movq PER_CPU_VAR(old_rsp),\tmp |
c002a1e6 AH |
143 | movq \tmp,RSP+\offset(%rsp) |
144 | movq $__USER_DS,SS+\offset(%rsp) | |
145 | movq $__USER_CS,CS+\offset(%rsp) | |
0fcedc86 AL |
146 | movq RIP+\offset(%rsp),\tmp /* get rip */ |
147 | movq \tmp,RCX+\offset(%rsp) /* copy it to rcx as sysret would do */ | |
c002a1e6 AH |
148 | movq R11+\offset(%rsp),\tmp /* get eflags */ |
149 | movq \tmp,EFLAGS+\offset(%rsp) | |
1da177e4 LT |
150 | .endm |
151 | ||
c002a1e6 AH |
152 | .macro RESTORE_TOP_OF_STACK tmp offset=0 |
153 | movq RSP+\offset(%rsp),\tmp | |
3d1e42a7 | 154 | movq \tmp,PER_CPU_VAR(old_rsp) |
c002a1e6 AH |
155 | movq EFLAGS+\offset(%rsp),\tmp |
156 | movq \tmp,R11+\offset(%rsp) | |
1da177e4 LT |
157 | .endm |
158 | ||
dcd072e2 AH |
159 | /* |
160 | * initial frame state for interrupts (and exceptions without error code) | |
161 | */ | |
162 | .macro EMPTY_FRAME start=1 offset=0 | |
7effaa88 | 163 | .if \start |
dcd072e2 | 164 | CFI_STARTPROC simple |
adf14236 | 165 | CFI_SIGNAL_FRAME |
dcd072e2 | 166 | CFI_DEF_CFA rsp,8+\offset |
7effaa88 | 167 | .else |
dcd072e2 | 168 | CFI_DEF_CFA_OFFSET 8+\offset |
7effaa88 | 169 | .endif |
1da177e4 | 170 | .endm |
d99015b1 AH |
171 | |
172 | /* | |
dcd072e2 | 173 | * initial frame state for interrupts (and exceptions without error code) |
d99015b1 | 174 | */ |
dcd072e2 | 175 | .macro INTR_FRAME start=1 offset=0 |
e8a0e276 IM |
176 | EMPTY_FRAME \start, SS+8+\offset-RIP |
177 | /*CFI_REL_OFFSET ss, SS+\offset-RIP*/ | |
178 | CFI_REL_OFFSET rsp, RSP+\offset-RIP | |
179 | /*CFI_REL_OFFSET rflags, EFLAGS+\offset-RIP*/ | |
180 | /*CFI_REL_OFFSET cs, CS+\offset-RIP*/ | |
181 | CFI_REL_OFFSET rip, RIP+\offset-RIP | |
d99015b1 AH |
182 | .endm |
183 | ||
d99015b1 AH |
184 | /* |
185 | * initial frame state for exceptions with error code (and interrupts | |
186 | * with vector already pushed) | |
187 | */ | |
dcd072e2 | 188 | .macro XCPT_FRAME start=1 offset=0 |
e8a0e276 | 189 | INTR_FRAME \start, RIP+\offset-ORIG_RAX |
dcd072e2 AH |
190 | .endm |
191 | ||
192 | /* | |
193 | * frame that enables calling into C. | |
194 | */ | |
195 | .macro PARTIAL_FRAME start=1 offset=0 | |
e8a0e276 IM |
196 | XCPT_FRAME \start, ORIG_RAX+\offset-ARGOFFSET |
197 | CFI_REL_OFFSET rdi, RDI+\offset-ARGOFFSET | |
198 | CFI_REL_OFFSET rsi, RSI+\offset-ARGOFFSET | |
199 | CFI_REL_OFFSET rdx, RDX+\offset-ARGOFFSET | |
200 | CFI_REL_OFFSET rcx, RCX+\offset-ARGOFFSET | |
201 | CFI_REL_OFFSET rax, RAX+\offset-ARGOFFSET | |
202 | CFI_REL_OFFSET r8, R8+\offset-ARGOFFSET | |
203 | CFI_REL_OFFSET r9, R9+\offset-ARGOFFSET | |
204 | CFI_REL_OFFSET r10, R10+\offset-ARGOFFSET | |
205 | CFI_REL_OFFSET r11, R11+\offset-ARGOFFSET | |
dcd072e2 AH |
206 | .endm |
207 | ||
208 | /* | |
209 | * frame that enables passing a complete pt_regs to a C function. | |
210 | */ | |
211 | .macro DEFAULT_FRAME start=1 offset=0 | |
e8a0e276 | 212 | PARTIAL_FRAME \start, R11+\offset-R15 |
dcd072e2 AH |
213 | CFI_REL_OFFSET rbx, RBX+\offset |
214 | CFI_REL_OFFSET rbp, RBP+\offset | |
215 | CFI_REL_OFFSET r12, R12+\offset | |
216 | CFI_REL_OFFSET r13, R13+\offset | |
217 | CFI_REL_OFFSET r14, R14+\offset | |
218 | CFI_REL_OFFSET r15, R15+\offset | |
219 | .endm | |
d99015b1 | 220 | |
e2f6bc25 AH |
221 | ENTRY(save_paranoid) |
222 | XCPT_FRAME 1 RDI+8 | |
223 | cld | |
3bab13b0 JB |
224 | movq %rdi, RDI+8(%rsp) |
225 | movq %rsi, RSI+8(%rsp) | |
e2f6bc25 AH |
226 | movq_cfi rdx, RDX+8 |
227 | movq_cfi rcx, RCX+8 | |
228 | movq_cfi rax, RAX+8 | |
3bab13b0 JB |
229 | movq %r8, R8+8(%rsp) |
230 | movq %r9, R9+8(%rsp) | |
231 | movq %r10, R10+8(%rsp) | |
232 | movq %r11, R11+8(%rsp) | |
e2f6bc25 | 233 | movq_cfi rbx, RBX+8 |
3bab13b0 JB |
234 | movq %rbp, RBP+8(%rsp) |
235 | movq %r12, R12+8(%rsp) | |
236 | movq %r13, R13+8(%rsp) | |
237 | movq %r14, R14+8(%rsp) | |
238 | movq %r15, R15+8(%rsp) | |
e2f6bc25 AH |
239 | movl $1,%ebx |
240 | movl $MSR_GS_BASE,%ecx | |
241 | rdmsr | |
242 | testl %edx,%edx | |
243 | js 1f /* negative -> in kernel */ | |
244 | SWAPGS | |
245 | xorl %ebx,%ebx | |
246 | 1: ret | |
247 | CFI_ENDPROC | |
248 | END(save_paranoid) | |
249 | ||
1da177e4 | 250 | /* |
5b3eec0c IM |
251 | * A newly forked process directly context switches into this address. |
252 | * | |
253 | * rdi: prev task we switched from | |
0bd7b798 | 254 | */ |
1da177e4 | 255 | ENTRY(ret_from_fork) |
dcd072e2 | 256 | DEFAULT_FRAME |
5b3eec0c | 257 | |
7106a5ab BL |
258 | LOCK ; btr $TIF_FORK,TI_flags(%r8) |
259 | ||
6eebdda3 | 260 | pushq_cfi $0x0002 |
df5d1874 | 261 | popfq_cfi # reset kernel eflags |
5b3eec0c IM |
262 | |
263 | call schedule_tail # rdi: 'prev' task parameter | |
264 | ||
1da177e4 | 265 | GET_THREAD_INFO(%rcx) |
5b3eec0c | 266 | |
1da177e4 | 267 | RESTORE_REST |
5b3eec0c IM |
268 | |
269 | testl $3, CS-ARGOFFSET(%rsp) # from kernel_thread? | |
7076aada | 270 | jz 1f |
5b3eec0c IM |
271 | |
272 | testl $_TIF_IA32, TI_flags(%rcx) # 32-bit compat task needs IRET | |
1da177e4 | 273 | jnz int_ret_from_sys_call |
5b3eec0c | 274 | |
c002a1e6 | 275 | RESTORE_TOP_OF_STACK %rdi, -ARGOFFSET |
5b3eec0c IM |
276 | jmp ret_from_sys_call # go to the SYSRET fastpath |
277 | ||
7076aada | 278 | 1: |
22e2430d | 279 | subq $REST_SKIP, %rsp # leave space for volatiles |
7076aada AV |
280 | CFI_ADJUST_CFA_OFFSET REST_SKIP |
281 | movq %rbp, %rdi | |
282 | call *%rbx | |
22e2430d AV |
283 | movl $0, RAX(%rsp) |
284 | RESTORE_REST | |
285 | jmp int_ret_from_sys_call | |
1da177e4 | 286 | CFI_ENDPROC |
4b787e0b | 287 | END(ret_from_fork) |
1da177e4 LT |
288 | |
289 | /* | |
0d2eb44f | 290 | * System call entry. Up to 6 arguments in registers are supported. |
1da177e4 LT |
291 | * |
292 | * SYSCALL does not save anything on the stack and does not change the | |
63bcff2a PA |
293 | * stack pointer. However, it does mask the flags register for us, so |
294 | * CLD and CLAC are not needed. | |
1da177e4 | 295 | */ |
0bd7b798 | 296 | |
1da177e4 | 297 | /* |
0bd7b798 | 298 | * Register setup: |
1da177e4 LT |
299 | * rax system call number |
300 | * rdi arg0 | |
0bd7b798 | 301 | * rcx return address for syscall/sysret, C arg3 |
1da177e4 | 302 | * rsi arg1 |
0bd7b798 | 303 | * rdx arg2 |
1da177e4 LT |
304 | * r10 arg3 (--> moved to rcx for C) |
305 | * r8 arg4 | |
306 | * r9 arg5 | |
307 | * r11 eflags for syscall/sysret, temporary for C | |
0bd7b798 AH |
308 | * r12-r15,rbp,rbx saved by C code, not touched. |
309 | * | |
1da177e4 LT |
310 | * Interrupts are off on entry. |
311 | * Only called from user space. | |
312 | * | |
313 | * XXX if we had a free scratch register we could save the RSP into the stack frame | |
314 | * and report it properly in ps. Unfortunately we haven't. | |
7bf36bbc AK |
315 | * |
316 | * When user can change the frames always force IRET. That is because | |
317 | * it deals with uncanonical addresses better. SYSRET has trouble | |
318 | * with them due to bugs in both AMD and Intel CPUs. | |
0bd7b798 | 319 | */ |
1da177e4 LT |
320 | |
321 | ENTRY(system_call) | |
7effaa88 | 322 | CFI_STARTPROC simple |
adf14236 | 323 | CFI_SIGNAL_FRAME |
9af45651 | 324 | CFI_DEF_CFA rsp,KERNEL_STACK_OFFSET |
7effaa88 JB |
325 | CFI_REGISTER rip,rcx |
326 | /*CFI_REGISTER rflags,r11*/ | |
72fe4858 GOC |
327 | SWAPGS_UNSAFE_STACK |
328 | /* | |
329 | * A hypervisor implementation might want to use a label | |
330 | * after the swapgs, so that it can do the swapgs | |
331 | * for the guest and jump here on syscall. | |
332 | */ | |
f6b2bc84 | 333 | GLOBAL(system_call_after_swapgs) |
72fe4858 | 334 | |
3d1e42a7 | 335 | movq %rsp,PER_CPU_VAR(old_rsp) |
9af45651 | 336 | movq PER_CPU_VAR(kernel_stack),%rsp |
2601e64d IM |
337 | /* |
338 | * No need to follow this irqs off/on section - it's straight | |
339 | * and short: | |
340 | */ | |
72fe4858 | 341 | ENABLE_INTERRUPTS(CLBR_NONE) |
54eea995 AL |
342 | SAVE_ARGS 8, 0, rax_enosys=1 |
343 | movq_cfi rax,(ORIG_RAX-ARGOFFSET) | |
7effaa88 JB |
344 | movq %rcx,RIP-ARGOFFSET(%rsp) |
345 | CFI_REL_OFFSET rip,RIP-ARGOFFSET | |
46db09d3 | 346 | testl $_TIF_WORK_SYSCALL_ENTRY,TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET) |
1da177e4 | 347 | jnz tracesys |
86a1c34a | 348 | system_call_fastpath: |
fca460f9 | 349 | #if __SYSCALL_MASK == ~0 |
1da177e4 | 350 | cmpq $__NR_syscall_max,%rax |
fca460f9 PA |
351 | #else |
352 | andl $__SYSCALL_MASK,%eax | |
353 | cmpl $__NR_syscall_max,%eax | |
354 | #endif | |
54eea995 | 355 | ja ret_from_sys_call /* and return regs->ax */ |
1da177e4 LT |
356 | movq %r10,%rcx |
357 | call *sys_call_table(,%rax,8) # XXX: rip relative | |
358 | movq %rax,RAX-ARGOFFSET(%rsp) | |
359 | /* | |
360 | * Syscall return path ending with SYSRET (fast path) | |
0bd7b798 AH |
361 | * Has incomplete stack frame and undefined top of stack. |
362 | */ | |
1da177e4 | 363 | ret_from_sys_call: |
96b6352c AL |
364 | testl $_TIF_ALLWORK_MASK,TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET) |
365 | jnz int_ret_from_sys_call_fixup /* Go the the slow path */ | |
366 | ||
10cd706d | 367 | LOCKDEP_SYS_EXIT |
72fe4858 | 368 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 369 | TRACE_IRQS_OFF |
bcddc015 | 370 | CFI_REMEMBER_STATE |
2601e64d IM |
371 | /* |
372 | * sysretq will re-enable interrupts: | |
373 | */ | |
374 | TRACE_IRQS_ON | |
1da177e4 | 375 | movq RIP-ARGOFFSET(%rsp),%rcx |
7effaa88 | 376 | CFI_REGISTER rip,rcx |
838feb47 | 377 | RESTORE_ARGS 1,-ARG_SKIP,0 |
7effaa88 | 378 | /*CFI_REGISTER rflags,r11*/ |
3d1e42a7 | 379 | movq PER_CPU_VAR(old_rsp), %rsp |
2be29982 | 380 | USERGS_SYSRET64 |
1da177e4 | 381 | |
bcddc015 | 382 | CFI_RESTORE_STATE |
1da177e4 | 383 | |
96b6352c | 384 | int_ret_from_sys_call_fixup: |
b60e714d | 385 | FIXUP_TOP_OF_STACK %r11, -ARGOFFSET |
96b6352c | 386 | jmp int_ret_from_sys_call |
86a1c34a | 387 | |
1da177e4 | 388 | /* Do syscall tracing */ |
0bd7b798 | 389 | tracesys: |
1dcf74f6 AL |
390 | leaq -REST_SKIP(%rsp), %rdi |
391 | movq $AUDIT_ARCH_X86_64, %rsi | |
392 | call syscall_trace_enter_phase1 | |
393 | test %rax, %rax | |
394 | jnz tracesys_phase2 /* if needed, run the slow path */ | |
395 | LOAD_ARGS 0 /* else restore clobbered regs */ | |
396 | jmp system_call_fastpath /* and return to the fast path */ | |
397 | ||
398 | tracesys_phase2: | |
1da177e4 | 399 | SAVE_REST |
1da177e4 | 400 | FIXUP_TOP_OF_STACK %rdi |
1dcf74f6 AL |
401 | movq %rsp, %rdi |
402 | movq $AUDIT_ARCH_X86_64, %rsi | |
403 | movq %rax,%rdx | |
404 | call syscall_trace_enter_phase2 | |
405 | ||
d4d67150 RM |
406 | /* |
407 | * Reload arg registers from stack in case ptrace changed them. | |
1dcf74f6 | 408 | * We don't reload %rax because syscall_trace_entry_phase2() returned |
d4d67150 RM |
409 | * the value it wants us to use in the table lookup. |
410 | */ | |
411 | LOAD_ARGS ARGOFFSET, 1 | |
1da177e4 | 412 | RESTORE_REST |
fca460f9 | 413 | #if __SYSCALL_MASK == ~0 |
1da177e4 | 414 | cmpq $__NR_syscall_max,%rax |
fca460f9 PA |
415 | #else |
416 | andl $__SYSCALL_MASK,%eax | |
417 | cmpl $__NR_syscall_max,%eax | |
418 | #endif | |
54eea995 | 419 | ja int_ret_from_sys_call /* RAX(%rsp) is already set */ |
1da177e4 LT |
420 | movq %r10,%rcx /* fixup for C */ |
421 | call *sys_call_table(,%rax,8) | |
a31f8dd7 | 422 | movq %rax,RAX-ARGOFFSET(%rsp) |
7bf36bbc | 423 | /* Use IRET because user could have changed frame */ |
0bd7b798 AH |
424 | |
425 | /* | |
1da177e4 LT |
426 | * Syscall return path ending with IRET. |
427 | * Has correct top of stack, but partial stack frame. | |
bcddc015 | 428 | */ |
bc8b2b92 | 429 | GLOBAL(int_ret_from_sys_call) |
72fe4858 | 430 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 431 | TRACE_IRQS_OFF |
1da177e4 LT |
432 | movl $_TIF_ALLWORK_MASK,%edi |
433 | /* edi: mask to check */ | |
bc8b2b92 | 434 | GLOBAL(int_with_check) |
10cd706d | 435 | LOCKDEP_SYS_EXIT_IRQ |
1da177e4 | 436 | GET_THREAD_INFO(%rcx) |
26ccb8a7 | 437 | movl TI_flags(%rcx),%edx |
1da177e4 LT |
438 | andl %edi,%edx |
439 | jnz int_careful | |
26ccb8a7 | 440 | andl $~TS_COMPAT,TI_status(%rcx) |
1da177e4 LT |
441 | jmp retint_swapgs |
442 | ||
443 | /* Either reschedule or signal or syscall exit tracking needed. */ | |
444 | /* First do a reschedule test. */ | |
445 | /* edx: work, edi: workmask */ | |
446 | int_careful: | |
447 | bt $TIF_NEED_RESCHED,%edx | |
448 | jnc int_very_careful | |
2601e64d | 449 | TRACE_IRQS_ON |
72fe4858 | 450 | ENABLE_INTERRUPTS(CLBR_NONE) |
df5d1874 | 451 | pushq_cfi %rdi |
0430499c | 452 | SCHEDULE_USER |
df5d1874 | 453 | popq_cfi %rdi |
72fe4858 | 454 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 455 | TRACE_IRQS_OFF |
1da177e4 LT |
456 | jmp int_with_check |
457 | ||
458 | /* handle signals and tracing -- both require a full stack frame */ | |
459 | int_very_careful: | |
2601e64d | 460 | TRACE_IRQS_ON |
72fe4858 | 461 | ENABLE_INTERRUPTS(CLBR_NONE) |
b60e714d | 462 | int_check_syscall_exit_work: |
1da177e4 | 463 | SAVE_REST |
0bd7b798 | 464 | /* Check for syscall exit trace */ |
d4d67150 | 465 | testl $_TIF_WORK_SYSCALL_EXIT,%edx |
1da177e4 | 466 | jz int_signal |
df5d1874 | 467 | pushq_cfi %rdi |
0bd7b798 | 468 | leaq 8(%rsp),%rdi # &ptregs -> arg1 |
1da177e4 | 469 | call syscall_trace_leave |
df5d1874 | 470 | popq_cfi %rdi |
d4d67150 | 471 | andl $~(_TIF_WORK_SYSCALL_EXIT|_TIF_SYSCALL_EMU),%edi |
1da177e4 | 472 | jmp int_restore_rest |
0bd7b798 | 473 | |
1da177e4 | 474 | int_signal: |
8f4d37ec | 475 | testl $_TIF_DO_NOTIFY_MASK,%edx |
1da177e4 LT |
476 | jz 1f |
477 | movq %rsp,%rdi # &ptregs -> arg1 | |
478 | xorl %esi,%esi # oldset -> arg2 | |
479 | call do_notify_resume | |
eca91e78 | 480 | 1: movl $_TIF_WORK_MASK,%edi |
1da177e4 LT |
481 | int_restore_rest: |
482 | RESTORE_REST | |
72fe4858 | 483 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 484 | TRACE_IRQS_OFF |
1da177e4 LT |
485 | jmp int_with_check |
486 | CFI_ENDPROC | |
bcddc015 | 487 | END(system_call) |
0bd7b798 | 488 | |
1d4b4b29 AV |
489 | .macro FORK_LIKE func |
490 | ENTRY(stub_\func) | |
491 | CFI_STARTPROC | |
492 | popq %r11 /* save return address */ | |
493 | PARTIAL_FRAME 0 | |
494 | SAVE_REST | |
495 | pushq %r11 /* put it back on stack */ | |
496 | FIXUP_TOP_OF_STACK %r11, 8 | |
497 | DEFAULT_FRAME 0 8 /* offset 8: return address */ | |
498 | call sys_\func | |
499 | RESTORE_TOP_OF_STACK %r11, 8 | |
500 | ret $REST_SKIP /* pop extended registers */ | |
501 | CFI_ENDPROC | |
502 | END(stub_\func) | |
503 | .endm | |
504 | ||
b3af11af AV |
505 | .macro FIXED_FRAME label,func |
506 | ENTRY(\label) | |
507 | CFI_STARTPROC | |
508 | PARTIAL_FRAME 0 8 /* offset 8: return address */ | |
509 | FIXUP_TOP_OF_STACK %r11, 8-ARGOFFSET | |
510 | call \func | |
511 | RESTORE_TOP_OF_STACK %r11, 8-ARGOFFSET | |
512 | ret | |
513 | CFI_ENDPROC | |
514 | END(\label) | |
515 | .endm | |
516 | ||
1d4b4b29 AV |
517 | FORK_LIKE clone |
518 | FORK_LIKE fork | |
519 | FORK_LIKE vfork | |
b3af11af | 520 | FIXED_FRAME stub_iopl, sys_iopl |
1da177e4 | 521 | |
1da177e4 LT |
522 | ENTRY(stub_execve) |
523 | CFI_STARTPROC | |
e6b04b6b JB |
524 | addq $8, %rsp |
525 | PARTIAL_FRAME 0 | |
1da177e4 | 526 | SAVE_REST |
1da177e4 LT |
527 | FIXUP_TOP_OF_STACK %r11 |
528 | call sys_execve | |
1da177e4 LT |
529 | movq %rax,RAX(%rsp) |
530 | RESTORE_REST | |
531 | jmp int_ret_from_sys_call | |
532 | CFI_ENDPROC | |
4b787e0b | 533 | END(stub_execve) |
0bd7b798 | 534 | |
27d6ec7a DD |
535 | ENTRY(stub_execveat) |
536 | CFI_STARTPROC | |
537 | addq $8, %rsp | |
538 | PARTIAL_FRAME 0 | |
539 | SAVE_REST | |
540 | FIXUP_TOP_OF_STACK %r11 | |
541 | call sys_execveat | |
542 | RESTORE_TOP_OF_STACK %r11 | |
543 | movq %rax,RAX(%rsp) | |
544 | RESTORE_REST | |
545 | jmp int_ret_from_sys_call | |
546 | CFI_ENDPROC | |
547 | END(stub_execveat) | |
548 | ||
1da177e4 LT |
549 | /* |
550 | * sigreturn is special because it needs to restore all registers on return. | |
551 | * This cannot be done with SYSRET, so use the IRET return path instead. | |
0bd7b798 | 552 | */ |
1da177e4 LT |
553 | ENTRY(stub_rt_sigreturn) |
554 | CFI_STARTPROC | |
7effaa88 | 555 | addq $8, %rsp |
e6b04b6b | 556 | PARTIAL_FRAME 0 |
1da177e4 | 557 | SAVE_REST |
1da177e4 LT |
558 | FIXUP_TOP_OF_STACK %r11 |
559 | call sys_rt_sigreturn | |
560 | movq %rax,RAX(%rsp) # fixme, this could be done at the higher layer | |
561 | RESTORE_REST | |
562 | jmp int_ret_from_sys_call | |
563 | CFI_ENDPROC | |
4b787e0b | 564 | END(stub_rt_sigreturn) |
1da177e4 | 565 | |
c5a37394 | 566 | #ifdef CONFIG_X86_X32_ABI |
c5a37394 PA |
567 | ENTRY(stub_x32_rt_sigreturn) |
568 | CFI_STARTPROC | |
569 | addq $8, %rsp | |
570 | PARTIAL_FRAME 0 | |
571 | SAVE_REST | |
c5a37394 PA |
572 | FIXUP_TOP_OF_STACK %r11 |
573 | call sys32_x32_rt_sigreturn | |
574 | movq %rax,RAX(%rsp) # fixme, this could be done at the higher layer | |
575 | RESTORE_REST | |
576 | jmp int_ret_from_sys_call | |
577 | CFI_ENDPROC | |
578 | END(stub_x32_rt_sigreturn) | |
579 | ||
d1a797f3 PA |
580 | ENTRY(stub_x32_execve) |
581 | CFI_STARTPROC | |
582 | addq $8, %rsp | |
583 | PARTIAL_FRAME 0 | |
584 | SAVE_REST | |
585 | FIXUP_TOP_OF_STACK %r11 | |
6783eaa2 | 586 | call compat_sys_execve |
d1a797f3 PA |
587 | RESTORE_TOP_OF_STACK %r11 |
588 | movq %rax,RAX(%rsp) | |
589 | RESTORE_REST | |
590 | jmp int_ret_from_sys_call | |
591 | CFI_ENDPROC | |
592 | END(stub_x32_execve) | |
593 | ||
27d6ec7a DD |
594 | ENTRY(stub_x32_execveat) |
595 | CFI_STARTPROC | |
596 | addq $8, %rsp | |
597 | PARTIAL_FRAME 0 | |
598 | SAVE_REST | |
599 | FIXUP_TOP_OF_STACK %r11 | |
600 | call compat_sys_execveat | |
601 | RESTORE_TOP_OF_STACK %r11 | |
602 | movq %rax,RAX(%rsp) | |
603 | RESTORE_REST | |
604 | jmp int_ret_from_sys_call | |
605 | CFI_ENDPROC | |
606 | END(stub_x32_execveat) | |
607 | ||
c5a37394 PA |
608 | #endif |
609 | ||
939b7871 PA |
610 | /* |
611 | * Build the entry stubs and pointer table with some assembler magic. | |
612 | * We pack 7 stubs into a single 32-byte chunk, which will fit in a | |
613 | * single cache line on all modern x86 implementations. | |
614 | */ | |
615 | .section .init.rodata,"a" | |
616 | ENTRY(interrupt) | |
ea714547 | 617 | .section .entry.text |
939b7871 PA |
618 | .p2align 5 |
619 | .p2align CONFIG_X86_L1_CACHE_SHIFT | |
620 | ENTRY(irq_entries_start) | |
621 | INTR_FRAME | |
622 | vector=FIRST_EXTERNAL_VECTOR | |
2414e021 | 623 | .rept (FIRST_SYSTEM_VECTOR-FIRST_EXTERNAL_VECTOR+6)/7 |
939b7871 PA |
624 | .balign 32 |
625 | .rept 7 | |
2414e021 | 626 | .if vector < FIRST_SYSTEM_VECTOR |
8665596e | 627 | .if vector <> FIRST_EXTERNAL_VECTOR |
939b7871 PA |
628 | CFI_ADJUST_CFA_OFFSET -8 |
629 | .endif | |
df5d1874 | 630 | 1: pushq_cfi $(~vector+0x80) /* Note: always in signed byte range */ |
8665596e | 631 | .if ((vector-FIRST_EXTERNAL_VECTOR)%7) <> 6 |
939b7871 PA |
632 | jmp 2f |
633 | .endif | |
634 | .previous | |
635 | .quad 1b | |
ea714547 | 636 | .section .entry.text |
939b7871 PA |
637 | vector=vector+1 |
638 | .endif | |
639 | .endr | |
640 | 2: jmp common_interrupt | |
641 | .endr | |
642 | CFI_ENDPROC | |
643 | END(irq_entries_start) | |
644 | ||
645 | .previous | |
646 | END(interrupt) | |
647 | .previous | |
648 | ||
d99015b1 | 649 | /* |
1da177e4 LT |
650 | * Interrupt entry/exit. |
651 | * | |
652 | * Interrupt entry points save only callee clobbered registers in fast path. | |
d99015b1 AH |
653 | * |
654 | * Entry runs with interrupts off. | |
655 | */ | |
1da177e4 | 656 | |
722024db | 657 | /* 0(%rsp): ~(interrupt number) */ |
1da177e4 | 658 | .macro interrupt func |
625dbc3b FW |
659 | /* reserve pt_regs for scratch regs and rbp */ |
660 | subq $ORIG_RAX-RBP, %rsp | |
661 | CFI_ADJUST_CFA_OFFSET ORIG_RAX-RBP | |
f6f64681 DV |
662 | cld |
663 | /* start from rbp in pt_regs and jump over */ | |
664 | movq_cfi rdi, (RDI-RBP) | |
665 | movq_cfi rsi, (RSI-RBP) | |
666 | movq_cfi rdx, (RDX-RBP) | |
667 | movq_cfi rcx, (RCX-RBP) | |
668 | movq_cfi rax, (RAX-RBP) | |
669 | movq_cfi r8, (R8-RBP) | |
670 | movq_cfi r9, (R9-RBP) | |
671 | movq_cfi r10, (R10-RBP) | |
672 | movq_cfi r11, (R11-RBP) | |
673 | ||
674 | /* Save rbp so that we can unwind from get_irq_regs() */ | |
675 | movq_cfi rbp, 0 | |
676 | ||
677 | /* Save previous stack value */ | |
678 | movq %rsp, %rsi | |
679 | ||
680 | leaq -RBP(%rsp),%rdi /* arg1 for handler */ | |
681 | testl $3, CS-RBP(%rsi) | |
682 | je 1f | |
683 | SWAPGS | |
684 | /* | |
685 | * irq_count is used to check if a CPU is already on an interrupt stack | |
686 | * or not. While this is essentially redundant with preempt_count it is | |
687 | * a little cheaper to use a separate counter in the PDA (short of | |
688 | * moving irq_enter into assembly, which would be too much work) | |
689 | */ | |
690 | 1: incl PER_CPU_VAR(irq_count) | |
691 | cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp | |
692 | CFI_DEF_CFA_REGISTER rsi | |
693 | ||
694 | /* Store previous stack value */ | |
695 | pushq %rsi | |
696 | CFI_ESCAPE 0x0f /* DW_CFA_def_cfa_expression */, 6, \ | |
697 | 0x77 /* DW_OP_breg7 */, 0, \ | |
698 | 0x06 /* DW_OP_deref */, \ | |
699 | 0x08 /* DW_OP_const1u */, SS+8-RBP, \ | |
700 | 0x22 /* DW_OP_plus */ | |
701 | /* We entered an interrupt context - irqs are off: */ | |
702 | TRACE_IRQS_OFF | |
703 | ||
1da177e4 LT |
704 | call \func |
705 | .endm | |
706 | ||
722024db AH |
707 | /* |
708 | * The interrupt stubs push (~vector+0x80) onto the stack and | |
709 | * then jump to common_interrupt. | |
710 | */ | |
939b7871 PA |
711 | .p2align CONFIG_X86_L1_CACHE_SHIFT |
712 | common_interrupt: | |
7effaa88 | 713 | XCPT_FRAME |
ee4eb87b | 714 | ASM_CLAC |
722024db | 715 | addq $-0x80,(%rsp) /* Adjust vector to [-256,-1] range */ |
1da177e4 | 716 | interrupt do_IRQ |
3d1e42a7 | 717 | /* 0(%rsp): old_rsp-ARGOFFSET */ |
7effaa88 | 718 | ret_from_intr: |
72fe4858 | 719 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 720 | TRACE_IRQS_OFF |
56895530 | 721 | decl PER_CPU_VAR(irq_count) |
625dbc3b | 722 | |
a2bbe750 FW |
723 | /* Restore saved previous stack */ |
724 | popq %rsi | |
928282e4 | 725 | CFI_DEF_CFA rsi,SS+8-RBP /* reg/off reset after def_cfa_expr */ |
eab9e613 | 726 | leaq ARGOFFSET-RBP(%rsi), %rsp |
7effaa88 | 727 | CFI_DEF_CFA_REGISTER rsp |
eab9e613 | 728 | CFI_ADJUST_CFA_OFFSET RBP-ARGOFFSET |
625dbc3b | 729 | |
7effaa88 | 730 | exit_intr: |
1da177e4 LT |
731 | GET_THREAD_INFO(%rcx) |
732 | testl $3,CS-ARGOFFSET(%rsp) | |
733 | je retint_kernel | |
0bd7b798 | 734 | |
1da177e4 LT |
735 | /* Interrupt came from user space */ |
736 | /* | |
737 | * Has a correct top of stack, but a partial stack frame | |
738 | * %rcx: thread info. Interrupts off. | |
0bd7b798 | 739 | */ |
1da177e4 LT |
740 | retint_with_reschedule: |
741 | movl $_TIF_WORK_MASK,%edi | |
7effaa88 | 742 | retint_check: |
10cd706d | 743 | LOCKDEP_SYS_EXIT_IRQ |
26ccb8a7 | 744 | movl TI_flags(%rcx),%edx |
1da177e4 | 745 | andl %edi,%edx |
7effaa88 | 746 | CFI_REMEMBER_STATE |
1da177e4 | 747 | jnz retint_careful |
10cd706d PZ |
748 | |
749 | retint_swapgs: /* return to user-space */ | |
2601e64d IM |
750 | /* |
751 | * The iretq could re-enable interrupts: | |
752 | */ | |
72fe4858 | 753 | DISABLE_INTERRUPTS(CLBR_ANY) |
2601e64d | 754 | TRACE_IRQS_IRETQ |
2a23c6b8 AL |
755 | |
756 | /* | |
757 | * Try to use SYSRET instead of IRET if we're returning to | |
758 | * a completely clean 64-bit userspace context. | |
759 | */ | |
760 | movq (RCX-R11)(%rsp), %rcx | |
761 | cmpq %rcx,(RIP-R11)(%rsp) /* RCX == RIP */ | |
762 | jne opportunistic_sysret_failed | |
763 | ||
764 | /* | |
765 | * On Intel CPUs, sysret with non-canonical RCX/RIP will #GP | |
766 | * in kernel space. This essentially lets the user take over | |
767 | * the kernel, since userspace controls RSP. It's not worth | |
768 | * testing for canonicalness exactly -- this check detects any | |
769 | * of the 17 high bits set, which is true for non-canonical | |
770 | * or kernel addresses. (This will pessimize vsyscall=native. | |
771 | * Big deal.) | |
772 | * | |
773 | * If virtual addresses ever become wider, this will need | |
774 | * to be updated to remain correct on both old and new CPUs. | |
775 | */ | |
776 | .ifne __VIRTUAL_MASK_SHIFT - 47 | |
777 | .error "virtual address width changed -- sysret checks need update" | |
778 | .endif | |
779 | shr $__VIRTUAL_MASK_SHIFT, %rcx | |
780 | jnz opportunistic_sysret_failed | |
781 | ||
782 | cmpq $__USER_CS,(CS-R11)(%rsp) /* CS must match SYSRET */ | |
783 | jne opportunistic_sysret_failed | |
784 | ||
785 | movq (R11-ARGOFFSET)(%rsp), %r11 | |
786 | cmpq %r11,(EFLAGS-ARGOFFSET)(%rsp) /* R11 == RFLAGS */ | |
787 | jne opportunistic_sysret_failed | |
788 | ||
789 | testq $X86_EFLAGS_RF,%r11 /* sysret can't restore RF */ | |
790 | jnz opportunistic_sysret_failed | |
791 | ||
792 | /* nothing to check for RSP */ | |
793 | ||
794 | cmpq $__USER_DS,(SS-ARGOFFSET)(%rsp) /* SS must match SYSRET */ | |
795 | jne opportunistic_sysret_failed | |
796 | ||
797 | /* | |
798 | * We win! This label is here just for ease of understanding | |
799 | * perf profiles. Nothing jumps here. | |
800 | */ | |
801 | irq_return_via_sysret: | |
802 | CFI_REMEMBER_STATE | |
803 | RESTORE_ARGS 1,8,1 | |
804 | movq (RSP-RIP)(%rsp),%rsp | |
805 | USERGS_SYSRET64 | |
806 | CFI_RESTORE_STATE | |
807 | ||
808 | opportunistic_sysret_failed: | |
72fe4858 | 809 | SWAPGS |
2601e64d IM |
810 | jmp restore_args |
811 | ||
10cd706d | 812 | retint_restore_args: /* return to kernel space */ |
72fe4858 | 813 | DISABLE_INTERRUPTS(CLBR_ANY) |
2601e64d IM |
814 | /* |
815 | * The iretq could re-enable interrupts: | |
816 | */ | |
817 | TRACE_IRQS_IRETQ | |
818 | restore_args: | |
838feb47 | 819 | RESTORE_ARGS 1,8,1 |
3701d863 | 820 | |
f7f3d791 | 821 | irq_return: |
7209a75d AL |
822 | INTERRUPT_RETURN |
823 | ||
824 | ENTRY(native_iret) | |
3891a04a PA |
825 | /* |
826 | * Are we returning to a stack segment from the LDT? Note: in | |
827 | * 64-bit mode SS:RSP on the exception stack is always valid. | |
828 | */ | |
34273f41 | 829 | #ifdef CONFIG_X86_ESPFIX64 |
3891a04a | 830 | testb $4,(SS-RIP)(%rsp) |
7209a75d | 831 | jnz native_irq_return_ldt |
34273f41 | 832 | #endif |
3891a04a | 833 | |
af726f21 | 834 | .global native_irq_return_iret |
7209a75d | 835 | native_irq_return_iret: |
b645af2d AL |
836 | /* |
837 | * This may fault. Non-paranoid faults on return to userspace are | |
838 | * handled by fixup_bad_iret. These include #SS, #GP, and #NP. | |
839 | * Double-faults due to espfix64 are handled in do_double_fault. | |
840 | * Other faults here are fatal. | |
841 | */ | |
1da177e4 | 842 | iretq |
3701d863 | 843 | |
34273f41 | 844 | #ifdef CONFIG_X86_ESPFIX64 |
7209a75d | 845 | native_irq_return_ldt: |
3891a04a PA |
846 | pushq_cfi %rax |
847 | pushq_cfi %rdi | |
848 | SWAPGS | |
849 | movq PER_CPU_VAR(espfix_waddr),%rdi | |
850 | movq %rax,(0*8)(%rdi) /* RAX */ | |
851 | movq (2*8)(%rsp),%rax /* RIP */ | |
852 | movq %rax,(1*8)(%rdi) | |
853 | movq (3*8)(%rsp),%rax /* CS */ | |
854 | movq %rax,(2*8)(%rdi) | |
855 | movq (4*8)(%rsp),%rax /* RFLAGS */ | |
856 | movq %rax,(3*8)(%rdi) | |
857 | movq (6*8)(%rsp),%rax /* SS */ | |
858 | movq %rax,(5*8)(%rdi) | |
859 | movq (5*8)(%rsp),%rax /* RSP */ | |
860 | movq %rax,(4*8)(%rdi) | |
861 | andl $0xffff0000,%eax | |
862 | popq_cfi %rdi | |
863 | orq PER_CPU_VAR(espfix_stack),%rax | |
864 | SWAPGS | |
865 | movq %rax,%rsp | |
866 | popq_cfi %rax | |
7209a75d | 867 | jmp native_irq_return_iret |
34273f41 | 868 | #endif |
3891a04a | 869 | |
7effaa88 | 870 | /* edi: workmask, edx: work */ |
1da177e4 | 871 | retint_careful: |
7effaa88 | 872 | CFI_RESTORE_STATE |
1da177e4 LT |
873 | bt $TIF_NEED_RESCHED,%edx |
874 | jnc retint_signal | |
2601e64d | 875 | TRACE_IRQS_ON |
72fe4858 | 876 | ENABLE_INTERRUPTS(CLBR_NONE) |
df5d1874 | 877 | pushq_cfi %rdi |
0430499c | 878 | SCHEDULE_USER |
df5d1874 | 879 | popq_cfi %rdi |
1da177e4 | 880 | GET_THREAD_INFO(%rcx) |
72fe4858 | 881 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 882 | TRACE_IRQS_OFF |
1da177e4 | 883 | jmp retint_check |
0bd7b798 | 884 | |
1da177e4 | 885 | retint_signal: |
8f4d37ec | 886 | testl $_TIF_DO_NOTIFY_MASK,%edx |
10ffdbb8 | 887 | jz retint_swapgs |
2601e64d | 888 | TRACE_IRQS_ON |
72fe4858 | 889 | ENABLE_INTERRUPTS(CLBR_NONE) |
1da177e4 | 890 | SAVE_REST |
0bd7b798 | 891 | movq $-1,ORIG_RAX(%rsp) |
3829ee6b | 892 | xorl %esi,%esi # oldset |
1da177e4 LT |
893 | movq %rsp,%rdi # &pt_regs |
894 | call do_notify_resume | |
895 | RESTORE_REST | |
72fe4858 | 896 | DISABLE_INTERRUPTS(CLBR_NONE) |
2601e64d | 897 | TRACE_IRQS_OFF |
be9e6870 | 898 | GET_THREAD_INFO(%rcx) |
eca91e78 | 899 | jmp retint_with_reschedule |
1da177e4 LT |
900 | |
901 | #ifdef CONFIG_PREEMPT | |
902 | /* Returning to kernel space. Check if we need preemption */ | |
903 | /* rcx: threadinfo. interrupts off. */ | |
b06babac | 904 | ENTRY(retint_kernel) |
c2daa3be | 905 | cmpl $0,PER_CPU_VAR(__preempt_count) |
1da177e4 | 906 | jnz retint_restore_args |
1da177e4 LT |
907 | bt $9,EFLAGS-ARGOFFSET(%rsp) /* interrupts off? */ |
908 | jnc retint_restore_args | |
909 | call preempt_schedule_irq | |
910 | jmp exit_intr | |
0bd7b798 | 911 | #endif |
1da177e4 | 912 | CFI_ENDPROC |
4b787e0b | 913 | END(common_interrupt) |
3891a04a | 914 | |
1da177e4 LT |
915 | /* |
916 | * APIC interrupts. | |
0bd7b798 | 917 | */ |
cf910e83 | 918 | .macro apicinterrupt3 num sym do_sym |
322648d1 | 919 | ENTRY(\sym) |
7effaa88 | 920 | INTR_FRAME |
ee4eb87b | 921 | ASM_CLAC |
df5d1874 | 922 | pushq_cfi $~(\num) |
39e95433 | 923 | .Lcommon_\sym: |
322648d1 | 924 | interrupt \do_sym |
1da177e4 LT |
925 | jmp ret_from_intr |
926 | CFI_ENDPROC | |
322648d1 AH |
927 | END(\sym) |
928 | .endm | |
1da177e4 | 929 | |
cf910e83 SA |
930 | #ifdef CONFIG_TRACING |
931 | #define trace(sym) trace_##sym | |
932 | #define smp_trace(sym) smp_trace_##sym | |
933 | ||
934 | .macro trace_apicinterrupt num sym | |
935 | apicinterrupt3 \num trace(\sym) smp_trace(\sym) | |
936 | .endm | |
937 | #else | |
938 | .macro trace_apicinterrupt num sym do_sym | |
939 | .endm | |
940 | #endif | |
941 | ||
942 | .macro apicinterrupt num sym do_sym | |
943 | apicinterrupt3 \num \sym \do_sym | |
944 | trace_apicinterrupt \num \sym | |
945 | .endm | |
946 | ||
322648d1 | 947 | #ifdef CONFIG_SMP |
cf910e83 | 948 | apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR \ |
322648d1 | 949 | irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt |
cf910e83 | 950 | apicinterrupt3 REBOOT_VECTOR \ |
4ef702c1 | 951 | reboot_interrupt smp_reboot_interrupt |
322648d1 | 952 | #endif |
1da177e4 | 953 | |
03b48632 | 954 | #ifdef CONFIG_X86_UV |
cf910e83 | 955 | apicinterrupt3 UV_BAU_MESSAGE \ |
322648d1 | 956 | uv_bau_message_intr1 uv_bau_message_interrupt |
03b48632 | 957 | #endif |
322648d1 AH |
958 | apicinterrupt LOCAL_TIMER_VECTOR \ |
959 | apic_timer_interrupt smp_apic_timer_interrupt | |
4a4de9c7 DS |
960 | apicinterrupt X86_PLATFORM_IPI_VECTOR \ |
961 | x86_platform_ipi smp_x86_platform_ipi | |
89b831ef | 962 | |
d78f2664 | 963 | #ifdef CONFIG_HAVE_KVM |
cf910e83 | 964 | apicinterrupt3 POSTED_INTR_VECTOR \ |
d78f2664 YZ |
965 | kvm_posted_intr_ipi smp_kvm_posted_intr_ipi |
966 | #endif | |
967 | ||
33e5ff63 | 968 | #ifdef CONFIG_X86_MCE_THRESHOLD |
322648d1 | 969 | apicinterrupt THRESHOLD_APIC_VECTOR \ |
7856f6cc | 970 | threshold_interrupt smp_threshold_interrupt |
33e5ff63 SA |
971 | #endif |
972 | ||
973 | #ifdef CONFIG_X86_THERMAL_VECTOR | |
322648d1 AH |
974 | apicinterrupt THERMAL_APIC_VECTOR \ |
975 | thermal_interrupt smp_thermal_interrupt | |
33e5ff63 | 976 | #endif |
1812924b | 977 | |
322648d1 AH |
978 | #ifdef CONFIG_SMP |
979 | apicinterrupt CALL_FUNCTION_SINGLE_VECTOR \ | |
980 | call_function_single_interrupt smp_call_function_single_interrupt | |
981 | apicinterrupt CALL_FUNCTION_VECTOR \ | |
982 | call_function_interrupt smp_call_function_interrupt | |
983 | apicinterrupt RESCHEDULE_VECTOR \ | |
984 | reschedule_interrupt smp_reschedule_interrupt | |
985 | #endif | |
1da177e4 | 986 | |
322648d1 AH |
987 | apicinterrupt ERROR_APIC_VECTOR \ |
988 | error_interrupt smp_error_interrupt | |
989 | apicinterrupt SPURIOUS_APIC_VECTOR \ | |
990 | spurious_interrupt smp_spurious_interrupt | |
0bd7b798 | 991 | |
e360adbe PZ |
992 | #ifdef CONFIG_IRQ_WORK |
993 | apicinterrupt IRQ_WORK_VECTOR \ | |
994 | irq_work_interrupt smp_irq_work_interrupt | |
241771ef IM |
995 | #endif |
996 | ||
1da177e4 LT |
997 | /* |
998 | * Exception entry points. | |
0bd7b798 | 999 | */ |
577ed45e AL |
1000 | #define INIT_TSS_IST(x) PER_CPU_VAR(init_tss) + (TSS_ist + ((x) - 1) * 8) |
1001 | ||
1002 | .macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1 | |
322648d1 | 1003 | ENTRY(\sym) |
577ed45e AL |
1004 | /* Sanity check */ |
1005 | .if \shift_ist != -1 && \paranoid == 0 | |
1006 | .error "using shift_ist requires paranoid=1" | |
1007 | .endif | |
1008 | ||
cb5dd2c5 AL |
1009 | .if \has_error_code |
1010 | XCPT_FRAME | |
1011 | .else | |
7effaa88 | 1012 | INTR_FRAME |
cb5dd2c5 | 1013 | .endif |
1da177e4 | 1014 | |
ee4eb87b | 1015 | ASM_CLAC |
b8b1d08b | 1016 | PARAVIRT_ADJUST_EXCEPTION_FRAME |
cb5dd2c5 AL |
1017 | |
1018 | .ifeq \has_error_code | |
1019 | pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */ | |
1020 | .endif | |
1021 | ||
b1cccb1b JB |
1022 | subq $ORIG_RAX-R15, %rsp |
1023 | CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15 | |
cb5dd2c5 AL |
1024 | |
1025 | .if \paranoid | |
48e08d0f AL |
1026 | .if \paranoid == 1 |
1027 | CFI_REMEMBER_STATE | |
1028 | testl $3, CS(%rsp) /* If coming from userspace, switch */ | |
1029 | jnz 1f /* stacks. */ | |
1030 | .endif | |
b8b1d08b | 1031 | call save_paranoid |
cb5dd2c5 AL |
1032 | .else |
1033 | call error_entry | |
1034 | .endif | |
1035 | ||
1bd24efc | 1036 | DEFAULT_FRAME 0 |
cb5dd2c5 AL |
1037 | |
1038 | .if \paranoid | |
577ed45e AL |
1039 | .if \shift_ist != -1 |
1040 | TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */ | |
1041 | .else | |
b8b1d08b | 1042 | TRACE_IRQS_OFF |
cb5dd2c5 | 1043 | .endif |
577ed45e | 1044 | .endif |
cb5dd2c5 AL |
1045 | |
1046 | movq %rsp,%rdi /* pt_regs pointer */ | |
1047 | ||
1048 | .if \has_error_code | |
1049 | movq ORIG_RAX(%rsp),%rsi /* get error code */ | |
1050 | movq $-1,ORIG_RAX(%rsp) /* no syscall to restart */ | |
1051 | .else | |
1052 | xorl %esi,%esi /* no error code */ | |
1053 | .endif | |
1054 | ||
577ed45e AL |
1055 | .if \shift_ist != -1 |
1056 | subq $EXCEPTION_STKSZ, INIT_TSS_IST(\shift_ist) | |
1057 | .endif | |
1058 | ||
322648d1 | 1059 | call \do_sym |
cb5dd2c5 | 1060 | |
577ed45e AL |
1061 | .if \shift_ist != -1 |
1062 | addq $EXCEPTION_STKSZ, INIT_TSS_IST(\shift_ist) | |
1063 | .endif | |
1064 | ||
cb5dd2c5 AL |
1065 | .if \paranoid |
1066 | jmp paranoid_exit /* %ebx: no swapgs flag */ | |
1067 | .else | |
1068 | jmp error_exit /* %ebx: no swapgs flag */ | |
1069 | .endif | |
1070 | ||
48e08d0f AL |
1071 | .if \paranoid == 1 |
1072 | CFI_RESTORE_STATE | |
1073 | /* | |
1074 | * Paranoid entry from userspace. Switch stacks and treat it | |
1075 | * as a normal entry. This means that paranoid handlers | |
1076 | * run in real process context if user_mode(regs). | |
1077 | */ | |
1078 | 1: | |
1079 | call error_entry | |
1080 | ||
1081 | DEFAULT_FRAME 0 | |
1082 | ||
1083 | movq %rsp,%rdi /* pt_regs pointer */ | |
1084 | call sync_regs | |
1085 | movq %rax,%rsp /* switch stack */ | |
1086 | ||
1087 | movq %rsp,%rdi /* pt_regs pointer */ | |
1088 | ||
1089 | .if \has_error_code | |
1090 | movq ORIG_RAX(%rsp),%rsi /* get error code */ | |
1091 | movq $-1,ORIG_RAX(%rsp) /* no syscall to restart */ | |
1092 | .else | |
1093 | xorl %esi,%esi /* no error code */ | |
1094 | .endif | |
1095 | ||
1096 | call \do_sym | |
1097 | ||
1098 | jmp error_exit /* %ebx: no swapgs flag */ | |
1099 | .endif | |
1100 | ||
b8b1d08b | 1101 | CFI_ENDPROC |
ddeb8f21 | 1102 | END(\sym) |
322648d1 | 1103 | .endm |
b8b1d08b | 1104 | |
25c74b10 | 1105 | #ifdef CONFIG_TRACING |
cb5dd2c5 AL |
1106 | .macro trace_idtentry sym do_sym has_error_code:req |
1107 | idtentry trace(\sym) trace(\do_sym) has_error_code=\has_error_code | |
1108 | idtentry \sym \do_sym has_error_code=\has_error_code | |
25c74b10 SA |
1109 | .endm |
1110 | #else | |
cb5dd2c5 AL |
1111 | .macro trace_idtentry sym do_sym has_error_code:req |
1112 | idtentry \sym \do_sym has_error_code=\has_error_code | |
25c74b10 SA |
1113 | .endm |
1114 | #endif | |
1115 | ||
cb5dd2c5 AL |
1116 | idtentry divide_error do_divide_error has_error_code=0 |
1117 | idtentry overflow do_overflow has_error_code=0 | |
1118 | idtentry bounds do_bounds has_error_code=0 | |
1119 | idtentry invalid_op do_invalid_op has_error_code=0 | |
1120 | idtentry device_not_available do_device_not_available has_error_code=0 | |
48e08d0f | 1121 | idtentry double_fault do_double_fault has_error_code=1 paranoid=2 |
cb5dd2c5 AL |
1122 | idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0 |
1123 | idtentry invalid_TSS do_invalid_TSS has_error_code=1 | |
1124 | idtentry segment_not_present do_segment_not_present has_error_code=1 | |
1125 | idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0 | |
1126 | idtentry coprocessor_error do_coprocessor_error has_error_code=0 | |
1127 | idtentry alignment_check do_alignment_check has_error_code=1 | |
1128 | idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0 | |
5cec93c2 | 1129 | |
2601e64d | 1130 | |
9f1e87ea CG |
1131 | /* Reload gs selector with exception handling */ |
1132 | /* edi: new selector */ | |
9f9d489a | 1133 | ENTRY(native_load_gs_index) |
7effaa88 | 1134 | CFI_STARTPROC |
df5d1874 | 1135 | pushfq_cfi |
b8aa287f | 1136 | DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI) |
9f1e87ea | 1137 | SWAPGS |
0bd7b798 | 1138 | gs_change: |
9f1e87ea | 1139 | movl %edi,%gs |
1da177e4 | 1140 | 2: mfence /* workaround */ |
72fe4858 | 1141 | SWAPGS |
df5d1874 | 1142 | popfq_cfi |
9f1e87ea | 1143 | ret |
7effaa88 | 1144 | CFI_ENDPROC |
6efdcfaf | 1145 | END(native_load_gs_index) |
0bd7b798 | 1146 | |
d7abc0fa | 1147 | _ASM_EXTABLE(gs_change,bad_gs) |
9f1e87ea | 1148 | .section .fixup,"ax" |
1da177e4 | 1149 | /* running with kernelgs */ |
0bd7b798 | 1150 | bad_gs: |
72fe4858 | 1151 | SWAPGS /* switch back to user gs */ |
1da177e4 | 1152 | xorl %eax,%eax |
9f1e87ea CG |
1153 | movl %eax,%gs |
1154 | jmp 2b | |
1155 | .previous | |
0bd7b798 | 1156 | |
2699500b | 1157 | /* Call softirq on interrupt stack. Interrupts are off. */ |
7d65f4a6 | 1158 | ENTRY(do_softirq_own_stack) |
7effaa88 | 1159 | CFI_STARTPROC |
df5d1874 | 1160 | pushq_cfi %rbp |
2699500b AK |
1161 | CFI_REL_OFFSET rbp,0 |
1162 | mov %rsp,%rbp | |
1163 | CFI_DEF_CFA_REGISTER rbp | |
56895530 | 1164 | incl PER_CPU_VAR(irq_count) |
26f80bd6 | 1165 | cmove PER_CPU_VAR(irq_stack_ptr),%rsp |
2699500b | 1166 | push %rbp # backlink for old unwinder |
ed6b676c | 1167 | call __do_softirq |
2699500b | 1168 | leaveq |
df5d1874 | 1169 | CFI_RESTORE rbp |
7effaa88 | 1170 | CFI_DEF_CFA_REGISTER rsp |
2699500b | 1171 | CFI_ADJUST_CFA_OFFSET -8 |
56895530 | 1172 | decl PER_CPU_VAR(irq_count) |
ed6b676c | 1173 | ret |
7effaa88 | 1174 | CFI_ENDPROC |
7d65f4a6 | 1175 | END(do_softirq_own_stack) |
75154f40 | 1176 | |
3d75e1b8 | 1177 | #ifdef CONFIG_XEN |
cb5dd2c5 | 1178 | idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0 |
3d75e1b8 JF |
1179 | |
1180 | /* | |
9f1e87ea CG |
1181 | * A note on the "critical region" in our callback handler. |
1182 | * We want to avoid stacking callback handlers due to events occurring | |
1183 | * during handling of the last event. To do this, we keep events disabled | |
1184 | * until we've done all processing. HOWEVER, we must enable events before | |
1185 | * popping the stack frame (can't be done atomically) and so it would still | |
1186 | * be possible to get enough handler activations to overflow the stack. | |
1187 | * Although unlikely, bugs of that kind are hard to track down, so we'd | |
1188 | * like to avoid the possibility. | |
1189 | * So, on entry to the handler we detect whether we interrupted an | |
1190 | * existing activation in its critical region -- if so, we pop the current | |
1191 | * activation and restart the handler using the previous one. | |
1192 | */ | |
3d75e1b8 JF |
1193 | ENTRY(xen_do_hypervisor_callback) # do_hypervisor_callback(struct *pt_regs) |
1194 | CFI_STARTPROC | |
9f1e87ea CG |
1195 | /* |
1196 | * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will | |
1197 | * see the correct pointer to the pt_regs | |
1198 | */ | |
3d75e1b8 JF |
1199 | movq %rdi, %rsp # we don't return, adjust the stack frame |
1200 | CFI_ENDPROC | |
dcd072e2 | 1201 | DEFAULT_FRAME |
56895530 | 1202 | 11: incl PER_CPU_VAR(irq_count) |
3d75e1b8 JF |
1203 | movq %rsp,%rbp |
1204 | CFI_DEF_CFA_REGISTER rbp | |
26f80bd6 | 1205 | cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp |
3d75e1b8 JF |
1206 | pushq %rbp # backlink for old unwinder |
1207 | call xen_evtchn_do_upcall | |
1208 | popq %rsp | |
1209 | CFI_DEF_CFA_REGISTER rsp | |
56895530 | 1210 | decl PER_CPU_VAR(irq_count) |
fdfd811d DV |
1211 | #ifndef CONFIG_PREEMPT |
1212 | call xen_maybe_preempt_hcall | |
1213 | #endif | |
3d75e1b8 JF |
1214 | jmp error_exit |
1215 | CFI_ENDPROC | |
371c394a | 1216 | END(xen_do_hypervisor_callback) |
3d75e1b8 JF |
1217 | |
1218 | /* | |
9f1e87ea CG |
1219 | * Hypervisor uses this for application faults while it executes. |
1220 | * We get here for two reasons: | |
1221 | * 1. Fault while reloading DS, ES, FS or GS | |
1222 | * 2. Fault while executing IRET | |
1223 | * Category 1 we do not need to fix up as Xen has already reloaded all segment | |
1224 | * registers that could be reloaded and zeroed the others. | |
1225 | * Category 2 we fix up by killing the current process. We cannot use the | |
1226 | * normal Linux return path in this case because if we use the IRET hypercall | |
1227 | * to pop the stack frame we end up in an infinite loop of failsafe callbacks. | |
1228 | * We distinguish between categories by comparing each saved segment register | |
1229 | * with its current contents: any discrepancy means we in category 1. | |
1230 | */ | |
3d75e1b8 | 1231 | ENTRY(xen_failsafe_callback) |
dcd072e2 AH |
1232 | INTR_FRAME 1 (6*8) |
1233 | /*CFI_REL_OFFSET gs,GS*/ | |
1234 | /*CFI_REL_OFFSET fs,FS*/ | |
1235 | /*CFI_REL_OFFSET es,ES*/ | |
1236 | /*CFI_REL_OFFSET ds,DS*/ | |
1237 | CFI_REL_OFFSET r11,8 | |
1238 | CFI_REL_OFFSET rcx,0 | |
3d75e1b8 JF |
1239 | movw %ds,%cx |
1240 | cmpw %cx,0x10(%rsp) | |
1241 | CFI_REMEMBER_STATE | |
1242 | jne 1f | |
1243 | movw %es,%cx | |
1244 | cmpw %cx,0x18(%rsp) | |
1245 | jne 1f | |
1246 | movw %fs,%cx | |
1247 | cmpw %cx,0x20(%rsp) | |
1248 | jne 1f | |
1249 | movw %gs,%cx | |
1250 | cmpw %cx,0x28(%rsp) | |
1251 | jne 1f | |
1252 | /* All segments match their saved values => Category 2 (Bad IRET). */ | |
1253 | movq (%rsp),%rcx | |
1254 | CFI_RESTORE rcx | |
1255 | movq 8(%rsp),%r11 | |
1256 | CFI_RESTORE r11 | |
1257 | addq $0x30,%rsp | |
1258 | CFI_ADJUST_CFA_OFFSET -0x30 | |
14ae22ba IM |
1259 | pushq_cfi $0 /* RIP */ |
1260 | pushq_cfi %r11 | |
1261 | pushq_cfi %rcx | |
4a5c3e77 | 1262 | jmp general_protection |
3d75e1b8 JF |
1263 | CFI_RESTORE_STATE |
1264 | 1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */ | |
1265 | movq (%rsp),%rcx | |
1266 | CFI_RESTORE rcx | |
1267 | movq 8(%rsp),%r11 | |
1268 | CFI_RESTORE r11 | |
1269 | addq $0x30,%rsp | |
1270 | CFI_ADJUST_CFA_OFFSET -0x30 | |
a349e23d | 1271 | pushq_cfi $-1 /* orig_ax = -1 => not a system call */ |
3d75e1b8 JF |
1272 | SAVE_ALL |
1273 | jmp error_exit | |
1274 | CFI_ENDPROC | |
3d75e1b8 JF |
1275 | END(xen_failsafe_callback) |
1276 | ||
cf910e83 | 1277 | apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \ |
38e20b07 SY |
1278 | xen_hvm_callback_vector xen_evtchn_do_upcall |
1279 | ||
3d75e1b8 | 1280 | #endif /* CONFIG_XEN */ |
ddeb8f21 | 1281 | |
bc2b0331 | 1282 | #if IS_ENABLED(CONFIG_HYPERV) |
cf910e83 | 1283 | apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \ |
bc2b0331 S |
1284 | hyperv_callback_vector hyperv_vector_handler |
1285 | #endif /* CONFIG_HYPERV */ | |
1286 | ||
577ed45e AL |
1287 | idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK |
1288 | idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK | |
6f442be2 | 1289 | idtentry stack_segment do_stack_segment has_error_code=1 |
6cac5a92 | 1290 | #ifdef CONFIG_XEN |
cb5dd2c5 AL |
1291 | idtentry xen_debug do_debug has_error_code=0 |
1292 | idtentry xen_int3 do_int3 has_error_code=0 | |
1293 | idtentry xen_stack_segment do_stack_segment has_error_code=1 | |
6cac5a92 | 1294 | #endif |
cb5dd2c5 AL |
1295 | idtentry general_protection do_general_protection has_error_code=1 |
1296 | trace_idtentry page_fault do_page_fault has_error_code=1 | |
631bc487 | 1297 | #ifdef CONFIG_KVM_GUEST |
cb5dd2c5 | 1298 | idtentry async_page_fault do_async_page_fault has_error_code=1 |
631bc487 | 1299 | #endif |
ddeb8f21 | 1300 | #ifdef CONFIG_X86_MCE |
cb5dd2c5 | 1301 | idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip) |
ddeb8f21 AH |
1302 | #endif |
1303 | ||
1304 | /* | |
48e08d0f AL |
1305 | * "Paranoid" exit path from exception stack. This is invoked |
1306 | * only on return from non-NMI IST interrupts that came | |
1307 | * from kernel space. | |
ddeb8f21 | 1308 | * |
48e08d0f AL |
1309 | * We may be returning to very strange contexts (e.g. very early |
1310 | * in syscall entry), so checking for preemption here would | |
1311 | * be complicated. Fortunately, we there's no good reason | |
1312 | * to try to handle preemption here. | |
ddeb8f21 AH |
1313 | */ |
1314 | ||
1315 | /* ebx: no swapgs flag */ | |
1316 | ENTRY(paranoid_exit) | |
1f130a78 | 1317 | DEFAULT_FRAME |
ddeb8f21 | 1318 | DISABLE_INTERRUPTS(CLBR_NONE) |
5963e317 | 1319 | TRACE_IRQS_OFF_DEBUG |
ddeb8f21 AH |
1320 | testl %ebx,%ebx /* swapgs needed? */ |
1321 | jnz paranoid_restore | |
ddeb8f21 AH |
1322 | TRACE_IRQS_IRETQ 0 |
1323 | SWAPGS_UNSAFE_STACK | |
0300e7f1 | 1324 | RESTORE_ALL 8 |
48e08d0f | 1325 | INTERRUPT_RETURN |
ddeb8f21 | 1326 | paranoid_restore: |
5963e317 | 1327 | TRACE_IRQS_IRETQ_DEBUG 0 |
ddeb8f21 | 1328 | RESTORE_ALL 8 |
48e08d0f | 1329 | INTERRUPT_RETURN |
ddeb8f21 AH |
1330 | CFI_ENDPROC |
1331 | END(paranoid_exit) | |
1332 | ||
1333 | /* | |
1334 | * Exception entry point. This expects an error code/orig_rax on the stack. | |
1335 | * returns in "no swapgs flag" in %ebx. | |
1336 | */ | |
1337 | ENTRY(error_entry) | |
1338 | XCPT_FRAME | |
1339 | CFI_ADJUST_CFA_OFFSET 15*8 | |
1340 | /* oldrax contains error code */ | |
1341 | cld | |
3bab13b0 JB |
1342 | movq %rdi, RDI+8(%rsp) |
1343 | movq %rsi, RSI+8(%rsp) | |
1344 | movq %rdx, RDX+8(%rsp) | |
1345 | movq %rcx, RCX+8(%rsp) | |
1346 | movq %rax, RAX+8(%rsp) | |
1347 | movq %r8, R8+8(%rsp) | |
1348 | movq %r9, R9+8(%rsp) | |
1349 | movq %r10, R10+8(%rsp) | |
1350 | movq %r11, R11+8(%rsp) | |
ddeb8f21 | 1351 | movq_cfi rbx, RBX+8 |
3bab13b0 JB |
1352 | movq %rbp, RBP+8(%rsp) |
1353 | movq %r12, R12+8(%rsp) | |
1354 | movq %r13, R13+8(%rsp) | |
1355 | movq %r14, R14+8(%rsp) | |
1356 | movq %r15, R15+8(%rsp) | |
ddeb8f21 AH |
1357 | xorl %ebx,%ebx |
1358 | testl $3,CS+8(%rsp) | |
1359 | je error_kernelspace | |
1360 | error_swapgs: | |
1361 | SWAPGS | |
1362 | error_sti: | |
1363 | TRACE_IRQS_OFF | |
1364 | ret | |
ddeb8f21 AH |
1365 | |
1366 | /* | |
1367 | * There are two places in the kernel that can potentially fault with | |
b645af2d AL |
1368 | * usergs. Handle them here. B stepping K8s sometimes report a |
1369 | * truncated RIP for IRET exceptions returning to compat mode. Check | |
1370 | * for these here too. | |
ddeb8f21 AH |
1371 | */ |
1372 | error_kernelspace: | |
3bab13b0 | 1373 | CFI_REL_OFFSET rcx, RCX+8 |
ddeb8f21 | 1374 | incl %ebx |
7209a75d | 1375 | leaq native_irq_return_iret(%rip),%rcx |
ddeb8f21 | 1376 | cmpq %rcx,RIP+8(%rsp) |
b645af2d | 1377 | je error_bad_iret |
ae24ffe5 BG |
1378 | movl %ecx,%eax /* zero extend */ |
1379 | cmpq %rax,RIP+8(%rsp) | |
1380 | je bstep_iret | |
ddeb8f21 | 1381 | cmpq $gs_change,RIP+8(%rsp) |
9f1e87ea | 1382 | je error_swapgs |
ddeb8f21 | 1383 | jmp error_sti |
ae24ffe5 BG |
1384 | |
1385 | bstep_iret: | |
1386 | /* Fix truncated RIP */ | |
1387 | movq %rcx,RIP+8(%rsp) | |
b645af2d AL |
1388 | /* fall through */ |
1389 | ||
1390 | error_bad_iret: | |
1391 | SWAPGS | |
1392 | mov %rsp,%rdi | |
1393 | call fixup_bad_iret | |
1394 | mov %rax,%rsp | |
1395 | decl %ebx /* Return to usergs */ | |
1396 | jmp error_sti | |
e6b04b6b | 1397 | CFI_ENDPROC |
ddeb8f21 AH |
1398 | END(error_entry) |
1399 | ||
1400 | ||
1401 | /* ebx: no swapgs flag (1: don't need swapgs, 0: need it) */ | |
1402 | ENTRY(error_exit) | |
1403 | DEFAULT_FRAME | |
1404 | movl %ebx,%eax | |
1405 | RESTORE_REST | |
1406 | DISABLE_INTERRUPTS(CLBR_NONE) | |
1407 | TRACE_IRQS_OFF | |
1408 | GET_THREAD_INFO(%rcx) | |
1409 | testl %eax,%eax | |
1410 | jne retint_kernel | |
1411 | LOCKDEP_SYS_EXIT_IRQ | |
1412 | movl TI_flags(%rcx),%edx | |
1413 | movl $_TIF_WORK_MASK,%edi | |
1414 | andl %edi,%edx | |
1415 | jnz retint_careful | |
1416 | jmp retint_swapgs | |
1417 | CFI_ENDPROC | |
1418 | END(error_exit) | |
1419 | ||
3f3c8b8c SR |
1420 | /* |
1421 | * Test if a given stack is an NMI stack or not. | |
1422 | */ | |
1423 | .macro test_in_nmi reg stack nmi_ret normal_ret | |
1424 | cmpq %\reg, \stack | |
1425 | ja \normal_ret | |
1426 | subq $EXCEPTION_STKSZ, %\reg | |
1427 | cmpq %\reg, \stack | |
1428 | jb \normal_ret | |
1429 | jmp \nmi_ret | |
1430 | .endm | |
ddeb8f21 AH |
1431 | |
1432 | /* runs on exception stack */ | |
1433 | ENTRY(nmi) | |
1434 | INTR_FRAME | |
1435 | PARAVIRT_ADJUST_EXCEPTION_FRAME | |
3f3c8b8c SR |
1436 | /* |
1437 | * We allow breakpoints in NMIs. If a breakpoint occurs, then | |
1438 | * the iretq it performs will take us out of NMI context. | |
1439 | * This means that we can have nested NMIs where the next | |
1440 | * NMI is using the top of the stack of the previous NMI. We | |
1441 | * can't let it execute because the nested NMI will corrupt the | |
1442 | * stack of the previous NMI. NMI handlers are not re-entrant | |
1443 | * anyway. | |
1444 | * | |
1445 | * To handle this case we do the following: | |
1446 | * Check the a special location on the stack that contains | |
1447 | * a variable that is set when NMIs are executing. | |
1448 | * The interrupted task's stack is also checked to see if it | |
1449 | * is an NMI stack. | |
1450 | * If the variable is not set and the stack is not the NMI | |
1451 | * stack then: | |
1452 | * o Set the special variable on the stack | |
1453 | * o Copy the interrupt frame into a "saved" location on the stack | |
1454 | * o Copy the interrupt frame into a "copy" location on the stack | |
1455 | * o Continue processing the NMI | |
1456 | * If the variable is set or the previous stack is the NMI stack: | |
1457 | * o Modify the "copy" location to jump to the repeate_nmi | |
1458 | * o return back to the first NMI | |
1459 | * | |
1460 | * Now on exit of the first NMI, we first clear the stack variable | |
1461 | * The NMI stack will tell any nested NMIs at that point that it is | |
1462 | * nested. Then we pop the stack normally with iret, and if there was | |
1463 | * a nested NMI that updated the copy interrupt stack frame, a | |
1464 | * jump will be made to the repeat_nmi code that will handle the second | |
1465 | * NMI. | |
1466 | */ | |
1467 | ||
1468 | /* Use %rdx as out temp variable throughout */ | |
1469 | pushq_cfi %rdx | |
62610913 | 1470 | CFI_REL_OFFSET rdx, 0 |
3f3c8b8c | 1471 | |
45d5a168 SR |
1472 | /* |
1473 | * If %cs was not the kernel segment, then the NMI triggered in user | |
1474 | * space, which means it is definitely not nested. | |
1475 | */ | |
a38449ef | 1476 | cmpl $__KERNEL_CS, 16(%rsp) |
45d5a168 SR |
1477 | jne first_nmi |
1478 | ||
3f3c8b8c SR |
1479 | /* |
1480 | * Check the special variable on the stack to see if NMIs are | |
1481 | * executing. | |
1482 | */ | |
a38449ef | 1483 | cmpl $1, -8(%rsp) |
3f3c8b8c SR |
1484 | je nested_nmi |
1485 | ||
1486 | /* | |
1487 | * Now test if the previous stack was an NMI stack. | |
1488 | * We need the double check. We check the NMI stack to satisfy the | |
1489 | * race when the first NMI clears the variable before returning. | |
1490 | * We check the variable because the first NMI could be in a | |
1491 | * breakpoint routine using a breakpoint stack. | |
1492 | */ | |
1493 | lea 6*8(%rsp), %rdx | |
1494 | test_in_nmi rdx, 4*8(%rsp), nested_nmi, first_nmi | |
62610913 | 1495 | CFI_REMEMBER_STATE |
3f3c8b8c SR |
1496 | |
1497 | nested_nmi: | |
1498 | /* | |
1499 | * Do nothing if we interrupted the fixup in repeat_nmi. | |
1500 | * It's about to repeat the NMI handler, so we are fine | |
1501 | * with ignoring this one. | |
1502 | */ | |
1503 | movq $repeat_nmi, %rdx | |
1504 | cmpq 8(%rsp), %rdx | |
1505 | ja 1f | |
1506 | movq $end_repeat_nmi, %rdx | |
1507 | cmpq 8(%rsp), %rdx | |
1508 | ja nested_nmi_out | |
1509 | ||
1510 | 1: | |
1511 | /* Set up the interrupted NMIs stack to jump to repeat_nmi */ | |
28696f43 | 1512 | leaq -1*8(%rsp), %rdx |
3f3c8b8c | 1513 | movq %rdx, %rsp |
28696f43 SQ |
1514 | CFI_ADJUST_CFA_OFFSET 1*8 |
1515 | leaq -10*8(%rsp), %rdx | |
3f3c8b8c SR |
1516 | pushq_cfi $__KERNEL_DS |
1517 | pushq_cfi %rdx | |
1518 | pushfq_cfi | |
1519 | pushq_cfi $__KERNEL_CS | |
1520 | pushq_cfi $repeat_nmi | |
1521 | ||
1522 | /* Put stack back */ | |
28696f43 SQ |
1523 | addq $(6*8), %rsp |
1524 | CFI_ADJUST_CFA_OFFSET -6*8 | |
3f3c8b8c SR |
1525 | |
1526 | nested_nmi_out: | |
1527 | popq_cfi %rdx | |
62610913 | 1528 | CFI_RESTORE rdx |
3f3c8b8c SR |
1529 | |
1530 | /* No need to check faults here */ | |
1531 | INTERRUPT_RETURN | |
1532 | ||
62610913 | 1533 | CFI_RESTORE_STATE |
3f3c8b8c SR |
1534 | first_nmi: |
1535 | /* | |
1536 | * Because nested NMIs will use the pushed location that we | |
1537 | * stored in rdx, we must keep that space available. | |
1538 | * Here's what our stack frame will look like: | |
1539 | * +-------------------------+ | |
1540 | * | original SS | | |
1541 | * | original Return RSP | | |
1542 | * | original RFLAGS | | |
1543 | * | original CS | | |
1544 | * | original RIP | | |
1545 | * +-------------------------+ | |
1546 | * | temp storage for rdx | | |
1547 | * +-------------------------+ | |
1548 | * | NMI executing variable | | |
1549 | * +-------------------------+ | |
3f3c8b8c SR |
1550 | * | copied SS | |
1551 | * | copied Return RSP | | |
1552 | * | copied RFLAGS | | |
1553 | * | copied CS | | |
1554 | * | copied RIP | | |
1555 | * +-------------------------+ | |
28696f43 SQ |
1556 | * | Saved SS | |
1557 | * | Saved Return RSP | | |
1558 | * | Saved RFLAGS | | |
1559 | * | Saved CS | | |
1560 | * | Saved RIP | | |
1561 | * +-------------------------+ | |
3f3c8b8c SR |
1562 | * | pt_regs | |
1563 | * +-------------------------+ | |
1564 | * | |
79fb4ad6 SR |
1565 | * The saved stack frame is used to fix up the copied stack frame |
1566 | * that a nested NMI may change to make the interrupted NMI iret jump | |
1567 | * to the repeat_nmi. The original stack frame and the temp storage | |
3f3c8b8c SR |
1568 | * is also used by nested NMIs and can not be trusted on exit. |
1569 | */ | |
79fb4ad6 | 1570 | /* Do not pop rdx, nested NMIs will corrupt that part of the stack */ |
62610913 JB |
1571 | movq (%rsp), %rdx |
1572 | CFI_RESTORE rdx | |
1573 | ||
3f3c8b8c SR |
1574 | /* Set the NMI executing variable on the stack. */ |
1575 | pushq_cfi $1 | |
1576 | ||
28696f43 SQ |
1577 | /* |
1578 | * Leave room for the "copied" frame | |
1579 | */ | |
1580 | subq $(5*8), %rsp | |
444723dc | 1581 | CFI_ADJUST_CFA_OFFSET 5*8 |
28696f43 | 1582 | |
3f3c8b8c SR |
1583 | /* Copy the stack frame to the Saved frame */ |
1584 | .rept 5 | |
28696f43 | 1585 | pushq_cfi 11*8(%rsp) |
3f3c8b8c | 1586 | .endr |
62610913 JB |
1587 | CFI_DEF_CFA_OFFSET SS+8-RIP |
1588 | ||
79fb4ad6 SR |
1589 | /* Everything up to here is safe from nested NMIs */ |
1590 | ||
62610913 JB |
1591 | /* |
1592 | * If there was a nested NMI, the first NMI's iret will return | |
1593 | * here. But NMIs are still enabled and we can take another | |
1594 | * nested NMI. The nested NMI checks the interrupted RIP to see | |
1595 | * if it is between repeat_nmi and end_repeat_nmi, and if so | |
1596 | * it will just return, as we are about to repeat an NMI anyway. | |
1597 | * This makes it safe to copy to the stack frame that a nested | |
1598 | * NMI will update. | |
1599 | */ | |
1600 | repeat_nmi: | |
1601 | /* | |
1602 | * Update the stack variable to say we are still in NMI (the update | |
1603 | * is benign for the non-repeat case, where 1 was pushed just above | |
1604 | * to this very stack slot). | |
1605 | */ | |
28696f43 | 1606 | movq $1, 10*8(%rsp) |
3f3c8b8c SR |
1607 | |
1608 | /* Make another copy, this one may be modified by nested NMIs */ | |
28696f43 SQ |
1609 | addq $(10*8), %rsp |
1610 | CFI_ADJUST_CFA_OFFSET -10*8 | |
3f3c8b8c | 1611 | .rept 5 |
28696f43 | 1612 | pushq_cfi -6*8(%rsp) |
3f3c8b8c | 1613 | .endr |
28696f43 | 1614 | subq $(5*8), %rsp |
62610913 JB |
1615 | CFI_DEF_CFA_OFFSET SS+8-RIP |
1616 | end_repeat_nmi: | |
3f3c8b8c SR |
1617 | |
1618 | /* | |
1619 | * Everything below this point can be preempted by a nested | |
79fb4ad6 SR |
1620 | * NMI if the first NMI took an exception and reset our iret stack |
1621 | * so that we repeat another NMI. | |
3f3c8b8c | 1622 | */ |
1fd466ef | 1623 | pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */ |
b1cccb1b JB |
1624 | subq $ORIG_RAX-R15, %rsp |
1625 | CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15 | |
1fd466ef SR |
1626 | /* |
1627 | * Use save_paranoid to handle SWAPGS, but no need to use paranoid_exit | |
1628 | * as we should not be calling schedule in NMI context. | |
1629 | * Even with normal interrupts enabled. An NMI should not be | |
1630 | * setting NEED_RESCHED or anything that normal interrupts and | |
1631 | * exceptions might do. | |
1632 | */ | |
ddeb8f21 AH |
1633 | call save_paranoid |
1634 | DEFAULT_FRAME 0 | |
7fbb98c5 SR |
1635 | |
1636 | /* | |
1637 | * Save off the CR2 register. If we take a page fault in the NMI then | |
1638 | * it could corrupt the CR2 value. If the NMI preempts a page fault | |
1639 | * handler before it was able to read the CR2 register, and then the | |
1640 | * NMI itself takes a page fault, the page fault that was preempted | |
1641 | * will read the information from the NMI page fault and not the | |
1642 | * origin fault. Save it off and restore it if it changes. | |
1643 | * Use the r12 callee-saved register. | |
1644 | */ | |
1645 | movq %cr2, %r12 | |
1646 | ||
ddeb8f21 AH |
1647 | /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */ |
1648 | movq %rsp,%rdi | |
1649 | movq $-1,%rsi | |
1650 | call do_nmi | |
7fbb98c5 SR |
1651 | |
1652 | /* Did the NMI take a page fault? Restore cr2 if it did */ | |
1653 | movq %cr2, %rcx | |
1654 | cmpq %rcx, %r12 | |
1655 | je 1f | |
1656 | movq %r12, %cr2 | |
1657 | 1: | |
1658 | ||
ddeb8f21 AH |
1659 | testl %ebx,%ebx /* swapgs needed? */ |
1660 | jnz nmi_restore | |
ddeb8f21 AH |
1661 | nmi_swapgs: |
1662 | SWAPGS_UNSAFE_STACK | |
1663 | nmi_restore: | |
444723dc JB |
1664 | /* Pop the extra iret frame at once */ |
1665 | RESTORE_ALL 6*8 | |
28696f43 | 1666 | |
3f3c8b8c | 1667 | /* Clear the NMI executing stack variable */ |
28696f43 | 1668 | movq $0, 5*8(%rsp) |
ddeb8f21 | 1669 | jmp irq_return |
9f1e87ea | 1670 | CFI_ENDPROC |
ddeb8f21 AH |
1671 | END(nmi) |
1672 | ||
1673 | ENTRY(ignore_sysret) | |
1674 | CFI_STARTPROC | |
1675 | mov $-ENOSYS,%eax | |
1676 | sysret | |
1677 | CFI_ENDPROC | |
1678 | END(ignore_sysret) | |
1679 |