Merge branch 'for-linus' of git://neil.brown.name/md
[deliverable/linux.git] / arch / x86 / kernel / i387.c
CommitLineData
1da177e4 1/*
1da177e4
LT
2 * Copyright (C) 1994 Linus Torvalds
3 *
4 * Pentium III FXSR, SSE support
5 * General FPU state handling cleanups
6 * Gareth Hughes <gareth@valinux.com>, May 2000
7 */
129f6946 8#include <linux/module.h>
44210111 9#include <linux/regset.h>
f668964e
IM
10#include <linux/sched.h>
11
12#include <asm/sigcontext.h>
1da177e4 13#include <asm/processor.h>
1da177e4 14#include <asm/math_emu.h>
1da177e4 15#include <asm/uaccess.h>
f668964e
IM
16#include <asm/ptrace.h>
17#include <asm/i387.h>
18#include <asm/user.h>
1da177e4 19
44210111 20#ifdef CONFIG_X86_64
f668964e
IM
21# include <asm/sigcontext32.h>
22# include <asm/user32.h>
44210111 23#else
f668964e
IM
24# define save_i387_ia32 save_i387
25# define restore_i387_ia32 restore_i387
26# define _fpstate_ia32 _fpstate
27# define user_i387_ia32_struct user_i387_struct
28# define user32_fxsr_struct user_fxsr_struct
44210111
RM
29#endif
30
1da177e4 31#ifdef CONFIG_MATH_EMULATION
f668964e 32# define HAVE_HWFP (boot_cpu_data.hard_math)
1da177e4 33#else
f668964e 34# define HAVE_HWFP 1
1da177e4
LT
35#endif
36
f668964e 37static unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
61c4628b
SS
38unsigned int xstate_size;
39static struct i387_fxsave_struct fx_scratch __cpuinitdata;
1da177e4 40
61c4628b 41void __cpuinit mxcsr_feature_mask_init(void)
1da177e4
LT
42{
43 unsigned long mask = 0;
f668964e 44
1da177e4
LT
45 clts();
46 if (cpu_has_fxsr) {
61c4628b
SS
47 memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
48 asm volatile("fxsave %0" : : "m" (fx_scratch));
49 mask = fx_scratch.mxcsr_mask;
3b095a04
CG
50 if (mask == 0)
51 mask = 0x0000ffbf;
52 }
1da177e4
LT
53 mxcsr_feature_mask &= mask;
54 stts();
55}
56
61c4628b
SS
57void __init init_thread_xstate(void)
58{
e8a496ac
SS
59 if (!HAVE_HWFP) {
60 xstate_size = sizeof(struct i387_soft_struct);
61 return;
62 }
63
61c4628b
SS
64 if (cpu_has_fxsr)
65 xstate_size = sizeof(struct i387_fxsave_struct);
66#ifdef CONFIG_X86_32
67 else
68 xstate_size = sizeof(struct i387_fsave_struct);
69#endif
61c4628b
SS
70}
71
44210111
RM
72#ifdef CONFIG_X86_64
73/*
74 * Called at bootup to set up the initial FPU state that is later cloned
75 * into all processes.
76 */
77void __cpuinit fpu_init(void)
78{
79 unsigned long oldcr0 = read_cr0();
f668964e 80
44210111
RM
81 set_in_cr4(X86_CR4_OSFXSR);
82 set_in_cr4(X86_CR4_OSXMMEXCPT);
83
f668964e 84 write_cr0(oldcr0 & ~(X86_CR0_TS|X86_CR0_EM)); /* clear TS and EM */
44210111
RM
85
86 mxcsr_feature_mask_init();
87 /* clean state in init */
88 current_thread_info()->status = 0;
89 clear_used_math();
90}
91#endif /* CONFIG_X86_64 */
92
1da177e4
LT
93/*
94 * The _current_ task is using the FPU for the first time
95 * so initialize it and set the mxcsr to its default
96 * value at reset if we support XMM instructions and then
97 * remeber the current task has used the FPU.
98 */
aa283f49 99int init_fpu(struct task_struct *tsk)
1da177e4 100{
44210111 101 if (tsk_used_math(tsk)) {
e8a496ac 102 if (HAVE_HWFP && tsk == current)
44210111 103 unlazy_fpu(tsk);
aa283f49
SS
104 return 0;
105 }
106
107 /*
108 * Memory allocation at the first usage of the FPU and other state.
109 */
110 if (!tsk->thread.xstate) {
111 tsk->thread.xstate = kmem_cache_alloc(task_xstate_cachep,
112 GFP_KERNEL);
113 if (!tsk->thread.xstate)
114 return -ENOMEM;
44210111
RM
115 }
116
e8a496ac
SS
117#ifdef CONFIG_X86_32
118 if (!HAVE_HWFP) {
119 memset(tsk->thread.xstate, 0, xstate_size);
120 finit();
121 set_stopped_child_used_math(tsk);
122 return 0;
123 }
124#endif
125
1da177e4 126 if (cpu_has_fxsr) {
61c4628b
SS
127 struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
128
129 memset(fx, 0, xstate_size);
130 fx->cwd = 0x37f;
1da177e4 131 if (cpu_has_xmm)
61c4628b 132 fx->mxcsr = MXCSR_DEFAULT;
1da177e4 133 } else {
61c4628b
SS
134 struct i387_fsave_struct *fp = &tsk->thread.xstate->fsave;
135 memset(fp, 0, xstate_size);
136 fp->cwd = 0xffff037fu;
137 fp->swd = 0xffff0000u;
138 fp->twd = 0xffffffffu;
139 fp->fos = 0xffff0000u;
1da177e4 140 }
44210111
RM
141 /*
142 * Only the device not available exception or ptrace can call init_fpu.
143 */
1da177e4 144 set_stopped_child_used_math(tsk);
aa283f49 145 return 0;
1da177e4
LT
146}
147
44210111
RM
148int fpregs_active(struct task_struct *target, const struct user_regset *regset)
149{
150 return tsk_used_math(target) ? regset->n : 0;
151}
1da177e4 152
44210111 153int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
1da177e4 154{
44210111
RM
155 return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
156}
1da177e4 157
44210111
RM
158int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
159 unsigned int pos, unsigned int count,
160 void *kbuf, void __user *ubuf)
161{
aa283f49
SS
162 int ret;
163
44210111
RM
164 if (!cpu_has_fxsr)
165 return -ENODEV;
166
aa283f49
SS
167 ret = init_fpu(target);
168 if (ret)
169 return ret;
44210111
RM
170
171 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
61c4628b 172 &target->thread.xstate->fxsave, 0, -1);
1da177e4 173}
44210111
RM
174
175int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
176 unsigned int pos, unsigned int count,
177 const void *kbuf, const void __user *ubuf)
178{
179 int ret;
180
181 if (!cpu_has_fxsr)
182 return -ENODEV;
183
aa283f49
SS
184 ret = init_fpu(target);
185 if (ret)
186 return ret;
187
44210111
RM
188 set_stopped_child_used_math(target);
189
190 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
61c4628b 191 &target->thread.xstate->fxsave, 0, -1);
44210111
RM
192
193 /*
194 * mxcsr reserved bits must be masked to zero for security reasons.
195 */
61c4628b 196 target->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask;
44210111
RM
197
198 return ret;
199}
200
201#if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
1da177e4 202
1da177e4
LT
203/*
204 * FPU tag word conversions.
205 */
206
3b095a04 207static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
1da177e4
LT
208{
209 unsigned int tmp; /* to avoid 16 bit prefixes in the code */
3b095a04 210
1da177e4 211 /* Transform each pair of bits into 01 (valid) or 00 (empty) */
3b095a04 212 tmp = ~twd;
44210111 213 tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
3b095a04
CG
214 /* and move the valid bits to the lower byte. */
215 tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
216 tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
217 tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
f668964e 218
3b095a04 219 return tmp;
1da177e4
LT
220}
221
1da177e4 222#define FPREG_ADDR(f, n) ((void *)&(f)->st_space + (n) * 16);
44210111
RM
223#define FP_EXP_TAG_VALID 0
224#define FP_EXP_TAG_ZERO 1
225#define FP_EXP_TAG_SPECIAL 2
226#define FP_EXP_TAG_EMPTY 3
227
228static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
229{
230 struct _fpxreg *st;
231 u32 tos = (fxsave->swd >> 11) & 7;
232 u32 twd = (unsigned long) fxsave->twd;
233 u32 tag;
234 u32 ret = 0xffff0000u;
235 int i;
1da177e4 236
44210111 237 for (i = 0; i < 8; i++, twd >>= 1) {
3b095a04
CG
238 if (twd & 0x1) {
239 st = FPREG_ADDR(fxsave, (i - tos) & 7);
1da177e4 240
3b095a04 241 switch (st->exponent & 0x7fff) {
1da177e4 242 case 0x7fff:
44210111 243 tag = FP_EXP_TAG_SPECIAL;
1da177e4
LT
244 break;
245 case 0x0000:
3b095a04
CG
246 if (!st->significand[0] &&
247 !st->significand[1] &&
248 !st->significand[2] &&
44210111
RM
249 !st->significand[3])
250 tag = FP_EXP_TAG_ZERO;
251 else
252 tag = FP_EXP_TAG_SPECIAL;
1da177e4
LT
253 break;
254 default:
44210111
RM
255 if (st->significand[3] & 0x8000)
256 tag = FP_EXP_TAG_VALID;
257 else
258 tag = FP_EXP_TAG_SPECIAL;
1da177e4
LT
259 break;
260 }
261 } else {
44210111 262 tag = FP_EXP_TAG_EMPTY;
1da177e4 263 }
44210111 264 ret |= tag << (2 * i);
1da177e4
LT
265 }
266 return ret;
267}
268
269/*
44210111 270 * FXSR floating point environment conversions.
1da177e4
LT
271 */
272
f668964e
IM
273static void
274convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
1da177e4 275{
61c4628b 276 struct i387_fxsave_struct *fxsave = &tsk->thread.xstate->fxsave;
44210111
RM
277 struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
278 struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
279 int i;
1da177e4 280
44210111
RM
281 env->cwd = fxsave->cwd | 0xffff0000u;
282 env->swd = fxsave->swd | 0xffff0000u;
283 env->twd = twd_fxsr_to_i387(fxsave);
284
285#ifdef CONFIG_X86_64
286 env->fip = fxsave->rip;
287 env->foo = fxsave->rdp;
288 if (tsk == current) {
289 /*
290 * should be actually ds/cs at fpu exception time, but
291 * that information is not available in 64bit mode.
292 */
f668964e
IM
293 asm("mov %%ds, %[fos]" : [fos] "=r" (env->fos));
294 asm("mov %%cs, %[fcs]" : [fcs] "=r" (env->fcs));
1da177e4 295 } else {
44210111 296 struct pt_regs *regs = task_pt_regs(tsk);
f668964e 297
44210111
RM
298 env->fos = 0xffff0000 | tsk->thread.ds;
299 env->fcs = regs->cs;
1da177e4 300 }
44210111
RM
301#else
302 env->fip = fxsave->fip;
609b5297 303 env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
44210111
RM
304 env->foo = fxsave->foo;
305 env->fos = fxsave->fos;
306#endif
1da177e4 307
44210111
RM
308 for (i = 0; i < 8; ++i)
309 memcpy(&to[i], &from[i], sizeof(to[0]));
1da177e4
LT
310}
311
44210111
RM
312static void convert_to_fxsr(struct task_struct *tsk,
313 const struct user_i387_ia32_struct *env)
1da177e4 314
1da177e4 315{
61c4628b 316 struct i387_fxsave_struct *fxsave = &tsk->thread.xstate->fxsave;
44210111
RM
317 struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
318 struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
319 int i;
1da177e4 320
44210111
RM
321 fxsave->cwd = env->cwd;
322 fxsave->swd = env->swd;
323 fxsave->twd = twd_i387_to_fxsr(env->twd);
324 fxsave->fop = (u16) ((u32) env->fcs >> 16);
325#ifdef CONFIG_X86_64
326 fxsave->rip = env->fip;
327 fxsave->rdp = env->foo;
328 /* cs and ds ignored */
329#else
330 fxsave->fip = env->fip;
331 fxsave->fcs = (env->fcs & 0xffff);
332 fxsave->foo = env->foo;
333 fxsave->fos = env->fos;
334#endif
1da177e4 335
44210111
RM
336 for (i = 0; i < 8; ++i)
337 memcpy(&to[i], &from[i], sizeof(from[0]));
1da177e4
LT
338}
339
44210111
RM
340int fpregs_get(struct task_struct *target, const struct user_regset *regset,
341 unsigned int pos, unsigned int count,
342 void *kbuf, void __user *ubuf)
1da177e4 343{
44210111 344 struct user_i387_ia32_struct env;
aa283f49 345 int ret;
1da177e4 346
aa283f49
SS
347 ret = init_fpu(target);
348 if (ret)
349 return ret;
1da177e4 350
e8a496ac
SS
351 if (!HAVE_HWFP)
352 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
353
f668964e 354 if (!cpu_has_fxsr) {
44210111 355 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
61c4628b
SS
356 &target->thread.xstate->fsave, 0,
357 -1);
f668964e 358 }
1da177e4 359
44210111
RM
360 if (kbuf && pos == 0 && count == sizeof(env)) {
361 convert_from_fxsr(kbuf, target);
362 return 0;
1da177e4 363 }
44210111
RM
364
365 convert_from_fxsr(&env, target);
f668964e 366
44210111 367 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
1da177e4
LT
368}
369
44210111
RM
370int fpregs_set(struct task_struct *target, const struct user_regset *regset,
371 unsigned int pos, unsigned int count,
372 const void *kbuf, const void __user *ubuf)
1da177e4 373{
44210111
RM
374 struct user_i387_ia32_struct env;
375 int ret;
1da177e4 376
aa283f49
SS
377 ret = init_fpu(target);
378 if (ret)
379 return ret;
380
44210111
RM
381 set_stopped_child_used_math(target);
382
e8a496ac
SS
383 if (!HAVE_HWFP)
384 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
385
f668964e 386 if (!cpu_has_fxsr) {
44210111 387 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
61c4628b 388 &target->thread.xstate->fsave, 0, -1);
f668964e 389 }
44210111
RM
390
391 if (pos > 0 || count < sizeof(env))
392 convert_from_fxsr(&env, target);
393
394 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
395 if (!ret)
396 convert_to_fxsr(target, &env);
397
398 return ret;
1da177e4
LT
399}
400
401/*
402 * Signal frame handlers.
403 */
404
44210111 405static inline int save_i387_fsave(struct _fpstate_ia32 __user *buf)
1da177e4
LT
406{
407 struct task_struct *tsk = current;
61c4628b 408 struct i387_fsave_struct *fp = &tsk->thread.xstate->fsave;
1da177e4 409
3b095a04 410 unlazy_fpu(tsk);
61c4628b
SS
411 fp->status = fp->swd;
412 if (__copy_to_user(buf, fp, sizeof(struct i387_fsave_struct)))
1da177e4
LT
413 return -1;
414 return 1;
415}
416
44210111 417static int save_i387_fxsave(struct _fpstate_ia32 __user *buf)
1da177e4
LT
418{
419 struct task_struct *tsk = current;
61c4628b 420 struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
44210111 421 struct user_i387_ia32_struct env;
1da177e4
LT
422 int err = 0;
423
3b095a04 424 unlazy_fpu(tsk);
1da177e4 425
44210111
RM
426 convert_from_fxsr(&env, tsk);
427 if (__copy_to_user(buf, &env, sizeof(env)))
1da177e4
LT
428 return -1;
429
61c4628b 430 err |= __put_user(fx->swd, &buf->status);
3b095a04
CG
431 err |= __put_user(X86_FXSR_MAGIC, &buf->magic);
432 if (err)
1da177e4
LT
433 return -1;
434
61c4628b 435 if (__copy_to_user(&buf->_fxsr_env[0], fx,
3b095a04 436 sizeof(struct i387_fxsave_struct)))
1da177e4
LT
437 return -1;
438 return 1;
439}
440
44210111 441int save_i387_ia32(struct _fpstate_ia32 __user *buf)
1da177e4 442{
3b095a04 443 if (!used_math())
1da177e4 444 return 0;
f668964e
IM
445 /*
446 * This will cause a "finit" to be triggered by the next
1da177e4
LT
447 * attempted FPU operation by the 'current' process.
448 */
449 clear_used_math();
450
f668964e 451 if (!HAVE_HWFP) {
44210111
RM
452 return fpregs_soft_get(current, NULL,
453 0, sizeof(struct user_i387_ia32_struct),
454 NULL, buf) ? -1 : 1;
1da177e4 455 }
f668964e
IM
456
457 if (cpu_has_fxsr)
458 return save_i387_fxsave(buf);
459 else
460 return save_i387_fsave(buf);
1da177e4
LT
461}
462
44210111 463static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf)
1da177e4
LT
464{
465 struct task_struct *tsk = current;
f668964e 466
61c4628b 467 return __copy_from_user(&tsk->thread.xstate->fsave, buf,
3b095a04 468 sizeof(struct i387_fsave_struct));
1da177e4
LT
469}
470
44210111 471static int restore_i387_fxsave(struct _fpstate_ia32 __user *buf)
1da177e4 472{
1da177e4 473 struct task_struct *tsk = current;
44210111 474 struct user_i387_ia32_struct env;
f668964e
IM
475 int err;
476
61c4628b 477 err = __copy_from_user(&tsk->thread.xstate->fxsave, &buf->_fxsr_env[0],
3b095a04 478 sizeof(struct i387_fxsave_struct));
1da177e4 479 /* mxcsr reserved bits must be masked to zero for security reasons */
61c4628b 480 tsk->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask;
44210111
RM
481 if (err || __copy_from_user(&env, buf, sizeof(env)))
482 return 1;
483 convert_to_fxsr(tsk, &env);
f668964e 484
44210111 485 return 0;
1da177e4
LT
486}
487
44210111 488int restore_i387_ia32(struct _fpstate_ia32 __user *buf)
1da177e4
LT
489{
490 int err;
e8a496ac 491 struct task_struct *tsk = current;
1da177e4 492
e8a496ac 493 if (HAVE_HWFP)
fd3c3ed5
SS
494 clear_fpu(tsk);
495
e8a496ac
SS
496 if (!used_math()) {
497 err = init_fpu(tsk);
498 if (err)
499 return err;
500 }
fd3c3ed5 501
e8a496ac 502 if (HAVE_HWFP) {
f668964e 503 if (cpu_has_fxsr)
3b095a04 504 err = restore_i387_fxsave(buf);
f668964e 505 else
3b095a04 506 err = restore_i387_fsave(buf);
1da177e4 507 } else {
44210111
RM
508 err = fpregs_soft_set(current, NULL,
509 0, sizeof(struct user_i387_ia32_struct),
510 NULL, buf) != 0;
1da177e4
LT
511 }
512 set_used_math();
f668964e 513
1da177e4
LT
514 return err;
515}
516
1da177e4
LT
517/*
518 * FPU state for core dumps.
60b3b9af
RM
519 * This is only used for a.out dumps now.
520 * It is declared generically using elf_fpregset_t (which is
521 * struct user_i387_struct) but is in fact only used for 32-bit
522 * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
1da177e4 523 */
3b095a04 524int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
1da177e4 525{
1da177e4 526 struct task_struct *tsk = current;
f668964e 527 int fpvalid;
1da177e4
LT
528
529 fpvalid = !!used_math();
60b3b9af
RM
530 if (fpvalid)
531 fpvalid = !fpregs_get(tsk, NULL,
532 0, sizeof(struct user_i387_ia32_struct),
533 fpu, NULL);
1da177e4
LT
534
535 return fpvalid;
536}
129f6946 537EXPORT_SYMBOL(dump_fpu);
1da177e4 538
60b3b9af 539#endif /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */
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