Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Copyright (C) 1994 Linus Torvalds |
3 | * | |
4 | * Pentium III FXSR, SSE support | |
5 | * General FPU state handling cleanups | |
6 | * Gareth Hughes <gareth@valinux.com>, May 2000 | |
7 | */ | |
129f6946 | 8 | #include <linux/module.h> |
44210111 | 9 | #include <linux/regset.h> |
f668964e IM |
10 | #include <linux/sched.h> |
11 | ||
12 | #include <asm/sigcontext.h> | |
1da177e4 | 13 | #include <asm/processor.h> |
1da177e4 | 14 | #include <asm/math_emu.h> |
1da177e4 | 15 | #include <asm/uaccess.h> |
f668964e IM |
16 | #include <asm/ptrace.h> |
17 | #include <asm/i387.h> | |
18 | #include <asm/user.h> | |
1da177e4 | 19 | |
44210111 | 20 | #ifdef CONFIG_X86_64 |
f668964e IM |
21 | # include <asm/sigcontext32.h> |
22 | # include <asm/user32.h> | |
44210111 | 23 | #else |
f668964e IM |
24 | # define save_i387_ia32 save_i387 |
25 | # define restore_i387_ia32 restore_i387 | |
26 | # define _fpstate_ia32 _fpstate | |
27 | # define user_i387_ia32_struct user_i387_struct | |
28 | # define user32_fxsr_struct user_fxsr_struct | |
44210111 RM |
29 | #endif |
30 | ||
1da177e4 | 31 | #ifdef CONFIG_MATH_EMULATION |
f668964e | 32 | # define HAVE_HWFP (boot_cpu_data.hard_math) |
1da177e4 | 33 | #else |
f668964e | 34 | # define HAVE_HWFP 1 |
1da177e4 LT |
35 | #endif |
36 | ||
f668964e | 37 | static unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu; |
61c4628b SS |
38 | unsigned int xstate_size; |
39 | static struct i387_fxsave_struct fx_scratch __cpuinitdata; | |
1da177e4 | 40 | |
61c4628b | 41 | void __cpuinit mxcsr_feature_mask_init(void) |
1da177e4 LT |
42 | { |
43 | unsigned long mask = 0; | |
f668964e | 44 | |
1da177e4 LT |
45 | clts(); |
46 | if (cpu_has_fxsr) { | |
61c4628b SS |
47 | memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct)); |
48 | asm volatile("fxsave %0" : : "m" (fx_scratch)); | |
49 | mask = fx_scratch.mxcsr_mask; | |
3b095a04 CG |
50 | if (mask == 0) |
51 | mask = 0x0000ffbf; | |
52 | } | |
1da177e4 LT |
53 | mxcsr_feature_mask &= mask; |
54 | stts(); | |
55 | } | |
56 | ||
61c4628b SS |
57 | void __init init_thread_xstate(void) |
58 | { | |
59 | if (cpu_has_fxsr) | |
60 | xstate_size = sizeof(struct i387_fxsave_struct); | |
61 | #ifdef CONFIG_X86_32 | |
62 | else | |
63 | xstate_size = sizeof(struct i387_fsave_struct); | |
64 | #endif | |
61c4628b SS |
65 | } |
66 | ||
44210111 RM |
67 | #ifdef CONFIG_X86_64 |
68 | /* | |
69 | * Called at bootup to set up the initial FPU state that is later cloned | |
70 | * into all processes. | |
71 | */ | |
72 | void __cpuinit fpu_init(void) | |
73 | { | |
74 | unsigned long oldcr0 = read_cr0(); | |
f668964e | 75 | |
44210111 RM |
76 | set_in_cr4(X86_CR4_OSFXSR); |
77 | set_in_cr4(X86_CR4_OSXMMEXCPT); | |
78 | ||
f668964e | 79 | write_cr0(oldcr0 & ~(X86_CR0_TS|X86_CR0_EM)); /* clear TS and EM */ |
44210111 RM |
80 | |
81 | mxcsr_feature_mask_init(); | |
82 | /* clean state in init */ | |
83 | current_thread_info()->status = 0; | |
84 | clear_used_math(); | |
85 | } | |
86 | #endif /* CONFIG_X86_64 */ | |
87 | ||
1da177e4 LT |
88 | /* |
89 | * The _current_ task is using the FPU for the first time | |
90 | * so initialize it and set the mxcsr to its default | |
91 | * value at reset if we support XMM instructions and then | |
92 | * remeber the current task has used the FPU. | |
93 | */ | |
aa283f49 | 94 | int init_fpu(struct task_struct *tsk) |
1da177e4 | 95 | { |
44210111 RM |
96 | if (tsk_used_math(tsk)) { |
97 | if (tsk == current) | |
98 | unlazy_fpu(tsk); | |
aa283f49 SS |
99 | return 0; |
100 | } | |
101 | ||
102 | /* | |
103 | * Memory allocation at the first usage of the FPU and other state. | |
104 | */ | |
105 | if (!tsk->thread.xstate) { | |
106 | tsk->thread.xstate = kmem_cache_alloc(task_xstate_cachep, | |
107 | GFP_KERNEL); | |
108 | if (!tsk->thread.xstate) | |
109 | return -ENOMEM; | |
44210111 RM |
110 | } |
111 | ||
1da177e4 | 112 | if (cpu_has_fxsr) { |
61c4628b SS |
113 | struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave; |
114 | ||
115 | memset(fx, 0, xstate_size); | |
116 | fx->cwd = 0x37f; | |
1da177e4 | 117 | if (cpu_has_xmm) |
61c4628b | 118 | fx->mxcsr = MXCSR_DEFAULT; |
1da177e4 | 119 | } else { |
61c4628b SS |
120 | struct i387_fsave_struct *fp = &tsk->thread.xstate->fsave; |
121 | memset(fp, 0, xstate_size); | |
122 | fp->cwd = 0xffff037fu; | |
123 | fp->swd = 0xffff0000u; | |
124 | fp->twd = 0xffffffffu; | |
125 | fp->fos = 0xffff0000u; | |
1da177e4 | 126 | } |
44210111 RM |
127 | /* |
128 | * Only the device not available exception or ptrace can call init_fpu. | |
129 | */ | |
1da177e4 | 130 | set_stopped_child_used_math(tsk); |
aa283f49 | 131 | return 0; |
1da177e4 LT |
132 | } |
133 | ||
44210111 RM |
134 | int fpregs_active(struct task_struct *target, const struct user_regset *regset) |
135 | { | |
136 | return tsk_used_math(target) ? regset->n : 0; | |
137 | } | |
1da177e4 | 138 | |
44210111 | 139 | int xfpregs_active(struct task_struct *target, const struct user_regset *regset) |
1da177e4 | 140 | { |
44210111 RM |
141 | return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0; |
142 | } | |
1da177e4 | 143 | |
44210111 RM |
144 | int xfpregs_get(struct task_struct *target, const struct user_regset *regset, |
145 | unsigned int pos, unsigned int count, | |
146 | void *kbuf, void __user *ubuf) | |
147 | { | |
aa283f49 SS |
148 | int ret; |
149 | ||
44210111 RM |
150 | if (!cpu_has_fxsr) |
151 | return -ENODEV; | |
152 | ||
aa283f49 SS |
153 | ret = init_fpu(target); |
154 | if (ret) | |
155 | return ret; | |
44210111 RM |
156 | |
157 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, | |
61c4628b | 158 | &target->thread.xstate->fxsave, 0, -1); |
1da177e4 | 159 | } |
44210111 RM |
160 | |
161 | int xfpregs_set(struct task_struct *target, const struct user_regset *regset, | |
162 | unsigned int pos, unsigned int count, | |
163 | const void *kbuf, const void __user *ubuf) | |
164 | { | |
165 | int ret; | |
166 | ||
167 | if (!cpu_has_fxsr) | |
168 | return -ENODEV; | |
169 | ||
aa283f49 SS |
170 | ret = init_fpu(target); |
171 | if (ret) | |
172 | return ret; | |
173 | ||
44210111 RM |
174 | set_stopped_child_used_math(target); |
175 | ||
176 | ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, | |
61c4628b | 177 | &target->thread.xstate->fxsave, 0, -1); |
44210111 RM |
178 | |
179 | /* | |
180 | * mxcsr reserved bits must be masked to zero for security reasons. | |
181 | */ | |
61c4628b | 182 | target->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask; |
44210111 RM |
183 | |
184 | return ret; | |
185 | } | |
186 | ||
187 | #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION | |
1da177e4 | 188 | |
1da177e4 LT |
189 | /* |
190 | * FPU tag word conversions. | |
191 | */ | |
192 | ||
3b095a04 | 193 | static inline unsigned short twd_i387_to_fxsr(unsigned short twd) |
1da177e4 LT |
194 | { |
195 | unsigned int tmp; /* to avoid 16 bit prefixes in the code */ | |
3b095a04 | 196 | |
1da177e4 | 197 | /* Transform each pair of bits into 01 (valid) or 00 (empty) */ |
3b095a04 | 198 | tmp = ~twd; |
44210111 | 199 | tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */ |
3b095a04 CG |
200 | /* and move the valid bits to the lower byte. */ |
201 | tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */ | |
202 | tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */ | |
203 | tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */ | |
f668964e | 204 | |
3b095a04 | 205 | return tmp; |
1da177e4 LT |
206 | } |
207 | ||
1da177e4 | 208 | #define FPREG_ADDR(f, n) ((void *)&(f)->st_space + (n) * 16); |
44210111 RM |
209 | #define FP_EXP_TAG_VALID 0 |
210 | #define FP_EXP_TAG_ZERO 1 | |
211 | #define FP_EXP_TAG_SPECIAL 2 | |
212 | #define FP_EXP_TAG_EMPTY 3 | |
213 | ||
214 | static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave) | |
215 | { | |
216 | struct _fpxreg *st; | |
217 | u32 tos = (fxsave->swd >> 11) & 7; | |
218 | u32 twd = (unsigned long) fxsave->twd; | |
219 | u32 tag; | |
220 | u32 ret = 0xffff0000u; | |
221 | int i; | |
1da177e4 | 222 | |
44210111 | 223 | for (i = 0; i < 8; i++, twd >>= 1) { |
3b095a04 CG |
224 | if (twd & 0x1) { |
225 | st = FPREG_ADDR(fxsave, (i - tos) & 7); | |
1da177e4 | 226 | |
3b095a04 | 227 | switch (st->exponent & 0x7fff) { |
1da177e4 | 228 | case 0x7fff: |
44210111 | 229 | tag = FP_EXP_TAG_SPECIAL; |
1da177e4 LT |
230 | break; |
231 | case 0x0000: | |
3b095a04 CG |
232 | if (!st->significand[0] && |
233 | !st->significand[1] && | |
234 | !st->significand[2] && | |
44210111 RM |
235 | !st->significand[3]) |
236 | tag = FP_EXP_TAG_ZERO; | |
237 | else | |
238 | tag = FP_EXP_TAG_SPECIAL; | |
1da177e4 LT |
239 | break; |
240 | default: | |
44210111 RM |
241 | if (st->significand[3] & 0x8000) |
242 | tag = FP_EXP_TAG_VALID; | |
243 | else | |
244 | tag = FP_EXP_TAG_SPECIAL; | |
1da177e4 LT |
245 | break; |
246 | } | |
247 | } else { | |
44210111 | 248 | tag = FP_EXP_TAG_EMPTY; |
1da177e4 | 249 | } |
44210111 | 250 | ret |= tag << (2 * i); |
1da177e4 LT |
251 | } |
252 | return ret; | |
253 | } | |
254 | ||
255 | /* | |
44210111 | 256 | * FXSR floating point environment conversions. |
1da177e4 LT |
257 | */ |
258 | ||
f668964e IM |
259 | static void |
260 | convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk) | |
1da177e4 | 261 | { |
61c4628b | 262 | struct i387_fxsave_struct *fxsave = &tsk->thread.xstate->fxsave; |
44210111 RM |
263 | struct _fpreg *to = (struct _fpreg *) &env->st_space[0]; |
264 | struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0]; | |
265 | int i; | |
1da177e4 | 266 | |
44210111 RM |
267 | env->cwd = fxsave->cwd | 0xffff0000u; |
268 | env->swd = fxsave->swd | 0xffff0000u; | |
269 | env->twd = twd_fxsr_to_i387(fxsave); | |
270 | ||
271 | #ifdef CONFIG_X86_64 | |
272 | env->fip = fxsave->rip; | |
273 | env->foo = fxsave->rdp; | |
274 | if (tsk == current) { | |
275 | /* | |
276 | * should be actually ds/cs at fpu exception time, but | |
277 | * that information is not available in 64bit mode. | |
278 | */ | |
f668964e IM |
279 | asm("mov %%ds, %[fos]" : [fos] "=r" (env->fos)); |
280 | asm("mov %%cs, %[fcs]" : [fcs] "=r" (env->fcs)); | |
1da177e4 | 281 | } else { |
44210111 | 282 | struct pt_regs *regs = task_pt_regs(tsk); |
f668964e | 283 | |
44210111 RM |
284 | env->fos = 0xffff0000 | tsk->thread.ds; |
285 | env->fcs = regs->cs; | |
1da177e4 | 286 | } |
44210111 RM |
287 | #else |
288 | env->fip = fxsave->fip; | |
609b5297 | 289 | env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16); |
44210111 RM |
290 | env->foo = fxsave->foo; |
291 | env->fos = fxsave->fos; | |
292 | #endif | |
1da177e4 | 293 | |
44210111 RM |
294 | for (i = 0; i < 8; ++i) |
295 | memcpy(&to[i], &from[i], sizeof(to[0])); | |
1da177e4 LT |
296 | } |
297 | ||
44210111 RM |
298 | static void convert_to_fxsr(struct task_struct *tsk, |
299 | const struct user_i387_ia32_struct *env) | |
1da177e4 | 300 | |
1da177e4 | 301 | { |
61c4628b | 302 | struct i387_fxsave_struct *fxsave = &tsk->thread.xstate->fxsave; |
44210111 RM |
303 | struct _fpreg *from = (struct _fpreg *) &env->st_space[0]; |
304 | struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0]; | |
305 | int i; | |
1da177e4 | 306 | |
44210111 RM |
307 | fxsave->cwd = env->cwd; |
308 | fxsave->swd = env->swd; | |
309 | fxsave->twd = twd_i387_to_fxsr(env->twd); | |
310 | fxsave->fop = (u16) ((u32) env->fcs >> 16); | |
311 | #ifdef CONFIG_X86_64 | |
312 | fxsave->rip = env->fip; | |
313 | fxsave->rdp = env->foo; | |
314 | /* cs and ds ignored */ | |
315 | #else | |
316 | fxsave->fip = env->fip; | |
317 | fxsave->fcs = (env->fcs & 0xffff); | |
318 | fxsave->foo = env->foo; | |
319 | fxsave->fos = env->fos; | |
320 | #endif | |
1da177e4 | 321 | |
44210111 RM |
322 | for (i = 0; i < 8; ++i) |
323 | memcpy(&to[i], &from[i], sizeof(from[0])); | |
1da177e4 LT |
324 | } |
325 | ||
44210111 RM |
326 | int fpregs_get(struct task_struct *target, const struct user_regset *regset, |
327 | unsigned int pos, unsigned int count, | |
328 | void *kbuf, void __user *ubuf) | |
1da177e4 | 329 | { |
44210111 | 330 | struct user_i387_ia32_struct env; |
aa283f49 | 331 | int ret; |
1da177e4 | 332 | |
44210111 RM |
333 | if (!HAVE_HWFP) |
334 | return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf); | |
1da177e4 | 335 | |
aa283f49 SS |
336 | ret = init_fpu(target); |
337 | if (ret) | |
338 | return ret; | |
1da177e4 | 339 | |
f668964e | 340 | if (!cpu_has_fxsr) { |
44210111 | 341 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, |
61c4628b SS |
342 | &target->thread.xstate->fsave, 0, |
343 | -1); | |
f668964e | 344 | } |
1da177e4 | 345 | |
44210111 RM |
346 | if (kbuf && pos == 0 && count == sizeof(env)) { |
347 | convert_from_fxsr(kbuf, target); | |
348 | return 0; | |
1da177e4 | 349 | } |
44210111 RM |
350 | |
351 | convert_from_fxsr(&env, target); | |
f668964e | 352 | |
44210111 | 353 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1); |
1da177e4 LT |
354 | } |
355 | ||
44210111 RM |
356 | int fpregs_set(struct task_struct *target, const struct user_regset *regset, |
357 | unsigned int pos, unsigned int count, | |
358 | const void *kbuf, const void __user *ubuf) | |
1da177e4 | 359 | { |
44210111 RM |
360 | struct user_i387_ia32_struct env; |
361 | int ret; | |
1da177e4 | 362 | |
44210111 RM |
363 | if (!HAVE_HWFP) |
364 | return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf); | |
1da177e4 | 365 | |
aa283f49 SS |
366 | ret = init_fpu(target); |
367 | if (ret) | |
368 | return ret; | |
369 | ||
44210111 RM |
370 | set_stopped_child_used_math(target); |
371 | ||
f668964e | 372 | if (!cpu_has_fxsr) { |
44210111 | 373 | return user_regset_copyin(&pos, &count, &kbuf, &ubuf, |
61c4628b | 374 | &target->thread.xstate->fsave, 0, -1); |
f668964e | 375 | } |
44210111 RM |
376 | |
377 | if (pos > 0 || count < sizeof(env)) | |
378 | convert_from_fxsr(&env, target); | |
379 | ||
380 | ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1); | |
381 | if (!ret) | |
382 | convert_to_fxsr(target, &env); | |
383 | ||
384 | return ret; | |
1da177e4 LT |
385 | } |
386 | ||
387 | /* | |
388 | * Signal frame handlers. | |
389 | */ | |
390 | ||
44210111 | 391 | static inline int save_i387_fsave(struct _fpstate_ia32 __user *buf) |
1da177e4 LT |
392 | { |
393 | struct task_struct *tsk = current; | |
61c4628b | 394 | struct i387_fsave_struct *fp = &tsk->thread.xstate->fsave; |
1da177e4 | 395 | |
3b095a04 | 396 | unlazy_fpu(tsk); |
61c4628b SS |
397 | fp->status = fp->swd; |
398 | if (__copy_to_user(buf, fp, sizeof(struct i387_fsave_struct))) | |
1da177e4 LT |
399 | return -1; |
400 | return 1; | |
401 | } | |
402 | ||
44210111 | 403 | static int save_i387_fxsave(struct _fpstate_ia32 __user *buf) |
1da177e4 LT |
404 | { |
405 | struct task_struct *tsk = current; | |
61c4628b | 406 | struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave; |
44210111 | 407 | struct user_i387_ia32_struct env; |
1da177e4 LT |
408 | int err = 0; |
409 | ||
3b095a04 | 410 | unlazy_fpu(tsk); |
1da177e4 | 411 | |
44210111 RM |
412 | convert_from_fxsr(&env, tsk); |
413 | if (__copy_to_user(buf, &env, sizeof(env))) | |
1da177e4 LT |
414 | return -1; |
415 | ||
61c4628b | 416 | err |= __put_user(fx->swd, &buf->status); |
3b095a04 CG |
417 | err |= __put_user(X86_FXSR_MAGIC, &buf->magic); |
418 | if (err) | |
1da177e4 LT |
419 | return -1; |
420 | ||
61c4628b | 421 | if (__copy_to_user(&buf->_fxsr_env[0], fx, |
3b095a04 | 422 | sizeof(struct i387_fxsave_struct))) |
1da177e4 LT |
423 | return -1; |
424 | return 1; | |
425 | } | |
426 | ||
44210111 | 427 | int save_i387_ia32(struct _fpstate_ia32 __user *buf) |
1da177e4 | 428 | { |
3b095a04 | 429 | if (!used_math()) |
1da177e4 | 430 | return 0; |
f668964e IM |
431 | /* |
432 | * This will cause a "finit" to be triggered by the next | |
1da177e4 LT |
433 | * attempted FPU operation by the 'current' process. |
434 | */ | |
435 | clear_used_math(); | |
436 | ||
f668964e | 437 | if (!HAVE_HWFP) { |
44210111 RM |
438 | return fpregs_soft_get(current, NULL, |
439 | 0, sizeof(struct user_i387_ia32_struct), | |
440 | NULL, buf) ? -1 : 1; | |
1da177e4 | 441 | } |
f668964e IM |
442 | |
443 | if (cpu_has_fxsr) | |
444 | return save_i387_fxsave(buf); | |
445 | else | |
446 | return save_i387_fsave(buf); | |
1da177e4 LT |
447 | } |
448 | ||
44210111 | 449 | static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf) |
1da177e4 LT |
450 | { |
451 | struct task_struct *tsk = current; | |
f668964e | 452 | |
61c4628b | 453 | return __copy_from_user(&tsk->thread.xstate->fsave, buf, |
3b095a04 | 454 | sizeof(struct i387_fsave_struct)); |
1da177e4 LT |
455 | } |
456 | ||
44210111 | 457 | static int restore_i387_fxsave(struct _fpstate_ia32 __user *buf) |
1da177e4 | 458 | { |
1da177e4 | 459 | struct task_struct *tsk = current; |
44210111 | 460 | struct user_i387_ia32_struct env; |
f668964e IM |
461 | int err; |
462 | ||
61c4628b | 463 | err = __copy_from_user(&tsk->thread.xstate->fxsave, &buf->_fxsr_env[0], |
3b095a04 | 464 | sizeof(struct i387_fxsave_struct)); |
1da177e4 | 465 | /* mxcsr reserved bits must be masked to zero for security reasons */ |
61c4628b | 466 | tsk->thread.xstate->fxsave.mxcsr &= mxcsr_feature_mask; |
44210111 RM |
467 | if (err || __copy_from_user(&env, buf, sizeof(env))) |
468 | return 1; | |
469 | convert_to_fxsr(tsk, &env); | |
f668964e | 470 | |
44210111 | 471 | return 0; |
1da177e4 LT |
472 | } |
473 | ||
44210111 | 474 | int restore_i387_ia32(struct _fpstate_ia32 __user *buf) |
1da177e4 LT |
475 | { |
476 | int err; | |
477 | ||
3b095a04 | 478 | if (HAVE_HWFP) { |
fd3c3ed5 SS |
479 | struct task_struct *tsk = current; |
480 | ||
481 | clear_fpu(tsk); | |
482 | ||
483 | if (!used_math()) { | |
484 | err = init_fpu(tsk); | |
485 | if (err) | |
486 | return err; | |
487 | } | |
488 | ||
f668964e | 489 | if (cpu_has_fxsr) |
3b095a04 | 490 | err = restore_i387_fxsave(buf); |
f668964e | 491 | else |
3b095a04 | 492 | err = restore_i387_fsave(buf); |
1da177e4 | 493 | } else { |
44210111 RM |
494 | err = fpregs_soft_set(current, NULL, |
495 | 0, sizeof(struct user_i387_ia32_struct), | |
496 | NULL, buf) != 0; | |
1da177e4 LT |
497 | } |
498 | set_used_math(); | |
f668964e | 499 | |
1da177e4 LT |
500 | return err; |
501 | } | |
502 | ||
1da177e4 LT |
503 | /* |
504 | * FPU state for core dumps. | |
60b3b9af RM |
505 | * This is only used for a.out dumps now. |
506 | * It is declared generically using elf_fpregset_t (which is | |
507 | * struct user_i387_struct) but is in fact only used for 32-bit | |
508 | * dumps, so on 64-bit it is really struct user_i387_ia32_struct. | |
1da177e4 | 509 | */ |
3b095a04 | 510 | int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu) |
1da177e4 | 511 | { |
1da177e4 | 512 | struct task_struct *tsk = current; |
f668964e | 513 | int fpvalid; |
1da177e4 LT |
514 | |
515 | fpvalid = !!used_math(); | |
60b3b9af RM |
516 | if (fpvalid) |
517 | fpvalid = !fpregs_get(tsk, NULL, | |
518 | 0, sizeof(struct user_i387_ia32_struct), | |
519 | fpu, NULL); | |
1da177e4 LT |
520 | |
521 | return fpvalid; | |
522 | } | |
129f6946 | 523 | EXPORT_SYMBOL(dump_fpu); |
1da177e4 | 524 | |
60b3b9af | 525 | #endif /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */ |