Commit | Line | Data |
---|---|---|
8d016ef1 | 1 | /* |
835c34a1 | 2 | * 8253/PIT functions |
8d016ef1 | 3 | * |
4 | */ | |
e9e2cdb4 | 5 | #include <linux/clockchips.h> |
18de5bc4 | 6 | #include <linux/interrupt.h> |
c8344bc2 | 7 | #include <linux/spinlock.h> |
8d016ef1 | 8 | #include <linux/jiffies.h> |
8d016ef1 | 9 | #include <linux/module.h> |
08604bd9 | 10 | #include <linux/timex.h> |
c8344bc2 JSR |
11 | #include <linux/delay.h> |
12 | #include <linux/init.h> | |
13 | #include <linux/io.h> | |
8d016ef1 | 14 | |
8d016ef1 | 15 | #include <asm/i8253.h> |
4713e22c | 16 | #include <asm/hpet.h> |
c8344bc2 | 17 | #include <asm/smp.h> |
8d016ef1 | 18 | |
ced918eb | 19 | DEFINE_RAW_SPINLOCK(i8253_lock); |
8d016ef1 | 20 | EXPORT_SYMBOL(i8253_lock); |
21 | ||
e9e2cdb4 TG |
22 | /* |
23 | * HPET replaces the PIT, when enabled. So we need to know, which of | |
24 | * the two timers is used | |
25 | */ | |
26 | struct clock_event_device *global_clock_event; | |
27 | ||
28 | /* | |
29 | * Initialize the PIT timer. | |
30 | * | |
31 | * This is also called after resume to bring the PIT into operation again. | |
32 | */ | |
33 | static void init_pit_timer(enum clock_event_mode mode, | |
34 | struct clock_event_device *evt) | |
35 | { | |
ced918eb | 36 | raw_spin_lock(&i8253_lock); |
e9e2cdb4 | 37 | |
c8344bc2 | 38 | switch (mode) { |
e9e2cdb4 TG |
39 | case CLOCK_EVT_MODE_PERIODIC: |
40 | /* binary, mode 2, LSB/MSB, ch 0 */ | |
466eed22 AC |
41 | outb_pit(0x34, PIT_MODE); |
42 | outb_pit(LATCH & 0xff , PIT_CH0); /* LSB */ | |
43 | outb_pit(LATCH >> 8 , PIT_CH0); /* MSB */ | |
e9e2cdb4 TG |
44 | break; |
45 | ||
e9e2cdb4 TG |
46 | case CLOCK_EVT_MODE_SHUTDOWN: |
47 | case CLOCK_EVT_MODE_UNUSED: | |
7671988b TG |
48 | if (evt->mode == CLOCK_EVT_MODE_PERIODIC || |
49 | evt->mode == CLOCK_EVT_MODE_ONESHOT) { | |
466eed22 AC |
50 | outb_pit(0x30, PIT_MODE); |
51 | outb_pit(0, PIT_CH0); | |
52 | outb_pit(0, PIT_CH0); | |
7671988b | 53 | } |
18de5bc4 TG |
54 | break; |
55 | ||
6b3964cd | 56 | case CLOCK_EVT_MODE_ONESHOT: |
e9e2cdb4 | 57 | /* One shot setup */ |
466eed22 | 58 | outb_pit(0x38, PIT_MODE); |
18de5bc4 TG |
59 | break; |
60 | ||
61 | case CLOCK_EVT_MODE_RESUME: | |
62 | /* Nothing to do here */ | |
e9e2cdb4 TG |
63 | break; |
64 | } | |
ced918eb | 65 | raw_spin_unlock(&i8253_lock); |
e9e2cdb4 TG |
66 | } |
67 | ||
68 | /* | |
69 | * Program the next event in oneshot mode | |
70 | * | |
71 | * Delta is given in PIT ticks | |
72 | */ | |
73 | static int pit_next_event(unsigned long delta, struct clock_event_device *evt) | |
8d016ef1 | 74 | { |
ced918eb | 75 | raw_spin_lock(&i8253_lock); |
466eed22 AC |
76 | outb_pit(delta & 0xff , PIT_CH0); /* LSB */ |
77 | outb_pit(delta >> 8 , PIT_CH0); /* MSB */ | |
ced918eb | 78 | raw_spin_unlock(&i8253_lock); |
e9e2cdb4 TG |
79 | |
80 | return 0; | |
81 | } | |
82 | ||
83 | /* | |
84 | * On UP the PIT can serve all of the possible timer functions. On SMP systems | |
85 | * it can be solely used for the global tick. | |
86 | * | |
27b46d76 | 87 | * The profiling and update capabilities are switched off once the local apic is |
e9e2cdb4 TG |
88 | * registered. This mechanism replaces the previous #ifdef LOCAL_APIC - |
89 | * !using_apic_timer decisions in do_timer_interrupt_hook() | |
90 | */ | |
c8344bc2 | 91 | static struct clock_event_device pit_ce = { |
e9e2cdb4 TG |
92 | .name = "pit", |
93 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, | |
94 | .set_mode = init_pit_timer, | |
95 | .set_next_event = pit_next_event, | |
96 | .shift = 32, | |
97 | .irq = 0, | |
98 | }; | |
99 | ||
100 | /* | |
101 | * Initialize the conversion factor and the min/max deltas of the clock event | |
102 | * structure and register the clock event source with the framework. | |
103 | */ | |
104 | void __init setup_pit_timer(void) | |
105 | { | |
106 | /* | |
107 | * Start pit with the boot cpu mask and make it global after the | |
108 | * IO_APIC has been initialized. | |
109 | */ | |
c8344bc2 JSR |
110 | pit_ce.cpumask = cpumask_of(smp_processor_id()); |
111 | pit_ce.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, pit_ce.shift); | |
112 | pit_ce.max_delta_ns = clockevent_delta2ns(0x7FFF, &pit_ce); | |
113 | pit_ce.min_delta_ns = clockevent_delta2ns(0xF, &pit_ce); | |
114 | ||
115 | clockevents_register_device(&pit_ce); | |
116 | global_clock_event = &pit_ce; | |
8d016ef1 | 117 | } |
5d0cf410 | 118 | |
f5e0e93f | 119 | #ifndef CONFIG_X86_64 |
5d0cf410 | 120 | /* |
121 | * Since the PIT overflows every tick, its not very useful | |
122 | * to just read by itself. So use jiffies to emulate a free | |
123 | * running counter: | |
124 | */ | |
8e19608e | 125 | static cycle_t pit_read(struct clocksource *cs) |
5d0cf410 | 126 | { |
c8344bc2 JSR |
127 | static int old_count; |
128 | static u32 old_jifs; | |
5d0cf410 | 129 | unsigned long flags; |
130 | int count; | |
6415ce9a | 131 | u32 jifs; |
5d0cf410 | 132 | |
ced918eb | 133 | raw_spin_lock_irqsave(&i8253_lock, flags); |
e9e2cdb4 | 134 | /* |
6415ce9a | 135 | * Although our caller may have the read side of xtime_lock, |
136 | * this is now a seqlock, and we are cheating in this routine | |
137 | * by having side effects on state that we cannot undo if | |
138 | * there is a collision on the seqlock and our caller has to | |
139 | * retry. (Namely, old_jifs and old_count.) So we must treat | |
140 | * jiffies as volatile despite the lock. We read jiffies | |
141 | * before latching the timer count to guarantee that although | |
142 | * the jiffies value might be older than the count (that is, | |
143 | * the counter may underflow between the last point where | |
144 | * jiffies was incremented and the point where we latch the | |
145 | * count), it cannot be newer. | |
146 | */ | |
147 | jifs = jiffies; | |
466eed22 AC |
148 | outb_pit(0x00, PIT_MODE); /* latch the count ASAP */ |
149 | count = inb_pit(PIT_CH0); /* read the latched count */ | |
150 | count |= inb_pit(PIT_CH0) << 8; | |
5d0cf410 | 151 | |
152 | /* VIA686a test code... reset the latch if count > max + 1 */ | |
153 | if (count > LATCH) { | |
466eed22 AC |
154 | outb_pit(0x34, PIT_MODE); |
155 | outb_pit(LATCH & 0xff, PIT_CH0); | |
156 | outb_pit(LATCH >> 8, PIT_CH0); | |
5d0cf410 | 157 | count = LATCH - 1; |
158 | } | |
5d0cf410 | 159 | |
6415ce9a | 160 | /* |
161 | * It's possible for count to appear to go the wrong way for a | |
162 | * couple of reasons: | |
163 | * | |
164 | * 1. The timer counter underflows, but we haven't handled the | |
165 | * resulting interrupt and incremented jiffies yet. | |
166 | * 2. Hardware problem with the timer, not giving us continuous time, | |
167 | * the counter does small "jumps" upwards on some Pentium systems, | |
168 | * (see c't 95/10 page 335 for Neptun bug.) | |
169 | * | |
170 | * Previous attempts to handle these cases intelligently were | |
171 | * buggy, so we just do the simple thing now. | |
172 | */ | |
c8344bc2 | 173 | if (count > old_count && jifs == old_jifs) |
6415ce9a | 174 | count = old_count; |
c8344bc2 | 175 | |
6415ce9a | 176 | old_count = count; |
177 | old_jifs = jifs; | |
178 | ||
ced918eb | 179 | raw_spin_unlock_irqrestore(&i8253_lock, flags); |
5d0cf410 | 180 | |
6415ce9a | 181 | count = (LATCH - 1) - count; |
5d0cf410 | 182 | |
183 | return (cycle_t)(jifs * LATCH) + count; | |
184 | } | |
185 | ||
c8344bc2 JSR |
186 | static struct clocksource pit_cs = { |
187 | .name = "pit", | |
188 | .rating = 110, | |
189 | .read = pit_read, | |
190 | .mask = CLOCKSOURCE_MASK(32), | |
191 | .mult = 0, | |
192 | .shift = 20, | |
5d0cf410 | 193 | }; |
194 | ||
195 | static int __init init_pit_clocksource(void) | |
196 | { | |
316da3b3 TG |
197 | /* |
198 | * Several reasons not to register PIT as a clocksource: | |
199 | * | |
200 | * - On SMP PIT does not scale due to i8253_lock | |
201 | * - when HPET is enabled | |
202 | * - when local APIC timer is active (PIT is switched off) | |
203 | */ | |
204 | if (num_possible_cpus() > 1 || is_hpet_enabled() || | |
c8344bc2 | 205 | pit_ce.mode != CLOCK_EVT_MODE_PERIODIC) |
5d0cf410 | 206 | return 0; |
207 | ||
c8344bc2 JSR |
208 | pit_cs.mult = clocksource_hz2mult(CLOCK_TICK_RATE, pit_cs.shift); |
209 | ||
210 | return clocksource_register(&pit_cs); | |
5d0cf410 | 211 | } |
6bb74df4 | 212 | arch_initcall(init_pit_clocksource); |
f5e0e93f | 213 | |
c8344bc2 | 214 | #endif /* !CONFIG_X86_64 */ |