x86: irq.c use same path for show_interrupts
[deliverable/linux.git] / arch / x86 / kernel / irq.c
CommitLineData
6b39ba77
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1/*
2 * Common interrupt code for 32 and 64 bit
3 */
4#include <linux/cpu.h>
5#include <linux/interrupt.h>
6#include <linux/kernel_stat.h>
7#include <linux/seq_file.h>
6a02e710 8#include <linux/smp.h>
7c1d7cdc 9#include <linux/ftrace.h>
6b39ba77 10
7b6aa335 11#include <asm/apic.h>
6b39ba77 12#include <asm/io_apic.h>
c3d80000 13#include <asm/irq.h>
7c1d7cdc 14#include <asm/idle.h>
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15
16atomic_t irq_err_count;
17
acaabe79
DS
18/* Function pointer for generic interrupt vector handling */
19void (*generic_interrupt_extension)(void) = NULL;
20
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21/*
22 * 'what should we do if we get a hw irq event on an illegal vector'.
23 * each architecture has to answer this themselves.
24 */
25void ack_bad_irq(unsigned int irq)
26{
27 printk(KERN_ERR "unexpected IRQ trap at vector %02x\n", irq);
28
29#ifdef CONFIG_X86_LOCAL_APIC
30 /*
31 * Currently unexpected vectors happen only on SMP and APIC.
32 * We _must_ ack these because every local APIC has only N
33 * irq slots per priority level, and a 'hanging, unacked' IRQ
34 * holds up an irq slot - in excessive cases (when multiple
35 * unexpected vectors occur) that might lock up the APIC
36 * completely.
37 * But only ack when the APIC is enabled -AK
38 */
39 if (cpu_has_apic)
40 ack_APIC_irq();
41#endif
42}
43
1b437c8c 44#define irq_stats(x) (&per_cpu(irq_stat, x))
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45/*
46 * /proc/interrupts printing:
47 */
7a81d9a7 48static int show_other_interrupts(struct seq_file *p, int prec)
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49{
50 int j;
51
7a81d9a7 52 seq_printf(p, "%*s: ", prec, "NMI");
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53 for_each_online_cpu(j)
54 seq_printf(p, "%10u ", irq_stats(j)->__nmi_count);
55 seq_printf(p, " Non-maskable interrupts\n");
56#ifdef CONFIG_X86_LOCAL_APIC
7a81d9a7 57 seq_printf(p, "%*s: ", prec, "LOC");
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58 for_each_online_cpu(j)
59 seq_printf(p, "%10u ", irq_stats(j)->apic_timer_irqs);
60 seq_printf(p, " Local timer interrupts\n");
61#endif
acaabe79
DS
62 if (generic_interrupt_extension) {
63 seq_printf(p, "PLT: ");
64 for_each_online_cpu(j)
65 seq_printf(p, "%10u ", irq_stats(j)->generic_irqs);
66 seq_printf(p, " Platform interrupts\n");
67 }
6b39ba77 68#ifdef CONFIG_SMP
7a81d9a7 69 seq_printf(p, "%*s: ", prec, "RES");
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70 for_each_online_cpu(j)
71 seq_printf(p, "%10u ", irq_stats(j)->irq_resched_count);
72 seq_printf(p, " Rescheduling interrupts\n");
7a81d9a7 73 seq_printf(p, "%*s: ", prec, "CAL");
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74 for_each_online_cpu(j)
75 seq_printf(p, "%10u ", irq_stats(j)->irq_call_count);
76 seq_printf(p, " Function call interrupts\n");
7a81d9a7 77 seq_printf(p, "%*s: ", prec, "TLB");
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78 for_each_online_cpu(j)
79 seq_printf(p, "%10u ", irq_stats(j)->irq_tlb_count);
80 seq_printf(p, " TLB shootdowns\n");
81#endif
82#ifdef CONFIG_X86_MCE
7a81d9a7 83 seq_printf(p, "%*s: ", prec, "TRM");
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84 for_each_online_cpu(j)
85 seq_printf(p, "%10u ", irq_stats(j)->irq_thermal_count);
86 seq_printf(p, " Thermal event interrupts\n");
87# ifdef CONFIG_X86_64
7a81d9a7 88 seq_printf(p, "%*s: ", prec, "THR");
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89 for_each_online_cpu(j)
90 seq_printf(p, "%10u ", irq_stats(j)->irq_threshold_count);
91 seq_printf(p, " Threshold APIC interrupts\n");
92# endif
93#endif
94#ifdef CONFIG_X86_LOCAL_APIC
7a81d9a7 95 seq_printf(p, "%*s: ", prec, "SPU");
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96 for_each_online_cpu(j)
97 seq_printf(p, "%10u ", irq_stats(j)->irq_spurious_count);
98 seq_printf(p, " Spurious interrupts\n");
99#endif
7a81d9a7 100 seq_printf(p, "%*s: %10u\n", prec, "ERR", atomic_read(&irq_err_count));
6b39ba77 101#if defined(CONFIG_X86_IO_APIC)
7a81d9a7 102 seq_printf(p, "%*s: %10u\n", prec, "MIS", atomic_read(&irq_mis_count));
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103#endif
104 return 0;
105}
106
107int show_interrupts(struct seq_file *p, void *v)
108{
109 unsigned long flags, any_count = 0;
7a81d9a7 110 int i = *(loff_t *) v, j, prec;
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111 struct irqaction *action;
112 struct irq_desc *desc;
113
114 if (i > nr_irqs)
115 return 0;
116
7a81d9a7
JB
117 for (prec = 3, j = 1000; prec < 10 && j <= nr_irqs; ++prec)
118 j *= 10;
119
6b39ba77 120 if (i == nr_irqs)
7a81d9a7 121 return show_other_interrupts(p, prec);
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122
123 /* print header */
124 if (i == 0) {
7a81d9a7 125 seq_printf(p, "%*s", prec + 8, "");
6b39ba77 126 for_each_online_cpu(j)
e9f95e63 127 seq_printf(p, "CPU%-8d", j);
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128 seq_putc(p, '\n');
129 }
130
131 desc = irq_to_desc(i);
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132 if (!desc)
133 return 0;
134
6b39ba77 135 spin_lock_irqsave(&desc->lock, flags);
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136 for_each_online_cpu(j)
137 any_count |= kstat_irqs_cpu(i, j);
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138 action = desc->action;
139 if (!action && !any_count)
140 goto out;
141
7a81d9a7 142 seq_printf(p, "%*d: ", prec, i);
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143 for_each_online_cpu(j)
144 seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
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145 seq_printf(p, " %8s", desc->chip->name);
146 seq_printf(p, "-%-8s", desc->name);
147
148 if (action) {
149 seq_printf(p, " %s", action->name);
150 while ((action = action->next) != NULL)
151 seq_printf(p, ", %s", action->name);
152 }
153
154 seq_putc(p, '\n');
155out:
156 spin_unlock_irqrestore(&desc->lock, flags);
157 return 0;
158}
159
160/*
161 * /proc/stat helpers
162 */
163u64 arch_irq_stat_cpu(unsigned int cpu)
164{
165 u64 sum = irq_stats(cpu)->__nmi_count;
166
167#ifdef CONFIG_X86_LOCAL_APIC
168 sum += irq_stats(cpu)->apic_timer_irqs;
169#endif
acaabe79
DS
170 if (generic_interrupt_extension)
171 sum += irq_stats(cpu)->generic_irqs;
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172#ifdef CONFIG_SMP
173 sum += irq_stats(cpu)->irq_resched_count;
174 sum += irq_stats(cpu)->irq_call_count;
175 sum += irq_stats(cpu)->irq_tlb_count;
176#endif
177#ifdef CONFIG_X86_MCE
178 sum += irq_stats(cpu)->irq_thermal_count;
179# ifdef CONFIG_X86_64
180 sum += irq_stats(cpu)->irq_threshold_count;
181#endif
182#endif
183#ifdef CONFIG_X86_LOCAL_APIC
184 sum += irq_stats(cpu)->irq_spurious_count;
185#endif
186 return sum;
187}
188
189u64 arch_irq_stat(void)
190{
191 u64 sum = atomic_read(&irq_err_count);
192
193#ifdef CONFIG_X86_IO_APIC
194 sum += atomic_read(&irq_mis_count);
195#endif
196 return sum;
197}
c3d80000 198
7c1d7cdc
JF
199
200/*
201 * do_IRQ handles all normal device IRQ's (the special
202 * SMP cross-CPU interrupts have their own specific
203 * handlers).
204 */
205unsigned int __irq_entry do_IRQ(struct pt_regs *regs)
206{
207 struct pt_regs *old_regs = set_irq_regs(regs);
208
209 /* high bit used in ret_from_ code */
210 unsigned vector = ~regs->orig_ax;
211 unsigned irq;
212
213 exit_idle();
214 irq_enter();
215
216 irq = __get_cpu_var(vector_irq)[vector];
217
218 if (!handle_irq(irq, regs)) {
219#ifdef CONFIG_X86_64
220 if (!disable_apic)
221 ack_APIC_irq();
222#endif
223
224 if (printk_ratelimit())
225 printk(KERN_EMERG "%s: %d.%d No irq handler for vector (irq %d)\n",
226 __func__, smp_processor_id(), vector, irq);
227 }
228
229 irq_exit();
230
231 set_irq_regs(old_regs);
232 return 1;
233}
234
acaabe79
DS
235/*
236 * Handler for GENERIC_INTERRUPT_VECTOR.
237 */
238void smp_generic_interrupt(struct pt_regs *regs)
239{
240 struct pt_regs *old_regs = set_irq_regs(regs);
241
242 ack_APIC_irq();
243
244 exit_idle();
245
246 irq_enter();
247
248 inc_irq_stat(generic_irqs);
249
250 if (generic_interrupt_extension)
251 generic_interrupt_extension();
252
253 irq_exit();
254
255 set_irq_regs(old_regs);
256}
257
c3d80000 258EXPORT_SYMBOL_GPL(vector_used_by_percpu_irq);
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