Commit | Line | Data |
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6b39ba77 TG |
1 | /* |
2 | * Common interrupt code for 32 and 64 bit | |
3 | */ | |
4 | #include <linux/cpu.h> | |
5 | #include <linux/interrupt.h> | |
6 | #include <linux/kernel_stat.h> | |
7 | #include <linux/seq_file.h> | |
6a02e710 | 8 | #include <linux/smp.h> |
7c1d7cdc | 9 | #include <linux/ftrace.h> |
6b39ba77 | 10 | |
7b6aa335 | 11 | #include <asm/apic.h> |
6b39ba77 | 12 | #include <asm/io_apic.h> |
c3d80000 | 13 | #include <asm/irq.h> |
7c1d7cdc | 14 | #include <asm/idle.h> |
6b39ba77 TG |
15 | |
16 | atomic_t irq_err_count; | |
17 | ||
249f6d9e TG |
18 | /* |
19 | * 'what should we do if we get a hw irq event on an illegal vector'. | |
20 | * each architecture has to answer this themselves. | |
21 | */ | |
22 | void ack_bad_irq(unsigned int irq) | |
23 | { | |
24 | printk(KERN_ERR "unexpected IRQ trap at vector %02x\n", irq); | |
25 | ||
26 | #ifdef CONFIG_X86_LOCAL_APIC | |
27 | /* | |
28 | * Currently unexpected vectors happen only on SMP and APIC. | |
29 | * We _must_ ack these because every local APIC has only N | |
30 | * irq slots per priority level, and a 'hanging, unacked' IRQ | |
31 | * holds up an irq slot - in excessive cases (when multiple | |
32 | * unexpected vectors occur) that might lock up the APIC | |
33 | * completely. | |
34 | * But only ack when the APIC is enabled -AK | |
35 | */ | |
36 | if (cpu_has_apic) | |
37 | ack_APIC_irq(); | |
38 | #endif | |
39 | } | |
40 | ||
1b437c8c | 41 | #define irq_stats(x) (&per_cpu(irq_stat, x)) |
6b39ba77 TG |
42 | /* |
43 | * /proc/interrupts printing: | |
44 | */ | |
45 | static int show_other_interrupts(struct seq_file *p) | |
46 | { | |
47 | int j; | |
48 | ||
49 | seq_printf(p, "NMI: "); | |
50 | for_each_online_cpu(j) | |
51 | seq_printf(p, "%10u ", irq_stats(j)->__nmi_count); | |
52 | seq_printf(p, " Non-maskable interrupts\n"); | |
53 | #ifdef CONFIG_X86_LOCAL_APIC | |
54 | seq_printf(p, "LOC: "); | |
55 | for_each_online_cpu(j) | |
56 | seq_printf(p, "%10u ", irq_stats(j)->apic_timer_irqs); | |
57 | seq_printf(p, " Local timer interrupts\n"); | |
58 | #endif | |
59 | #ifdef CONFIG_SMP | |
60 | seq_printf(p, "RES: "); | |
61 | for_each_online_cpu(j) | |
62 | seq_printf(p, "%10u ", irq_stats(j)->irq_resched_count); | |
63 | seq_printf(p, " Rescheduling interrupts\n"); | |
64 | seq_printf(p, "CAL: "); | |
65 | for_each_online_cpu(j) | |
66 | seq_printf(p, "%10u ", irq_stats(j)->irq_call_count); | |
67 | seq_printf(p, " Function call interrupts\n"); | |
68 | seq_printf(p, "TLB: "); | |
69 | for_each_online_cpu(j) | |
70 | seq_printf(p, "%10u ", irq_stats(j)->irq_tlb_count); | |
71 | seq_printf(p, " TLB shootdowns\n"); | |
72 | #endif | |
73 | #ifdef CONFIG_X86_MCE | |
74 | seq_printf(p, "TRM: "); | |
75 | for_each_online_cpu(j) | |
76 | seq_printf(p, "%10u ", irq_stats(j)->irq_thermal_count); | |
77 | seq_printf(p, " Thermal event interrupts\n"); | |
78 | # ifdef CONFIG_X86_64 | |
79 | seq_printf(p, "THR: "); | |
80 | for_each_online_cpu(j) | |
81 | seq_printf(p, "%10u ", irq_stats(j)->irq_threshold_count); | |
82 | seq_printf(p, " Threshold APIC interrupts\n"); | |
83 | # endif | |
84 | #endif | |
85 | #ifdef CONFIG_X86_LOCAL_APIC | |
86 | seq_printf(p, "SPU: "); | |
87 | for_each_online_cpu(j) | |
88 | seq_printf(p, "%10u ", irq_stats(j)->irq_spurious_count); | |
89 | seq_printf(p, " Spurious interrupts\n"); | |
90 | #endif | |
91 | seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count)); | |
92 | #if defined(CONFIG_X86_IO_APIC) | |
93 | seq_printf(p, "MIS: %10u\n", atomic_read(&irq_mis_count)); | |
94 | #endif | |
95 | return 0; | |
96 | } | |
97 | ||
98 | int show_interrupts(struct seq_file *p, void *v) | |
99 | { | |
100 | unsigned long flags, any_count = 0; | |
101 | int i = *(loff_t *) v, j; | |
102 | struct irqaction *action; | |
103 | struct irq_desc *desc; | |
104 | ||
105 | if (i > nr_irqs) | |
106 | return 0; | |
107 | ||
108 | if (i == nr_irqs) | |
109 | return show_other_interrupts(p); | |
110 | ||
111 | /* print header */ | |
112 | if (i == 0) { | |
113 | seq_printf(p, " "); | |
114 | for_each_online_cpu(j) | |
e9f95e63 | 115 | seq_printf(p, "CPU%-8d", j); |
6b39ba77 TG |
116 | seq_putc(p, '\n'); |
117 | } | |
118 | ||
119 | desc = irq_to_desc(i); | |
0b8f1efa YL |
120 | if (!desc) |
121 | return 0; | |
122 | ||
6b39ba77 TG |
123 | spin_lock_irqsave(&desc->lock, flags); |
124 | #ifndef CONFIG_SMP | |
125 | any_count = kstat_irqs(i); | |
126 | #else | |
127 | for_each_online_cpu(j) | |
128 | any_count |= kstat_irqs_cpu(i, j); | |
129 | #endif | |
130 | action = desc->action; | |
131 | if (!action && !any_count) | |
132 | goto out; | |
133 | ||
134 | seq_printf(p, "%3d: ", i); | |
135 | #ifndef CONFIG_SMP | |
136 | seq_printf(p, "%10u ", kstat_irqs(i)); | |
137 | #else | |
138 | for_each_online_cpu(j) | |
139 | seq_printf(p, "%10u ", kstat_irqs_cpu(i, j)); | |
140 | #endif | |
141 | seq_printf(p, " %8s", desc->chip->name); | |
142 | seq_printf(p, "-%-8s", desc->name); | |
143 | ||
144 | if (action) { | |
145 | seq_printf(p, " %s", action->name); | |
146 | while ((action = action->next) != NULL) | |
147 | seq_printf(p, ", %s", action->name); | |
148 | } | |
149 | ||
150 | seq_putc(p, '\n'); | |
151 | out: | |
152 | spin_unlock_irqrestore(&desc->lock, flags); | |
153 | return 0; | |
154 | } | |
155 | ||
156 | /* | |
157 | * /proc/stat helpers | |
158 | */ | |
159 | u64 arch_irq_stat_cpu(unsigned int cpu) | |
160 | { | |
161 | u64 sum = irq_stats(cpu)->__nmi_count; | |
162 | ||
163 | #ifdef CONFIG_X86_LOCAL_APIC | |
164 | sum += irq_stats(cpu)->apic_timer_irqs; | |
165 | #endif | |
166 | #ifdef CONFIG_SMP | |
167 | sum += irq_stats(cpu)->irq_resched_count; | |
168 | sum += irq_stats(cpu)->irq_call_count; | |
169 | sum += irq_stats(cpu)->irq_tlb_count; | |
170 | #endif | |
171 | #ifdef CONFIG_X86_MCE | |
172 | sum += irq_stats(cpu)->irq_thermal_count; | |
173 | # ifdef CONFIG_X86_64 | |
174 | sum += irq_stats(cpu)->irq_threshold_count; | |
175 | #endif | |
176 | #endif | |
177 | #ifdef CONFIG_X86_LOCAL_APIC | |
178 | sum += irq_stats(cpu)->irq_spurious_count; | |
179 | #endif | |
180 | return sum; | |
181 | } | |
182 | ||
183 | u64 arch_irq_stat(void) | |
184 | { | |
185 | u64 sum = atomic_read(&irq_err_count); | |
186 | ||
187 | #ifdef CONFIG_X86_IO_APIC | |
188 | sum += atomic_read(&irq_mis_count); | |
189 | #endif | |
190 | return sum; | |
191 | } | |
c3d80000 | 192 | |
7c1d7cdc JF |
193 | |
194 | /* | |
195 | * do_IRQ handles all normal device IRQ's (the special | |
196 | * SMP cross-CPU interrupts have their own specific | |
197 | * handlers). | |
198 | */ | |
199 | unsigned int __irq_entry do_IRQ(struct pt_regs *regs) | |
200 | { | |
201 | struct pt_regs *old_regs = set_irq_regs(regs); | |
202 | ||
203 | /* high bit used in ret_from_ code */ | |
204 | unsigned vector = ~regs->orig_ax; | |
205 | unsigned irq; | |
206 | ||
207 | exit_idle(); | |
208 | irq_enter(); | |
209 | ||
210 | irq = __get_cpu_var(vector_irq)[vector]; | |
211 | ||
212 | if (!handle_irq(irq, regs)) { | |
213 | #ifdef CONFIG_X86_64 | |
214 | if (!disable_apic) | |
215 | ack_APIC_irq(); | |
216 | #endif | |
217 | ||
218 | if (printk_ratelimit()) | |
219 | printk(KERN_EMERG "%s: %d.%d No irq handler for vector (irq %d)\n", | |
220 | __func__, smp_processor_id(), vector, irq); | |
221 | } | |
222 | ||
223 | irq_exit(); | |
224 | ||
225 | set_irq_regs(old_regs); | |
226 | return 1; | |
227 | } | |
228 | ||
c3d80000 | 229 | EXPORT_SYMBOL_GPL(vector_used_by_percpu_irq); |