Commit | Line | Data |
---|---|---|
6b39ba77 TG |
1 | /* |
2 | * Common interrupt code for 32 and 64 bit | |
3 | */ | |
4 | #include <linux/cpu.h> | |
5 | #include <linux/interrupt.h> | |
6 | #include <linux/kernel_stat.h> | |
7 | #include <linux/seq_file.h> | |
6a02e710 | 8 | #include <linux/smp.h> |
7c1d7cdc | 9 | #include <linux/ftrace.h> |
6b39ba77 TG |
10 | |
11 | #include <asm/apic.h> | |
12 | #include <asm/io_apic.h> | |
c3d80000 | 13 | #include <asm/irq.h> |
7c1d7cdc | 14 | #include <asm/idle.h> |
6b39ba77 TG |
15 | |
16 | atomic_t irq_err_count; | |
17 | ||
acaabe79 DS |
18 | /* Function pointer for generic interrupt vector handling */ |
19 | void (*generic_interrupt_extension)(void) = NULL; | |
20 | ||
249f6d9e TG |
21 | /* |
22 | * 'what should we do if we get a hw irq event on an illegal vector'. | |
23 | * each architecture has to answer this themselves. | |
24 | */ | |
25 | void ack_bad_irq(unsigned int irq) | |
26 | { | |
27 | printk(KERN_ERR "unexpected IRQ trap at vector %02x\n", irq); | |
28 | ||
29 | #ifdef CONFIG_X86_LOCAL_APIC | |
30 | /* | |
31 | * Currently unexpected vectors happen only on SMP and APIC. | |
32 | * We _must_ ack these because every local APIC has only N | |
33 | * irq slots per priority level, and a 'hanging, unacked' IRQ | |
34 | * holds up an irq slot - in excessive cases (when multiple | |
35 | * unexpected vectors occur) that might lock up the APIC | |
36 | * completely. | |
37 | * But only ack when the APIC is enabled -AK | |
38 | */ | |
39 | if (cpu_has_apic) | |
40 | ack_APIC_irq(); | |
41 | #endif | |
42 | } | |
43 | ||
1b437c8c | 44 | #define irq_stats(x) (&per_cpu(irq_stat, x)) |
6b39ba77 TG |
45 | /* |
46 | * /proc/interrupts printing: | |
47 | */ | |
7a81d9a7 | 48 | static int show_other_interrupts(struct seq_file *p, int prec) |
6b39ba77 TG |
49 | { |
50 | int j; | |
51 | ||
7a81d9a7 | 52 | seq_printf(p, "%*s: ", prec, "NMI"); |
6b39ba77 TG |
53 | for_each_online_cpu(j) |
54 | seq_printf(p, "%10u ", irq_stats(j)->__nmi_count); | |
55 | seq_printf(p, " Non-maskable interrupts\n"); | |
56 | #ifdef CONFIG_X86_LOCAL_APIC | |
7a81d9a7 | 57 | seq_printf(p, "%*s: ", prec, "LOC"); |
6b39ba77 TG |
58 | for_each_online_cpu(j) |
59 | seq_printf(p, "%10u ", irq_stats(j)->apic_timer_irqs); | |
60 | seq_printf(p, " Local timer interrupts\n"); | |
474e56b8 JSR |
61 | |
62 | seq_printf(p, "%*s: ", prec, "SPU"); | |
63 | for_each_online_cpu(j) | |
64 | seq_printf(p, "%10u ", irq_stats(j)->irq_spurious_count); | |
65 | seq_printf(p, " Spurious interrupts\n"); | |
241771ef IM |
66 | seq_printf(p, "CNT: "); |
67 | for_each_online_cpu(j) | |
68 | seq_printf(p, "%10u ", irq_stats(j)->apic_perf_irqs); | |
69 | seq_printf(p, " Performance counter interrupts\n"); | |
b6276f35 PZ |
70 | seq_printf(p, "PND: "); |
71 | for_each_online_cpu(j) | |
72 | seq_printf(p, "%10u ", irq_stats(j)->apic_pending_irqs); | |
73 | seq_printf(p, " Performance pending work\n"); | |
6b39ba77 | 74 | #endif |
acaabe79 DS |
75 | if (generic_interrupt_extension) { |
76 | seq_printf(p, "PLT: "); | |
77 | for_each_online_cpu(j) | |
78 | seq_printf(p, "%10u ", irq_stats(j)->generic_irqs); | |
79 | seq_printf(p, " Platform interrupts\n"); | |
80 | } | |
6b39ba77 | 81 | #ifdef CONFIG_SMP |
7a81d9a7 | 82 | seq_printf(p, "%*s: ", prec, "RES"); |
6b39ba77 TG |
83 | for_each_online_cpu(j) |
84 | seq_printf(p, "%10u ", irq_stats(j)->irq_resched_count); | |
85 | seq_printf(p, " Rescheduling interrupts\n"); | |
7a81d9a7 | 86 | seq_printf(p, "%*s: ", prec, "CAL"); |
6b39ba77 TG |
87 | for_each_online_cpu(j) |
88 | seq_printf(p, "%10u ", irq_stats(j)->irq_call_count); | |
89 | seq_printf(p, " Function call interrupts\n"); | |
7a81d9a7 | 90 | seq_printf(p, "%*s: ", prec, "TLB"); |
6b39ba77 TG |
91 | for_each_online_cpu(j) |
92 | seq_printf(p, "%10u ", irq_stats(j)->irq_tlb_count); | |
93 | seq_printf(p, " TLB shootdowns\n"); | |
94 | #endif | |
95 | #ifdef CONFIG_X86_MCE | |
7a81d9a7 | 96 | seq_printf(p, "%*s: ", prec, "TRM"); |
6b39ba77 TG |
97 | for_each_online_cpu(j) |
98 | seq_printf(p, "%10u ", irq_stats(j)->irq_thermal_count); | |
99 | seq_printf(p, " Thermal event interrupts\n"); | |
100 | # ifdef CONFIG_X86_64 | |
7a81d9a7 | 101 | seq_printf(p, "%*s: ", prec, "THR"); |
6b39ba77 TG |
102 | for_each_online_cpu(j) |
103 | seq_printf(p, "%10u ", irq_stats(j)->irq_threshold_count); | |
104 | seq_printf(p, " Threshold APIC interrupts\n"); | |
105 | # endif | |
106 | #endif | |
7a81d9a7 | 107 | seq_printf(p, "%*s: %10u\n", prec, "ERR", atomic_read(&irq_err_count)); |
6b39ba77 | 108 | #if defined(CONFIG_X86_IO_APIC) |
7a81d9a7 | 109 | seq_printf(p, "%*s: %10u\n", prec, "MIS", atomic_read(&irq_mis_count)); |
6b39ba77 TG |
110 | #endif |
111 | return 0; | |
112 | } | |
113 | ||
114 | int show_interrupts(struct seq_file *p, void *v) | |
115 | { | |
116 | unsigned long flags, any_count = 0; | |
7a81d9a7 | 117 | int i = *(loff_t *) v, j, prec; |
6b39ba77 TG |
118 | struct irqaction *action; |
119 | struct irq_desc *desc; | |
120 | ||
121 | if (i > nr_irqs) | |
122 | return 0; | |
123 | ||
7a81d9a7 JB |
124 | for (prec = 3, j = 1000; prec < 10 && j <= nr_irqs; ++prec) |
125 | j *= 10; | |
126 | ||
6b39ba77 | 127 | if (i == nr_irqs) |
7a81d9a7 | 128 | return show_other_interrupts(p, prec); |
6b39ba77 TG |
129 | |
130 | /* print header */ | |
131 | if (i == 0) { | |
7a81d9a7 | 132 | seq_printf(p, "%*s", prec + 8, ""); |
6b39ba77 | 133 | for_each_online_cpu(j) |
e9f95e63 | 134 | seq_printf(p, "CPU%-8d", j); |
6b39ba77 TG |
135 | seq_putc(p, '\n'); |
136 | } | |
137 | ||
138 | desc = irq_to_desc(i); | |
0b8f1efa YL |
139 | if (!desc) |
140 | return 0; | |
141 | ||
6b39ba77 | 142 | spin_lock_irqsave(&desc->lock, flags); |
6b39ba77 TG |
143 | for_each_online_cpu(j) |
144 | any_count |= kstat_irqs_cpu(i, j); | |
6b39ba77 TG |
145 | action = desc->action; |
146 | if (!action && !any_count) | |
147 | goto out; | |
148 | ||
7a81d9a7 | 149 | seq_printf(p, "%*d: ", prec, i); |
6b39ba77 TG |
150 | for_each_online_cpu(j) |
151 | seq_printf(p, "%10u ", kstat_irqs_cpu(i, j)); | |
6b39ba77 TG |
152 | seq_printf(p, " %8s", desc->chip->name); |
153 | seq_printf(p, "-%-8s", desc->name); | |
154 | ||
155 | if (action) { | |
156 | seq_printf(p, " %s", action->name); | |
157 | while ((action = action->next) != NULL) | |
158 | seq_printf(p, ", %s", action->name); | |
159 | } | |
160 | ||
161 | seq_putc(p, '\n'); | |
162 | out: | |
163 | spin_unlock_irqrestore(&desc->lock, flags); | |
164 | return 0; | |
165 | } | |
166 | ||
167 | /* | |
168 | * /proc/stat helpers | |
169 | */ | |
170 | u64 arch_irq_stat_cpu(unsigned int cpu) | |
171 | { | |
172 | u64 sum = irq_stats(cpu)->__nmi_count; | |
173 | ||
174 | #ifdef CONFIG_X86_LOCAL_APIC | |
175 | sum += irq_stats(cpu)->apic_timer_irqs; | |
474e56b8 | 176 | sum += irq_stats(cpu)->irq_spurious_count; |
241771ef | 177 | sum += irq_stats(cpu)->apic_perf_irqs; |
b6276f35 | 178 | sum += irq_stats(cpu)->apic_pending_irqs; |
6b39ba77 | 179 | #endif |
acaabe79 DS |
180 | if (generic_interrupt_extension) |
181 | sum += irq_stats(cpu)->generic_irqs; | |
6b39ba77 TG |
182 | #ifdef CONFIG_SMP |
183 | sum += irq_stats(cpu)->irq_resched_count; | |
184 | sum += irq_stats(cpu)->irq_call_count; | |
185 | sum += irq_stats(cpu)->irq_tlb_count; | |
186 | #endif | |
187 | #ifdef CONFIG_X86_MCE | |
188 | sum += irq_stats(cpu)->irq_thermal_count; | |
189 | # ifdef CONFIG_X86_64 | |
190 | sum += irq_stats(cpu)->irq_threshold_count; | |
191 | #endif | |
6b39ba77 TG |
192 | #endif |
193 | return sum; | |
194 | } | |
195 | ||
196 | u64 arch_irq_stat(void) | |
197 | { | |
198 | u64 sum = atomic_read(&irq_err_count); | |
199 | ||
200 | #ifdef CONFIG_X86_IO_APIC | |
201 | sum += atomic_read(&irq_mis_count); | |
202 | #endif | |
203 | return sum; | |
204 | } | |
c3d80000 | 205 | |
7c1d7cdc JF |
206 | |
207 | /* | |
208 | * do_IRQ handles all normal device IRQ's (the special | |
209 | * SMP cross-CPU interrupts have their own specific | |
210 | * handlers). | |
211 | */ | |
212 | unsigned int __irq_entry do_IRQ(struct pt_regs *regs) | |
213 | { | |
214 | struct pt_regs *old_regs = set_irq_regs(regs); | |
215 | ||
216 | /* high bit used in ret_from_ code */ | |
217 | unsigned vector = ~regs->orig_ax; | |
218 | unsigned irq; | |
219 | ||
220 | exit_idle(); | |
221 | irq_enter(); | |
222 | ||
223 | irq = __get_cpu_var(vector_irq)[vector]; | |
224 | ||
225 | if (!handle_irq(irq, regs)) { | |
226 | #ifdef CONFIG_X86_64 | |
227 | if (!disable_apic) | |
228 | ack_APIC_irq(); | |
229 | #endif | |
230 | ||
231 | if (printk_ratelimit()) | |
232 | printk(KERN_EMERG "%s: %d.%d No irq handler for vector (irq %d)\n", | |
233 | __func__, smp_processor_id(), vector, irq); | |
234 | } | |
235 | ||
236 | irq_exit(); | |
237 | ||
238 | set_irq_regs(old_regs); | |
239 | return 1; | |
240 | } | |
241 | ||
acaabe79 DS |
242 | /* |
243 | * Handler for GENERIC_INTERRUPT_VECTOR. | |
244 | */ | |
245 | void smp_generic_interrupt(struct pt_regs *regs) | |
246 | { | |
247 | struct pt_regs *old_regs = set_irq_regs(regs); | |
248 | ||
249 | ack_APIC_irq(); | |
250 | ||
251 | exit_idle(); | |
252 | ||
253 | irq_enter(); | |
254 | ||
255 | inc_irq_stat(generic_irqs); | |
256 | ||
257 | if (generic_interrupt_extension) | |
258 | generic_interrupt_extension(); | |
259 | ||
260 | irq_exit(); | |
261 | ||
262 | set_irq_regs(old_regs); | |
263 | } | |
264 | ||
c3d80000 | 265 | EXPORT_SYMBOL_GPL(vector_used_by_percpu_irq); |