Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Intel CPU Microcode Update Driver for Linux | |
3 | * | |
69688262 | 4 | * Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk> |
9a3110bf | 5 | * 2006 Shaohua Li <shaohua.li@intel.com> |
1da177e4 LT |
6 | * |
7 | * This driver allows to upgrade microcode on Intel processors | |
bc4e0f9a | 8 | * belonging to IA-32 family - PentiumPro, Pentium II, |
1da177e4 LT |
9 | * Pentium III, Xeon, Pentium 4, etc. |
10 | * | |
bc4e0f9a BC |
11 | * Reference: Section 8.11 of Volume 3a, IA-32 Intel? Architecture |
12 | * Software Developer's Manual | |
13 | * Order Number 253668 or free download from: | |
14 | * | |
15 | * http://developer.intel.com/design/pentium4/manuals/253668.htm | |
1da177e4 LT |
16 | * |
17 | * For more information, go to http://www.urbanmyth.org/microcode | |
18 | * | |
19 | * This program is free software; you can redistribute it and/or | |
20 | * modify it under the terms of the GNU General Public License | |
21 | * as published by the Free Software Foundation; either version | |
22 | * 2 of the License, or (at your option) any later version. | |
23 | * | |
24 | * 1.0 16 Feb 2000, Tigran Aivazian <tigran@sco.com> | |
25 | * Initial release. | |
26 | * 1.01 18 Feb 2000, Tigran Aivazian <tigran@sco.com> | |
27 | * Added read() support + cleanups. | |
28 | * 1.02 21 Feb 2000, Tigran Aivazian <tigran@sco.com> | |
29 | * Added 'device trimming' support. open(O_WRONLY) zeroes | |
30 | * and frees the saved copy of applied microcode. | |
31 | * 1.03 29 Feb 2000, Tigran Aivazian <tigran@sco.com> | |
32 | * Made to use devfs (/dev/cpu/microcode) + cleanups. | |
33 | * 1.04 06 Jun 2000, Simon Trimmer <simon@veritas.com> | |
34 | * Added misc device support (now uses both devfs and misc). | |
35 | * Added MICROCODE_IOCFREE ioctl to clear memory. | |
36 | * 1.05 09 Jun 2000, Simon Trimmer <simon@veritas.com> | |
37 | * Messages for error cases (non Intel & no suitable microcode). | |
38 | * 1.06 03 Aug 2000, Tigran Aivazian <tigran@veritas.com> | |
39 | * Removed ->release(). Removed exclusive open and status bitmap. | |
40 | * Added microcode_rwsem to serialize read()/write()/ioctl(). | |
41 | * Removed global kernel lock usage. | |
42 | * 1.07 07 Sep 2000, Tigran Aivazian <tigran@veritas.com> | |
43 | * Write 0 to 0x8B msr and then cpuid before reading revision, | |
44 | * so that it works even if there were no update done by the | |
45 | * BIOS. Otherwise, reading from 0x8B gives junk (which happened | |
46 | * to be 0 on my machine which is why it worked even when I | |
47 | * disabled update by the BIOS) | |
48 | * Thanks to Eric W. Biederman <ebiederman@lnxi.com> for the fix. | |
49 | * 1.08 11 Dec 2000, Richard Schaal <richard.schaal@intel.com> and | |
50 | * Tigran Aivazian <tigran@veritas.com> | |
51 | * Intel Pentium 4 processor support and bugfixes. | |
52 | * 1.09 30 Oct 2001, Tigran Aivazian <tigran@veritas.com> | |
53 | * Bugfix for HT (Hyper-Threading) enabled processors | |
54 | * whereby processor resources are shared by all logical processors | |
55 | * in a single CPU package. | |
56 | * 1.10 28 Feb 2002 Asit K Mallick <asit.k.mallick@intel.com> and | |
57 | * Tigran Aivazian <tigran@veritas.com>, | |
58 | * Serialize updates as required on HT processors due to speculative | |
59 | * nature of implementation. | |
60 | * 1.11 22 Mar 2002 Tigran Aivazian <tigran@veritas.com> | |
61 | * Fix the panic when writing zero-length microcode chunk. | |
bc4e0f9a | 62 | * 1.12 29 Sep 2003 Nitin Kamble <nitin.a.kamble@intel.com>, |
1da177e4 LT |
63 | * Jun Nakajima <jun.nakajima@intel.com> |
64 | * Support for the microcode updates in the new format. | |
65 | * 1.13 10 Oct 2003 Tigran Aivazian <tigran@veritas.com> | |
66 | * Removed ->read() method and obsoleted MICROCODE_IOCFREE ioctl | |
bc4e0f9a | 67 | * because we no longer hold a copy of applied microcode |
1da177e4 LT |
68 | * in kernel memory. |
69 | * 1.14 25 Jun 2004 Tigran Aivazian <tigran@veritas.com> | |
70 | * Fix sigmatch() macro to handle old CPUs with pf == 0. | |
71 | * Thanks to Stuart Swales for pointing out this bug. | |
72 | */ | |
73 | ||
74 | //#define DEBUG /* pr_debug */ | |
a9415644 | 75 | #include <linux/capability.h> |
1da177e4 LT |
76 | #include <linux/kernel.h> |
77 | #include <linux/init.h> | |
78 | #include <linux/sched.h> | |
77149367 | 79 | #include <linux/smp_lock.h> |
5cf6c541 | 80 | #include <linux/cpumask.h> |
1da177e4 LT |
81 | #include <linux/module.h> |
82 | #include <linux/slab.h> | |
83 | #include <linux/vmalloc.h> | |
84 | #include <linux/miscdevice.h> | |
85 | #include <linux/spinlock.h> | |
86 | #include <linux/mm.h> | |
4e950f6f | 87 | #include <linux/fs.h> |
14cc3e2b | 88 | #include <linux/mutex.h> |
a30a6a2c SL |
89 | #include <linux/cpu.h> |
90 | #include <linux/firmware.h> | |
91 | #include <linux/platform_device.h> | |
1da177e4 LT |
92 | |
93 | #include <asm/msr.h> | |
94 | #include <asm/uaccess.h> | |
95 | #include <asm/processor.h> | |
96 | ||
97 | MODULE_DESCRIPTION("Intel CPU (IA-32) Microcode Update Driver"); | |
69688262 | 98 | MODULE_AUTHOR("Tigran Aivazian <tigran@aivazian.fsnet.co.uk>"); |
1da177e4 LT |
99 | MODULE_LICENSE("GPL"); |
100 | ||
ba528f28 | 101 | #define MICROCODE_VERSION "1.14a" |
1da177e4 LT |
102 | |
103 | #define DEFAULT_UCODE_DATASIZE (2000) /* 2000 bytes */ | |
104 | #define MC_HEADER_SIZE (sizeof (microcode_header_t)) /* 48 bytes */ | |
105 | #define DEFAULT_UCODE_TOTALSIZE (DEFAULT_UCODE_DATASIZE + MC_HEADER_SIZE) /* 2048 bytes */ | |
106 | #define EXT_HEADER_SIZE (sizeof (struct extended_sigtable)) /* 20 bytes */ | |
107 | #define EXT_SIGNATURE_SIZE (sizeof (struct extended_signature)) /* 12 bytes */ | |
108 | #define DWSIZE (sizeof (u32)) | |
109 | #define get_totalsize(mc) \ | |
110 | (((microcode_t *)mc)->hdr.totalsize ? \ | |
111 | ((microcode_t *)mc)->hdr.totalsize : DEFAULT_UCODE_TOTALSIZE) | |
112 | #define get_datasize(mc) \ | |
113 | (((microcode_t *)mc)->hdr.datasize ? \ | |
114 | ((microcode_t *)mc)->hdr.datasize : DEFAULT_UCODE_DATASIZE) | |
115 | ||
116 | #define sigmatch(s1, s2, p1, p2) \ | |
117 | (((s1) == (s2)) && (((p1) & (p2)) || (((p1) == 0) && ((p2) == 0)))) | |
118 | ||
119 | #define exttable_size(et) ((et)->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE) | |
120 | ||
121 | /* serialize access to the physical write to MSR 0x79 */ | |
122 | static DEFINE_SPINLOCK(microcode_update_lock); | |
123 | ||
124 | /* no concurrent ->write()s are allowed on /dev/cpu/microcode */ | |
14cc3e2b | 125 | static DEFINE_MUTEX(microcode_mutex); |
1da177e4 | 126 | |
1da177e4 | 127 | static struct ucode_cpu_info { |
9a3110bf | 128 | int valid; |
1da177e4 | 129 | unsigned int sig; |
9a3110bf | 130 | unsigned int pf; |
1da177e4 | 131 | unsigned int rev; |
1da177e4 LT |
132 | microcode_t *mc; |
133 | } ucode_cpu_info[NR_CPUS]; | |
1da177e4 | 134 | |
9a3110bf | 135 | static void collect_cpu_info(int cpu_num) |
1da177e4 | 136 | { |
92cb7612 | 137 | struct cpuinfo_x86 *c = &cpu_data(cpu_num); |
1da177e4 LT |
138 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num; |
139 | unsigned int val[2]; | |
140 | ||
9a3110bf SL |
141 | /* We should bind the task to the CPU */ |
142 | BUG_ON(raw_smp_processor_id() != cpu_num); | |
143 | uci->pf = uci->rev = 0; | |
1da177e4 | 144 | uci->mc = NULL; |
9a3110bf | 145 | uci->valid = 1; |
1da177e4 LT |
146 | |
147 | if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 || | |
148 | cpu_has(c, X86_FEATURE_IA64)) { | |
9a3110bf SL |
149 | printk(KERN_ERR "microcode: CPU%d not a capable Intel " |
150 | "processor\n", cpu_num); | |
151 | uci->valid = 0; | |
1da177e4 | 152 | return; |
9a3110bf | 153 | } |
1da177e4 | 154 | |
9a3110bf SL |
155 | uci->sig = cpuid_eax(0x00000001); |
156 | ||
157 | if ((c->x86_model >= 5) || (c->x86 > 6)) { | |
158 | /* get processor flags from MSR 0x17 */ | |
159 | rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]); | |
160 | uci->pf = 1 << ((val[1] >> 18) & 7); | |
1da177e4 LT |
161 | } |
162 | ||
163 | wrmsr(MSR_IA32_UCODE_REV, 0, 0); | |
245067d1 | 164 | /* see notes above for revision 1.07. Apparent chip bug */ |
487472bc | 165 | sync_core(); |
1da177e4 LT |
166 | /* get the current revision from MSR 0x8B */ |
167 | rdmsr(MSR_IA32_UCODE_REV, val[0], uci->rev); | |
168 | pr_debug("microcode: collect_cpu_info : sig=0x%x, pf=0x%x, rev=0x%x\n", | |
169 | uci->sig, uci->pf, uci->rev); | |
170 | } | |
171 | ||
9a3110bf SL |
172 | static inline int microcode_update_match(int cpu_num, |
173 | microcode_header_t *mc_header, int sig, int pf) | |
1da177e4 LT |
174 | { |
175 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num; | |
176 | ||
9a3110bf SL |
177 | if (!sigmatch(sig, uci->sig, pf, uci->pf) |
178 | || mc_header->rev <= uci->rev) | |
179 | return 0; | |
180 | return 1; | |
1da177e4 LT |
181 | } |
182 | ||
9a3110bf | 183 | static int microcode_sanity_check(void *mc) |
1da177e4 | 184 | { |
9a3110bf SL |
185 | microcode_header_t *mc_header = mc; |
186 | struct extended_sigtable *ext_header = NULL; | |
187 | struct extended_signature *ext_sig; | |
188 | unsigned long total_size, data_size, ext_table_size; | |
189 | int sum, orig_sum, ext_sigcount = 0, i; | |
190 | ||
191 | total_size = get_totalsize(mc_header); | |
192 | data_size = get_datasize(mc_header); | |
bd8e39f9 | 193 | if (data_size + MC_HEADER_SIZE > total_size) { |
9a3110bf SL |
194 | printk(KERN_ERR "microcode: error! " |
195 | "Bad data size in microcode data file\n"); | |
196 | return -EINVAL; | |
197 | } | |
1da177e4 | 198 | |
9a3110bf SL |
199 | if (mc_header->ldrver != 1 || mc_header->hdrver != 1) { |
200 | printk(KERN_ERR "microcode: error! " | |
201 | "Unknown microcode update format\n"); | |
202 | return -EINVAL; | |
203 | } | |
204 | ext_table_size = total_size - (MC_HEADER_SIZE + data_size); | |
205 | if (ext_table_size) { | |
206 | if ((ext_table_size < EXT_HEADER_SIZE) | |
207 | || ((ext_table_size - EXT_HEADER_SIZE) % EXT_SIGNATURE_SIZE)) { | |
208 | printk(KERN_ERR "microcode: error! " | |
209 | "Small exttable size in microcode data file\n"); | |
210 | return -EINVAL; | |
1da177e4 | 211 | } |
9a3110bf SL |
212 | ext_header = mc + MC_HEADER_SIZE + data_size; |
213 | if (ext_table_size != exttable_size(ext_header)) { | |
214 | printk(KERN_ERR "microcode: error! " | |
215 | "Bad exttable size in microcode data file\n"); | |
216 | return -EFAULT; | |
1da177e4 | 217 | } |
9a3110bf SL |
218 | ext_sigcount = ext_header->count; |
219 | } | |
1da177e4 | 220 | |
9a3110bf SL |
221 | /* check extended table checksum */ |
222 | if (ext_table_size) { | |
223 | int ext_table_sum = 0; | |
9a4b9efa | 224 | int *ext_tablep = (int *)ext_header; |
9a3110bf SL |
225 | |
226 | i = ext_table_size / DWSIZE; | |
227 | while (i--) | |
228 | ext_table_sum += ext_tablep[i]; | |
229 | if (ext_table_sum) { | |
230 | printk(KERN_WARNING "microcode: aborting, " | |
231 | "bad extended signature table checksum\n"); | |
232 | return -EINVAL; | |
1da177e4 | 233 | } |
9a3110bf | 234 | } |
1da177e4 | 235 | |
9a3110bf SL |
236 | /* calculate the checksum */ |
237 | orig_sum = 0; | |
238 | i = (MC_HEADER_SIZE + data_size) / DWSIZE; | |
239 | while (i--) | |
240 | orig_sum += ((int *)mc)[i]; | |
241 | if (orig_sum) { | |
242 | printk(KERN_ERR "microcode: aborting, bad checksum\n"); | |
243 | return -EINVAL; | |
244 | } | |
245 | if (!ext_table_size) | |
246 | return 0; | |
247 | /* check extended signature checksum */ | |
248 | for (i = 0; i < ext_sigcount; i++) { | |
ade1af77 JE |
249 | ext_sig = (void *)ext_header + EXT_HEADER_SIZE + |
250 | EXT_SIGNATURE_SIZE * i; | |
9a3110bf SL |
251 | sum = orig_sum |
252 | - (mc_header->sig + mc_header->pf + mc_header->cksum) | |
253 | + (ext_sig->sig + ext_sig->pf + ext_sig->cksum); | |
254 | if (sum) { | |
255 | printk(KERN_ERR "microcode: aborting, bad checksum\n"); | |
256 | return -EINVAL; | |
1da177e4 | 257 | } |
9a3110bf SL |
258 | } |
259 | return 0; | |
260 | } | |
5cf6c541 | 261 | |
9a3110bf SL |
262 | /* |
263 | * return 0 - no update found | |
264 | * return 1 - found update | |
265 | * return < 0 - error | |
266 | */ | |
267 | static int get_maching_microcode(void *mc, int cpu) | |
268 | { | |
269 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; | |
270 | microcode_header_t *mc_header = mc; | |
271 | struct extended_sigtable *ext_header; | |
272 | unsigned long total_size = get_totalsize(mc_header); | |
273 | int ext_sigcount, i; | |
274 | struct extended_signature *ext_sig; | |
275 | void *new_mc; | |
276 | ||
277 | if (microcode_update_match(cpu, mc_header, | |
278 | mc_header->sig, mc_header->pf)) | |
279 | goto find; | |
280 | ||
281 | if (total_size <= get_datasize(mc_header) + MC_HEADER_SIZE) | |
282 | return 0; | |
283 | ||
ade1af77 | 284 | ext_header = mc + get_datasize(mc_header) + MC_HEADER_SIZE; |
9a3110bf | 285 | ext_sigcount = ext_header->count; |
ade1af77 | 286 | ext_sig = (void *)ext_header + EXT_HEADER_SIZE; |
9a3110bf SL |
287 | for (i = 0; i < ext_sigcount; i++) { |
288 | if (microcode_update_match(cpu, mc_header, | |
289 | ext_sig->sig, ext_sig->pf)) | |
290 | goto find; | |
291 | ext_sig++; | |
292 | } | |
293 | return 0; | |
294 | find: | |
fe176de0 | 295 | pr_debug("microcode: CPU%d found a matching microcode update with" |
9a3110bf SL |
296 | " version 0x%x (current=0x%x)\n", cpu, mc_header->rev,uci->rev); |
297 | new_mc = vmalloc(total_size); | |
298 | if (!new_mc) { | |
299 | printk(KERN_ERR "microcode: error! Can not allocate memory\n"); | |
300 | return -ENOMEM; | |
301 | } | |
1da177e4 | 302 | |
9a3110bf SL |
303 | /* free previous update file */ |
304 | vfree(uci->mc); | |
1da177e4 | 305 | |
9a3110bf SL |
306 | memcpy(new_mc, mc, total_size); |
307 | uci->mc = new_mc; | |
308 | return 1; | |
1da177e4 LT |
309 | } |
310 | ||
9a3110bf | 311 | static void apply_microcode(int cpu) |
1da177e4 LT |
312 | { |
313 | unsigned long flags; | |
314 | unsigned int val[2]; | |
9a3110bf | 315 | int cpu_num = raw_smp_processor_id(); |
1da177e4 LT |
316 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num; |
317 | ||
9a3110bf SL |
318 | /* We should bind the task to the CPU */ |
319 | BUG_ON(cpu_num != cpu); | |
320 | ||
321 | if (uci->mc == NULL) | |
1da177e4 | 322 | return; |
1da177e4 LT |
323 | |
324 | /* serialize access to the physical write to MSR 0x79 */ | |
bc4e0f9a | 325 | spin_lock_irqsave(µcode_update_lock, flags); |
1da177e4 LT |
326 | |
327 | /* write microcode via MSR 0x79 */ | |
328 | wrmsr(MSR_IA32_UCODE_WRITE, | |
bc4e0f9a | 329 | (unsigned long) uci->mc->bits, |
1da177e4 LT |
330 | (unsigned long) uci->mc->bits >> 16 >> 16); |
331 | wrmsr(MSR_IA32_UCODE_REV, 0, 0); | |
332 | ||
245067d1 | 333 | /* see notes above for revision 1.07. Apparent chip bug */ |
487472bc | 334 | sync_core(); |
245067d1 | 335 | |
1da177e4 LT |
336 | /* get the current revision from MSR 0x8B */ |
337 | rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]); | |
338 | ||
1da177e4 | 339 | spin_unlock_irqrestore(µcode_update_lock, flags); |
9a3110bf | 340 | if (val[1] != uci->mc->hdr.rev) { |
fe176de0 | 341 | printk(KERN_ERR "microcode: CPU%d update from revision " |
9a3110bf SL |
342 | "0x%x to 0x%x failed\n", cpu_num, uci->rev, val[1]); |
343 | return; | |
344 | } | |
fe176de0 | 345 | printk(KERN_INFO "microcode: CPU%d updated from revision " |
bc4e0f9a | 346 | "0x%x to 0x%x, date = %08x \n", |
1da177e4 | 347 | cpu_num, uci->rev, val[1], uci->mc->hdr.date); |
9a3110bf | 348 | uci->rev = val[1]; |
1da177e4 LT |
349 | } |
350 | ||
9a3110bf SL |
351 | #ifdef CONFIG_MICROCODE_OLD_INTERFACE |
352 | static void __user *user_buffer; /* user area microcode data buffer */ | |
353 | static unsigned int user_buffer_size; /* it's size */ | |
1da177e4 | 354 | |
9a3110bf SL |
355 | static long get_next_ucode(void **mc, long offset) |
356 | { | |
357 | microcode_header_t mc_header; | |
358 | unsigned long total_size; | |
359 | ||
360 | /* No more data */ | |
361 | if (offset >= user_buffer_size) | |
362 | return 0; | |
363 | if (copy_from_user(&mc_header, user_buffer + offset, MC_HEADER_SIZE)) { | |
364 | printk(KERN_ERR "microcode: error! Can not read user data\n"); | |
365 | return -EFAULT; | |
1da177e4 | 366 | } |
9a3110bf | 367 | total_size = get_totalsize(&mc_header); |
bd8e39f9 | 368 | if (offset + total_size > user_buffer_size) { |
9a3110bf SL |
369 | printk(KERN_ERR "microcode: error! Bad total size in microcode " |
370 | "data file\n"); | |
371 | return -EINVAL; | |
1da177e4 | 372 | } |
9a3110bf SL |
373 | *mc = vmalloc(total_size); |
374 | if (!*mc) | |
375 | return -ENOMEM; | |
376 | if (copy_from_user(*mc, user_buffer + offset, total_size)) { | |
377 | printk(KERN_ERR "microcode: error! Can not read user data\n"); | |
378 | vfree(*mc); | |
379 | return -EFAULT; | |
1da177e4 | 380 | } |
9a3110bf SL |
381 | return offset + total_size; |
382 | } | |
1da177e4 | 383 | |
9a3110bf SL |
384 | static int do_microcode_update (void) |
385 | { | |
386 | long cursor = 0; | |
387 | int error = 0; | |
2ba1ff2b | 388 | void *new_mc = NULL; |
9a3110bf SL |
389 | int cpu; |
390 | cpumask_t old; | |
65c01184 | 391 | cpumask_of_cpu_ptr_declare(newmask); |
9a3110bf SL |
392 | |
393 | old = current->cpus_allowed; | |
394 | ||
395 | while ((cursor = get_next_ucode(&new_mc, cursor)) > 0) { | |
396 | error = microcode_sanity_check(new_mc); | |
397 | if (error) | |
398 | goto out; | |
399 | /* | |
400 | * It's possible the data file has multiple matching ucode, | |
401 | * lets keep searching till the latest version | |
402 | */ | |
403 | for_each_online_cpu(cpu) { | |
404 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; | |
405 | ||
406 | if (!uci->valid) | |
407 | continue; | |
65c01184 MT |
408 | cpumask_of_cpu_ptr_next(newmask, cpu); |
409 | set_cpus_allowed_ptr(current, newmask); | |
9a3110bf SL |
410 | error = get_maching_microcode(new_mc, cpu); |
411 | if (error < 0) | |
412 | goto out; | |
413 | if (error == 1) | |
414 | apply_microcode(cpu); | |
1da177e4 | 415 | } |
9a3110bf | 416 | vfree(new_mc); |
1da177e4 LT |
417 | } |
418 | out: | |
9a3110bf SL |
419 | if (cursor > 0) |
420 | vfree(new_mc); | |
421 | if (cursor < 0) | |
422 | error = cursor; | |
fc0e4748 | 423 | set_cpus_allowed_ptr(current, &old); |
1da177e4 LT |
424 | return error; |
425 | } | |
426 | ||
9a3110bf SL |
427 | static int microcode_open (struct inode *unused1, struct file *unused2) |
428 | { | |
77149367 | 429 | cycle_kernel_lock(); |
9a3110bf SL |
430 | return capable(CAP_SYS_RAWIO) ? 0 : -EPERM; |
431 | } | |
432 | ||
1da177e4 LT |
433 | static ssize_t microcode_write (struct file *file, const char __user *buf, size_t len, loff_t *ppos) |
434 | { | |
435 | ssize_t ret; | |
436 | ||
1da177e4 LT |
437 | if ((len >> PAGE_SHIFT) > num_physpages) { |
438 | printk(KERN_ERR "microcode: too much data (max %ld pages)\n", num_physpages); | |
439 | return -EINVAL; | |
440 | } | |
441 | ||
86ef5c9a | 442 | get_online_cpus(); |
14cc3e2b | 443 | mutex_lock(µcode_mutex); |
1da177e4 LT |
444 | |
445 | user_buffer = (void __user *) buf; | |
446 | user_buffer_size = (int) len; | |
447 | ||
448 | ret = do_microcode_update(); | |
449 | if (!ret) | |
450 | ret = (ssize_t)len; | |
451 | ||
14cc3e2b | 452 | mutex_unlock(µcode_mutex); |
86ef5c9a | 453 | put_online_cpus(); |
1da177e4 LT |
454 | |
455 | return ret; | |
456 | } | |
457 | ||
5dfe4c96 | 458 | static const struct file_operations microcode_fops = { |
1da177e4 LT |
459 | .owner = THIS_MODULE, |
460 | .write = microcode_write, | |
1da177e4 LT |
461 | .open = microcode_open, |
462 | }; | |
463 | ||
464 | static struct miscdevice microcode_dev = { | |
465 | .minor = MICROCODE_MINOR, | |
466 | .name = "microcode", | |
1da177e4 LT |
467 | .fops = µcode_fops, |
468 | }; | |
469 | ||
9a3110bf | 470 | static int __init microcode_dev_init (void) |
1da177e4 LT |
471 | { |
472 | int error; | |
473 | ||
474 | error = misc_register(µcode_dev); | |
475 | if (error) { | |
476 | printk(KERN_ERR | |
477 | "microcode: can't misc_register on minor=%d\n", | |
478 | MICROCODE_MINOR); | |
479 | return error; | |
480 | } | |
481 | ||
9a3110bf SL |
482 | return 0; |
483 | } | |
484 | ||
f8281a2b | 485 | static void microcode_dev_exit (void) |
9a3110bf SL |
486 | { |
487 | misc_deregister(µcode_dev); | |
488 | } | |
489 | ||
490 | MODULE_ALIAS_MISCDEV(MICROCODE_MINOR); | |
491 | #else | |
492 | #define microcode_dev_init() 0 | |
493 | #define microcode_dev_exit() do { } while(0) | |
494 | #endif | |
495 | ||
a13b04af | 496 | static long get_next_ucode_from_buffer(void **mc, const u8 *buf, |
a30a6a2c SL |
497 | unsigned long size, long offset) |
498 | { | |
499 | microcode_header_t *mc_header; | |
500 | unsigned long total_size; | |
501 | ||
502 | /* No more data */ | |
503 | if (offset >= size) | |
504 | return 0; | |
505 | mc_header = (microcode_header_t *)(buf + offset); | |
506 | total_size = get_totalsize(mc_header); | |
507 | ||
bd8e39f9 | 508 | if (offset + total_size > size) { |
a30a6a2c SL |
509 | printk(KERN_ERR "microcode: error! Bad data in microcode data file\n"); |
510 | return -EINVAL; | |
511 | } | |
512 | ||
513 | *mc = vmalloc(total_size); | |
514 | if (!*mc) { | |
515 | printk(KERN_ERR "microcode: error! Can not allocate memory\n"); | |
516 | return -ENOMEM; | |
517 | } | |
518 | memcpy(*mc, buf + offset, total_size); | |
519 | return offset + total_size; | |
520 | } | |
521 | ||
522 | /* fake device for request_firmware */ | |
523 | static struct platform_device *microcode_pdev; | |
524 | ||
525 | static int cpu_request_microcode(int cpu) | |
526 | { | |
527 | char name[30]; | |
92cb7612 | 528 | struct cpuinfo_x86 *c = &cpu_data(cpu); |
a30a6a2c | 529 | const struct firmware *firmware; |
a13b04af | 530 | const u8 *buf; |
a30a6a2c SL |
531 | unsigned long size; |
532 | long offset = 0; | |
533 | int error; | |
534 | void *mc; | |
535 | ||
536 | /* We should bind the task to the CPU */ | |
537 | BUG_ON(cpu != raw_smp_processor_id()); | |
538 | sprintf(name,"intel-ucode/%02x-%02x-%02x", | |
539 | c->x86, c->x86_model, c->x86_mask); | |
540 | error = request_firmware(&firmware, name, µcode_pdev->dev); | |
541 | if (error) { | |
bc4e0f9a | 542 | pr_debug("microcode: data file %s load failed\n", name); |
a30a6a2c SL |
543 | return error; |
544 | } | |
ade1af77 | 545 | buf = firmware->data; |
a30a6a2c SL |
546 | size = firmware->size; |
547 | while ((offset = get_next_ucode_from_buffer(&mc, buf, size, offset)) | |
548 | > 0) { | |
549 | error = microcode_sanity_check(mc); | |
550 | if (error) | |
551 | break; | |
552 | error = get_maching_microcode(mc, cpu); | |
553 | if (error < 0) | |
554 | break; | |
555 | /* | |
556 | * It's possible the data file has multiple matching ucode, | |
557 | * lets keep searching till the latest version | |
558 | */ | |
559 | if (error == 1) { | |
560 | apply_microcode(cpu); | |
561 | error = 0; | |
562 | } | |
563 | vfree(mc); | |
564 | } | |
565 | if (offset > 0) | |
566 | vfree(mc); | |
567 | if (offset < 0) | |
568 | error = offset; | |
569 | release_firmware(firmware); | |
570 | ||
571 | return error; | |
572 | } | |
573 | ||
455c017a | 574 | static int apply_microcode_check_cpu(int cpu) |
1d64b9cb | 575 | { |
92cb7612 | 576 | struct cpuinfo_x86 *c = &cpu_data(cpu); |
1d64b9cb RW |
577 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; |
578 | cpumask_t old; | |
65c01184 | 579 | cpumask_of_cpu_ptr(newmask, cpu); |
1d64b9cb RW |
580 | unsigned int val[2]; |
581 | int err = 0; | |
582 | ||
455c017a | 583 | /* Check if the microcode is available */ |
1d64b9cb | 584 | if (!uci->mc) |
455c017a | 585 | return 0; |
1d64b9cb RW |
586 | |
587 | old = current->cpus_allowed; | |
65c01184 | 588 | set_cpus_allowed_ptr(current, newmask); |
1d64b9cb RW |
589 | |
590 | /* Check if the microcode we have in memory matches the CPU */ | |
591 | if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 || | |
592 | cpu_has(c, X86_FEATURE_IA64) || uci->sig != cpuid_eax(0x00000001)) | |
593 | err = -EINVAL; | |
594 | ||
595 | if (!err && ((c->x86_model >= 5) || (c->x86 > 6))) { | |
596 | /* get processor flags from MSR 0x17 */ | |
597 | rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]); | |
598 | if (uci->pf != (1 << ((val[1] >> 18) & 7))) | |
599 | err = -EINVAL; | |
600 | } | |
601 | ||
602 | if (!err) { | |
603 | wrmsr(MSR_IA32_UCODE_REV, 0, 0); | |
604 | /* see notes above for revision 1.07. Apparent chip bug */ | |
605 | sync_core(); | |
606 | /* get the current revision from MSR 0x8B */ | |
607 | rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]); | |
608 | if (uci->rev != val[1]) | |
609 | err = -EINVAL; | |
610 | } | |
611 | ||
612 | if (!err) | |
613 | apply_microcode(cpu); | |
614 | else | |
615 | printk(KERN_ERR "microcode: Could not apply microcode to CPU%d:" | |
616 | " sig=0x%x, pf=0x%x, rev=0x%x\n", | |
617 | cpu, uci->sig, uci->pf, uci->rev); | |
618 | ||
fc0e4748 | 619 | set_cpus_allowed_ptr(current, &old); |
1d64b9cb RW |
620 | return err; |
621 | } | |
622 | ||
455c017a | 623 | static void microcode_init_cpu(int cpu, int resume) |
a30a6a2c SL |
624 | { |
625 | cpumask_t old; | |
65c01184 | 626 | cpumask_of_cpu_ptr(newmask, cpu); |
a30a6a2c SL |
627 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; |
628 | ||
629 | old = current->cpus_allowed; | |
630 | ||
65c01184 | 631 | set_cpus_allowed_ptr(current, newmask); |
a30a6a2c SL |
632 | mutex_lock(µcode_mutex); |
633 | collect_cpu_info(cpu); | |
455c017a | 634 | if (uci->valid && system_state == SYSTEM_RUNNING && !resume) |
a30a6a2c SL |
635 | cpu_request_microcode(cpu); |
636 | mutex_unlock(µcode_mutex); | |
fc0e4748 | 637 | set_cpus_allowed_ptr(current, &old); |
a30a6a2c SL |
638 | } |
639 | ||
640 | static void microcode_fini_cpu(int cpu) | |
641 | { | |
642 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; | |
643 | ||
644 | mutex_lock(µcode_mutex); | |
645 | uci->valid = 0; | |
646 | vfree(uci->mc); | |
647 | uci->mc = NULL; | |
648 | mutex_unlock(µcode_mutex); | |
649 | } | |
650 | ||
4a0b2b4d AK |
651 | static ssize_t reload_store(struct sys_device *dev, |
652 | struct sysdev_attribute *attr, | |
653 | const char *buf, size_t sz) | |
9a4b9efa SL |
654 | { |
655 | struct ucode_cpu_info *uci = ucode_cpu_info + dev->id; | |
656 | char *end; | |
657 | unsigned long val = simple_strtoul(buf, &end, 0); | |
658 | int err = 0; | |
659 | int cpu = dev->id; | |
660 | ||
661 | if (end == buf) | |
662 | return -EINVAL; | |
663 | if (val == 1) { | |
664 | cpumask_t old; | |
65c01184 | 665 | cpumask_of_cpu_ptr(newmask, cpu); |
9a4b9efa SL |
666 | |
667 | old = current->cpus_allowed; | |
668 | ||
86ef5c9a | 669 | get_online_cpus(); |
65c01184 | 670 | set_cpus_allowed_ptr(current, newmask); |
9a4b9efa SL |
671 | |
672 | mutex_lock(µcode_mutex); | |
673 | if (uci->valid) | |
674 | err = cpu_request_microcode(cpu); | |
675 | mutex_unlock(µcode_mutex); | |
86ef5c9a | 676 | put_online_cpus(); |
fc0e4748 | 677 | set_cpus_allowed_ptr(current, &old); |
9a4b9efa SL |
678 | } |
679 | if (err) | |
680 | return err; | |
681 | return sz; | |
682 | } | |
683 | ||
4a0b2b4d AK |
684 | static ssize_t version_show(struct sys_device *dev, |
685 | struct sysdev_attribute *attr, char *buf) | |
9a4b9efa SL |
686 | { |
687 | struct ucode_cpu_info *uci = ucode_cpu_info + dev->id; | |
688 | ||
689 | return sprintf(buf, "0x%x\n", uci->rev); | |
690 | } | |
691 | ||
4a0b2b4d AK |
692 | static ssize_t pf_show(struct sys_device *dev, |
693 | struct sysdev_attribute *attr, char *buf) | |
9a4b9efa SL |
694 | { |
695 | struct ucode_cpu_info *uci = ucode_cpu_info + dev->id; | |
696 | ||
697 | return sprintf(buf, "0x%x\n", uci->pf); | |
698 | } | |
699 | ||
700 | static SYSDEV_ATTR(reload, 0200, NULL, reload_store); | |
701 | static SYSDEV_ATTR(version, 0400, version_show, NULL); | |
702 | static SYSDEV_ATTR(processor_flags, 0400, pf_show, NULL); | |
703 | ||
704 | static struct attribute *mc_default_attrs[] = { | |
705 | &attr_reload.attr, | |
706 | &attr_version.attr, | |
707 | &attr_processor_flags.attr, | |
708 | NULL | |
709 | }; | |
710 | ||
711 | static struct attribute_group mc_attr_group = { | |
712 | .attrs = mc_default_attrs, | |
713 | .name = "microcode", | |
714 | }; | |
715 | ||
455c017a | 716 | static int __mc_sysdev_add(struct sys_device *sys_dev, int resume) |
9a4b9efa | 717 | { |
2e3ad8af | 718 | int err, cpu = sys_dev->id; |
9a4b9efa SL |
719 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; |
720 | ||
721 | if (!cpu_online(cpu)) | |
722 | return 0; | |
2e3ad8af | 723 | |
fe176de0 | 724 | pr_debug("microcode: CPU%d added\n", cpu); |
455c017a | 725 | memset(uci, 0, sizeof(*uci)); |
2e3ad8af JG |
726 | |
727 | err = sysfs_create_group(&sys_dev->kobj, &mc_attr_group); | |
728 | if (err) | |
729 | return err; | |
9a4b9efa | 730 | |
455c017a | 731 | microcode_init_cpu(cpu, resume); |
1d64b9cb | 732 | |
9a4b9efa SL |
733 | return 0; |
734 | } | |
735 | ||
455c017a RW |
736 | static int mc_sysdev_add(struct sys_device *sys_dev) |
737 | { | |
738 | return __mc_sysdev_add(sys_dev, 0); | |
739 | } | |
740 | ||
9a4b9efa SL |
741 | static int mc_sysdev_remove(struct sys_device *sys_dev) |
742 | { | |
743 | int cpu = sys_dev->id; | |
744 | ||
745 | if (!cpu_online(cpu)) | |
746 | return 0; | |
455c017a | 747 | |
fe176de0 | 748 | pr_debug("microcode: CPU%d removed\n", cpu); |
455c017a | 749 | microcode_fini_cpu(cpu); |
9a4b9efa SL |
750 | sysfs_remove_group(&sys_dev->kobj, &mc_attr_group); |
751 | return 0; | |
752 | } | |
753 | ||
754 | static int mc_sysdev_resume(struct sys_device *dev) | |
755 | { | |
756 | int cpu = dev->id; | |
757 | ||
758 | if (!cpu_online(cpu)) | |
759 | return 0; | |
fe176de0 | 760 | pr_debug("microcode: CPU%d resumed\n", cpu); |
9a4b9efa SL |
761 | /* only CPU 0 will apply ucode here */ |
762 | apply_microcode(0); | |
763 | return 0; | |
764 | } | |
765 | ||
766 | static struct sysdev_driver mc_sysdev_driver = { | |
767 | .add = mc_sysdev_add, | |
768 | .remove = mc_sysdev_remove, | |
769 | .resume = mc_sysdev_resume, | |
770 | }; | |
771 | ||
9a4b9efa SL |
772 | static __cpuinit int |
773 | mc_cpu_callback(struct notifier_block *nb, unsigned long action, void *hcpu) | |
774 | { | |
775 | unsigned int cpu = (unsigned long)hcpu; | |
776 | struct sys_device *sys_dev; | |
777 | ||
778 | sys_dev = get_cpu_sysdev(cpu); | |
779 | switch (action) { | |
455c017a RW |
780 | case CPU_UP_CANCELED_FROZEN: |
781 | /* The CPU refused to come up during a system resume */ | |
782 | microcode_fini_cpu(cpu); | |
783 | break; | |
9a4b9efa SL |
784 | case CPU_ONLINE: |
785 | case CPU_DOWN_FAILED: | |
786 | mc_sysdev_add(sys_dev); | |
787 | break; | |
455c017a RW |
788 | case CPU_ONLINE_FROZEN: |
789 | /* System-wide resume is in progress, try to apply microcode */ | |
790 | if (apply_microcode_check_cpu(cpu)) { | |
791 | /* The application of microcode failed */ | |
792 | microcode_fini_cpu(cpu); | |
793 | __mc_sysdev_add(sys_dev, 1); | |
794 | break; | |
795 | } | |
796 | case CPU_DOWN_FAILED_FROZEN: | |
797 | if (sysfs_create_group(&sys_dev->kobj, &mc_attr_group)) | |
fe176de0 | 798 | printk(KERN_ERR "microcode: Failed to create the sysfs " |
455c017a RW |
799 | "group for CPU%d\n", cpu); |
800 | break; | |
9a4b9efa SL |
801 | case CPU_DOWN_PREPARE: |
802 | mc_sysdev_remove(sys_dev); | |
803 | break; | |
455c017a RW |
804 | case CPU_DOWN_PREPARE_FROZEN: |
805 | /* Suspend is in progress, only remove the interface */ | |
806 | sysfs_remove_group(&sys_dev->kobj, &mc_attr_group); | |
807 | break; | |
9a4b9efa SL |
808 | } |
809 | return NOTIFY_OK; | |
810 | } | |
811 | ||
c72258c7 | 812 | static struct notifier_block __refdata mc_cpu_notifier = { |
9a4b9efa SL |
813 | .notifier_call = mc_cpu_callback, |
814 | }; | |
9a4b9efa | 815 | |
9a3110bf SL |
816 | static int __init microcode_init (void) |
817 | { | |
818 | int error; | |
819 | ||
bc4e0f9a BC |
820 | printk(KERN_INFO |
821 | "IA-32 Microcode Update Driver: v" MICROCODE_VERSION " <tigran@aivazian.fsnet.co.uk>\n"); | |
822 | ||
9a3110bf SL |
823 | error = microcode_dev_init(); |
824 | if (error) | |
825 | return error; | |
a30a6a2c SL |
826 | microcode_pdev = platform_device_register_simple("microcode", -1, |
827 | NULL, 0); | |
828 | if (IS_ERR(microcode_pdev)) { | |
829 | microcode_dev_exit(); | |
830 | return PTR_ERR(microcode_pdev); | |
831 | } | |
9a3110bf | 832 | |
86ef5c9a | 833 | get_online_cpus(); |
9a4b9efa | 834 | error = sysdev_driver_register(&cpu_sysdev_class, &mc_sysdev_driver); |
86ef5c9a | 835 | put_online_cpus(); |
9a4b9efa SL |
836 | if (error) { |
837 | microcode_dev_exit(); | |
838 | platform_device_unregister(microcode_pdev); | |
839 | return error; | |
840 | } | |
841 | ||
842 | register_hotcpu_notifier(&mc_cpu_notifier); | |
1da177e4 LT |
843 | return 0; |
844 | } | |
845 | ||
846 | static void __exit microcode_exit (void) | |
847 | { | |
9a3110bf | 848 | microcode_dev_exit(); |
9a4b9efa SL |
849 | |
850 | unregister_hotcpu_notifier(&mc_cpu_notifier); | |
851 | ||
86ef5c9a | 852 | get_online_cpus(); |
9a4b9efa | 853 | sysdev_driver_unregister(&cpu_sysdev_class, &mc_sysdev_driver); |
86ef5c9a | 854 | put_online_cpus(); |
9a4b9efa | 855 | |
a30a6a2c | 856 | platform_device_unregister(microcode_pdev); |
1da177e4 LT |
857 | } |
858 | ||
859 | module_init(microcode_init) | |
860 | module_exit(microcode_exit) |