Merge tag 'for-3.8' of git://openrisc.net/~jonas/linux
[deliverable/linux.git] / arch / x86 / kernel / microcode_core.c
CommitLineData
3e135d88
PO
1/*
2 * Intel CPU Microcode Update Driver for Linux
3 *
4 * Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
5 * 2006 Shaohua Li <shaohua.li@intel.com>
6 *
7 * This driver allows to upgrade microcode on Intel processors
8 * belonging to IA-32 family - PentiumPro, Pentium II,
9 * Pentium III, Xeon, Pentium 4, etc.
10 *
11 * Reference: Section 8.11 of Volume 3a, IA-32 Intel? Architecture
12 * Software Developer's Manual
13 * Order Number 253668 or free download from:
14 *
50a23e6e 15 * http://developer.intel.com/Assets/PDF/manual/253668.pdf
3e135d88
PO
16 *
17 * For more information, go to http://www.urbanmyth.org/microcode
18 *
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License
21 * as published by the Free Software Foundation; either version
22 * 2 of the License, or (at your option) any later version.
23 *
24 * 1.0 16 Feb 2000, Tigran Aivazian <tigran@sco.com>
25 * Initial release.
26 * 1.01 18 Feb 2000, Tigran Aivazian <tigran@sco.com>
27 * Added read() support + cleanups.
28 * 1.02 21 Feb 2000, Tigran Aivazian <tigran@sco.com>
29 * Added 'device trimming' support. open(O_WRONLY) zeroes
30 * and frees the saved copy of applied microcode.
31 * 1.03 29 Feb 2000, Tigran Aivazian <tigran@sco.com>
32 * Made to use devfs (/dev/cpu/microcode) + cleanups.
33 * 1.04 06 Jun 2000, Simon Trimmer <simon@veritas.com>
34 * Added misc device support (now uses both devfs and misc).
35 * Added MICROCODE_IOCFREE ioctl to clear memory.
36 * 1.05 09 Jun 2000, Simon Trimmer <simon@veritas.com>
37 * Messages for error cases (non Intel & no suitable microcode).
38 * 1.06 03 Aug 2000, Tigran Aivazian <tigran@veritas.com>
39 * Removed ->release(). Removed exclusive open and status bitmap.
40 * Added microcode_rwsem to serialize read()/write()/ioctl().
41 * Removed global kernel lock usage.
42 * 1.07 07 Sep 2000, Tigran Aivazian <tigran@veritas.com>
43 * Write 0 to 0x8B msr and then cpuid before reading revision,
44 * so that it works even if there were no update done by the
45 * BIOS. Otherwise, reading from 0x8B gives junk (which happened
46 * to be 0 on my machine which is why it worked even when I
47 * disabled update by the BIOS)
48 * Thanks to Eric W. Biederman <ebiederman@lnxi.com> for the fix.
49 * 1.08 11 Dec 2000, Richard Schaal <richard.schaal@intel.com> and
50 * Tigran Aivazian <tigran@veritas.com>
51 * Intel Pentium 4 processor support and bugfixes.
52 * 1.09 30 Oct 2001, Tigran Aivazian <tigran@veritas.com>
53 * Bugfix for HT (Hyper-Threading) enabled processors
54 * whereby processor resources are shared by all logical processors
55 * in a single CPU package.
56 * 1.10 28 Feb 2002 Asit K Mallick <asit.k.mallick@intel.com> and
57 * Tigran Aivazian <tigran@veritas.com>,
d33dcb9e
PO
58 * Serialize updates as required on HT processors due to
59 * speculative nature of implementation.
3e135d88
PO
60 * 1.11 22 Mar 2002 Tigran Aivazian <tigran@veritas.com>
61 * Fix the panic when writing zero-length microcode chunk.
62 * 1.12 29 Sep 2003 Nitin Kamble <nitin.a.kamble@intel.com>,
63 * Jun Nakajima <jun.nakajima@intel.com>
64 * Support for the microcode updates in the new format.
65 * 1.13 10 Oct 2003 Tigran Aivazian <tigran@veritas.com>
66 * Removed ->read() method and obsoleted MICROCODE_IOCFREE ioctl
67 * because we no longer hold a copy of applied microcode
68 * in kernel memory.
69 * 1.14 25 Jun 2004 Tigran Aivazian <tigran@veritas.com>
70 * Fix sigmatch() macro to handle old CPUs with pf == 0.
71 * Thanks to Stuart Swales for pointing out this bug.
72 */
f58e1f53
JP
73
74#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
75
4bae1967 76#include <linux/platform_device.h>
4bae1967 77#include <linux/miscdevice.h>
871b72dd 78#include <linux/capability.h>
4bae1967
IM
79#include <linux/kernel.h>
80#include <linux/module.h>
3e135d88
PO
81#include <linux/mutex.h>
82#include <linux/cpu.h>
4bae1967
IM
83#include <linux/fs.h>
84#include <linux/mm.h>
f3c6ea1b 85#include <linux/syscore_ops.h>
3e135d88 86
3e135d88 87#include <asm/microcode.h>
4bae1967 88#include <asm/processor.h>
78ff123b 89#include <asm/cpu_device_id.h>
c93dc84c 90#include <asm/perf_event.h>
3e135d88
PO
91
92MODULE_DESCRIPTION("Microcode Update Driver");
93MODULE_AUTHOR("Tigran Aivazian <tigran@aivazian.fsnet.co.uk>");
94MODULE_LICENSE("GPL");
95
4bae1967 96#define MICROCODE_VERSION "2.00"
3e135d88 97
4bae1967 98static struct microcode_ops *microcode_ops;
3e135d88 99
871b72dd
DA
100/*
101 * Synchronization.
102 *
103 * All non cpu-hotplug-callback call sites use:
104 *
105 * - microcode_mutex to synchronize with each other;
106 * - get/put_online_cpus() to synchronize with
107 * the cpu-hotplug-callback call sites.
108 *
109 * We guarantee that only a single cpu is being
110 * updated at any particular moment of time.
111 */
d45de409 112static DEFINE_MUTEX(microcode_mutex);
3e135d88 113
4bae1967 114struct ucode_cpu_info ucode_cpu_info[NR_CPUS];
8d86f390 115EXPORT_SYMBOL_GPL(ucode_cpu_info);
3e135d88 116
871b72dd
DA
117/*
118 * Operations that are run on a target cpu:
119 */
120
121struct cpu_info_ctx {
122 struct cpu_signature *cpu_sig;
123 int err;
124};
125
126static void collect_cpu_info_local(void *arg)
127{
128 struct cpu_info_ctx *ctx = arg;
129
130 ctx->err = microcode_ops->collect_cpu_info(smp_processor_id(),
131 ctx->cpu_sig);
132}
133
134static int collect_cpu_info_on_target(int cpu, struct cpu_signature *cpu_sig)
135{
136 struct cpu_info_ctx ctx = { .cpu_sig = cpu_sig, .err = 0 };
137 int ret;
138
139 ret = smp_call_function_single(cpu, collect_cpu_info_local, &ctx, 1);
140 if (!ret)
141 ret = ctx.err;
142
143 return ret;
144}
145
146static int collect_cpu_info(int cpu)
147{
148 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
149 int ret;
150
151 memset(uci, 0, sizeof(*uci));
152
153 ret = collect_cpu_info_on_target(cpu, &uci->cpu_sig);
154 if (!ret)
155 uci->valid = 1;
156
157 return ret;
158}
159
160struct apply_microcode_ctx {
161 int err;
162};
163
164static void apply_microcode_local(void *arg)
165{
166 struct apply_microcode_ctx *ctx = arg;
167
168 ctx->err = microcode_ops->apply_microcode(smp_processor_id());
169}
170
171static int apply_microcode_on_target(int cpu)
172{
173 struct apply_microcode_ctx ctx = { .err = 0 };
174 int ret;
175
176 ret = smp_call_function_single(cpu, apply_microcode_local, &ctx, 1);
177 if (!ret)
178 ret = ctx.err;
179
180 return ret;
181}
182
3e135d88 183#ifdef CONFIG_MICROCODE_OLD_INTERFACE
a0a29b62 184static int do_microcode_update(const void __user *buf, size_t size)
3e135d88 185{
3e135d88 186 int error = 0;
3e135d88 187 int cpu;
6f66cbc6 188
a0a29b62
DA
189 for_each_online_cpu(cpu) {
190 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
871b72dd 191 enum ucode_state ustate;
a0a29b62
DA
192
193 if (!uci->valid)
194 continue;
6f66cbc6 195
871b72dd
DA
196 ustate = microcode_ops->request_microcode_user(cpu, buf, size);
197 if (ustate == UCODE_ERROR) {
198 error = -1;
199 break;
200 } else if (ustate == UCODE_OK)
201 apply_microcode_on_target(cpu);
3e135d88 202 }
871b72dd 203
3e135d88
PO
204 return error;
205}
206
3f10940e 207static int microcode_open(struct inode *inode, struct file *file)
3e135d88 208{
3f10940e 209 return capable(CAP_SYS_RAWIO) ? nonseekable_open(inode, file) : -EPERM;
3e135d88
PO
210}
211
d33dcb9e
PO
212static ssize_t microcode_write(struct file *file, const char __user *buf,
213 size_t len, loff_t *ppos)
3e135d88 214{
871b72dd 215 ssize_t ret = -EINVAL;
3e135d88 216
4481374c 217 if ((len >> PAGE_SHIFT) > totalram_pages) {
f58e1f53 218 pr_err("too much data (max %ld pages)\n", totalram_pages);
871b72dd 219 return ret;
3e135d88
PO
220 }
221
222 get_online_cpus();
223 mutex_lock(&microcode_mutex);
224
871b72dd 225 if (do_microcode_update(buf, len) == 0)
3e135d88
PO
226 ret = (ssize_t)len;
227
e3e45c01
SE
228 if (ret > 0)
229 perf_check_microcode();
230
3e135d88
PO
231 mutex_unlock(&microcode_mutex);
232 put_online_cpus();
233
234 return ret;
235}
236
237static const struct file_operations microcode_fops = {
871b72dd
DA
238 .owner = THIS_MODULE,
239 .write = microcode_write,
240 .open = microcode_open,
6038f373 241 .llseek = no_llseek,
3e135d88
PO
242};
243
244static struct miscdevice microcode_dev = {
871b72dd
DA
245 .minor = MICROCODE_MINOR,
246 .name = "microcode",
e454cea2 247 .nodename = "cpu/microcode",
871b72dd 248 .fops = &microcode_fops,
3e135d88
PO
249};
250
d33dcb9e 251static int __init microcode_dev_init(void)
3e135d88
PO
252{
253 int error;
254
255 error = misc_register(&microcode_dev);
256 if (error) {
f58e1f53 257 pr_err("can't misc_register on minor=%d\n", MICROCODE_MINOR);
3e135d88
PO
258 return error;
259 }
260
261 return 0;
262}
263
bd399063 264static void __exit microcode_dev_exit(void)
3e135d88
PO
265{
266 misc_deregister(&microcode_dev);
267}
268
269MODULE_ALIAS_MISCDEV(MICROCODE_MINOR);
578454ff 270MODULE_ALIAS("devname:cpu/microcode");
3e135d88 271#else
4bae1967
IM
272#define microcode_dev_init() 0
273#define microcode_dev_exit() do { } while (0)
3e135d88
PO
274#endif
275
276/* fake device for request_firmware */
4bae1967 277static struct platform_device *microcode_pdev;
3e135d88 278
871b72dd 279static int reload_for_cpu(int cpu)
af5c820a 280{
871b72dd 281 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
4dbf32c3 282 enum ucode_state ustate;
af5c820a
RR
283 int err = 0;
284
4dbf32c3
BP
285 if (!uci->valid)
286 return err;
871b72dd 287
48e30685 288 ustate = microcode_ops->request_microcode_fw(cpu, &microcode_pdev->dev, true);
4dbf32c3
BP
289 if (ustate == UCODE_OK)
290 apply_microcode_on_target(cpu);
291 else
292 if (ustate == UCODE_ERROR)
293 err = -EINVAL;
af5c820a
RR
294 return err;
295}
296
8a25a2fd
KS
297static ssize_t reload_store(struct device *dev,
298 struct device_attribute *attr,
871b72dd 299 const char *buf, size_t size)
3e135d88 300{
871b72dd 301 unsigned long val;
c9fc3f77
BP
302 int cpu;
303 ssize_t ret = 0, tmp_ret;
304
e826abd5
SK
305 ret = kstrtoul(buf, 0, &val);
306 if (ret)
307 return ret;
871b72dd 308
c9fc3f77
BP
309 if (val != 1)
310 return size;
311
312 get_online_cpus();
c93dc84c 313 mutex_lock(&microcode_mutex);
c9fc3f77
BP
314 for_each_online_cpu(cpu) {
315 tmp_ret = reload_for_cpu(cpu);
316 if (tmp_ret != 0)
317 pr_warn("Error reloading microcode on CPU %d\n", cpu);
318
319 /* save retval of the first encountered reload error */
320 if (!ret)
321 ret = tmp_ret;
3e135d88 322 }
c93dc84c
PZ
323 if (!ret)
324 perf_check_microcode();
325 mutex_unlock(&microcode_mutex);
c9fc3f77 326 put_online_cpus();
871b72dd
DA
327
328 if (!ret)
329 ret = size;
330
331 return ret;
3e135d88
PO
332}
333
8a25a2fd
KS
334static ssize_t version_show(struct device *dev,
335 struct device_attribute *attr, char *buf)
3e135d88
PO
336{
337 struct ucode_cpu_info *uci = ucode_cpu_info + dev->id;
338
d45de409 339 return sprintf(buf, "0x%x\n", uci->cpu_sig.rev);
3e135d88
PO
340}
341
8a25a2fd
KS
342static ssize_t pf_show(struct device *dev,
343 struct device_attribute *attr, char *buf)
3e135d88
PO
344{
345 struct ucode_cpu_info *uci = ucode_cpu_info + dev->id;
346
d45de409 347 return sprintf(buf, "0x%x\n", uci->cpu_sig.pf);
3e135d88
PO
348}
349
8a25a2fd
KS
350static DEVICE_ATTR(reload, 0200, NULL, reload_store);
351static DEVICE_ATTR(version, 0400, version_show, NULL);
352static DEVICE_ATTR(processor_flags, 0400, pf_show, NULL);
3e135d88
PO
353
354static struct attribute *mc_default_attrs[] = {
8a25a2fd
KS
355 &dev_attr_version.attr,
356 &dev_attr_processor_flags.attr,
3e135d88
PO
357 NULL
358};
359
360static struct attribute_group mc_attr_group = {
871b72dd
DA
361 .attrs = mc_default_attrs,
362 .name = "microcode",
3e135d88
PO
363};
364
871b72dd 365static void microcode_fini_cpu(int cpu)
d45de409
DA
366{
367 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
368
d45de409
DA
369 microcode_ops->microcode_fini_cpu(cpu);
370 uci->valid = 0;
280a9ca5
DA
371}
372
871b72dd 373static enum ucode_state microcode_resume_cpu(int cpu)
d45de409 374{
f58e1f53 375 pr_debug("CPU%d updated upon resume\n", cpu);
bb9d3e47
BP
376
377 if (apply_microcode_on_target(cpu))
378 return UCODE_ERROR;
871b72dd
DA
379
380 return UCODE_OK;
d45de409
DA
381}
382
48e30685 383static enum ucode_state microcode_init_cpu(int cpu, bool refresh_fw)
d45de409 384{
871b72dd 385 enum ucode_state ustate;
d45de409 386
871b72dd
DA
387 if (collect_cpu_info(cpu))
388 return UCODE_ERROR;
d45de409 389
871b72dd
DA
390 /* --dimm. Trigger a delayed update? */
391 if (system_state != SYSTEM_RUNNING)
392 return UCODE_NFOUND;
d45de409 393
48e30685
BP
394 ustate = microcode_ops->request_microcode_fw(cpu, &microcode_pdev->dev,
395 refresh_fw);
d45de409 396
871b72dd 397 if (ustate == UCODE_OK) {
f58e1f53 398 pr_debug("CPU%d updated upon init\n", cpu);
871b72dd 399 apply_microcode_on_target(cpu);
d45de409
DA
400 }
401
871b72dd 402 return ustate;
d45de409
DA
403}
404
871b72dd 405static enum ucode_state microcode_update_cpu(int cpu)
d45de409 406{
871b72dd 407 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
d45de409 408
2f99f5c8 409 if (uci->valid)
bb9d3e47 410 return microcode_resume_cpu(cpu);
d45de409 411
48e30685 412 return microcode_init_cpu(cpu, false);
d45de409
DA
413}
414
8a25a2fd 415static int mc_device_add(struct device *dev, struct subsys_interface *sif)
3e135d88 416{
8a25a2fd 417 int err, cpu = dev->id;
3e135d88
PO
418
419 if (!cpu_online(cpu))
420 return 0;
421
f58e1f53 422 pr_debug("CPU%d added\n", cpu);
3e135d88 423
8a25a2fd 424 err = sysfs_create_group(&dev->kobj, &mc_attr_group);
3e135d88
PO
425 if (err)
426 return err;
427
48e30685 428 if (microcode_init_cpu(cpu, true) == UCODE_ERROR)
6c53cbfc 429 return -EINVAL;
af5c820a
RR
430
431 return err;
3e135d88
PO
432}
433
8a25a2fd 434static int mc_device_remove(struct device *dev, struct subsys_interface *sif)
3e135d88 435{
8a25a2fd 436 int cpu = dev->id;
3e135d88
PO
437
438 if (!cpu_online(cpu))
439 return 0;
440
f58e1f53 441 pr_debug("CPU%d removed\n", cpu);
d45de409 442 microcode_fini_cpu(cpu);
8a25a2fd 443 sysfs_remove_group(&dev->kobj, &mc_attr_group);
3e135d88
PO
444 return 0;
445}
446
8a25a2fd
KS
447static struct subsys_interface mc_cpu_interface = {
448 .name = "microcode",
449 .subsys = &cpu_subsys,
450 .add_dev = mc_device_add,
451 .remove_dev = mc_device_remove,
f3c6ea1b
RW
452};
453
454/**
455 * mc_bp_resume - Update boot CPU microcode during resume.
456 */
457static void mc_bp_resume(void)
3e135d88 458{
f3c6ea1b 459 int cpu = smp_processor_id();
871b72dd 460 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
3e135d88 461
871b72dd
DA
462 if (uci->valid && uci->mc)
463 microcode_ops->apply_microcode(cpu);
3e135d88
PO
464}
465
f3c6ea1b
RW
466static struct syscore_ops mc_syscore_ops = {
467 .resume = mc_bp_resume,
3e135d88
PO
468};
469
470static __cpuinit int
471mc_cpu_callback(struct notifier_block *nb, unsigned long action, void *hcpu)
472{
473 unsigned int cpu = (unsigned long)hcpu;
8a25a2fd 474 struct device *dev;
3e135d88 475
8a25a2fd 476 dev = get_cpu_device(cpu);
09c3f0d8
BP
477
478 switch (action & ~CPU_TASKS_FROZEN) {
3e135d88 479 case CPU_ONLINE:
871b72dd 480 microcode_update_cpu(cpu);
f58e1f53 481 pr_debug("CPU%d added\n", cpu);
09c3f0d8
BP
482 /*
483 * "break" is missing on purpose here because we want to fall
484 * through in order to create the sysfs group.
485 */
486
487 case CPU_DOWN_FAILED:
8a25a2fd 488 if (sysfs_create_group(&dev->kobj, &mc_attr_group))
f58e1f53 489 pr_err("Failed to create group for CPU%d\n", cpu);
3e135d88 490 break;
09c3f0d8 491
3e135d88 492 case CPU_DOWN_PREPARE:
3e135d88 493 /* Suspend is in progress, only remove the interface */
8a25a2fd 494 sysfs_remove_group(&dev->kobj, &mc_attr_group);
f58e1f53 495 pr_debug("CPU%d removed\n", cpu);
d45de409 496 break;
70989449
SB
497
498 /*
09c3f0d8
BP
499 * case CPU_DEAD:
500 *
70989449
SB
501 * When a CPU goes offline, don't free up or invalidate the copy of
502 * the microcode in kernel memory, so that we can reuse it when the
503 * CPU comes back online without unnecessarily requesting the userspace
504 * for it again.
505 */
3e135d88 506 }
09c3f0d8
BP
507
508 /* The CPU refused to come up during a system resume */
509 if (action == CPU_UP_CANCELED_FROZEN)
510 microcode_fini_cpu(cpu);
511
3e135d88
PO
512 return NOTIFY_OK;
513}
514
515static struct notifier_block __refdata mc_cpu_notifier = {
4bae1967 516 .notifier_call = mc_cpu_callback,
3e135d88
PO
517};
518
78ff123b
AK
519#ifdef MODULE
520/* Autoload on Intel and AMD systems */
e1b6fc55 521static const struct x86_cpu_id __initconst microcode_id[] = {
78ff123b
AK
522#ifdef CONFIG_MICROCODE_INTEL
523 { X86_VENDOR_INTEL, X86_FAMILY_ANY, X86_MODEL_ANY, },
524#endif
525#ifdef CONFIG_MICROCODE_AMD
526 { X86_VENDOR_AMD, X86_FAMILY_ANY, X86_MODEL_ANY, },
527#endif
528 {}
529};
530MODULE_DEVICE_TABLE(x86cpu, microcode_id);
531#endif
532
3d8986bc
BP
533static struct attribute *cpu_root_microcode_attrs[] = {
534 &dev_attr_reload.attr,
535 NULL
536};
537
538static struct attribute_group cpu_root_microcode_group = {
539 .name = "microcode",
540 .attrs = cpu_root_microcode_attrs,
541};
542
18dbc916 543static int __init microcode_init(void)
3e135d88 544{
18dbc916 545 struct cpuinfo_x86 *c = &cpu_data(0);
3e135d88
PO
546 int error;
547
18dbc916
DA
548 if (c->x86_vendor == X86_VENDOR_INTEL)
549 microcode_ops = init_intel_microcode();
82b07865 550 else if (c->x86_vendor == X86_VENDOR_AMD)
18dbc916 551 microcode_ops = init_amd_microcode();
283c1f25 552 else
f58e1f53 553 pr_err("no support for this CPU vendor\n");
283c1f25
AH
554
555 if (!microcode_ops)
18dbc916 556 return -ENODEV;
3e135d88 557
3e135d88
PO
558 microcode_pdev = platform_device_register_simple("microcode", -1,
559 NULL, 0);
bd399063 560 if (IS_ERR(microcode_pdev))
3e135d88 561 return PTR_ERR(microcode_pdev);
3e135d88
PO
562
563 get_online_cpus();
871b72dd
DA
564 mutex_lock(&microcode_mutex);
565
8a25a2fd 566 error = subsys_interface_register(&mc_cpu_interface);
c93dc84c
PZ
567 if (!error)
568 perf_check_microcode();
871b72dd 569 mutex_unlock(&microcode_mutex);
3e135d88 570 put_online_cpus();
871b72dd 571
bd399063
SB
572 if (error)
573 goto out_pdev;
3e135d88 574
3d8986bc
BP
575 error = sysfs_create_group(&cpu_subsys.dev_root->kobj,
576 &cpu_root_microcode_group);
577
578 if (error) {
579 pr_err("Error creating microcode group!\n");
580 goto out_driver;
581 }
582
871b72dd
DA
583 error = microcode_dev_init();
584 if (error)
3d8986bc 585 goto out_ucode_group;
871b72dd 586
f3c6ea1b 587 register_syscore_ops(&mc_syscore_ops);
3e135d88 588 register_hotcpu_notifier(&mc_cpu_notifier);
8d86f390 589
871b72dd 590 pr_info("Microcode Update Driver: v" MICROCODE_VERSION
f58e1f53 591 " <tigran@aivazian.fsnet.co.uk>, Peter Oruba\n");
8d86f390 592
3e135d88 593 return 0;
bd399063 594
3d8986bc
BP
595 out_ucode_group:
596 sysfs_remove_group(&cpu_subsys.dev_root->kobj,
597 &cpu_root_microcode_group);
598
599 out_driver:
bd399063
SB
600 get_online_cpus();
601 mutex_lock(&microcode_mutex);
602
ff4b8a57 603 subsys_interface_unregister(&mc_cpu_interface);
bd399063
SB
604
605 mutex_unlock(&microcode_mutex);
606 put_online_cpus();
607
3d8986bc 608 out_pdev:
bd399063
SB
609 platform_device_unregister(microcode_pdev);
610 return error;
611
3e135d88 612}
871b72dd 613module_init(microcode_init);
3e135d88 614
18dbc916 615static void __exit microcode_exit(void)
3e135d88 616{
f72c1a57
BP
617 struct cpuinfo_x86 *c = &cpu_data(0);
618
3e135d88
PO
619 microcode_dev_exit();
620
621 unregister_hotcpu_notifier(&mc_cpu_notifier);
4ac5fc6a 622 unregister_syscore_ops(&mc_syscore_ops);
3e135d88 623
3d8986bc
BP
624 sysfs_remove_group(&cpu_subsys.dev_root->kobj,
625 &cpu_root_microcode_group);
626
3e135d88 627 get_online_cpus();
871b72dd
DA
628 mutex_lock(&microcode_mutex);
629
8a25a2fd 630 subsys_interface_unregister(&mc_cpu_interface);
871b72dd
DA
631
632 mutex_unlock(&microcode_mutex);
3e135d88
PO
633 put_online_cpus();
634
635 platform_device_unregister(microcode_pdev);
3e135d88 636
8d86f390
PO
637 microcode_ops = NULL;
638
f72c1a57
BP
639 if (c->x86_vendor == X86_VENDOR_AMD)
640 exit_amd_microcode();
641
871b72dd 642 pr_info("Microcode Update Driver: v" MICROCODE_VERSION " removed.\n");
8d86f390 643}
18dbc916 644module_exit(microcode_exit);
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