Commit | Line | Data |
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3e135d88 PO |
1 | /* |
2 | * Intel CPU Microcode Update Driver for Linux | |
3 | * | |
4 | * Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk> | |
5 | * 2006 Shaohua Li <shaohua.li@intel.com> | |
6 | * | |
7 | * This driver allows to upgrade microcode on Intel processors | |
8 | * belonging to IA-32 family - PentiumPro, Pentium II, | |
9 | * Pentium III, Xeon, Pentium 4, etc. | |
10 | * | |
11 | * Reference: Section 8.11 of Volume 3a, IA-32 Intel? Architecture | |
12 | * Software Developer's Manual | |
13 | * Order Number 253668 or free download from: | |
14 | * | |
15 | * http://developer.intel.com/design/pentium4/manuals/253668.htm | |
16 | * | |
17 | * For more information, go to http://www.urbanmyth.org/microcode | |
18 | * | |
19 | * This program is free software; you can redistribute it and/or | |
20 | * modify it under the terms of the GNU General Public License | |
21 | * as published by the Free Software Foundation; either version | |
22 | * 2 of the License, or (at your option) any later version. | |
23 | * | |
24 | * 1.0 16 Feb 2000, Tigran Aivazian <tigran@sco.com> | |
25 | * Initial release. | |
26 | * 1.01 18 Feb 2000, Tigran Aivazian <tigran@sco.com> | |
27 | * Added read() support + cleanups. | |
28 | * 1.02 21 Feb 2000, Tigran Aivazian <tigran@sco.com> | |
29 | * Added 'device trimming' support. open(O_WRONLY) zeroes | |
30 | * and frees the saved copy of applied microcode. | |
31 | * 1.03 29 Feb 2000, Tigran Aivazian <tigran@sco.com> | |
32 | * Made to use devfs (/dev/cpu/microcode) + cleanups. | |
33 | * 1.04 06 Jun 2000, Simon Trimmer <simon@veritas.com> | |
34 | * Added misc device support (now uses both devfs and misc). | |
35 | * Added MICROCODE_IOCFREE ioctl to clear memory. | |
36 | * 1.05 09 Jun 2000, Simon Trimmer <simon@veritas.com> | |
37 | * Messages for error cases (non Intel & no suitable microcode). | |
38 | * 1.06 03 Aug 2000, Tigran Aivazian <tigran@veritas.com> | |
39 | * Removed ->release(). Removed exclusive open and status bitmap. | |
40 | * Added microcode_rwsem to serialize read()/write()/ioctl(). | |
41 | * Removed global kernel lock usage. | |
42 | * 1.07 07 Sep 2000, Tigran Aivazian <tigran@veritas.com> | |
43 | * Write 0 to 0x8B msr and then cpuid before reading revision, | |
44 | * so that it works even if there were no update done by the | |
45 | * BIOS. Otherwise, reading from 0x8B gives junk (which happened | |
46 | * to be 0 on my machine which is why it worked even when I | |
47 | * disabled update by the BIOS) | |
48 | * Thanks to Eric W. Biederman <ebiederman@lnxi.com> for the fix. | |
49 | * 1.08 11 Dec 2000, Richard Schaal <richard.schaal@intel.com> and | |
50 | * Tigran Aivazian <tigran@veritas.com> | |
51 | * Intel Pentium 4 processor support and bugfixes. | |
52 | * 1.09 30 Oct 2001, Tigran Aivazian <tigran@veritas.com> | |
53 | * Bugfix for HT (Hyper-Threading) enabled processors | |
54 | * whereby processor resources are shared by all logical processors | |
55 | * in a single CPU package. | |
56 | * 1.10 28 Feb 2002 Asit K Mallick <asit.k.mallick@intel.com> and | |
57 | * Tigran Aivazian <tigran@veritas.com>, | |
d33dcb9e PO |
58 | * Serialize updates as required on HT processors due to |
59 | * speculative nature of implementation. | |
3e135d88 PO |
60 | * 1.11 22 Mar 2002 Tigran Aivazian <tigran@veritas.com> |
61 | * Fix the panic when writing zero-length microcode chunk. | |
62 | * 1.12 29 Sep 2003 Nitin Kamble <nitin.a.kamble@intel.com>, | |
63 | * Jun Nakajima <jun.nakajima@intel.com> | |
64 | * Support for the microcode updates in the new format. | |
65 | * 1.13 10 Oct 2003 Tigran Aivazian <tigran@veritas.com> | |
66 | * Removed ->read() method and obsoleted MICROCODE_IOCFREE ioctl | |
67 | * because we no longer hold a copy of applied microcode | |
68 | * in kernel memory. | |
69 | * 1.14 25 Jun 2004 Tigran Aivazian <tigran@veritas.com> | |
70 | * Fix sigmatch() macro to handle old CPUs with pf == 0. | |
71 | * Thanks to Stuart Swales for pointing out this bug. | |
72 | */ | |
4bae1967 | 73 | #include <linux/platform_device.h> |
3e135d88 | 74 | #include <linux/capability.h> |
4bae1967 IM |
75 | #include <linux/miscdevice.h> |
76 | #include <linux/firmware.h> | |
3e135d88 | 77 | #include <linux/smp_lock.h> |
4bae1967 | 78 | #include <linux/spinlock.h> |
3e135d88 | 79 | #include <linux/cpumask.h> |
4bae1967 | 80 | #include <linux/uaccess.h> |
3e135d88 | 81 | #include <linux/vmalloc.h> |
4bae1967 IM |
82 | #include <linux/kernel.h> |
83 | #include <linux/module.h> | |
3e135d88 | 84 | #include <linux/mutex.h> |
4bae1967 IM |
85 | #include <linux/sched.h> |
86 | #include <linux/init.h> | |
87 | #include <linux/slab.h> | |
3e135d88 | 88 | #include <linux/cpu.h> |
4bae1967 IM |
89 | #include <linux/fs.h> |
90 | #include <linux/mm.h> | |
3e135d88 | 91 | |
3e135d88 | 92 | #include <asm/microcode.h> |
4bae1967 IM |
93 | #include <asm/processor.h> |
94 | #include <asm/msr.h> | |
3e135d88 PO |
95 | |
96 | MODULE_DESCRIPTION("Microcode Update Driver"); | |
97 | MODULE_AUTHOR("Tigran Aivazian <tigran@aivazian.fsnet.co.uk>"); | |
98 | MODULE_LICENSE("GPL"); | |
99 | ||
4bae1967 | 100 | #define MICROCODE_VERSION "2.00" |
3e135d88 | 101 | |
4bae1967 | 102 | static struct microcode_ops *microcode_ops; |
3e135d88 | 103 | |
8d86f390 | 104 | /* no concurrent ->write()s are allowed on /dev/cpu/microcode */ |
d45de409 | 105 | static DEFINE_MUTEX(microcode_mutex); |
3e135d88 | 106 | |
4bae1967 | 107 | struct ucode_cpu_info ucode_cpu_info[NR_CPUS]; |
8d86f390 | 108 | EXPORT_SYMBOL_GPL(ucode_cpu_info); |
3e135d88 PO |
109 | |
110 | #ifdef CONFIG_MICROCODE_OLD_INTERFACE | |
a0a29b62 | 111 | static int do_microcode_update(const void __user *buf, size_t size) |
3e135d88 | 112 | { |
6f66cbc6 | 113 | cpumask_t old; |
3e135d88 | 114 | int error = 0; |
3e135d88 | 115 | int cpu; |
6f66cbc6 HD |
116 | |
117 | old = current->cpus_allowed; | |
3e135d88 | 118 | |
a0a29b62 DA |
119 | for_each_online_cpu(cpu) { |
120 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; | |
121 | ||
122 | if (!uci->valid) | |
123 | continue; | |
6f66cbc6 HD |
124 | |
125 | set_cpus_allowed_ptr(current, &cpumask_of_cpu(cpu)); | |
126 | error = microcode_ops->request_microcode_user(cpu, buf, size); | |
a0a29b62 | 127 | if (error < 0) |
6f66cbc6 HD |
128 | goto out; |
129 | if (!error) | |
130 | microcode_ops->apply_microcode(cpu); | |
3e135d88 | 131 | } |
6f66cbc6 HD |
132 | out: |
133 | set_cpus_allowed_ptr(current, &old); | |
3e135d88 PO |
134 | return error; |
135 | } | |
136 | ||
d33dcb9e | 137 | static int microcode_open(struct inode *unused1, struct file *unused2) |
3e135d88 PO |
138 | { |
139 | cycle_kernel_lock(); | |
140 | return capable(CAP_SYS_RAWIO) ? 0 : -EPERM; | |
141 | } | |
142 | ||
d33dcb9e PO |
143 | static ssize_t microcode_write(struct file *file, const char __user *buf, |
144 | size_t len, loff_t *ppos) | |
3e135d88 PO |
145 | { |
146 | ssize_t ret; | |
147 | ||
148 | if ((len >> PAGE_SHIFT) > num_physpages) { | |
d33dcb9e PO |
149 | printk(KERN_ERR "microcode: too much data (max %ld pages)\n", |
150 | num_physpages); | |
3e135d88 PO |
151 | return -EINVAL; |
152 | } | |
153 | ||
154 | get_online_cpus(); | |
155 | mutex_lock(µcode_mutex); | |
156 | ||
a0a29b62 | 157 | ret = do_microcode_update(buf, len); |
3e135d88 PO |
158 | if (!ret) |
159 | ret = (ssize_t)len; | |
160 | ||
161 | mutex_unlock(µcode_mutex); | |
162 | put_online_cpus(); | |
163 | ||
164 | return ret; | |
165 | } | |
166 | ||
167 | static const struct file_operations microcode_fops = { | |
168 | .owner = THIS_MODULE, | |
169 | .write = microcode_write, | |
170 | .open = microcode_open, | |
171 | }; | |
172 | ||
173 | static struct miscdevice microcode_dev = { | |
174 | .minor = MICROCODE_MINOR, | |
175 | .name = "microcode", | |
176 | .fops = µcode_fops, | |
177 | }; | |
178 | ||
d33dcb9e | 179 | static int __init microcode_dev_init(void) |
3e135d88 PO |
180 | { |
181 | int error; | |
182 | ||
183 | error = misc_register(µcode_dev); | |
184 | if (error) { | |
185 | printk(KERN_ERR | |
186 | "microcode: can't misc_register on minor=%d\n", | |
187 | MICROCODE_MINOR); | |
188 | return error; | |
189 | } | |
190 | ||
191 | return 0; | |
192 | } | |
193 | ||
d33dcb9e | 194 | static void microcode_dev_exit(void) |
3e135d88 PO |
195 | { |
196 | misc_deregister(µcode_dev); | |
197 | } | |
198 | ||
199 | MODULE_ALIAS_MISCDEV(MICROCODE_MINOR); | |
200 | #else | |
4bae1967 IM |
201 | #define microcode_dev_init() 0 |
202 | #define microcode_dev_exit() do { } while (0) | |
3e135d88 PO |
203 | #endif |
204 | ||
205 | /* fake device for request_firmware */ | |
4bae1967 | 206 | static struct platform_device *microcode_pdev; |
3e135d88 | 207 | |
af5c820a RR |
208 | static long reload_for_cpu(void *unused) |
209 | { | |
210 | struct ucode_cpu_info *uci = ucode_cpu_info + smp_processor_id(); | |
211 | int err = 0; | |
212 | ||
213 | mutex_lock(µcode_mutex); | |
214 | if (uci->valid) { | |
215 | err = microcode_ops->request_microcode_fw(smp_processor_id(), | |
216 | µcode_pdev->dev); | |
217 | if (!err) | |
218 | microcode_ops->apply_microcode(smp_processor_id()); | |
219 | } | |
220 | mutex_unlock(µcode_mutex); | |
221 | return err; | |
222 | } | |
223 | ||
3e135d88 PO |
224 | static ssize_t reload_store(struct sys_device *dev, |
225 | struct sysdev_attribute *attr, | |
226 | const char *buf, size_t sz) | |
227 | { | |
3e135d88 PO |
228 | char *end; |
229 | unsigned long val = simple_strtoul(buf, &end, 0); | |
230 | int err = 0; | |
231 | int cpu = dev->id; | |
232 | ||
233 | if (end == buf) | |
234 | return -EINVAL; | |
235 | if (val == 1) { | |
3e135d88 | 236 | get_online_cpus(); |
af5c820a RR |
237 | if (cpu_online(cpu)) |
238 | err = work_on_cpu(cpu, reload_for_cpu, NULL); | |
3e135d88 | 239 | put_online_cpus(); |
3e135d88 PO |
240 | } |
241 | if (err) | |
242 | return err; | |
243 | return sz; | |
244 | } | |
245 | ||
246 | static ssize_t version_show(struct sys_device *dev, | |
247 | struct sysdev_attribute *attr, char *buf) | |
248 | { | |
249 | struct ucode_cpu_info *uci = ucode_cpu_info + dev->id; | |
250 | ||
d45de409 | 251 | return sprintf(buf, "0x%x\n", uci->cpu_sig.rev); |
3e135d88 PO |
252 | } |
253 | ||
254 | static ssize_t pf_show(struct sys_device *dev, | |
255 | struct sysdev_attribute *attr, char *buf) | |
256 | { | |
257 | struct ucode_cpu_info *uci = ucode_cpu_info + dev->id; | |
258 | ||
d45de409 | 259 | return sprintf(buf, "0x%x\n", uci->cpu_sig.pf); |
3e135d88 PO |
260 | } |
261 | ||
262 | static SYSDEV_ATTR(reload, 0200, NULL, reload_store); | |
263 | static SYSDEV_ATTR(version, 0400, version_show, NULL); | |
264 | static SYSDEV_ATTR(processor_flags, 0400, pf_show, NULL); | |
265 | ||
266 | static struct attribute *mc_default_attrs[] = { | |
267 | &attr_reload.attr, | |
268 | &attr_version.attr, | |
269 | &attr_processor_flags.attr, | |
270 | NULL | |
271 | }; | |
272 | ||
273 | static struct attribute_group mc_attr_group = { | |
4bae1967 IM |
274 | .attrs = mc_default_attrs, |
275 | .name = "microcode", | |
3e135d88 PO |
276 | }; |
277 | ||
280a9ca5 | 278 | static void __microcode_fini_cpu(int cpu) |
d45de409 DA |
279 | { |
280 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; | |
281 | ||
d45de409 DA |
282 | microcode_ops->microcode_fini_cpu(cpu); |
283 | uci->valid = 0; | |
280a9ca5 DA |
284 | } |
285 | ||
286 | static void microcode_fini_cpu(int cpu) | |
287 | { | |
288 | mutex_lock(µcode_mutex); | |
289 | __microcode_fini_cpu(cpu); | |
d45de409 DA |
290 | mutex_unlock(µcode_mutex); |
291 | } | |
292 | ||
293 | static void collect_cpu_info(int cpu) | |
294 | { | |
295 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; | |
296 | ||
297 | memset(uci, 0, sizeof(*uci)); | |
298 | if (!microcode_ops->collect_cpu_info(cpu, &uci->cpu_sig)) | |
299 | uci->valid = 1; | |
300 | } | |
301 | ||
a0a29b62 | 302 | static int microcode_resume_cpu(int cpu) |
d45de409 DA |
303 | { |
304 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; | |
305 | struct cpu_signature nsig; | |
306 | ||
307 | pr_debug("microcode: CPU%d resumed\n", cpu); | |
308 | ||
18dbc916 | 309 | if (!uci->mc) |
a0a29b62 | 310 | return 1; |
d45de409 DA |
311 | |
312 | /* | |
313 | * Let's verify that the 'cached' ucode does belong | |
314 | * to this cpu (a bit of paranoia): | |
315 | */ | |
316 | if (microcode_ops->collect_cpu_info(cpu, &nsig)) { | |
280a9ca5 DA |
317 | __microcode_fini_cpu(cpu); |
318 | printk(KERN_ERR "failed to collect_cpu_info for resuming cpu #%d\n", | |
319 | cpu); | |
a0a29b62 | 320 | return -1; |
d45de409 DA |
321 | } |
322 | ||
280a9ca5 DA |
323 | if ((nsig.sig != uci->cpu_sig.sig) || (nsig.pf != uci->cpu_sig.pf)) { |
324 | __microcode_fini_cpu(cpu); | |
325 | printk(KERN_ERR "cached ucode doesn't match the resuming cpu #%d\n", | |
326 | cpu); | |
d45de409 | 327 | /* Should we look for a new ucode here? */ |
a0a29b62 | 328 | return 1; |
d45de409 DA |
329 | } |
330 | ||
a0a29b62 | 331 | return 0; |
d45de409 DA |
332 | } |
333 | ||
af5c820a | 334 | static long microcode_update_cpu(void *unused) |
d45de409 | 335 | { |
af5c820a | 336 | struct ucode_cpu_info *uci = ucode_cpu_info + smp_processor_id(); |
a0a29b62 | 337 | int err = 0; |
d45de409 | 338 | |
d45de409 DA |
339 | /* |
340 | * Check if the system resume is in progress (uci->valid != NULL), | |
341 | * otherwise just request a firmware: | |
342 | */ | |
343 | if (uci->valid) { | |
af5c820a | 344 | err = microcode_resume_cpu(smp_processor_id()); |
4bae1967 | 345 | } else { |
af5c820a | 346 | collect_cpu_info(smp_processor_id()); |
d45de409 | 347 | if (uci->valid && system_state == SYSTEM_RUNNING) |
af5c820a RR |
348 | err = microcode_ops->request_microcode_fw( |
349 | smp_processor_id(), | |
a0a29b62 | 350 | µcode_pdev->dev); |
d45de409 | 351 | } |
a0a29b62 | 352 | if (!err) |
af5c820a RR |
353 | microcode_ops->apply_microcode(smp_processor_id()); |
354 | return err; | |
d45de409 DA |
355 | } |
356 | ||
af5c820a | 357 | static int microcode_init_cpu(int cpu) |
d45de409 | 358 | { |
af5c820a | 359 | int err; |
fd1452eb | 360 | mutex_lock(µcode_mutex); |
af5c820a | 361 | err = work_on_cpu(cpu, microcode_update_cpu, NULL); |
fd1452eb DA |
362 | mutex_unlock(µcode_mutex); |
363 | ||
af5c820a | 364 | return err; |
d45de409 DA |
365 | } |
366 | ||
367 | static int mc_sysdev_add(struct sys_device *sys_dev) | |
3e135d88 PO |
368 | { |
369 | int err, cpu = sys_dev->id; | |
370 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; | |
371 | ||
372 | if (!cpu_online(cpu)) | |
373 | return 0; | |
374 | ||
375 | pr_debug("microcode: CPU%d added\n", cpu); | |
376 | memset(uci, 0, sizeof(*uci)); | |
377 | ||
378 | err = sysfs_create_group(&sys_dev->kobj, &mc_attr_group); | |
379 | if (err) | |
380 | return err; | |
381 | ||
af5c820a | 382 | err = microcode_init_cpu(cpu); |
af5c820a RR |
383 | |
384 | return err; | |
3e135d88 PO |
385 | } |
386 | ||
3e135d88 PO |
387 | static int mc_sysdev_remove(struct sys_device *sys_dev) |
388 | { | |
389 | int cpu = sys_dev->id; | |
390 | ||
391 | if (!cpu_online(cpu)) | |
392 | return 0; | |
393 | ||
394 | pr_debug("microcode: CPU%d removed\n", cpu); | |
d45de409 | 395 | microcode_fini_cpu(cpu); |
3e135d88 PO |
396 | sysfs_remove_group(&sys_dev->kobj, &mc_attr_group); |
397 | return 0; | |
398 | } | |
399 | ||
400 | static int mc_sysdev_resume(struct sys_device *dev) | |
401 | { | |
402 | int cpu = dev->id; | |
403 | ||
404 | if (!cpu_online(cpu)) | |
405 | return 0; | |
a1c75cc5 | 406 | |
3e135d88 | 407 | /* only CPU 0 will apply ucode here */ |
af5c820a | 408 | microcode_update_cpu(NULL); |
3e135d88 PO |
409 | return 0; |
410 | } | |
411 | ||
412 | static struct sysdev_driver mc_sysdev_driver = { | |
4bae1967 IM |
413 | .add = mc_sysdev_add, |
414 | .remove = mc_sysdev_remove, | |
415 | .resume = mc_sysdev_resume, | |
3e135d88 PO |
416 | }; |
417 | ||
418 | static __cpuinit int | |
419 | mc_cpu_callback(struct notifier_block *nb, unsigned long action, void *hcpu) | |
420 | { | |
421 | unsigned int cpu = (unsigned long)hcpu; | |
422 | struct sys_device *sys_dev; | |
423 | ||
424 | sys_dev = get_cpu_sysdev(cpu); | |
425 | switch (action) { | |
3e135d88 | 426 | case CPU_ONLINE: |
3e135d88 | 427 | case CPU_ONLINE_FROZEN: |
af5c820a RR |
428 | if (microcode_init_cpu(cpu)) |
429 | printk(KERN_ERR "microcode: failed to init CPU%d\n", | |
430 | cpu); | |
d45de409 | 431 | case CPU_DOWN_FAILED: |
3e135d88 | 432 | case CPU_DOWN_FAILED_FROZEN: |
d45de409 | 433 | pr_debug("microcode: CPU%d added\n", cpu); |
3e135d88 PO |
434 | if (sysfs_create_group(&sys_dev->kobj, &mc_attr_group)) |
435 | printk(KERN_ERR "microcode: Failed to create the sysfs " | |
436 | "group for CPU%d\n", cpu); | |
437 | break; | |
438 | case CPU_DOWN_PREPARE: | |
3e135d88 PO |
439 | case CPU_DOWN_PREPARE_FROZEN: |
440 | /* Suspend is in progress, only remove the interface */ | |
441 | sysfs_remove_group(&sys_dev->kobj, &mc_attr_group); | |
d45de409 DA |
442 | pr_debug("microcode: CPU%d removed\n", cpu); |
443 | break; | |
444 | case CPU_DEAD: | |
445 | case CPU_UP_CANCELED_FROZEN: | |
446 | /* The CPU refused to come up during a system resume */ | |
447 | microcode_fini_cpu(cpu); | |
3e135d88 PO |
448 | break; |
449 | } | |
450 | return NOTIFY_OK; | |
451 | } | |
452 | ||
453 | static struct notifier_block __refdata mc_cpu_notifier = { | |
4bae1967 | 454 | .notifier_call = mc_cpu_callback, |
3e135d88 PO |
455 | }; |
456 | ||
18dbc916 | 457 | static int __init microcode_init(void) |
3e135d88 | 458 | { |
18dbc916 | 459 | struct cpuinfo_x86 *c = &cpu_data(0); |
3e135d88 PO |
460 | int error; |
461 | ||
18dbc916 DA |
462 | if (c->x86_vendor == X86_VENDOR_INTEL) |
463 | microcode_ops = init_intel_microcode(); | |
82b07865 | 464 | else if (c->x86_vendor == X86_VENDOR_AMD) |
18dbc916 | 465 | microcode_ops = init_amd_microcode(); |
8d86f390 | 466 | |
18dbc916 DA |
467 | if (!microcode_ops) { |
468 | printk(KERN_ERR "microcode: no support for this CPU vendor\n"); | |
469 | return -ENODEV; | |
470 | } | |
3e135d88 PO |
471 | |
472 | error = microcode_dev_init(); | |
473 | if (error) | |
474 | return error; | |
475 | microcode_pdev = platform_device_register_simple("microcode", -1, | |
476 | NULL, 0); | |
477 | if (IS_ERR(microcode_pdev)) { | |
478 | microcode_dev_exit(); | |
479 | return PTR_ERR(microcode_pdev); | |
480 | } | |
481 | ||
482 | get_online_cpus(); | |
483 | error = sysdev_driver_register(&cpu_sysdev_class, &mc_sysdev_driver); | |
484 | put_online_cpus(); | |
485 | if (error) { | |
486 | microcode_dev_exit(); | |
487 | platform_device_unregister(microcode_pdev); | |
488 | return error; | |
489 | } | |
490 | ||
491 | register_hotcpu_notifier(&mc_cpu_notifier); | |
8d86f390 PO |
492 | |
493 | printk(KERN_INFO | |
494 | "Microcode Update Driver: v" MICROCODE_VERSION | |
36b75da2 PO |
495 | " <tigran@aivazian.fsnet.co.uk>," |
496 | " Peter Oruba\n"); | |
8d86f390 | 497 | |
3e135d88 PO |
498 | return 0; |
499 | } | |
500 | ||
18dbc916 | 501 | static void __exit microcode_exit(void) |
3e135d88 PO |
502 | { |
503 | microcode_dev_exit(); | |
504 | ||
505 | unregister_hotcpu_notifier(&mc_cpu_notifier); | |
506 | ||
507 | get_online_cpus(); | |
508 | sysdev_driver_unregister(&cpu_sysdev_class, &mc_sysdev_driver); | |
509 | put_online_cpus(); | |
510 | ||
511 | platform_device_unregister(microcode_pdev); | |
3e135d88 | 512 | |
8d86f390 PO |
513 | microcode_ops = NULL; |
514 | ||
515 | printk(KERN_INFO | |
516 | "Microcode Update Driver: v" MICROCODE_VERSION " removed.\n"); | |
517 | } | |
18dbc916 DA |
518 | |
519 | module_init(microcode_init); | |
520 | module_exit(microcode_exit); |