x86: rename mpc_config_bus to mpc_bus
[deliverable/linux.git] / arch / x86 / kernel / mpparse.c
CommitLineData
1da177e4 1/*
11113f84 2 * Intel Multiprocessor Specification 1.1 and 1.4
1da177e4
LT
3 * compliant MP-table parsing routines.
4 *
5 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
6 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
85bdddec 7 * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de>
1da177e4
LT
8 */
9
10#include <linux/mm.h>
1da177e4 11#include <linux/init.h>
1da177e4 12#include <linux/delay.h>
1da177e4 13#include <linux/bootmem.h>
1da177e4
LT
14#include <linux/kernel_stat.h>
15#include <linux/mc146818rtc.h>
16#include <linux/bitops.h>
85bdddec
AS
17#include <linux/acpi.h>
18#include <linux/module.h>
103ceffb
JSR
19#include <linux/smp.h>
20#include <linux/acpi.h>
1da177e4 21
1da177e4
LT
22#include <asm/mtrr.h>
23#include <asm/mpspec.h>
85bdddec 24#include <asm/pgalloc.h>
1da177e4 25#include <asm/io_apic.h>
85bdddec 26#include <asm/proto.h>
ce3fe6b2 27#include <asm/bios_ebda.h>
2944e16b
YL
28#include <asm/e820.h>
29#include <asm/trampoline.h>
3c9cb6de 30#include <asm/setup.h>
1da177e4
LT
31
32#include <mach_apic.h>
85bdddec 33#ifdef CONFIG_X86_32
874c4fe3 34#include <mach_apicdef.h>
1da177e4 35#include <mach_mpparse.h>
85bdddec 36#endif
1da177e4 37
1da177e4
LT
38/*
39 * Checksum an MP configuration block.
40 */
41
42static int __init mpf_checksum(unsigned char *mp, int len)
43{
44 int sum = 0;
45
46 while (len--)
47 sum += *mp++;
48
49 return sum & 0xFF;
50}
51
67d0c9eb 52static void __init MP_processor_info(struct mpc_config_processor *m)
c853c676
AS
53{
54 int apicid;
746f2244 55 char *bootup_cpu = "";
c853c676 56
7b1292e2
GC
57 if (!(m->mpc_cpuflag & CPU_ENABLED)) {
58 disabled_cpus++;
1da177e4 59 return;
7b1292e2 60 }
64898a8b
YL
61
62 if (x86_quirks->mpc_apic_id)
63 apicid = x86_quirks->mpc_apic_id(m);
ab530e1f
YL
64 else
65 apicid = m->mpc_apicid;
64898a8b 66
1da177e4 67 if (m->mpc_cpuflag & CPU_BOOTPROCESSOR) {
746f2244 68 bootup_cpu = " (Bootup-CPU)";
1da177e4 69 boot_cpu_physical_apicid = m->mpc_apicid;
1da177e4
LT
70 }
71
746f2244 72 printk(KERN_INFO "Processor #%d%s\n", m->mpc_apicid, bootup_cpu);
c853c676 73 generic_processor_info(apicid, m->mpc_apicver);
1da177e4
LT
74}
75
85cc35fa 76#ifdef CONFIG_X86_IO_APIC
00fb8606 77static void __init MP_bus_info(struct mpc_bus *m)
1da177e4
LT
78{
79 char str[7];
1da177e4
LT
80 memcpy(str, m->mpc_bustype, 6);
81 str[6] = 0;
82
64898a8b
YL
83 if (x86_quirks->mpc_oem_bus_info)
84 x86_quirks->mpc_oem_bus_info(m, str);
85 else
eeb0d7d1 86 apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->mpc_busid, str);
1da177e4 87
5e4edbb7 88#if MAX_MP_BUSSES < 256
c0ec31ad
RD
89 if (m->mpc_busid >= MAX_MP_BUSSES) {
90 printk(KERN_WARNING "MP table busid value (%d) for bustype %s "
4ef81297
AS
91 " is too large, max. supported is %d\n",
92 m->mpc_busid, str, MAX_MP_BUSSES - 1);
c0ec31ad
RD
93 return;
94 }
5e4edbb7 95#endif
c0ec31ad 96
f8924e77 97 if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
103ceffb
JSR
98 set_bit(m->mpc_busid, mp_bus_not_pci);
99#if defined(CONFIG_EISA) || defined(CONFIG_MCA)
f8924e77
AS
100 mp_bus_id_to_type[m->mpc_busid] = MP_BUS_ISA;
101#endif
102 } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) {
64898a8b
YL
103 if (x86_quirks->mpc_oem_pci_bus)
104 x86_quirks->mpc_oem_pci_bus(m);
105
a6333c3c 106 clear_bit(m->mpc_busid, mp_bus_not_pci);
103ceffb 107#if defined(CONFIG_EISA) || defined(CONFIG_MCA)
c0a282c2 108 mp_bus_id_to_type[m->mpc_busid] = MP_BUS_PCI;
4ef81297 109 } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) {
9e0a2de2 110 mp_bus_id_to_type[m->mpc_busid] = MP_BUS_EISA;
4ef81297 111 } else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) {
1da177e4 112 mp_bus_id_to_type[m->mpc_busid] = MP_BUS_MCA;
c0a282c2 113#endif
f8924e77
AS
114 } else
115 printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str);
1da177e4 116}
85cc35fa 117#endif
1da177e4 118
61048c63
AS
119#ifdef CONFIG_X86_IO_APIC
120
857033a6
AS
121static int bad_ioapic(unsigned long address)
122{
123 if (nr_ioapics >= MAX_IO_APICS) {
124 printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
125 "(found %d)\n", MAX_IO_APICS, nr_ioapics);
126 panic("Recompile kernel with bigger MAX_IO_APICS!\n");
127 }
128 if (!address) {
129 printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
130 " found in table, skipping!\n");
131 return 1;
132 }
133 return 0;
134}
135
4ef81297 136static void __init MP_ioapic_info(struct mpc_config_ioapic *m)
1da177e4
LT
137{
138 if (!(m->mpc_flags & MPC_APIC_USABLE))
139 return;
140
64883ab0 141 printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n",
4ef81297 142 m->mpc_apicid, m->mpc_apicver, m->mpc_apicaddr);
857033a6
AS
143
144 if (bad_ioapic(m->mpc_apicaddr))
1da177e4 145 return;
857033a6 146
ec2cd0a2
AS
147 mp_ioapics[nr_ioapics].mp_apicaddr = m->mpc_apicaddr;
148 mp_ioapics[nr_ioapics].mp_apicid = m->mpc_apicid;
149 mp_ioapics[nr_ioapics].mp_type = m->mpc_type;
150 mp_ioapics[nr_ioapics].mp_apicver = m->mpc_apicver;
151 mp_ioapics[nr_ioapics].mp_flags = m->mpc_flags;
1da177e4
LT
152 nr_ioapics++;
153}
154
2944e16b 155static void print_MP_intsrc_info(struct mpc_config_intsrc *m)
1da177e4 156{
eeb0d7d1 157 apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
1da177e4 158 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
4ef81297
AS
159 m->mpc_irqtype, m->mpc_irqflag & 3,
160 (m->mpc_irqflag >> 2) & 3, m->mpc_srcbus,
161 m->mpc_srcbusirq, m->mpc_dstapic, m->mpc_dstirq);
2944e16b
YL
162}
163
164static void __init print_mp_irq_info(struct mp_config_intsrc *mp_irq)
165{
eeb0d7d1 166 apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
2944e16b
YL
167 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
168 mp_irq->mp_irqtype, mp_irq->mp_irqflag & 3,
169 (mp_irq->mp_irqflag >> 2) & 3, mp_irq->mp_srcbus,
170 mp_irq->mp_srcbusirq, mp_irq->mp_dstapic, mp_irq->mp_dstirq);
171}
172
fcfa146e 173static void __init assign_to_mp_irq(struct mpc_config_intsrc *m,
2944e16b
YL
174 struct mp_config_intsrc *mp_irq)
175{
176 mp_irq->mp_dstapic = m->mpc_dstapic;
177 mp_irq->mp_type = m->mpc_type;
178 mp_irq->mp_irqtype = m->mpc_irqtype;
179 mp_irq->mp_irqflag = m->mpc_irqflag;
180 mp_irq->mp_srcbus = m->mpc_srcbus;
181 mp_irq->mp_srcbusirq = m->mpc_srcbusirq;
182 mp_irq->mp_dstirq = m->mpc_dstirq;
183}
184
185static void __init assign_to_mpc_intsrc(struct mp_config_intsrc *mp_irq,
186 struct mpc_config_intsrc *m)
187{
188 m->mpc_dstapic = mp_irq->mp_dstapic;
189 m->mpc_type = mp_irq->mp_type;
190 m->mpc_irqtype = mp_irq->mp_irqtype;
191 m->mpc_irqflag = mp_irq->mp_irqflag;
192 m->mpc_srcbus = mp_irq->mp_srcbus;
193 m->mpc_srcbusirq = mp_irq->mp_srcbusirq;
194 m->mpc_dstirq = mp_irq->mp_dstirq;
195}
196
fcfa146e 197static int __init mp_irq_mpc_intsrc_cmp(struct mp_config_intsrc *mp_irq,
2944e16b
YL
198 struct mpc_config_intsrc *m)
199{
200 if (mp_irq->mp_dstapic != m->mpc_dstapic)
201 return 1;
202 if (mp_irq->mp_type != m->mpc_type)
203 return 2;
204 if (mp_irq->mp_irqtype != m->mpc_irqtype)
205 return 3;
206 if (mp_irq->mp_irqflag != m->mpc_irqflag)
207 return 4;
208 if (mp_irq->mp_srcbus != m->mpc_srcbus)
209 return 5;
210 if (mp_irq->mp_srcbusirq != m->mpc_srcbusirq)
211 return 6;
212 if (mp_irq->mp_dstirq != m->mpc_dstirq)
213 return 7;
214
215 return 0;
216}
217
fcfa146e 218static void __init MP_intsrc_info(struct mpc_config_intsrc *m)
2944e16b
YL
219{
220 int i;
221
222 print_MP_intsrc_info(m);
223
fcfa146e
YL
224 for (i = 0; i < mp_irq_entries; i++) {
225 if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m))
226 return;
227 }
2944e16b
YL
228
229 assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]);
1da177e4
LT
230 if (++mp_irq_entries == MAX_IRQ_SOURCES)
231 panic("Max # of irq sources exceeded!!\n");
232}
233
61048c63
AS
234#endif
235
4ef81297 236static void __init MP_lintsrc_info(struct mpc_config_lintsrc *m)
1da177e4 237{
eeb0d7d1 238 apic_printk(APIC_VERBOSE, "Lint: type %d, pol %d, trig %d, bus %02x,"
1da177e4 239 " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
4ef81297
AS
240 m->mpc_irqtype, m->mpc_irqflag & 3,
241 (m->mpc_irqflag >> 2) & 3, m->mpc_srcbusid,
242 m->mpc_srcbusirq, m->mpc_destapic, m->mpc_destapiclint);
1da177e4
LT
243}
244
1da177e4
LT
245/*
246 * Read/parse the MPC
247 */
248
f29521e4 249static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str)
1da177e4 250{
1da177e4 251
4ef81297 252 if (memcmp(mpc->mpc_signature, MPC_SIGNATURE, 4)) {
e950bea8
AS
253 printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n",
254 mpc->mpc_signature[0], mpc->mpc_signature[1],
255 mpc->mpc_signature[2], mpc->mpc_signature[3]);
1da177e4
LT
256 return 0;
257 }
4ef81297 258 if (mpf_checksum((unsigned char *)mpc, mpc->mpc_length)) {
e950bea8 259 printk(KERN_ERR "MPTABLE: checksum error!\n");
1da177e4
LT
260 return 0;
261 }
4ef81297 262 if (mpc->mpc_spec != 0x01 && mpc->mpc_spec != 0x04) {
e950bea8 263 printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
4ef81297 264 mpc->mpc_spec);
1da177e4
LT
265 return 0;
266 }
267 if (!mpc->mpc_lapic) {
e950bea8 268 printk(KERN_ERR "MPTABLE: null local APIC address!\n");
1da177e4
LT
269 return 0;
270 }
4ef81297
AS
271 memcpy(oem, mpc->mpc_oem, 8);
272 oem[8] = 0;
11a62a05 273 printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem);
1da177e4 274
4ef81297
AS
275 memcpy(str, mpc->mpc_productid, 12);
276 str[12] = 0;
1da177e4 277
11a62a05 278 printk(KERN_INFO "MPTABLE: Product ID: %s\n", str);
1da177e4 279
e950bea8 280 printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->mpc_lapic);
1da177e4 281
2944e16b
YL
282 return 1;
283}
284
f29521e4 285static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
2944e16b
YL
286{
287 char str[16];
288 char oem[10];
289
290 int count = sizeof(*mpc);
291 unsigned char *mpt = ((unsigned char *)mpc) + count;
292
293 if (!smp_check_mpc(mpc, oem, str))
294 return 0;
295
296#ifdef CONFIG_X86_32
d49c4288
YL
297 /*
298 * need to make sure summit and es7000's mps_oem_check is safe to be
299 * called early via genericarch 's mps_oem_check
300 */
301 if (early) {
302#ifdef CONFIG_X86_NUMAQ
303 numaq_mps_oem_check(mpc, oem, str);
304#endif
305 } else
306 mps_oem_check(mpc, oem, str);
2944e16b 307#endif
e950bea8 308 /* save the local APIC address, it might be non-default */
1da177e4
LT
309 if (!acpi_lapic)
310 mp_lapic_addr = mpc->mpc_lapic;
311
888032cd
AS
312 if (early)
313 return 1;
314
64898a8b
YL
315 if (mpc->mpc_oemptr && x86_quirks->smp_read_mpc_oem) {
316 struct mp_config_oemtable *oem_table = (struct mp_config_oemtable *)(unsigned long)mpc->mpc_oemptr;
317 x86_quirks->smp_read_mpc_oem(oem_table, mpc->mpc_oemsize);
318 }
319
1da177e4 320 /*
4ef81297 321 * Now process the configuration blocks.
1da177e4 322 */
64898a8b
YL
323 if (x86_quirks->mpc_record)
324 *x86_quirks->mpc_record = 0;
325
1da177e4 326 while (count < mpc->mpc_length) {
4ef81297
AS
327 switch (*mpt) {
328 case MP_PROCESSOR:
1da177e4 329 {
4ef81297
AS
330 struct mpc_config_processor *m =
331 (struct mpc_config_processor *)mpt;
1da177e4
LT
332 /* ACPI may have already provided this data */
333 if (!acpi_lapic)
334 MP_processor_info(m);
335 mpt += sizeof(*m);
336 count += sizeof(*m);
337 break;
338 }
4ef81297 339 case MP_BUS:
1da177e4 340 {
00fb8606 341 struct mpc_bus *m = (struct mpc_bus *)mpt;
85cc35fa 342#ifdef CONFIG_X86_IO_APIC
1da177e4 343 MP_bus_info(m);
85cc35fa 344#endif
1da177e4
LT
345 mpt += sizeof(*m);
346 count += sizeof(*m);
347 break;
348 }
4ef81297 349 case MP_IOAPIC:
1da177e4 350 {
61048c63 351#ifdef CONFIG_X86_IO_APIC
4ef81297
AS
352 struct mpc_config_ioapic *m =
353 (struct mpc_config_ioapic *)mpt;
1da177e4 354 MP_ioapic_info(m);
61048c63 355#endif
4ef81297
AS
356 mpt += sizeof(struct mpc_config_ioapic);
357 count += sizeof(struct mpc_config_ioapic);
1da177e4
LT
358 break;
359 }
4ef81297 360 case MP_INTSRC:
1da177e4 361 {
61048c63 362#ifdef CONFIG_X86_IO_APIC
4ef81297
AS
363 struct mpc_config_intsrc *m =
364 (struct mpc_config_intsrc *)mpt;
1da177e4
LT
365
366 MP_intsrc_info(m);
61048c63 367#endif
4ef81297
AS
368 mpt += sizeof(struct mpc_config_intsrc);
369 count += sizeof(struct mpc_config_intsrc);
1da177e4
LT
370 break;
371 }
4ef81297 372 case MP_LINTSRC:
1da177e4 373 {
4ef81297
AS
374 struct mpc_config_lintsrc *m =
375 (struct mpc_config_lintsrc *)mpt;
1da177e4 376 MP_lintsrc_info(m);
4ef81297
AS
377 mpt += sizeof(*m);
378 count += sizeof(*m);
1da177e4
LT
379 break;
380 }
4ef81297 381 default:
711554db
YL
382 /* wrong mptable */
383 printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n");
384 printk(KERN_ERR "type %x\n", *mpt);
385 print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16,
386 1, mpc, mpc->mpc_length, 1);
387 count = mpc->mpc_length;
388 break;
1da177e4 389 }
64898a8b
YL
390 if (x86_quirks->mpc_record)
391 (*x86_quirks->mpc_record)++;
1da177e4 392 }
e0da3364
YL
393
394#ifdef CONFIG_X86_GENERICARCH
395 generic_bigsmp_probe();
396#endif
397
6e1cb38a 398#ifdef CONFIG_X86_32
3c43f039 399 setup_apic_routing();
6e1cb38a 400#endif
1da177e4 401 if (!num_processors)
e950bea8 402 printk(KERN_ERR "MPTABLE: no processors registered!\n");
1da177e4
LT
403 return num_processors;
404}
405
61048c63
AS
406#ifdef CONFIG_X86_IO_APIC
407
1da177e4
LT
408static int __init ELCR_trigger(unsigned int irq)
409{
410 unsigned int port;
411
412 port = 0x4d0 + (irq >> 3);
413 return (inb(port) >> (irq & 7)) & 1;
414}
415
416static void __init construct_default_ioirq_mptable(int mpc_default_type)
417{
418 struct mpc_config_intsrc intsrc;
419 int i;
420 int ELCR_fallback = 0;
421
422 intsrc.mpc_type = MP_INTSRC;
4ef81297 423 intsrc.mpc_irqflag = 0; /* conforming */
1da177e4 424 intsrc.mpc_srcbus = 0;
ec2cd0a2 425 intsrc.mpc_dstapic = mp_ioapics[0].mp_apicid;
1da177e4
LT
426
427 intsrc.mpc_irqtype = mp_INT;
428
429 /*
430 * If true, we have an ISA/PCI system with no IRQ entries
431 * in the MP table. To prevent the PCI interrupts from being set up
432 * incorrectly, we try to use the ELCR. The sanity check to see if
433 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
434 * never be level sensitive, so we simply see if the ELCR agrees.
435 * If it does, we assume it's valid.
436 */
437 if (mpc_default_type == 5) {
62441bf1
AS
438 printk(KERN_INFO "ISA/PCI bus type with no IRQ information... "
439 "falling back to ELCR\n");
1da177e4 440
62441bf1
AS
441 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
442 ELCR_trigger(13))
443 printk(KERN_ERR "ELCR contains invalid data... "
444 "not using ELCR\n");
1da177e4 445 else {
4ef81297
AS
446 printk(KERN_INFO
447 "Using ELCR to identify PCI interrupts\n");
1da177e4
LT
448 ELCR_fallback = 1;
449 }
450 }
451
452 for (i = 0; i < 16; i++) {
453 switch (mpc_default_type) {
454 case 2:
455 if (i == 0 || i == 13)
456 continue; /* IRQ0 & IRQ13 not connected */
457 /* fall through */
458 default:
459 if (i == 2)
460 continue; /* IRQ2 is never connected */
461 }
462
463 if (ELCR_fallback) {
464 /*
465 * If the ELCR indicates a level-sensitive interrupt, we
466 * copy that information over to the MP table in the
467 * irqflag field (level sensitive, active high polarity).
468 */
469 if (ELCR_trigger(i))
470 intsrc.mpc_irqflag = 13;
471 else
472 intsrc.mpc_irqflag = 0;
473 }
474
475 intsrc.mpc_srcbusirq = i;
4ef81297 476 intsrc.mpc_dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
1da177e4
LT
477 MP_intsrc_info(&intsrc);
478 }
479
480 intsrc.mpc_irqtype = mp_ExtINT;
481 intsrc.mpc_srcbusirq = 0;
4ef81297 482 intsrc.mpc_dstirq = 0; /* 8259A to INTIN0 */
1da177e4
LT
483 MP_intsrc_info(&intsrc);
484}
485
61048c63 486
39e00fe2 487static void __init construct_ioapic_table(int mpc_default_type)
1da177e4 488{
1da177e4 489 struct mpc_config_ioapic ioapic;
00fb8606 490 struct mpc_bus bus;
1da177e4
LT
491
492 bus.mpc_type = MP_BUS;
493 bus.mpc_busid = 0;
494 switch (mpc_default_type) {
4ef81297 495 default:
62441bf1 496 printk(KERN_ERR "???\nUnknown standard configuration %d\n",
4ef81297
AS
497 mpc_default_type);
498 /* fall through */
499 case 1:
500 case 5:
501 memcpy(bus.mpc_bustype, "ISA ", 6);
502 break;
503 case 2:
504 case 6:
505 case 3:
506 memcpy(bus.mpc_bustype, "EISA ", 6);
507 break;
508 case 4:
509 case 7:
510 memcpy(bus.mpc_bustype, "MCA ", 6);
1da177e4
LT
511 }
512 MP_bus_info(&bus);
513 if (mpc_default_type > 4) {
514 bus.mpc_busid = 1;
515 memcpy(bus.mpc_bustype, "PCI ", 6);
516 MP_bus_info(&bus);
517 }
518
519 ioapic.mpc_type = MP_IOAPIC;
520 ioapic.mpc_apicid = 2;
521 ioapic.mpc_apicver = mpc_default_type > 4 ? 0x10 : 0x01;
522 ioapic.mpc_flags = MPC_APIC_USABLE;
523 ioapic.mpc_apicaddr = 0xFEC00000;
524 MP_ioapic_info(&ioapic);
525
526 /*
527 * We set up most of the low 16 IO-APIC pins according to MPS rules.
528 */
529 construct_default_ioirq_mptable(mpc_default_type);
85cc35fa
TG
530}
531#else
39e00fe2 532static inline void __init construct_ioapic_table(int mpc_default_type) { }
61048c63 533#endif
85cc35fa
TG
534
535static inline void __init construct_default_ISA_mptable(int mpc_default_type)
536{
537 struct mpc_config_processor processor;
538 struct mpc_config_lintsrc lintsrc;
539 int linttypes[2] = { mp_ExtINT, mp_NMI };
540 int i;
541
542 /*
543 * local APIC has default address
544 */
545 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
546
547 /*
548 * 2 CPUs, numbered 0 & 1.
549 */
550 processor.mpc_type = MP_PROCESSOR;
551 /* Either an integrated APIC or a discrete 82489DX. */
552 processor.mpc_apicver = mpc_default_type > 4 ? 0x10 : 0x01;
553 processor.mpc_cpuflag = CPU_ENABLED;
554 processor.mpc_cpufeature = (boot_cpu_data.x86 << 8) |
555 (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask;
556 processor.mpc_featureflag = boot_cpu_data.x86_capability[0];
557 processor.mpc_reserved[0] = 0;
558 processor.mpc_reserved[1] = 0;
559 for (i = 0; i < 2; i++) {
560 processor.mpc_apicid = i;
561 MP_processor_info(&processor);
562 }
563
564 construct_ioapic_table(mpc_default_type);
565
1da177e4 566 lintsrc.mpc_type = MP_LINTSRC;
4ef81297 567 lintsrc.mpc_irqflag = 0; /* conforming */
1da177e4
LT
568 lintsrc.mpc_srcbusid = 0;
569 lintsrc.mpc_srcbusirq = 0;
570 lintsrc.mpc_destapic = MP_APIC_ALL;
571 for (i = 0; i < 2; i++) {
572 lintsrc.mpc_irqtype = linttypes[i];
573 lintsrc.mpc_destapiclint = i;
574 MP_lintsrc_info(&lintsrc);
575 }
576}
577
578static struct intel_mp_floating *mpf_found;
579
580/*
581 * Scan the memory blocks for an SMP configuration block.
582 */
3b33553b 583static void __init __get_smp_config(unsigned int early)
1da177e4
LT
584{
585 struct intel_mp_floating *mpf = mpf_found;
586
69b88afa
YL
587 if (!mpf)
588 return;
589
888032cd
AS
590 if (acpi_lapic && early)
591 return;
69b88afa 592
1da177e4 593 /*
69b88afa
YL
594 * MPS doesn't support hyperthreading, aka only have
595 * thread 0 apic id in MPS table
1da177e4 596 */
69b88afa 597 if (acpi_lapic && acpi_ioapic)
1da177e4 598 return;
1da177e4 599
69b88afa
YL
600 if (x86_quirks->mach_get_smp_config) {
601 if (x86_quirks->mach_get_smp_config(early))
602 return;
603 }
9adc1386 604
4ef81297
AS
605 printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
606 mpf->mpf_specification);
b3e24164 607#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
4ef81297 608 if (mpf->mpf_feature2 & (1 << 7)) {
1da177e4
LT
609 printk(KERN_INFO " IMCR and PIC compatibility mode.\n");
610 pic_mode = 1;
611 } else {
612 printk(KERN_INFO " Virtual Wire compatibility mode.\n");
613 pic_mode = 0;
614 }
4421b1c8 615#endif
1da177e4
LT
616 /*
617 * Now see if we need to read further.
618 */
619 if (mpf->mpf_feature1 != 0) {
888032cd
AS
620 if (early) {
621 /*
622 * local APIC has default address
623 */
624 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
625 return;
626 }
1da177e4 627
4ef81297
AS
628 printk(KERN_INFO "Default MP configuration #%d\n",
629 mpf->mpf_feature1);
1da177e4
LT
630 construct_default_ISA_mptable(mpf->mpf_feature1);
631
632 } else if (mpf->mpf_physptr) {
633
634 /*
635 * Read the physical hardware table. Anything here will
636 * override the defaults.
637 */
888032cd 638 if (!smp_read_mpc(phys_to_virt(mpf->mpf_physptr), early)) {
bab4b27c 639#ifdef CONFIG_X86_LOCAL_APIC
1da177e4 640 smp_found_config = 0;
bab4b27c 641#endif
4ef81297
AS
642 printk(KERN_ERR
643 "BIOS bug, MP table errors detected!...\n");
4421b1c8
AS
644 printk(KERN_ERR "... disabling SMP support. "
645 "(tell your hw vendor)\n");
1da177e4
LT
646 return;
647 }
61048c63 648
888032cd
AS
649 if (early)
650 return;
61048c63 651#ifdef CONFIG_X86_IO_APIC
1da177e4
LT
652 /*
653 * If there are no explicit MP IRQ entries, then we are
654 * broken. We set up most of the low 16 IO-APIC pins to
655 * ISA defaults and hope it will work.
656 */
657 if (!mp_irq_entries) {
00fb8606 658 struct mpc_bus bus;
1da177e4 659
4421b1c8
AS
660 printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
661 "using default mptable. "
662 "(tell your hw vendor)\n");
1da177e4
LT
663
664 bus.mpc_type = MP_BUS;
665 bus.mpc_busid = 0;
666 memcpy(bus.mpc_bustype, "ISA ", 6);
667 MP_bus_info(&bus);
668
669 construct_default_ioirq_mptable(0);
670 }
61048c63 671#endif
1da177e4
LT
672 } else
673 BUG();
674
888032cd
AS
675 if (!early)
676 printk(KERN_INFO "Processors: %d\n", num_processors);
1da177e4
LT
677 /*
678 * Only use the first configuration found.
679 */
680}
681
888032cd
AS
682void __init early_get_smp_config(void)
683{
684 __get_smp_config(1);
685}
686
687void __init get_smp_config(void)
688{
689 __get_smp_config(0);
690}
691
692static int __init smp_scan_config(unsigned long base, unsigned long length,
693 unsigned reserve)
1da177e4 694{
92fd4b7a 695 unsigned int *bp = phys_to_virt(base);
1da177e4
LT
696 struct intel_mp_floating *mpf;
697
eeb0d7d1
RH
698 apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n",
699 bp, length);
5d47a271 700 BUILD_BUG_ON(sizeof(*mpf) != 16);
1da177e4
LT
701
702 while (length > 0) {
703 mpf = (struct intel_mp_floating *)bp;
704 if ((*bp == SMP_MAGIC_IDENT) &&
4ef81297
AS
705 (mpf->mpf_length == 1) &&
706 !mpf_checksum((unsigned char *)bp, 16) &&
707 ((mpf->mpf_specification == 1)
708 || (mpf->mpf_specification == 4))) {
bab4b27c 709#ifdef CONFIG_X86_LOCAL_APIC
1da177e4 710 smp_found_config = 1;
bab4b27c 711#endif
92fd4b7a 712 mpf_found = mpf;
b1f006b6 713
e91a3b43 714 printk(KERN_INFO "found SMP MP-table at [%p] %08lx\n",
4ef81297 715 mpf, virt_to_phys(mpf));
b1f006b6
YL
716
717 if (!reserve)
718 return 1;
d2dbf343 719 reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE,
72a7fe39 720 BOOTMEM_DEFAULT);
1da177e4 721 if (mpf->mpf_physptr) {
d2dbf343
YL
722 unsigned long size = PAGE_SIZE;
723#ifdef CONFIG_X86_32
1da177e4
LT
724 /*
725 * We cannot access to MPC table to compute
726 * table size yet, as only few megabytes from
727 * the bottom is mapped now.
728 * PC-9800's MPC table places on the very last
729 * of physical memory; so that simply reserving
730 * PAGE_SIZE from mpg->mpf_physptr yields BUG()
731 * in reserve_bootmem.
732 */
1da177e4
LT
733 unsigned long end = max_low_pfn * PAGE_SIZE;
734 if (mpf->mpf_physptr + size > end)
735 size = end - mpf->mpf_physptr;
d2dbf343
YL
736#endif
737 reserve_bootmem_generic(mpf->mpf_physptr, size,
72a7fe39 738 BOOTMEM_DEFAULT);
1da177e4
LT
739 }
740
d2dbf343 741 return 1;
1da177e4
LT
742 }
743 bp += 4;
744 length -= 16;
745 }
746 return 0;
747}
748
3b33553b 749static void __init __find_smp_config(unsigned int reserve)
1da177e4
LT
750{
751 unsigned int address;
752
3c9cb6de
YL
753 if (x86_quirks->mach_find_smp_config) {
754 if (x86_quirks->mach_find_smp_config(reserve))
3b33553b
IM
755 return;
756 }
1da177e4
LT
757 /*
758 * FIXME: Linux assumes you have 640K of base ram..
759 * this continues the error...
760 *
761 * 1) Scan the bottom 1K for a signature
762 * 2) Scan the top 1K of base RAM
763 * 3) Scan the 64K of bios
764 */
888032cd
AS
765 if (smp_scan_config(0x0, 0x400, reserve) ||
766 smp_scan_config(639 * 0x400, 0x400, reserve) ||
767 smp_scan_config(0xF0000, 0x10000, reserve))
1da177e4
LT
768 return;
769 /*
770 * If it is an SMP machine we should know now, unless the
771 * configuration is in an EISA/MCA bus machine with an
772 * extended bios data area.
773 *
774 * there is a real-mode segmented pointer pointing to the
775 * 4K EBDA area at 0x40E, calculate and scan it here.
776 *
777 * NOTE! There are Linux loaders that will corrupt the EBDA
778 * area, and as such this kind of SMP config may be less
779 * trustworthy, simply because the SMP table may have been
780 * stomped on during early boot. These loaders are buggy and
781 * should be fixed.
782 *
783 * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
784 */
785
786 address = get_bios_ebda();
787 if (address)
888032cd
AS
788 smp_scan_config(address, 0x400, reserve);
789}
790
791void __init early_find_smp_config(void)
792{
793 __find_smp_config(0);
794}
795
796void __init find_smp_config(void)
797{
798 __find_smp_config(1);
1da177e4 799}
2944e16b
YL
800
801#ifdef CONFIG_X86_IO_APIC
802static u8 __initdata irq_used[MAX_IRQ_SOURCES];
803
804static int __init get_MP_intsrc_index(struct mpc_config_intsrc *m)
805{
806 int i;
807
808 if (m->mpc_irqtype != mp_INT)
809 return 0;
810
811 if (m->mpc_irqflag != 0x0f)
812 return 0;
813
814 /* not legacy */
815
816 for (i = 0; i < mp_irq_entries; i++) {
817 if (mp_irqs[i].mp_irqtype != mp_INT)
818 continue;
819
820 if (mp_irqs[i].mp_irqflag != 0x0f)
821 continue;
822
823 if (mp_irqs[i].mp_srcbus != m->mpc_srcbus)
824 continue;
825 if (mp_irqs[i].mp_srcbusirq != m->mpc_srcbusirq)
826 continue;
827 if (irq_used[i]) {
828 /* already claimed */
829 return -2;
830 }
831 irq_used[i] = 1;
832 return i;
833 }
834
835 /* not found */
836 return -1;
837}
838
839#define SPARE_SLOT_NUM 20
840
841static struct mpc_config_intsrc __initdata *m_spare[SPARE_SLOT_NUM];
842#endif
843
f29521e4 844static int __init replace_intsrc_all(struct mpc_table *mpc,
2944e16b
YL
845 unsigned long mpc_new_phys,
846 unsigned long mpc_new_length)
847{
848#ifdef CONFIG_X86_IO_APIC
849 int i;
850 int nr_m_spare = 0;
851#endif
852
853 int count = sizeof(*mpc);
854 unsigned char *mpt = ((unsigned char *)mpc) + count;
855
856 printk(KERN_INFO "mpc_length %x\n", mpc->mpc_length);
857 while (count < mpc->mpc_length) {
858 switch (*mpt) {
859 case MP_PROCESSOR:
860 {
861 struct mpc_config_processor *m =
862 (struct mpc_config_processor *)mpt;
863 mpt += sizeof(*m);
864 count += sizeof(*m);
865 break;
866 }
867 case MP_BUS:
868 {
00fb8606 869 struct mpc_bus *m = (struct mpc_bus *)mpt;
2944e16b
YL
870 mpt += sizeof(*m);
871 count += sizeof(*m);
872 break;
873 }
874 case MP_IOAPIC:
875 {
876 mpt += sizeof(struct mpc_config_ioapic);
877 count += sizeof(struct mpc_config_ioapic);
878 break;
879 }
880 case MP_INTSRC:
881 {
882#ifdef CONFIG_X86_IO_APIC
883 struct mpc_config_intsrc *m =
884 (struct mpc_config_intsrc *)mpt;
885
886 printk(KERN_INFO "OLD ");
887 print_MP_intsrc_info(m);
888 i = get_MP_intsrc_index(m);
889 if (i > 0) {
890 assign_to_mpc_intsrc(&mp_irqs[i], m);
891 printk(KERN_INFO "NEW ");
892 print_mp_irq_info(&mp_irqs[i]);
893 } else if (!i) {
894 /* legacy, do nothing */
895 } else if (nr_m_spare < SPARE_SLOT_NUM) {
896 /*
897 * not found (-1), or duplicated (-2)
898 * are invalid entries,
899 * we need to use the slot later
900 */
901 m_spare[nr_m_spare] = m;
902 nr_m_spare++;
903 }
904#endif
905 mpt += sizeof(struct mpc_config_intsrc);
906 count += sizeof(struct mpc_config_intsrc);
907 break;
908 }
909 case MP_LINTSRC:
910 {
911 struct mpc_config_lintsrc *m =
912 (struct mpc_config_lintsrc *)mpt;
913 mpt += sizeof(*m);
914 count += sizeof(*m);
915 break;
916 }
917 default:
918 /* wrong mptable */
919 printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n");
920 printk(KERN_ERR "type %x\n", *mpt);
921 print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16,
922 1, mpc, mpc->mpc_length, 1);
923 goto out;
924 }
925 }
926
927#ifdef CONFIG_X86_IO_APIC
928 for (i = 0; i < mp_irq_entries; i++) {
929 if (irq_used[i])
930 continue;
931
932 if (mp_irqs[i].mp_irqtype != mp_INT)
933 continue;
934
935 if (mp_irqs[i].mp_irqflag != 0x0f)
936 continue;
937
938 if (nr_m_spare > 0) {
939 printk(KERN_INFO "*NEW* found ");
940 nr_m_spare--;
941 assign_to_mpc_intsrc(&mp_irqs[i], m_spare[nr_m_spare]);
942 m_spare[nr_m_spare] = NULL;
943 } else {
944 struct mpc_config_intsrc *m =
945 (struct mpc_config_intsrc *)mpt;
946 count += sizeof(struct mpc_config_intsrc);
947 if (!mpc_new_phys) {
948 printk(KERN_INFO "No spare slots, try to append...take your risk, new mpc_length %x\n", count);
949 } else {
950 if (count <= mpc_new_length)
951 printk(KERN_INFO "No spare slots, try to append..., new mpc_length %x\n", count);
952 else {
953 printk(KERN_ERR "mpc_new_length %lx is too small\n", mpc_new_length);
954 goto out;
955 }
956 }
957 assign_to_mpc_intsrc(&mp_irqs[i], m);
958 mpc->mpc_length = count;
959 mpt += sizeof(struct mpc_config_intsrc);
960 }
961 print_mp_irq_info(&mp_irqs[i]);
962 }
963#endif
964out:
965 /* update checksum */
966 mpc->mpc_checksum = 0;
967 mpc->mpc_checksum -= mpf_checksum((unsigned char *)mpc,
968 mpc->mpc_length);
969
970 return 0;
971}
972
fcfa146e
YL
973static int __initdata enable_update_mptable;
974
2944e16b
YL
975static int __init update_mptable_setup(char *str)
976{
977 enable_update_mptable = 1;
978 return 0;
979}
980early_param("update_mptable", update_mptable_setup);
981
982static unsigned long __initdata mpc_new_phys;
983static unsigned long mpc_new_length __initdata = 4096;
984
985/* alloc_mptable or alloc_mptable=4k */
986static int __initdata alloc_mptable;
987static int __init parse_alloc_mptable_opt(char *p)
988{
989 enable_update_mptable = 1;
990 alloc_mptable = 1;
991 if (!p)
992 return 0;
993 mpc_new_length = memparse(p, &p);
994 return 0;
995}
996early_param("alloc_mptable", parse_alloc_mptable_opt);
997
998void __init early_reserve_e820_mpc_new(void)
999{
1000 if (enable_update_mptable && alloc_mptable) {
1001 u64 startt = 0;
1002#ifdef CONFIG_X86_TRAMPOLINE
1003 startt = TRAMPOLINE_BASE;
1004#endif
1005 mpc_new_phys = early_reserve_e820(startt, mpc_new_length, 4);
1006 }
1007}
1008
1009static int __init update_mp_table(void)
1010{
1011 char str[16];
1012 char oem[10];
1013 struct intel_mp_floating *mpf;
f29521e4 1014 struct mpc_table *mpc, *mpc_new;
2944e16b
YL
1015
1016 if (!enable_update_mptable)
1017 return 0;
1018
1019 mpf = mpf_found;
1020 if (!mpf)
1021 return 0;
1022
1023 /*
1024 * Now see if we need to go further.
1025 */
1026 if (mpf->mpf_feature1 != 0)
1027 return 0;
1028
1029 if (!mpf->mpf_physptr)
1030 return 0;
1031
1032 mpc = phys_to_virt(mpf->mpf_physptr);
1033
1034 if (!smp_check_mpc(mpc, oem, str))
1035 return 0;
1036
1037 printk(KERN_INFO "mpf: %lx\n", virt_to_phys(mpf));
1038 printk(KERN_INFO "mpf_physptr: %x\n", mpf->mpf_physptr);
1039
1040 if (mpc_new_phys && mpc->mpc_length > mpc_new_length) {
1041 mpc_new_phys = 0;
1042 printk(KERN_INFO "mpc_new_length is %ld, please use alloc_mptable=8k\n",
1043 mpc_new_length);
1044 }
1045
1046 if (!mpc_new_phys) {
1047 unsigned char old, new;
1048 /* check if we can change the postion */
1049 mpc->mpc_checksum = 0;
1050 old = mpf_checksum((unsigned char *)mpc, mpc->mpc_length);
1051 mpc->mpc_checksum = 0xff;
1052 new = mpf_checksum((unsigned char *)mpc, mpc->mpc_length);
1053 if (old == new) {
1054 printk(KERN_INFO "mpc is readonly, please try alloc_mptable instead\n");
1055 return 0;
1056 }
1057 printk(KERN_INFO "use in-positon replacing\n");
1058 } else {
1059 mpf->mpf_physptr = mpc_new_phys;
1060 mpc_new = phys_to_virt(mpc_new_phys);
1061 memcpy(mpc_new, mpc, mpc->mpc_length);
1062 mpc = mpc_new;
1063 /* check if we can modify that */
1064 if (mpc_new_phys - mpf->mpf_physptr) {
1065 struct intel_mp_floating *mpf_new;
1066 /* steal 16 bytes from [0, 1k) */
1067 printk(KERN_INFO "mpf new: %x\n", 0x400 - 16);
1068 mpf_new = phys_to_virt(0x400 - 16);
1069 memcpy(mpf_new, mpf, 16);
1070 mpf = mpf_new;
1071 mpf->mpf_physptr = mpc_new_phys;
1072 }
1073 mpf->mpf_checksum = 0;
1074 mpf->mpf_checksum -= mpf_checksum((unsigned char *)mpf, 16);
1075 printk(KERN_INFO "mpf_physptr new: %x\n", mpf->mpf_physptr);
1076 }
1077
1078 /*
1079 * only replace the one with mp_INT and
1080 * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
1081 * already in mp_irqs , stored by ... and mp_config_acpi_gsi,
1082 * may need pci=routeirq for all coverage
1083 */
1084 replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length);
1085
1086 return 0;
1087}
1088
1089late_initcall(update_mp_table);
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