x86: add irq_cfg for 32bit
[deliverable/linux.git] / arch / x86 / kernel / msr.c
CommitLineData
1da177e4 1/* ----------------------------------------------------------------------- *
2b06ac86
PA
2 *
3 * Copyright 2000-2008 H. Peter Anvin - All Rights Reserved
1da177e4
LT
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation, Inc., 675 Mass Ave, Cambridge MA 02139,
8 * USA; either version 2 of the License, or (at your option) any later
9 * version; incorporated herein by reference.
10 *
11 * ----------------------------------------------------------------------- */
12
13/*
1da177e4
LT
14 * x86 MSR access device
15 *
16 * This device is accessed by lseek() to the appropriate register number
17 * and then read/write in chunks of 8 bytes. A larger size means multiple
18 * reads or writes of the same register.
19 *
20 * This driver uses /dev/cpu/%d/msr where %d is the minor number, and on
21 * an SMP box will direct the access to CPU %d.
22 */
23
24#include <linux/module.h>
1da177e4
LT
25
26#include <linux/types.h>
27#include <linux/errno.h>
28#include <linux/fcntl.h>
29#include <linux/init.h>
30#include <linux/poll.h>
31#include <linux/smp.h>
32#include <linux/smp_lock.h>
33#include <linux/major.h>
34#include <linux/fs.h>
35#include <linux/device.h>
36#include <linux/cpu.h>
37#include <linux/notifier.h>
38
39#include <asm/processor.h>
40#include <asm/msr.h>
41#include <asm/uaccess.h>
42#include <asm/system.h>
43
8874b414 44static struct class *msr_class;
1da177e4 45
1da177e4
LT
46static loff_t msr_seek(struct file *file, loff_t offset, int orig)
47{
2b06ac86
PA
48 loff_t ret;
49 struct inode *inode = file->f_mapping->host;
1da177e4 50
2b06ac86 51 mutex_lock(&inode->i_mutex);
1da177e4
LT
52 switch (orig) {
53 case 0:
54 file->f_pos = offset;
55 ret = file->f_pos;
56 break;
57 case 1:
58 file->f_pos += offset;
59 ret = file->f_pos;
2b06ac86
PA
60 break;
61 default:
62 ret = -EINVAL;
1da177e4 63 }
2b06ac86 64 mutex_unlock(&inode->i_mutex);
1da177e4
LT
65 return ret;
66}
67
94a9fa41
PC
68static ssize_t msr_read(struct file *file, char __user *buf,
69 size_t count, loff_t *ppos)
1da177e4
LT
70{
71 u32 __user *tmp = (u32 __user *) buf;
72 u32 data[2];
1da177e4 73 u32 reg = *ppos;
aab4c5a5 74 int cpu = iminor(file->f_path.dentry->d_inode);
85f1cb60
PA
75 int err = 0;
76 ssize_t bytes = 0;
1da177e4
LT
77
78 if (count % 8)
79 return -EINVAL; /* Invalid chunk size */
80
6926d570 81 for (; count; count -= 8) {
78a62d2c 82 err = rdmsr_safe_on_cpu(cpu, reg, &data[0], &data[1]);
c6f31932
PA
83 if (err) {
84 if (err == -EFAULT) /* Fix idiotic error code */
85 err = -EIO;
85f1cb60
PA
86 break;
87 }
88 if (copy_to_user(tmp, &data, 8)) {
89 err = -EFAULT;
90 break;
c6f31932 91 }
1da177e4 92 tmp += 2;
85f1cb60 93 bytes += 8;
1da177e4
LT
94 }
95
85f1cb60 96 return bytes ? bytes : err;
1da177e4
LT
97}
98
99static ssize_t msr_write(struct file *file, const char __user *buf,
100 size_t count, loff_t *ppos)
101{
102 const u32 __user *tmp = (const u32 __user *)buf;
103 u32 data[2];
1da177e4 104 u32 reg = *ppos;
aab4c5a5 105 int cpu = iminor(file->f_path.dentry->d_inode);
85f1cb60
PA
106 int err = 0;
107 ssize_t bytes = 0;
1da177e4
LT
108
109 if (count % 8)
110 return -EINVAL; /* Invalid chunk size */
111
f475ff35 112 for (; count; count -= 8) {
85f1cb60
PA
113 if (copy_from_user(&data, tmp, 8)) {
114 err = -EFAULT;
115 break;
116 }
78a62d2c 117 err = wrmsr_safe_on_cpu(cpu, reg, data[0], data[1]);
c6f31932
PA
118 if (err) {
119 if (err == -EFAULT) /* Fix idiotic error code */
120 err = -EIO;
85f1cb60 121 break;
c6f31932 122 }
1da177e4 123 tmp += 2;
85f1cb60 124 bytes += 8;
1da177e4
LT
125 }
126
85f1cb60 127 return bytes ? bytes : err;
1da177e4
LT
128}
129
130static int msr_open(struct inode *inode, struct file *file)
131{
aab4c5a5 132 unsigned int cpu = iminor(file->f_path.dentry->d_inode);
92cb7612 133 struct cpuinfo_x86 *c = &cpu_data(cpu);
5119e92e 134 int ret = 0;
1da177e4 135
5119e92e
JC
136 lock_kernel();
137 cpu = iminor(file->f_path.dentry->d_inode);
1da177e4 138
5119e92e
JC
139 if (cpu >= NR_CPUS || !cpu_online(cpu)) {
140 ret = -ENXIO; /* No such CPU */
141 goto out;
142 }
143 c = &cpu_data(cpu);
144 if (!cpu_has(c, X86_FEATURE_MSR))
145 ret = -EIO; /* MSR not supported */
146out:
147 unlock_kernel();
967060d0 148 return ret;
1da177e4
LT
149}
150
151/*
152 * File operations we support
153 */
5dfe4c96 154static const struct file_operations msr_fops = {
1da177e4
LT
155 .owner = THIS_MODULE,
156 .llseek = msr_seek,
157 .read = msr_read,
158 .write = msr_write,
159 .open = msr_open,
160};
161
38048983 162static int __cpuinit msr_device_create(int cpu)
1da177e4 163{
a271aaf1 164 struct device *dev;
1da177e4 165
3bfd49c8
GKH
166 dev = device_create_drvdata(msr_class, NULL, MKDEV(MSR_MAJOR, cpu),
167 NULL, "msr%d", cpu);
881a841f
AM
168 return IS_ERR(dev) ? PTR_ERR(dev) : 0;
169}
170
171static void msr_device_destroy(int cpu)
172{
173 device_destroy(msr_class, MKDEV(MSR_MAJOR, cpu));
1da177e4
LT
174}
175
761c4bf8 176static int __cpuinit msr_class_cpu_callback(struct notifier_block *nfb,
e09793bb 177 unsigned long action, void *hcpu)
1da177e4
LT
178{
179 unsigned int cpu = (unsigned long)hcpu;
881a841f 180 int err = 0;
1da177e4
LT
181
182 switch (action) {
881a841f 183 case CPU_UP_PREPARE:
881a841f 184 err = msr_device_create(cpu);
1da177e4 185 break;
881a841f 186 case CPU_UP_CANCELED:
b844eba2 187 case CPU_UP_CANCELED_FROZEN:
1da177e4 188 case CPU_DEAD:
881a841f 189 msr_device_destroy(cpu);
1da177e4
LT
190 break;
191 }
881a841f 192 return err ? NOTIFY_BAD : NOTIFY_OK;
1da177e4
LT
193}
194
c72258c7 195static struct notifier_block __refdata msr_class_cpu_notifier = {
1da177e4
LT
196 .notifier_call = msr_class_cpu_callback,
197};
198
199static int __init msr_init(void)
200{
201 int i, err = 0;
202 i = 0;
203
204 if (register_chrdev(MSR_MAJOR, "cpu/msr", &msr_fops)) {
205 printk(KERN_ERR "msr: unable to get major %d for msr\n",
206 MSR_MAJOR);
207 err = -EBUSY;
208 goto out;
209 }
8874b414 210 msr_class = class_create(THIS_MODULE, "msr");
1da177e4
LT
211 if (IS_ERR(msr_class)) {
212 err = PTR_ERR(msr_class);
213 goto out_chrdev;
214 }
215 for_each_online_cpu(i) {
a271aaf1 216 err = msr_device_create(i);
1da177e4
LT
217 if (err != 0)
218 goto out_class;
219 }
e09793bb 220 register_hotcpu_notifier(&msr_class_cpu_notifier);
1da177e4
LT
221
222 err = 0;
223 goto out;
224
225out_class:
226 i = 0;
227 for_each_online_cpu(i)
881a841f 228 msr_device_destroy(i);
8874b414 229 class_destroy(msr_class);
1da177e4
LT
230out_chrdev:
231 unregister_chrdev(MSR_MAJOR, "cpu/msr");
232out:
233 return err;
234}
235
236static void __exit msr_exit(void)
237{
238 int cpu = 0;
239 for_each_online_cpu(cpu)
881a841f 240 msr_device_destroy(cpu);
8874b414 241 class_destroy(msr_class);
1da177e4 242 unregister_chrdev(MSR_MAJOR, "cpu/msr");
e09793bb 243 unregister_hotcpu_notifier(&msr_class_cpu_notifier);
1da177e4
LT
244}
245
246module_init(msr_init);
247module_exit(msr_exit)
248
249MODULE_AUTHOR("H. Peter Anvin <hpa@zytor.com>");
250MODULE_DESCRIPTION("x86 generic MSR driver");
251MODULE_LICENSE("GPL");
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