[deliverable/linux.git] / arch / x86 / kernel / msr.c

/* ----------------------------------------------------------------------- *
 *
 *   Copyright 2000-2008 H. Peter Anvin - All Rights Reserved
 *   Copyright 2009 Intel Corporation; author: H. Peter Anvin
 *
 *   This program is free software; you can redistribute it and/or modify
 *   it under the terms of the GNU General Public License as published by
 *   the Free Software Foundation, Inc., 675 Mass Ave, Cambridge MA 02139,
 *   USA; either version 2 of the License, or (at your option) any later
 *   version; incorporated herein by reference.
 *
 * ----------------------------------------------------------------------- */

/*
 * x86 MSR access device
 *
 * This device is accessed by lseek() to the appropriate register number
 * and then read/write in chunks of 8 bytes.  A larger size means multiple
 * reads or writes of the same register.
 *
 * This driver uses /dev/cpu/%d/msr where %d is the minor number, and on
 * an SMP box will direct the access to CPU %d.
 */

#include <linux/module.h>

#include <linux/types.h>
#include <linux/errno.h>
#include <linux/fcntl.h>
#include <linux/init.h>
#include <linux/poll.h>
#include <linux/smp.h>
#include <linux/major.h>
#include <linux/fs.h>
#include <linux/device.h>
#include <linux/cpu.h>
#include <linux/notifier.h>
#include <linux/uaccess.h>
#include <linux/gfp.h>

#include <asm/processor.h>
#include <asm/msr.h>

static struct class *msr_class;

static loff_t msr_seek(struct file *file, loff_t offset, int orig)
{
	loff_t ret;
	struct inode *inode = file->f_mapping->host;

	mutex_lock(&inode->i_mutex);
	switch (orig) {
	case 0:
		file->f_pos = offset;
		ret = file->f_pos;
		break;
	case 1:
		file->f_pos += offset;
		ret = file->f_pos;
		break;
	default:
		ret = -EINVAL;
	}
	mutex_unlock(&inode->i_mutex);
	return ret;
}

static ssize_t msr_read(struct file *file, char __user *buf,
			size_t count, loff_t *ppos)
{
	u32 __user *tmp = (u32 __user *) buf;
	u32 data[2];
	u32 reg = *ppos;
	int cpu = iminor(file_inode(file));
	int err = 0;
	ssize_t bytes = 0;

	if (count % 8)
		return -EINVAL;	/* Invalid chunk size */

	for (; count; count -= 8) {
		err = rdmsr_safe_on_cpu(cpu, reg, &data[0], &data[1]);
		if (err)
			break;
		if (copy_to_user(tmp, &data, 8)) {
			err = -EFAULT;
			break;
		}
		tmp += 2;
		bytes += 8;
	}

	return bytes ? bytes : err;
}

static ssize_t msr_write(struct file *file, const char __user *buf,
			 size_t count, loff_t *ppos)
{
	const u32 __user *tmp = (const u32 __user *)buf;
	u32 data[2];
	u32 reg = *ppos;
	int cpu = iminor(file_inode(file));
	int err = 0;
	ssize_t bytes = 0;

	if (count % 8)
		return -EINVAL;	/* Invalid chunk size */

	for (; count; count -= 8) {
		if (copy_from_user(&data, tmp, 8)) {
			err = -EFAULT;
			break;
		}
		err = wrmsr_safe_on_cpu(cpu, reg, data[0], data[1]);
		if (err)
			break;
		tmp += 2;
		bytes += 8;
	}

	return bytes ? bytes : err;
}

static long msr_ioctl(struct file *file, unsigned int ioc, unsigned long arg)
{
	u32 __user *uregs = (u32 __user *)arg;
	u32 regs[8];
	int cpu = iminor(file_inode(file));
	int err;

	switch (ioc) {
	case X86_IOC_RDMSR_REGS:
		if (!(file->f_mode & FMODE_READ)) {
			err = -EBADF;
			break;
		}
		if (copy_from_user(&regs, uregs, sizeof regs)) {
			err = -EFAULT;
			break;
		}
		err = rdmsr_safe_regs_on_cpu(cpu, regs);
		if (err)
			break;
		if (copy_to_user(uregs, &regs, sizeof regs))
			err = -EFAULT;
		break;

	case X86_IOC_WRMSR_REGS:
		if (!(file->f_mode & FMODE_WRITE)) {
			err = -EBADF;
			break;
		}
		if (copy_from_user(&regs, uregs, sizeof regs)) {
			err = -EFAULT;
			break;
		}
		err = wrmsr_safe_regs_on_cpu(cpu, regs);
		if (err)
			break;
		if (copy_to_user(uregs, &regs, sizeof regs))
			err = -EFAULT;
		break;

	default:
		err = -ENOTTY;
		break;
	}

	return err;
}

static int msr_open(struct inode *inode, struct file *file)
{
	unsigned int cpu = iminor(file_inode(file));
	struct cpuinfo_x86 *c;

	if (!capable(CAP_SYS_RAWIO))
		return -EPERM;

	if (cpu >= nr_cpu_ids || !cpu_online(cpu))
		return -ENXIO;	/* No such CPU */

	c = &cpu_data(cpu);
	if (!cpu_has(c, X86_FEATURE_MSR))
		return -EIO;	/* MSR not supported */

	return 0;
}

/*
 * File operations we support
 */
static const struct file_operations msr_fops = {
	.owner = THIS_MODULE,
	.llseek = msr_seek,
	.read = msr_read,
	.write = msr_write,
	.open = msr_open,
	.unlocked_ioctl = msr_ioctl,
	.compat_ioctl = msr_ioctl,
};

static int __cpuinit msr_device_create(int cpu)
{
	struct device *dev;

	dev = device_create(msr_class, NULL, MKDEV(MSR_MAJOR, cpu), NULL,
			    "msr%d", cpu);
	return IS_ERR(dev) ? PTR_ERR(dev) : 0;
}

static void msr_device_destroy(int cpu)
{
	device_destroy(msr_class, MKDEV(MSR_MAJOR, cpu));
}

static int __cpuinit msr_class_cpu_callback(struct notifier_block *nfb,
				unsigned long action, void *hcpu)
{
	unsigned int cpu = (unsigned long)hcpu;
	int err = 0;

	switch (action) {
	case CPU_UP_PREPARE:
		err = msr_device_create(cpu);
		break;
	case CPU_UP_CANCELED:
	case CPU_UP_CANCELED_FROZEN:
	case CPU_DEAD:
		msr_device_destroy(cpu);
		break;
	}
	return notifier_from_errno(err);
}

static struct notifier_block __refdata msr_class_cpu_notifier = {
	.notifier_call = msr_class_cpu_callback,
};

static char *msr_devnode(struct device *dev, umode_t *mode)
{
	return kasprintf(GFP_KERNEL, "cpu/%u/msr", MINOR(dev->devt));
}

static int __init msr_init(void)
{
	int i, err = 0;
	i = 0;

	if (__register_chrdev(MSR_MAJOR, 0, NR_CPUS, "cpu/msr", &msr_fops)) {
		printk(KERN_ERR "msr: unable to get major %d for msr\n",
		       MSR_MAJOR);
		err = -EBUSY;
		goto out;
	}
	msr_class = class_create(THIS_MODULE, "msr");
	if (IS_ERR(msr_class)) {
		err = PTR_ERR(msr_class);
		goto out_chrdev;
	}
	msr_class->devnode = msr_devnode;
	get_online_cpus();
	for_each_online_cpu(i) {
		err = msr_device_create(i);
		if (err != 0)
			goto out_class;
	}
	register_hotcpu_notifier(&msr_class_cpu_notifier);
	put_online_cpus();

	err = 0;
	goto out;

out_class:
	i = 0;
	for_each_online_cpu(i)
		msr_device_destroy(i);
	put_online_cpus();
	class_destroy(msr_class);
out_chrdev:
	__unregister_chrdev(MSR_MAJOR, 0, NR_CPUS, "cpu/msr");
out:
	return err;
}

static void __exit msr_exit(void)
{
	int cpu = 0;
	get_online_cpus();
	for_each_online_cpu(cpu)
		msr_device_destroy(cpu);
	class_destroy(msr_class);
	__unregister_chrdev(MSR_MAJOR, 0, NR_CPUS, "cpu/msr");
	unregister_hotcpu_notifier(&msr_class_cpu_notifier);
	put_online_cpus();
}

module_init(msr_init);
module_exit(msr_exit)

MODULE_AUTHOR("H. Peter Anvin <hpa@zytor.com>");
MODULE_DESCRIPTION("x86 generic MSR driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
1da177e4	1	/* ----------------------------------------------------------------------- *
2b06ac86 PA	2	*
2b06ac86 PA	3	* Copyright 2000-2008 H. Peter Anvin - All Rights Reserved
ff55df53	4	* Copyright 2009 Intel Corporation; author: H. Peter Anvin
1da177e4 LT	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation, Inc., 675 Mass Ave, Cambridge MA 02139,
	9	* USA; either version 2 of the License, or (at your option) any later
	10	* version; incorporated herein by reference.
	11	*
	12	* ----------------------------------------------------------------------- */
	13
	14	/*
1da177e4 LT	15	* x86 MSR access device
	16	*
	17	* This device is accessed by lseek() to the appropriate register number
	18	* and then read/write in chunks of 8 bytes. A larger size means multiple
	19	* reads or writes of the same register.
	20	*
	21	* This driver uses /dev/cpu/%d/msr where %d is the minor number, and on
	22	* an SMP box will direct the access to CPU %d.
	23	*/
	24
	25	#include <linux/module.h>
1da177e4 LT	26
	27	#include <linux/types.h>
	28	#include <linux/errno.h>
	29	#include <linux/fcntl.h>
	30	#include <linux/init.h>
	31	#include <linux/poll.h>
	32	#include <linux/smp.h>
1da177e4 LT	33	#include <linux/major.h>
	34	#include <linux/fs.h>
	35	#include <linux/device.h>
	36	#include <linux/cpu.h>
	37	#include <linux/notifier.h>
448dd2fa	38	#include <linux/uaccess.h>
5a0e3ad6	39	#include <linux/gfp.h>
1da177e4 LT	40
	41	#include <asm/processor.h>
	42	#include <asm/msr.h>
1da177e4	43
8874b414	44	static struct class *msr_class;
1da177e4	45
1da177e4 LT	46	static loff_t msr_seek(struct file *file, loff_t offset, int orig)
1da177e4 LT	47	{
2b06ac86 PA	48	loff_t ret;
2b06ac86 PA	49	struct inode *inode = file->f_mapping->host;
1da177e4	50
2b06ac86	51	mutex_lock(&inode->i_mutex);
1da177e4 LT	52	switch (orig) {
	53	case 0:
	54	file->f_pos = offset;
	55	ret = file->f_pos;
	56	break;
	57	case 1:
	58	file->f_pos += offset;
	59	ret = file->f_pos;
2b06ac86 PA	60	break;
	61	default:
	62	ret = -EINVAL;
1da177e4	63	}
2b06ac86	64	mutex_unlock(&inode->i_mutex);
1da177e4 LT	65	return ret;
	66	}
	67
94a9fa41 PC	68	static ssize_t msr_read(struct file file, char __user buf,
94a9fa41 PC	69	size_t count, loff_t *ppos)
1da177e4 LT	70	{
	71	u32 __user tmp = (u32 __user ) buf;
	72	u32 data[2];
1da177e4	73	u32 reg = *ppos;
6131ffaa	74	int cpu = iminor(file_inode(file));
85f1cb60 PA	75	int err = 0;
85f1cb60 PA	76	ssize_t bytes = 0;
1da177e4 LT	77
	78	if (count % 8)
	79	return -EINVAL; /* Invalid chunk size */
	80
6926d570	81	for (; count; count -= 8) {
78a62d2c	82	err = rdmsr_safe_on_cpu(cpu, reg, &data[0], &data[1]);
0cc0213e	83	if (err)
85f1cb60	84	break;
85f1cb60 PA	85	if (copy_to_user(tmp, &data, 8)) {
	86	err = -EFAULT;
	87	break;
c6f31932	88	}
1da177e4	89	tmp += 2;
85f1cb60	90	bytes += 8;
1da177e4 LT	91	}
1da177e4 LT	92
85f1cb60	93	return bytes ? bytes : err;
1da177e4 LT	94	}
	95
	96	static ssize_t msr_write(struct file file, const char __user buf,
	97	size_t count, loff_t *ppos)
	98	{
	99	const u32 __user tmp = (const u32 __user )buf;
	100	u32 data[2];
1da177e4	101	u32 reg = *ppos;
6131ffaa	102	int cpu = iminor(file_inode(file));
85f1cb60 PA	103	int err = 0;
85f1cb60 PA	104	ssize_t bytes = 0;
1da177e4 LT	105
	106	if (count % 8)
	107	return -EINVAL; /* Invalid chunk size */
	108
f475ff35	109	for (; count; count -= 8) {
85f1cb60 PA	110	if (copy_from_user(&data, tmp, 8)) {
	111	err = -EFAULT;
	112	break;
	113	}
78a62d2c	114	err = wrmsr_safe_on_cpu(cpu, reg, data[0], data[1]);
0cc0213e	115	if (err)
85f1cb60	116	break;
1da177e4	117	tmp += 2;
85f1cb60	118	bytes += 8;
1da177e4 LT	119	}
1da177e4 LT	120
85f1cb60	121	return bytes ? bytes : err;
1da177e4 LT	122	}
1da177e4 LT	123
ff55df53 PA	124	static long msr_ioctl(struct file *file, unsigned int ioc, unsigned long arg)
	125	{
	126	u32 __user uregs = (u32 __user )arg;
	127	u32 regs[8];
6131ffaa	128	int cpu = iminor(file_inode(file));
ff55df53 PA	129	int err;
	130
	131	switch (ioc) {
	132	case X86_IOC_RDMSR_REGS:
	133	if (!(file->f_mode & FMODE_READ)) {
	134	err = -EBADF;
	135	break;
	136	}
	137	if (copy_from_user(&regs, uregs, sizeof regs)) {
	138	err = -EFAULT;
	139	break;
	140	}
	141	err = rdmsr_safe_regs_on_cpu(cpu, regs);
	142	if (err)
	143	break;
	144	if (copy_to_user(uregs, &regs, sizeof regs))
	145	err = -EFAULT;
	146	break;
	147
	148	case X86_IOC_WRMSR_REGS:
	149	if (!(file->f_mode & FMODE_WRITE)) {
	150	err = -EBADF;
	151	break;
	152	}
	153	if (copy_from_user(&regs, uregs, sizeof regs)) {
	154	err = -EFAULT;
	155	break;
	156	}
	157	err = wrmsr_safe_regs_on_cpu(cpu, regs);
	158	if (err)
	159	break;
	160	if (copy_to_user(uregs, &regs, sizeof regs))
	161	err = -EFAULT;
	162	break;
	163
	164	default:
	165	err = -ENOTTY;
	166	break;
	167	}
	168
	169	return err;
	170	}
	171
1da177e4 LT	172	static int msr_open(struct inode inode, struct file file)
1da177e4 LT	173	{
6131ffaa	174	unsigned int cpu = iminor(file_inode(file));
494c2ebf	175	struct cpuinfo_x86 *c;
1da177e4	176
c903f045 AC	177	if (!capable(CAP_SYS_RAWIO))
	178	return -EPERM;
	179
d6c30405 FW	180	if (cpu >= nr_cpu_ids \|\| !cpu_online(cpu))
	181	return -ENXIO; /* No such CPU */
	182
5119e92e JC	183	c = &cpu_data(cpu);
5119e92e JC	184	if (!cpu_has(c, X86_FEATURE_MSR))
d6c30405 FW	185	return -EIO; /* MSR not supported */
	186
	187	return 0;
1da177e4 LT	188	}
	189
	190	/*
	191	* File operations we support
	192	*/
5dfe4c96	193	static const struct file_operations msr_fops = {
1da177e4 LT	194	.owner = THIS_MODULE,
	195	.llseek = msr_seek,
	196	.read = msr_read,
	197	.write = msr_write,
	198	.open = msr_open,
ff55df53 PA	199	.unlocked_ioctl = msr_ioctl,
ff55df53 PA	200	.compat_ioctl = msr_ioctl,
1da177e4 LT	201	};
1da177e4 LT	202
38048983	203	static int __cpuinit msr_device_create(int cpu)
1da177e4	204	{
a271aaf1	205	struct device *dev;
1da177e4	206
a9b12619 GKH	207	dev = device_create(msr_class, NULL, MKDEV(MSR_MAJOR, cpu), NULL,
a9b12619 GKH	208	"msr%d", cpu);
881a841f AM	209	return IS_ERR(dev) ? PTR_ERR(dev) : 0;
	210	}
	211
	212	static void msr_device_destroy(int cpu)
	213	{
	214	device_destroy(msr_class, MKDEV(MSR_MAJOR, cpu));
1da177e4 LT	215	}
1da177e4 LT	216
761c4bf8	217	static int __cpuinit msr_class_cpu_callback(struct notifier_block *nfb,
e09793bb	218	unsigned long action, void *hcpu)
1da177e4 LT	219	{
1da177e4 LT	220	unsigned int cpu = (unsigned long)hcpu;
881a841f	221	int err = 0;
1da177e4 LT	222
1da177e4 LT	223	switch (action) {
881a841f	224	case CPU_UP_PREPARE:
881a841f	225	err = msr_device_create(cpu);
1da177e4	226	break;
881a841f	227	case CPU_UP_CANCELED:
b844eba2	228	case CPU_UP_CANCELED_FROZEN:
1da177e4	229	case CPU_DEAD:
881a841f	230	msr_device_destroy(cpu);
1da177e4 LT	231	break;
1da177e4 LT	232	}
a94247e7	233	return notifier_from_errno(err);
1da177e4 LT	234	}
1da177e4 LT	235
c72258c7	236	static struct notifier_block __refdata msr_class_cpu_notifier = {
1da177e4 LT	237	.notifier_call = msr_class_cpu_callback,
	238	};
	239
2c9ede55	240	static char msr_devnode(struct device dev, umode_t *mode)
07e9bb8e KS	241	{
	242	return kasprintf(GFP_KERNEL, "cpu/%u/msr", MINOR(dev->devt));
	243	}
	244
1da177e4 LT	245	static int __init msr_init(void)
	246	{
	247	int i, err = 0;
	248	i = 0;
	249
0b962d47	250	if (__register_chrdev(MSR_MAJOR, 0, NR_CPUS, "cpu/msr", &msr_fops)) {
1da177e4 LT	251	printk(KERN_ERR "msr: unable to get major %d for msr\n",
	252	MSR_MAJOR);
	253	err = -EBUSY;
	254	goto out;
	255	}
8874b414	256	msr_class = class_create(THIS_MODULE, "msr");
1da177e4 LT	257	if (IS_ERR(msr_class)) {
	258	err = PTR_ERR(msr_class);
	259	goto out_chrdev;
	260	}
e454cea2	261	msr_class->devnode = msr_devnode;
a2db672a	262	get_online_cpus();
1da177e4	263	for_each_online_cpu(i) {
a271aaf1	264	err = msr_device_create(i);
1da177e4 LT	265	if (err != 0)
	266	goto out_class;
	267	}
e09793bb	268	register_hotcpu_notifier(&msr_class_cpu_notifier);
a2db672a	269	put_online_cpus();
1da177e4 LT	270
	271	err = 0;
	272	goto out;
	273
	274	out_class:
	275	i = 0;
	276	for_each_online_cpu(i)
881a841f	277	msr_device_destroy(i);
a2db672a	278	put_online_cpus();
8874b414	279	class_destroy(msr_class);
1da177e4	280	out_chrdev:
0b962d47	281	__unregister_chrdev(MSR_MAJOR, 0, NR_CPUS, "cpu/msr");
1da177e4 LT	282	out:
	283	return err;
	284	}
	285
	286	static void __exit msr_exit(void)
	287	{
	288	int cpu = 0;
a2db672a	289	get_online_cpus();
1da177e4	290	for_each_online_cpu(cpu)
881a841f	291	msr_device_destroy(cpu);
8874b414	292	class_destroy(msr_class);
da482474	293	__unregister_chrdev(MSR_MAJOR, 0, NR_CPUS, "cpu/msr");
e09793bb	294	unregister_hotcpu_notifier(&msr_class_cpu_notifier);
a2db672a	295	put_online_cpus();
1da177e4 LT	296	}
	297
	298	module_init(msr_init);
	299	module_exit(msr_exit)
	300
	301	MODULE_AUTHOR("H. Peter Anvin <hpa@zytor.com>");
	302	MODULE_DESCRIPTION("x86 generic MSR driver");
	303	MODULE_LICENSE("GPL");