[deliverable/linux.git] / arch / x86 / kernel / pci-dma_32.c

/*
 * Dynamic DMA mapping support.
 *
 * On i386 there is no hardware dynamic DMA address translation,
 * so consistent alloc/free are merely page allocation/freeing.
 * The rest of the dynamic DMA mapping interface is implemented
 * in asm/pci.h.
 */

#include <linux/types.h>
#include <linux/mm.h>
#include <linux/string.h>
#include <linux/pci.h>
#include <linux/module.h>
#include <asm/io.h>

/* Dummy device used for NULL arguments (normally ISA). Better would
   be probably a smaller DMA mask, but this is bug-to-bug compatible
   to i386. */
struct device fallback_dev = {
	.bus_id = "fallback device",
	.coherent_dma_mask = DMA_32BIT_MASK,
	.dma_mask = &fallback_dev.coherent_dma_mask,
};


static int dma_alloc_from_coherent_mem(struct device *dev, ssize_t size,
				       dma_addr_t *dma_handle, void **ret)
{
	struct dma_coherent_mem *mem = dev ? dev->dma_mem : NULL;
	int order = get_order(size);

	if (mem) {
		int page = bitmap_find_free_region(mem->bitmap, mem->size,
						     order);
		if (page >= 0) {
			*dma_handle = mem->device_base + (page << PAGE_SHIFT);
			*ret = mem->virt_base + (page << PAGE_SHIFT);
			memset(*ret, 0, size);
		}
		if (mem->flags & DMA_MEMORY_EXCLUSIVE)
			*ret = NULL;
	}
	return (mem != NULL);
}

static int dma_release_coherent(struct device *dev, int order, void *vaddr)
{
	struct dma_coherent_mem *mem = dev ? dev->dma_mem : NULL;

	if (mem && vaddr >= mem->virt_base && vaddr <
		   (mem->virt_base + (mem->size << PAGE_SHIFT))) {
		int page = (vaddr - mem->virt_base) >> PAGE_SHIFT;

		bitmap_release_region(mem->bitmap, page, order);
		return 1;
	}
	return 0;
}

/* Allocate DMA memory on node near device */
noinline struct page *
dma_alloc_pages(struct device *dev, gfp_t gfp, unsigned order)
{
	int node;

	node = dev_to_node(dev);

	return alloc_pages_node(node, gfp, order);
}

void *dma_alloc_coherent(struct device *dev, size_t size,
			   dma_addr_t *dma_handle, gfp_t gfp)
{
	void *ret = NULL;
	struct page *page;
	dma_addr_t bus;
	int order = get_order(size);
	unsigned long dma_mask = 0;

	/* ignore region specifiers */
	gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);

	if (dma_alloc_from_coherent_mem(dev, size, dma_handle, &ret))
		return ret;

	if (!dev)
		dev = &fallback_dev;

	dma_mask = dev->coherent_dma_mask;
	if (dma_mask == 0)
		dma_mask = DMA_32BIT_MASK;

 again:
	page = dma_alloc_pages(dev, gfp, order);
	if (page == NULL)
		return NULL;

	{
		int high, mmu;
		bus = page_to_phys(page);
		ret = page_address(page);
		high = (bus + size) >= dma_mask;
		mmu = high;
		if (force_iommu && !(gfp & GFP_DMA))
			mmu = 1;
		else if (high) {
			free_pages((unsigned long)ret,
				   get_order(size));

			/* Don't use the 16MB ZONE_DMA unless absolutely
			   needed. It's better to use remapping first. */
			if (dma_mask < DMA_32BIT_MASK && !(gfp & GFP_DMA)) {
				gfp = (gfp & ~GFP_DMA32) | GFP_DMA;
				goto again;
			}
		}
		memset(ret, 0, size);
		*dma_handle = bus;
	}

	return ret;
}
EXPORT_SYMBOL(dma_alloc_coherent);

void dma_free_coherent(struct device *dev, size_t size,
			 void *vaddr, dma_addr_t dma_handle)
{
	int order = get_order(size);

	WARN_ON(irqs_disabled());	/* for portability */
	if (dma_release_coherent(dev, order, vaddr))
		return;
	if (dma_ops->unmap_single)
		dma_ops->unmap_single(dev, dma_handle, size, 0);
	free_pages((unsigned long)vaddr, order);
}
EXPORT_SYMBOL(dma_free_coherent);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* Dynamic DMA mapping support.
	3	*
	4	* On i386 there is no hardware dynamic DMA address translation,
	5	* so consistent alloc/free are merely page allocation/freeing.
	6	* The rest of the dynamic DMA mapping interface is implemented
	7	* in asm/pci.h.
	8	*/
	9
	10	#include <linux/types.h>
	11	#include <linux/mm.h>
	12	#include <linux/string.h>
	13	#include <linux/pci.h>
129f6946	14	#include <linux/module.h>
1da177e4 LT	15	#include <asm/io.h>
1da177e4 LT	16
45a07e77 GC	17	/* Dummy device used for NULL arguments (normally ISA). Better would
	18	be probably a smaller DMA mask, but this is bug-to-bug compatible
	19	to i386. */
	20	struct device fallback_dev = {
	21	.bus_id = "fallback device",
	22	.coherent_dma_mask = DMA_32BIT_MASK,
	23	.dma_mask = &fallback_dev.coherent_dma_mask,
	24	};
	25
	26
d09d815c GC	27	static int dma_alloc_from_coherent_mem(struct device *dev, ssize_t size,
d09d815c GC	28	dma_addr_t dma_handle, void *ret)
1da177e4	29	{
1da177e4 LT	30	struct dma_coherent_mem *mem = dev ? dev->dma_mem : NULL;
1da177e4 LT	31	int order = get_order(size);
1da177e4 LT	32
	33	if (mem) {
	34	int page = bitmap_find_free_region(mem->bitmap, mem->size,
	35	order);
	36	if (page >= 0) {
	37	*dma_handle = mem->device_base + (page << PAGE_SHIFT);
d09d815c GC	38	*ret = mem->virt_base + (page << PAGE_SHIFT);
d09d815c GC	39	memset(*ret, 0, size);
1da177e4 LT	40	}
1da177e4 LT	41	if (mem->flags & DMA_MEMORY_EXCLUSIVE)
d09d815c GC	42	*ret = NULL;
	43	}
	44	return (mem != NULL);
	45	}
	46
	47	static int dma_release_coherent(struct device dev, int order, void vaddr)
	48	{
	49	struct dma_coherent_mem *mem = dev ? dev->dma_mem : NULL;
	50
	51	if (mem && vaddr >= mem->virt_base && vaddr <
	52	(mem->virt_base + (mem->size << PAGE_SHIFT))) {
	53	int page = (vaddr - mem->virt_base) >> PAGE_SHIFT;
	54
	55	bitmap_release_region(mem->bitmap, page, order);
	56	return 1;
1da177e4	57	}
d09d815c GC	58	return 0;
	59	}
	60
d1a07902 GC	61	/* Allocate DMA memory on node near device */
	62	noinline struct page *
	63	dma_alloc_pages(struct device *dev, gfp_t gfp, unsigned order)
	64	{
	65	int node;
	66
	67	node = dev_to_node(dev);
	68
	69	return alloc_pages_node(node, gfp, order);
	70	}
	71
d09d815c GC	72	void dma_alloc_coherent(struct device dev, size_t size,
	73	dma_addr_t *dma_handle, gfp_t gfp)
	74	{
	75	void *ret = NULL;
d1a07902 GC	76	struct page *page;
d1a07902 GC	77	dma_addr_t bus;
d09d815c	78	int order = get_order(size);
5fa78ca7 GC	79	unsigned long dma_mask = 0;
5fa78ca7 GC	80
d09d815c GC	81	/* ignore region specifiers */
	82	gfp &= ~(__GFP_DMA \| __GFP_HIGHMEM);
	83
	84	if (dma_alloc_from_coherent_mem(dev, size, dma_handle, &ret))
	85	return ret;
1da177e4	86
45a07e77 GC	87	if (!dev)
	88	dev = &fallback_dev;
	89
5fa78ca7 GC	90	dma_mask = dev->coherent_dma_mask;
	91	if (dma_mask == 0)
	92	dma_mask = DMA_32BIT_MASK;
	93
	94	again:
d1a07902 GC	95	page = dma_alloc_pages(dev, gfp, order);
	96	if (page == NULL)
	97	return NULL;
	98
5fa78ca7 GC	99	{
	100	int high, mmu;
	101	bus = page_to_phys(page);
	102	ret = page_address(page);
	103	high = (bus + size) >= dma_mask;
	104	mmu = high;
	105	if (force_iommu && !(gfp & GFP_DMA))
	106	mmu = 1;
	107	else if (high) {
	108	free_pages((unsigned long)ret,
	109	get_order(size));
	110
	111	/* Don't use the 16MB ZONE_DMA unless absolutely
	112	needed. It's better to use remapping first. */
	113	if (dma_mask < DMA_32BIT_MASK && !(gfp & GFP_DMA)) {
	114	gfp = (gfp & ~GFP_DMA32) \| GFP_DMA;
	115	goto again;
	116	}
	117	}
	118	memset(ret, 0, size);
	119	*dma_handle = bus;
	120	}
1da177e4	121
1da177e4 LT	122	return ret;
1da177e4 LT	123	}
129f6946	124	EXPORT_SYMBOL(dma_alloc_coherent);
1da177e4 LT	125
	126	void dma_free_coherent(struct device *dev, size_t size,
	127	void *vaddr, dma_addr_t dma_handle)
	128	{
1da177e4	129	int order = get_order(size);
aa24886e DB	130
aa24886e DB	131	WARN_ON(irqs_disabled()); /* for portability */
d09d815c GC	132	if (dma_release_coherent(dev, order, vaddr))
d09d815c GC	133	return;
2e33e361 GC	134	if (dma_ops->unmap_single)
2e33e361 GC	135	dma_ops->unmap_single(dev, dma_handle, size, 0);
d09d815c	136	free_pages((unsigned long)vaddr, order);
1da177e4	137	}
129f6946	138	EXPORT_SYMBOL(dma_free_coherent);