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1da177e4 LT |
1 | /* By Ross Biro 1/23/92 */ |
2 | /* | |
3 | * Pentium III FXSR, SSE support | |
4 | * Gareth Hughes <gareth@valinux.com>, May 2000 | |
5 | */ | |
6 | ||
7 | #include <linux/kernel.h> | |
8 | #include <linux/sched.h> | |
9 | #include <linux/mm.h> | |
10 | #include <linux/smp.h> | |
1da177e4 | 11 | #include <linux/errno.h> |
5a0e3ad6 | 12 | #include <linux/slab.h> |
1da177e4 | 13 | #include <linux/ptrace.h> |
91e7b707 | 14 | #include <linux/regset.h> |
eeea3c3f | 15 | #include <linux/tracehook.h> |
1da177e4 | 16 | #include <linux/user.h> |
070459d9 | 17 | #include <linux/elf.h> |
1da177e4 LT |
18 | #include <linux/security.h> |
19 | #include <linux/audit.h> | |
20 | #include <linux/seccomp.h> | |
7ed20e1a | 21 | #include <linux/signal.h> |
24f1e32c FW |
22 | #include <linux/perf_event.h> |
23 | #include <linux/hw_breakpoint.h> | |
bf5a3c13 | 24 | #include <linux/rcupdate.h> |
cb57a2b4 | 25 | #include <linux/module.h> |
1da177e4 LT |
26 | |
27 | #include <asm/uaccess.h> | |
28 | #include <asm/pgtable.h> | |
1da177e4 LT |
29 | #include <asm/processor.h> |
30 | #include <asm/i387.h> | |
1361b83a | 31 | #include <asm/fpu-internal.h> |
1da177e4 LT |
32 | #include <asm/debugreg.h> |
33 | #include <asm/ldt.h> | |
34 | #include <asm/desc.h> | |
2047b08b RM |
35 | #include <asm/prctl.h> |
36 | #include <asm/proto.h> | |
72f674d2 | 37 | #include <asm/hw_breakpoint.h> |
51e7dc70 | 38 | #include <asm/traps.h> |
eee3af4a | 39 | |
070459d9 RM |
40 | #include "tls.h" |
41 | ||
1c569f02 JS |
42 | #define CREATE_TRACE_POINTS |
43 | #include <trace/events/syscalls.h> | |
44 | ||
070459d9 RM |
45 | enum x86_regset { |
46 | REGSET_GENERAL, | |
47 | REGSET_FP, | |
48 | REGSET_XFP, | |
325af5fb | 49 | REGSET_IOPERM64 = REGSET_XFP, |
5b3efd50 | 50 | REGSET_XSTATE, |
070459d9 | 51 | REGSET_TLS, |
325af5fb | 52 | REGSET_IOPERM32, |
070459d9 | 53 | }; |
eee3af4a | 54 | |
b1cf540f MH |
55 | struct pt_regs_offset { |
56 | const char *name; | |
57 | int offset; | |
58 | }; | |
59 | ||
60 | #define REG_OFFSET_NAME(r) {.name = #r, .offset = offsetof(struct pt_regs, r)} | |
61 | #define REG_OFFSET_END {.name = NULL, .offset = 0} | |
62 | ||
63 | static const struct pt_regs_offset regoffset_table[] = { | |
64 | #ifdef CONFIG_X86_64 | |
65 | REG_OFFSET_NAME(r15), | |
66 | REG_OFFSET_NAME(r14), | |
67 | REG_OFFSET_NAME(r13), | |
68 | REG_OFFSET_NAME(r12), | |
69 | REG_OFFSET_NAME(r11), | |
70 | REG_OFFSET_NAME(r10), | |
71 | REG_OFFSET_NAME(r9), | |
72 | REG_OFFSET_NAME(r8), | |
73 | #endif | |
74 | REG_OFFSET_NAME(bx), | |
75 | REG_OFFSET_NAME(cx), | |
76 | REG_OFFSET_NAME(dx), | |
77 | REG_OFFSET_NAME(si), | |
78 | REG_OFFSET_NAME(di), | |
79 | REG_OFFSET_NAME(bp), | |
80 | REG_OFFSET_NAME(ax), | |
81 | #ifdef CONFIG_X86_32 | |
82 | REG_OFFSET_NAME(ds), | |
83 | REG_OFFSET_NAME(es), | |
84 | REG_OFFSET_NAME(fs), | |
85 | REG_OFFSET_NAME(gs), | |
86 | #endif | |
87 | REG_OFFSET_NAME(orig_ax), | |
88 | REG_OFFSET_NAME(ip), | |
89 | REG_OFFSET_NAME(cs), | |
90 | REG_OFFSET_NAME(flags), | |
91 | REG_OFFSET_NAME(sp), | |
92 | REG_OFFSET_NAME(ss), | |
93 | REG_OFFSET_END, | |
94 | }; | |
95 | ||
96 | /** | |
97 | * regs_query_register_offset() - query register offset from its name | |
98 | * @name: the name of a register | |
99 | * | |
100 | * regs_query_register_offset() returns the offset of a register in struct | |
101 | * pt_regs from its name. If the name is invalid, this returns -EINVAL; | |
102 | */ | |
103 | int regs_query_register_offset(const char *name) | |
104 | { | |
105 | const struct pt_regs_offset *roff; | |
106 | for (roff = regoffset_table; roff->name != NULL; roff++) | |
107 | if (!strcmp(roff->name, name)) | |
108 | return roff->offset; | |
109 | return -EINVAL; | |
110 | } | |
111 | ||
112 | /** | |
113 | * regs_query_register_name() - query register name from its offset | |
114 | * @offset: the offset of a register in struct pt_regs. | |
115 | * | |
116 | * regs_query_register_name() returns the name of a register from its | |
117 | * offset in struct pt_regs. If the @offset is invalid, this returns NULL; | |
118 | */ | |
119 | const char *regs_query_register_name(unsigned int offset) | |
120 | { | |
121 | const struct pt_regs_offset *roff; | |
122 | for (roff = regoffset_table; roff->name != NULL; roff++) | |
123 | if (roff->offset == offset) | |
124 | return roff->name; | |
125 | return NULL; | |
126 | } | |
127 | ||
128 | static const int arg_offs_table[] = { | |
129 | #ifdef CONFIG_X86_32 | |
130 | [0] = offsetof(struct pt_regs, ax), | |
131 | [1] = offsetof(struct pt_regs, dx), | |
132 | [2] = offsetof(struct pt_regs, cx) | |
133 | #else /* CONFIG_X86_64 */ | |
134 | [0] = offsetof(struct pt_regs, di), | |
135 | [1] = offsetof(struct pt_regs, si), | |
136 | [2] = offsetof(struct pt_regs, dx), | |
137 | [3] = offsetof(struct pt_regs, cx), | |
138 | [4] = offsetof(struct pt_regs, r8), | |
139 | [5] = offsetof(struct pt_regs, r9) | |
140 | #endif | |
141 | }; | |
142 | ||
1da177e4 LT |
143 | /* |
144 | * does not yet catch signals sent when the child dies. | |
145 | * in exit.c or in signal.c. | |
146 | */ | |
147 | ||
9f155b98 CE |
148 | /* |
149 | * Determines which flags the user has access to [1 = access, 0 = no access]. | |
9f155b98 | 150 | */ |
e39c2891 RM |
151 | #define FLAG_MASK_32 ((unsigned long) \ |
152 | (X86_EFLAGS_CF | X86_EFLAGS_PF | \ | |
153 | X86_EFLAGS_AF | X86_EFLAGS_ZF | \ | |
154 | X86_EFLAGS_SF | X86_EFLAGS_TF | \ | |
155 | X86_EFLAGS_DF | X86_EFLAGS_OF | \ | |
156 | X86_EFLAGS_RF | X86_EFLAGS_AC)) | |
157 | ||
2047b08b RM |
158 | /* |
159 | * Determines whether a value may be installed in a segment register. | |
160 | */ | |
161 | static inline bool invalid_selector(u16 value) | |
162 | { | |
163 | return unlikely(value != 0 && (value & SEGMENT_RPL_MASK) != USER_RPL); | |
164 | } | |
165 | ||
166 | #ifdef CONFIG_X86_32 | |
167 | ||
e39c2891 | 168 | #define FLAG_MASK FLAG_MASK_32 |
1da177e4 | 169 | |
10226238 RR |
170 | /* |
171 | * X86_32 CPUs don't save ss and esp if the CPU is already in kernel mode | |
172 | * when it traps. The previous stack will be directly underneath the saved | |
173 | * registers, and 'sp/ss' won't even have been saved. Thus the '®s->sp'. | |
174 | * | |
175 | * Now, if the stack is empty, '®s->sp' is out of range. In this | |
176 | * case we try to take the previous stack. To always return a non-null | |
177 | * stack pointer we fall back to regs as stack if no previous stack | |
178 | * exists. | |
179 | * | |
180 | * This is valid only for kernel mode traps. | |
181 | */ | |
182 | unsigned long kernel_stack_pointer(struct pt_regs *regs) | |
183 | { | |
184 | unsigned long context = (unsigned long)regs & ~(THREAD_SIZE - 1); | |
185 | unsigned long sp = (unsigned long)®s->sp; | |
186 | struct thread_info *tinfo; | |
187 | ||
188 | if (context == (sp & ~(THREAD_SIZE - 1))) | |
189 | return sp; | |
190 | ||
191 | tinfo = (struct thread_info *)context; | |
192 | if (tinfo->previous_esp) | |
193 | return tinfo->previous_esp; | |
194 | ||
195 | return (unsigned long)regs; | |
196 | } | |
cb57a2b4 | 197 | EXPORT_SYMBOL_GPL(kernel_stack_pointer); |
10226238 | 198 | |
4fe702c7 | 199 | static unsigned long *pt_regs_access(struct pt_regs *regs, unsigned long regno) |
1da177e4 | 200 | { |
65ea5b03 | 201 | BUILD_BUG_ON(offsetof(struct pt_regs, bx) != 0); |
ccbeed3a | 202 | return ®s->bx + (regno >> 2); |
1da177e4 LT |
203 | } |
204 | ||
06ee1b68 | 205 | static u16 get_segment_reg(struct task_struct *task, unsigned long offset) |
1da177e4 | 206 | { |
06ee1b68 RM |
207 | /* |
208 | * Returning the value truncates it to 16 bits. | |
209 | */ | |
210 | unsigned int retval; | |
211 | if (offset != offsetof(struct user_regs_struct, gs)) | |
212 | retval = *pt_regs_access(task_pt_regs(task), offset); | |
213 | else { | |
06ee1b68 | 214 | if (task == current) |
d9a89a26 TH |
215 | retval = get_user_gs(task_pt_regs(task)); |
216 | else | |
217 | retval = task_user_gs(task); | |
06ee1b68 RM |
218 | } |
219 | return retval; | |
220 | } | |
221 | ||
222 | static int set_segment_reg(struct task_struct *task, | |
223 | unsigned long offset, u16 value) | |
224 | { | |
225 | /* | |
226 | * The value argument was already truncated to 16 bits. | |
227 | */ | |
2047b08b | 228 | if (invalid_selector(value)) |
06ee1b68 RM |
229 | return -EIO; |
230 | ||
c63855d0 RM |
231 | /* |
232 | * For %cs and %ss we cannot permit a null selector. | |
233 | * We can permit a bogus selector as long as it has USER_RPL. | |
234 | * Null selectors are fine for other segment registers, but | |
235 | * we will never get back to user mode with invalid %cs or %ss | |
236 | * and will take the trap in iret instead. Much code relies | |
237 | * on user_mode() to distinguish a user trap frame (which can | |
238 | * safely use invalid selectors) from a kernel trap frame. | |
239 | */ | |
240 | switch (offset) { | |
241 | case offsetof(struct user_regs_struct, cs): | |
242 | case offsetof(struct user_regs_struct, ss): | |
243 | if (unlikely(value == 0)) | |
244 | return -EIO; | |
245 | ||
246 | default: | |
06ee1b68 | 247 | *pt_regs_access(task_pt_regs(task), offset) = value; |
c63855d0 RM |
248 | break; |
249 | ||
250 | case offsetof(struct user_regs_struct, gs): | |
06ee1b68 | 251 | if (task == current) |
d9a89a26 TH |
252 | set_user_gs(task_pt_regs(task), value); |
253 | else | |
254 | task_user_gs(task) = value; | |
1da177e4 | 255 | } |
06ee1b68 | 256 | |
1da177e4 LT |
257 | return 0; |
258 | } | |
259 | ||
2047b08b RM |
260 | #else /* CONFIG_X86_64 */ |
261 | ||
262 | #define FLAG_MASK (FLAG_MASK_32 | X86_EFLAGS_NT) | |
263 | ||
264 | static unsigned long *pt_regs_access(struct pt_regs *regs, unsigned long offset) | |
265 | { | |
266 | BUILD_BUG_ON(offsetof(struct pt_regs, r15) != 0); | |
267 | return ®s->r15 + (offset / sizeof(regs->r15)); | |
268 | } | |
269 | ||
270 | static u16 get_segment_reg(struct task_struct *task, unsigned long offset) | |
271 | { | |
272 | /* | |
273 | * Returning the value truncates it to 16 bits. | |
274 | */ | |
275 | unsigned int seg; | |
276 | ||
277 | switch (offset) { | |
278 | case offsetof(struct user_regs_struct, fs): | |
279 | if (task == current) { | |
280 | /* Older gas can't assemble movq %?s,%r?? */ | |
281 | asm("movl %%fs,%0" : "=r" (seg)); | |
282 | return seg; | |
283 | } | |
284 | return task->thread.fsindex; | |
285 | case offsetof(struct user_regs_struct, gs): | |
286 | if (task == current) { | |
287 | asm("movl %%gs,%0" : "=r" (seg)); | |
288 | return seg; | |
289 | } | |
290 | return task->thread.gsindex; | |
291 | case offsetof(struct user_regs_struct, ds): | |
292 | if (task == current) { | |
293 | asm("movl %%ds,%0" : "=r" (seg)); | |
294 | return seg; | |
295 | } | |
296 | return task->thread.ds; | |
297 | case offsetof(struct user_regs_struct, es): | |
298 | if (task == current) { | |
299 | asm("movl %%es,%0" : "=r" (seg)); | |
300 | return seg; | |
301 | } | |
302 | return task->thread.es; | |
303 | ||
304 | case offsetof(struct user_regs_struct, cs): | |
305 | case offsetof(struct user_regs_struct, ss): | |
306 | break; | |
307 | } | |
308 | return *pt_regs_access(task_pt_regs(task), offset); | |
309 | } | |
310 | ||
311 | static int set_segment_reg(struct task_struct *task, | |
312 | unsigned long offset, u16 value) | |
313 | { | |
314 | /* | |
315 | * The value argument was already truncated to 16 bits. | |
316 | */ | |
317 | if (invalid_selector(value)) | |
318 | return -EIO; | |
319 | ||
320 | switch (offset) { | |
321 | case offsetof(struct user_regs_struct,fs): | |
322 | /* | |
323 | * If this is setting fs as for normal 64-bit use but | |
324 | * setting fs_base has implicitly changed it, leave it. | |
325 | */ | |
326 | if ((value == FS_TLS_SEL && task->thread.fsindex == 0 && | |
327 | task->thread.fs != 0) || | |
328 | (value == 0 && task->thread.fsindex == FS_TLS_SEL && | |
329 | task->thread.fs == 0)) | |
330 | break; | |
331 | task->thread.fsindex = value; | |
332 | if (task == current) | |
333 | loadsegment(fs, task->thread.fsindex); | |
334 | break; | |
335 | case offsetof(struct user_regs_struct,gs): | |
336 | /* | |
337 | * If this is setting gs as for normal 64-bit use but | |
338 | * setting gs_base has implicitly changed it, leave it. | |
339 | */ | |
340 | if ((value == GS_TLS_SEL && task->thread.gsindex == 0 && | |
341 | task->thread.gs != 0) || | |
342 | (value == 0 && task->thread.gsindex == GS_TLS_SEL && | |
343 | task->thread.gs == 0)) | |
344 | break; | |
345 | task->thread.gsindex = value; | |
346 | if (task == current) | |
347 | load_gs_index(task->thread.gsindex); | |
348 | break; | |
349 | case offsetof(struct user_regs_struct,ds): | |
350 | task->thread.ds = value; | |
351 | if (task == current) | |
352 | loadsegment(ds, task->thread.ds); | |
353 | break; | |
354 | case offsetof(struct user_regs_struct,es): | |
355 | task->thread.es = value; | |
356 | if (task == current) | |
357 | loadsegment(es, task->thread.es); | |
358 | break; | |
359 | ||
360 | /* | |
361 | * Can't actually change these in 64-bit mode. | |
362 | */ | |
363 | case offsetof(struct user_regs_struct,cs): | |
c63855d0 RM |
364 | if (unlikely(value == 0)) |
365 | return -EIO; | |
2047b08b RM |
366 | #ifdef CONFIG_IA32_EMULATION |
367 | if (test_tsk_thread_flag(task, TIF_IA32)) | |
368 | task_pt_regs(task)->cs = value; | |
2047b08b | 369 | #endif |
cb757c41 | 370 | break; |
2047b08b | 371 | case offsetof(struct user_regs_struct,ss): |
c63855d0 RM |
372 | if (unlikely(value == 0)) |
373 | return -EIO; | |
2047b08b RM |
374 | #ifdef CONFIG_IA32_EMULATION |
375 | if (test_tsk_thread_flag(task, TIF_IA32)) | |
376 | task_pt_regs(task)->ss = value; | |
2047b08b | 377 | #endif |
cb757c41 | 378 | break; |
2047b08b RM |
379 | } |
380 | ||
381 | return 0; | |
382 | } | |
383 | ||
2047b08b RM |
384 | #endif /* CONFIG_X86_32 */ |
385 | ||
06ee1b68 | 386 | static unsigned long get_flags(struct task_struct *task) |
1da177e4 | 387 | { |
06ee1b68 RM |
388 | unsigned long retval = task_pt_regs(task)->flags; |
389 | ||
390 | /* | |
391 | * If the debugger set TF, hide it from the readout. | |
392 | */ | |
393 | if (test_tsk_thread_flag(task, TIF_FORCED_TF)) | |
394 | retval &= ~X86_EFLAGS_TF; | |
1da177e4 | 395 | |
1da177e4 LT |
396 | return retval; |
397 | } | |
398 | ||
06ee1b68 RM |
399 | static int set_flags(struct task_struct *task, unsigned long value) |
400 | { | |
401 | struct pt_regs *regs = task_pt_regs(task); | |
402 | ||
403 | /* | |
404 | * If the user value contains TF, mark that | |
405 | * it was not "us" (the debugger) that set it. | |
406 | * If not, make sure it stays set if we had. | |
407 | */ | |
408 | if (value & X86_EFLAGS_TF) | |
409 | clear_tsk_thread_flag(task, TIF_FORCED_TF); | |
410 | else if (test_tsk_thread_flag(task, TIF_FORCED_TF)) | |
411 | value |= X86_EFLAGS_TF; | |
412 | ||
413 | regs->flags = (regs->flags & ~FLAG_MASK) | (value & FLAG_MASK); | |
414 | ||
415 | return 0; | |
416 | } | |
417 | ||
418 | static int putreg(struct task_struct *child, | |
419 | unsigned long offset, unsigned long value) | |
420 | { | |
421 | switch (offset) { | |
422 | case offsetof(struct user_regs_struct, cs): | |
423 | case offsetof(struct user_regs_struct, ds): | |
424 | case offsetof(struct user_regs_struct, es): | |
425 | case offsetof(struct user_regs_struct, fs): | |
426 | case offsetof(struct user_regs_struct, gs): | |
427 | case offsetof(struct user_regs_struct, ss): | |
428 | return set_segment_reg(child, offset, value); | |
429 | ||
430 | case offsetof(struct user_regs_struct, flags): | |
431 | return set_flags(child, value); | |
2047b08b RM |
432 | |
433 | #ifdef CONFIG_X86_64 | |
434 | case offsetof(struct user_regs_struct,fs_base): | |
435 | if (value >= TASK_SIZE_OF(child)) | |
436 | return -EIO; | |
437 | /* | |
438 | * When changing the segment base, use do_arch_prctl | |
439 | * to set either thread.fs or thread.fsindex and the | |
440 | * corresponding GDT slot. | |
441 | */ | |
442 | if (child->thread.fs != value) | |
443 | return do_arch_prctl(child, ARCH_SET_FS, value); | |
444 | return 0; | |
445 | case offsetof(struct user_regs_struct,gs_base): | |
446 | /* | |
447 | * Exactly the same here as the %fs handling above. | |
448 | */ | |
449 | if (value >= TASK_SIZE_OF(child)) | |
450 | return -EIO; | |
451 | if (child->thread.gs != value) | |
452 | return do_arch_prctl(child, ARCH_SET_GS, value); | |
453 | return 0; | |
454 | #endif | |
06ee1b68 RM |
455 | } |
456 | ||
457 | *pt_regs_access(task_pt_regs(child), offset) = value; | |
458 | return 0; | |
459 | } | |
460 | ||
461 | static unsigned long getreg(struct task_struct *task, unsigned long offset) | |
462 | { | |
463 | switch (offset) { | |
464 | case offsetof(struct user_regs_struct, cs): | |
465 | case offsetof(struct user_regs_struct, ds): | |
466 | case offsetof(struct user_regs_struct, es): | |
467 | case offsetof(struct user_regs_struct, fs): | |
468 | case offsetof(struct user_regs_struct, gs): | |
469 | case offsetof(struct user_regs_struct, ss): | |
470 | return get_segment_reg(task, offset); | |
471 | ||
472 | case offsetof(struct user_regs_struct, flags): | |
473 | return get_flags(task); | |
2047b08b RM |
474 | |
475 | #ifdef CONFIG_X86_64 | |
476 | case offsetof(struct user_regs_struct, fs_base): { | |
477 | /* | |
478 | * do_arch_prctl may have used a GDT slot instead of | |
479 | * the MSR. To userland, it appears the same either | |
480 | * way, except the %fs segment selector might not be 0. | |
481 | */ | |
482 | unsigned int seg = task->thread.fsindex; | |
483 | if (task->thread.fs != 0) | |
484 | return task->thread.fs; | |
485 | if (task == current) | |
486 | asm("movl %%fs,%0" : "=r" (seg)); | |
487 | if (seg != FS_TLS_SEL) | |
488 | return 0; | |
489 | return get_desc_base(&task->thread.tls_array[FS_TLS]); | |
490 | } | |
491 | case offsetof(struct user_regs_struct, gs_base): { | |
492 | /* | |
493 | * Exactly the same here as the %fs handling above. | |
494 | */ | |
495 | unsigned int seg = task->thread.gsindex; | |
496 | if (task->thread.gs != 0) | |
497 | return task->thread.gs; | |
498 | if (task == current) | |
499 | asm("movl %%gs,%0" : "=r" (seg)); | |
500 | if (seg != GS_TLS_SEL) | |
501 | return 0; | |
502 | return get_desc_base(&task->thread.tls_array[GS_TLS]); | |
503 | } | |
504 | #endif | |
06ee1b68 RM |
505 | } |
506 | ||
507 | return *pt_regs_access(task_pt_regs(task), offset); | |
508 | } | |
509 | ||
91e7b707 RM |
510 | static int genregs_get(struct task_struct *target, |
511 | const struct user_regset *regset, | |
512 | unsigned int pos, unsigned int count, | |
513 | void *kbuf, void __user *ubuf) | |
514 | { | |
515 | if (kbuf) { | |
516 | unsigned long *k = kbuf; | |
04a1e62c | 517 | while (count >= sizeof(*k)) { |
91e7b707 RM |
518 | *k++ = getreg(target, pos); |
519 | count -= sizeof(*k); | |
520 | pos += sizeof(*k); | |
521 | } | |
522 | } else { | |
523 | unsigned long __user *u = ubuf; | |
04a1e62c | 524 | while (count >= sizeof(*u)) { |
91e7b707 RM |
525 | if (__put_user(getreg(target, pos), u++)) |
526 | return -EFAULT; | |
527 | count -= sizeof(*u); | |
528 | pos += sizeof(*u); | |
529 | } | |
530 | } | |
531 | ||
532 | return 0; | |
533 | } | |
534 | ||
535 | static int genregs_set(struct task_struct *target, | |
536 | const struct user_regset *regset, | |
537 | unsigned int pos, unsigned int count, | |
538 | const void *kbuf, const void __user *ubuf) | |
539 | { | |
540 | int ret = 0; | |
541 | if (kbuf) { | |
542 | const unsigned long *k = kbuf; | |
04a1e62c | 543 | while (count >= sizeof(*k) && !ret) { |
91e7b707 RM |
544 | ret = putreg(target, pos, *k++); |
545 | count -= sizeof(*k); | |
546 | pos += sizeof(*k); | |
547 | } | |
548 | } else { | |
549 | const unsigned long __user *u = ubuf; | |
04a1e62c | 550 | while (count >= sizeof(*u) && !ret) { |
91e7b707 RM |
551 | unsigned long word; |
552 | ret = __get_user(word, u++); | |
553 | if (ret) | |
554 | break; | |
555 | ret = putreg(target, pos, word); | |
556 | count -= sizeof(*u); | |
557 | pos += sizeof(*u); | |
558 | } | |
559 | } | |
560 | return ret; | |
561 | } | |
562 | ||
a8b0ca17 | 563 | static void ptrace_triggered(struct perf_event *bp, |
b326e956 FW |
564 | struct perf_sample_data *data, |
565 | struct pt_regs *regs) | |
d9771e8c | 566 | { |
0f534093 | 567 | int i; |
24f1e32c | 568 | struct thread_struct *thread = &(current->thread); |
0f534093 | 569 | |
72f674d2 P |
570 | /* |
571 | * Store in the virtual DR6 register the fact that the breakpoint | |
572 | * was hit so the thread's debugger will see it. | |
573 | */ | |
24f1e32c FW |
574 | for (i = 0; i < HBP_NUM; i++) { |
575 | if (thread->ptrace_bps[i] == bp) | |
72f674d2 | 576 | break; |
24f1e32c | 577 | } |
d9771e8c | 578 | |
72f674d2 P |
579 | thread->debugreg6 |= (DR_TRAP0 << i); |
580 | } | |
d9771e8c | 581 | |
d9771e8c | 582 | /* |
24f1e32c FW |
583 | * Walk through every ptrace breakpoints for this thread and |
584 | * build the dr7 value on top of their attributes. | |
585 | * | |
d9771e8c | 586 | */ |
24f1e32c | 587 | static unsigned long ptrace_get_dr7(struct perf_event *bp[]) |
d9771e8c | 588 | { |
24f1e32c FW |
589 | int i; |
590 | int dr7 = 0; | |
591 | struct arch_hw_breakpoint *info; | |
592 | ||
593 | for (i = 0; i < HBP_NUM; i++) { | |
594 | if (bp[i] && !bp[i]->attr.disabled) { | |
595 | info = counter_arch_bp(bp[i]); | |
596 | dr7 |= encode_dr7(i, info->len, info->type); | |
597 | } | |
0f534093 | 598 | } |
24f1e32c FW |
599 | |
600 | return dr7; | |
d9771e8c RM |
601 | } |
602 | ||
44234adc | 603 | static int |
5fa10b28 | 604 | ptrace_modify_breakpoint(struct perf_event *bp, int len, int type, |
1cedae72 | 605 | struct task_struct *tsk, int disabled) |
5fa10b28 FW |
606 | { |
607 | int err; | |
608 | int gen_len, gen_type; | |
b326e956 | 609 | struct perf_event_attr attr; |
5fa10b28 FW |
610 | |
611 | /* | |
c9404c9c | 612 | * We should have at least an inactive breakpoint at this |
5fa10b28 FW |
613 | * slot. It means the user is writing dr7 without having |
614 | * written the address register first | |
615 | */ | |
616 | if (!bp) | |
44234adc | 617 | return -EINVAL; |
5fa10b28 FW |
618 | |
619 | err = arch_bp_generic_fields(len, type, &gen_len, &gen_type); | |
620 | if (err) | |
44234adc | 621 | return err; |
5fa10b28 FW |
622 | |
623 | attr = bp->attr; | |
624 | attr.bp_len = gen_len; | |
625 | attr.bp_type = gen_type; | |
1cedae72 | 626 | attr.disabled = disabled; |
5fa10b28 | 627 | |
2f0993e0 | 628 | return modify_user_hw_breakpoint(bp, &attr); |
5fa10b28 FW |
629 | } |
630 | ||
72f674d2 P |
631 | /* |
632 | * Handle ptrace writes to debug register 7. | |
633 | */ | |
634 | static int ptrace_write_dr7(struct task_struct *tsk, unsigned long data) | |
d9771e8c | 635 | { |
72f674d2 | 636 | struct thread_struct *thread = &(tsk->thread); |
24f1e32c | 637 | unsigned long old_dr7; |
72f674d2 P |
638 | int i, orig_ret = 0, rc = 0; |
639 | int enabled, second_pass = 0; | |
640 | unsigned len, type; | |
24f1e32c | 641 | struct perf_event *bp; |
72f674d2 | 642 | |
87dc669b FW |
643 | if (ptrace_get_breakpoints(tsk) < 0) |
644 | return -ESRCH; | |
645 | ||
72f674d2 | 646 | data &= ~DR_CONTROL_RESERVED; |
24f1e32c | 647 | old_dr7 = ptrace_get_dr7(thread->ptrace_bps); |
72f674d2 P |
648 | restore: |
649 | /* | |
650 | * Loop through all the hardware breakpoints, making the | |
651 | * appropriate changes to each. | |
652 | */ | |
653 | for (i = 0; i < HBP_NUM; i++) { | |
654 | enabled = decode_dr7(data, i, &len, &type); | |
24f1e32c | 655 | bp = thread->ptrace_bps[i]; |
72f674d2 P |
656 | |
657 | if (!enabled) { | |
658 | if (bp) { | |
24f1e32c FW |
659 | /* |
660 | * Don't unregister the breakpoints right-away, | |
72f674d2 P |
661 | * unless all register_user_hw_breakpoint() |
662 | * requests have succeeded. This prevents | |
663 | * any window of opportunity for debug | |
664 | * register grabbing by other users. | |
665 | */ | |
666 | if (!second_pass) | |
667 | continue; | |
1cedae72 | 668 | |
44234adc | 669 | rc = ptrace_modify_breakpoint(bp, len, type, |
1cedae72 | 670 | tsk, 1); |
44234adc | 671 | if (rc) |
1cedae72 | 672 | break; |
72f674d2 P |
673 | } |
674 | continue; | |
675 | } | |
0f534093 | 676 | |
44234adc FW |
677 | rc = ptrace_modify_breakpoint(bp, len, type, tsk, 0); |
678 | if (rc) | |
24f1e32c | 679 | break; |
72f674d2 P |
680 | } |
681 | /* | |
682 | * Make a second pass to free the remaining unused breakpoints | |
683 | * or to restore the original breakpoints if an error occurred. | |
684 | */ | |
685 | if (!second_pass) { | |
686 | second_pass = 1; | |
687 | if (rc < 0) { | |
688 | orig_ret = rc; | |
689 | data = old_dr7; | |
690 | } | |
691 | goto restore; | |
692 | } | |
87dc669b FW |
693 | |
694 | ptrace_put_breakpoints(tsk); | |
695 | ||
72f674d2 P |
696 | return ((orig_ret < 0) ? orig_ret : rc); |
697 | } | |
0f534093 | 698 | |
72f674d2 P |
699 | /* |
700 | * Handle PTRACE_PEEKUSR calls for the debug register area. | |
701 | */ | |
9d22b536 | 702 | static unsigned long ptrace_get_debugreg(struct task_struct *tsk, int n) |
72f674d2 P |
703 | { |
704 | struct thread_struct *thread = &(tsk->thread); | |
705 | unsigned long val = 0; | |
706 | ||
24f1e32c FW |
707 | if (n < HBP_NUM) { |
708 | struct perf_event *bp; | |
87dc669b FW |
709 | |
710 | if (ptrace_get_breakpoints(tsk) < 0) | |
711 | return -ESRCH; | |
712 | ||
24f1e32c FW |
713 | bp = thread->ptrace_bps[n]; |
714 | if (!bp) | |
87dc669b FW |
715 | val = 0; |
716 | else | |
717 | val = bp->hw.info.address; | |
718 | ||
719 | ptrace_put_breakpoints(tsk); | |
24f1e32c | 720 | } else if (n == 6) { |
72f674d2 | 721 | val = thread->debugreg6; |
24f1e32c | 722 | } else if (n == 7) { |
326264a0 | 723 | val = thread->ptrace_dr7; |
24f1e32c | 724 | } |
72f674d2 P |
725 | return val; |
726 | } | |
0f534093 | 727 | |
24f1e32c FW |
728 | static int ptrace_set_breakpoint_addr(struct task_struct *tsk, int nr, |
729 | unsigned long addr) | |
730 | { | |
731 | struct perf_event *bp; | |
732 | struct thread_struct *t = &tsk->thread; | |
b326e956 | 733 | struct perf_event_attr attr; |
87dc669b FW |
734 | int err = 0; |
735 | ||
736 | if (ptrace_get_breakpoints(tsk) < 0) | |
737 | return -ESRCH; | |
24f1e32c FW |
738 | |
739 | if (!t->ptrace_bps[nr]) { | |
73266fc1 | 740 | ptrace_breakpoint_init(&attr); |
d9771e8c | 741 | /* |
24f1e32c FW |
742 | * Put stub len and type to register (reserve) an inactive but |
743 | * correct bp | |
d9771e8c | 744 | */ |
5fa10b28 FW |
745 | attr.bp_addr = addr; |
746 | attr.bp_len = HW_BREAKPOINT_LEN_1; | |
747 | attr.bp_type = HW_BREAKPOINT_W; | |
748 | attr.disabled = 1; | |
749 | ||
4dc0da86 AK |
750 | bp = register_user_hw_breakpoint(&attr, ptrace_triggered, |
751 | NULL, tsk); | |
44234adc FW |
752 | |
753 | /* | |
754 | * CHECKME: the previous code returned -EIO if the addr wasn't | |
755 | * a valid task virtual addr. The new one will return -EINVAL in | |
756 | * this case. | |
757 | * -EINVAL may be what we want for in-kernel breakpoints users, | |
758 | * but -EIO looks better for ptrace, since we refuse a register | |
759 | * writing for the user. And anyway this is the previous | |
760 | * behaviour. | |
761 | */ | |
87dc669b FW |
762 | if (IS_ERR(bp)) { |
763 | err = PTR_ERR(bp); | |
764 | goto put; | |
765 | } | |
44234adc FW |
766 | |
767 | t->ptrace_bps[nr] = bp; | |
24f1e32c FW |
768 | } else { |
769 | bp = t->ptrace_bps[nr]; | |
5fa10b28 FW |
770 | |
771 | attr = bp->attr; | |
772 | attr.bp_addr = addr; | |
44234adc | 773 | err = modify_user_hw_breakpoint(bp, &attr); |
d9771e8c | 774 | } |
24f1e32c | 775 | |
87dc669b FW |
776 | put: |
777 | ptrace_put_breakpoints(tsk); | |
778 | return err; | |
d9771e8c RM |
779 | } |
780 | ||
72f674d2 P |
781 | /* |
782 | * Handle PTRACE_POKEUSR calls for the debug register area. | |
783 | */ | |
98b8b99a HS |
784 | static int ptrace_set_debugreg(struct task_struct *tsk, int n, |
785 | unsigned long val) | |
72f674d2 P |
786 | { |
787 | struct thread_struct *thread = &(tsk->thread); | |
788 | int rc = 0; | |
789 | ||
790 | /* There are no DR4 or DR5 registers */ | |
791 | if (n == 4 || n == 5) | |
792 | return -EIO; | |
793 | ||
794 | if (n == 6) { | |
24f1e32c | 795 | thread->debugreg6 = val; |
72f674d2 | 796 | goto ret_path; |
d9771e8c | 797 | } |
72f674d2 | 798 | if (n < HBP_NUM) { |
24f1e32c FW |
799 | rc = ptrace_set_breakpoint_addr(tsk, n, val); |
800 | if (rc) | |
801 | return rc; | |
72f674d2 P |
802 | } |
803 | /* All that's left is DR7 */ | |
326264a0 | 804 | if (n == 7) { |
72f674d2 | 805 | rc = ptrace_write_dr7(tsk, val); |
326264a0 FW |
806 | if (!rc) |
807 | thread->ptrace_dr7 = val; | |
808 | } | |
d9771e8c | 809 | |
72f674d2 P |
810 | ret_path: |
811 | return rc; | |
d9771e8c RM |
812 | } |
813 | ||
325af5fb RM |
814 | /* |
815 | * These access the current or another (stopped) task's io permission | |
816 | * bitmap for debugging or core dump. | |
817 | */ | |
818 | static int ioperm_active(struct task_struct *target, | |
819 | const struct user_regset *regset) | |
820 | { | |
821 | return target->thread.io_bitmap_max / regset->size; | |
822 | } | |
b4ef95de | 823 | |
325af5fb RM |
824 | static int ioperm_get(struct task_struct *target, |
825 | const struct user_regset *regset, | |
826 | unsigned int pos, unsigned int count, | |
827 | void *kbuf, void __user *ubuf) | |
eee3af4a | 828 | { |
325af5fb | 829 | if (!target->thread.io_bitmap_ptr) |
eee3af4a MM |
830 | return -ENXIO; |
831 | ||
325af5fb RM |
832 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, |
833 | target->thread.io_bitmap_ptr, | |
834 | 0, IO_BITMAP_BYTES); | |
835 | } | |
836 | ||
1da177e4 LT |
837 | /* |
838 | * Called by kernel/ptrace.c when detaching.. | |
839 | * | |
840 | * Make sure the single step bit is not set. | |
841 | */ | |
842 | void ptrace_disable(struct task_struct *child) | |
9e714bed | 843 | { |
7f232343 | 844 | user_disable_single_step(child); |
e9c86c78 | 845 | #ifdef TIF_SYSCALL_EMU |
ab1c23c2 | 846 | clear_tsk_thread_flag(child, TIF_SYSCALL_EMU); |
e9c86c78 | 847 | #endif |
1da177e4 LT |
848 | } |
849 | ||
5a4646a4 RM |
850 | #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION |
851 | static const struct user_regset_view user_x86_32_view; /* Initialized below. */ | |
852 | #endif | |
853 | ||
9b05a69e NK |
854 | long arch_ptrace(struct task_struct *child, long request, |
855 | unsigned long addr, unsigned long data) | |
1da177e4 | 856 | { |
5a4646a4 | 857 | int ret; |
1da177e4 LT |
858 | unsigned long __user *datap = (unsigned long __user *)data; |
859 | ||
1da177e4 | 860 | switch (request) { |
1da177e4 LT |
861 | /* read the word at location addr in the USER area. */ |
862 | case PTRACE_PEEKUSR: { | |
863 | unsigned long tmp; | |
864 | ||
865 | ret = -EIO; | |
eb5a3699 | 866 | if ((addr & (sizeof(data) - 1)) || addr >= sizeof(struct user)) |
1da177e4 LT |
867 | break; |
868 | ||
869 | tmp = 0; /* Default return condition */ | |
e9c86c78 | 870 | if (addr < sizeof(struct user_regs_struct)) |
1da177e4 | 871 | tmp = getreg(child, addr); |
e9c86c78 RM |
872 | else if (addr >= offsetof(struct user, u_debugreg[0]) && |
873 | addr <= offsetof(struct user, u_debugreg[7])) { | |
874 | addr -= offsetof(struct user, u_debugreg[0]); | |
875 | tmp = ptrace_get_debugreg(child, addr / sizeof(data)); | |
1da177e4 LT |
876 | } |
877 | ret = put_user(tmp, datap); | |
878 | break; | |
879 | } | |
880 | ||
1da177e4 LT |
881 | case PTRACE_POKEUSR: /* write the word at location addr in the USER area */ |
882 | ret = -EIO; | |
eb5a3699 | 883 | if ((addr & (sizeof(data) - 1)) || addr >= sizeof(struct user)) |
1da177e4 LT |
884 | break; |
885 | ||
e9c86c78 | 886 | if (addr < sizeof(struct user_regs_struct)) |
1da177e4 | 887 | ret = putreg(child, addr, data); |
e9c86c78 RM |
888 | else if (addr >= offsetof(struct user, u_debugreg[0]) && |
889 | addr <= offsetof(struct user, u_debugreg[7])) { | |
890 | addr -= offsetof(struct user, u_debugreg[0]); | |
891 | ret = ptrace_set_debugreg(child, | |
892 | addr / sizeof(data), data); | |
1da177e4 | 893 | } |
e9c86c78 | 894 | break; |
1da177e4 | 895 | |
5a4646a4 RM |
896 | case PTRACE_GETREGS: /* Get all gp regs from the child. */ |
897 | return copy_regset_to_user(child, | |
898 | task_user_regset_view(current), | |
899 | REGSET_GENERAL, | |
900 | 0, sizeof(struct user_regs_struct), | |
901 | datap); | |
902 | ||
903 | case PTRACE_SETREGS: /* Set all gp regs in the child. */ | |
904 | return copy_regset_from_user(child, | |
905 | task_user_regset_view(current), | |
906 | REGSET_GENERAL, | |
907 | 0, sizeof(struct user_regs_struct), | |
908 | datap); | |
909 | ||
910 | case PTRACE_GETFPREGS: /* Get the child FPU state. */ | |
911 | return copy_regset_to_user(child, | |
912 | task_user_regset_view(current), | |
913 | REGSET_FP, | |
914 | 0, sizeof(struct user_i387_struct), | |
915 | datap); | |
916 | ||
917 | case PTRACE_SETFPREGS: /* Set the child FPU state. */ | |
918 | return copy_regset_from_user(child, | |
919 | task_user_regset_view(current), | |
920 | REGSET_FP, | |
921 | 0, sizeof(struct user_i387_struct), | |
922 | datap); | |
1da177e4 | 923 | |
e9c86c78 | 924 | #ifdef CONFIG_X86_32 |
5a4646a4 RM |
925 | case PTRACE_GETFPXREGS: /* Get the child extended FPU state. */ |
926 | return copy_regset_to_user(child, &user_x86_32_view, | |
927 | REGSET_XFP, | |
928 | 0, sizeof(struct user_fxsr_struct), | |
45fdc3a7 | 929 | datap) ? -EIO : 0; |
5a4646a4 RM |
930 | |
931 | case PTRACE_SETFPXREGS: /* Set the child extended FPU state. */ | |
932 | return copy_regset_from_user(child, &user_x86_32_view, | |
933 | REGSET_XFP, | |
934 | 0, sizeof(struct user_fxsr_struct), | |
45fdc3a7 | 935 | datap) ? -EIO : 0; |
e9c86c78 | 936 | #endif |
1da177e4 | 937 | |
e9c86c78 | 938 | #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION |
1da177e4 | 939 | case PTRACE_GET_THREAD_AREA: |
9b05a69e | 940 | if ((int) addr < 0) |
efd1ca52 RM |
941 | return -EIO; |
942 | ret = do_get_thread_area(child, addr, | |
eb5a3699 | 943 | (struct user_desc __user *)data); |
1da177e4 LT |
944 | break; |
945 | ||
946 | case PTRACE_SET_THREAD_AREA: | |
9b05a69e | 947 | if ((int) addr < 0) |
efd1ca52 RM |
948 | return -EIO; |
949 | ret = do_set_thread_area(child, addr, | |
eb5a3699 | 950 | (struct user_desc __user *)data, 0); |
1da177e4 | 951 | break; |
e9c86c78 RM |
952 | #endif |
953 | ||
954 | #ifdef CONFIG_X86_64 | |
955 | /* normal 64bit interface to access TLS data. | |
956 | Works just like arch_prctl, except that the arguments | |
957 | are reversed. */ | |
958 | case PTRACE_ARCH_PRCTL: | |
959 | ret = do_arch_prctl(child, data, addr); | |
960 | break; | |
961 | #endif | |
1da177e4 LT |
962 | |
963 | default: | |
964 | ret = ptrace_request(child, request, addr, data); | |
965 | break; | |
966 | } | |
d9771e8c | 967 | |
1da177e4 LT |
968 | return ret; |
969 | } | |
970 | ||
cb757c41 RM |
971 | #ifdef CONFIG_IA32_EMULATION |
972 | ||
099cd6e9 RM |
973 | #include <linux/compat.h> |
974 | #include <linux/syscalls.h> | |
975 | #include <asm/ia32.h> | |
cb757c41 RM |
976 | #include <asm/user32.h> |
977 | ||
978 | #define R32(l,q) \ | |
979 | case offsetof(struct user32, regs.l): \ | |
980 | regs->q = value; break | |
981 | ||
982 | #define SEG32(rs) \ | |
983 | case offsetof(struct user32, regs.rs): \ | |
984 | return set_segment_reg(child, \ | |
985 | offsetof(struct user_regs_struct, rs), \ | |
986 | value); \ | |
987 | break | |
988 | ||
989 | static int putreg32(struct task_struct *child, unsigned regno, u32 value) | |
990 | { | |
991 | struct pt_regs *regs = task_pt_regs(child); | |
992 | ||
993 | switch (regno) { | |
994 | ||
995 | SEG32(cs); | |
996 | SEG32(ds); | |
997 | SEG32(es); | |
998 | SEG32(fs); | |
999 | SEG32(gs); | |
1000 | SEG32(ss); | |
1001 | ||
1002 | R32(ebx, bx); | |
1003 | R32(ecx, cx); | |
1004 | R32(edx, dx); | |
1005 | R32(edi, di); | |
1006 | R32(esi, si); | |
1007 | R32(ebp, bp); | |
1008 | R32(eax, ax); | |
cb757c41 RM |
1009 | R32(eip, ip); |
1010 | R32(esp, sp); | |
1011 | ||
40f0933d RM |
1012 | case offsetof(struct user32, regs.orig_eax): |
1013 | /* | |
8cb3ed13 RM |
1014 | * A 32-bit debugger setting orig_eax means to restore |
1015 | * the state of the task restarting a 32-bit syscall. | |
1016 | * Make sure we interpret the -ERESTART* codes correctly | |
1017 | * in case the task is not actually still sitting at the | |
1018 | * exit from a 32-bit syscall with TS_COMPAT still set. | |
40f0933d | 1019 | */ |
8cb3ed13 RM |
1020 | regs->orig_ax = value; |
1021 | if (syscall_get_nr(child, regs) >= 0) | |
1022 | task_thread_info(child)->status |= TS_COMPAT; | |
40f0933d RM |
1023 | break; |
1024 | ||
cb757c41 RM |
1025 | case offsetof(struct user32, regs.eflags): |
1026 | return set_flags(child, value); | |
1027 | ||
1028 | case offsetof(struct user32, u_debugreg[0]) ... | |
1029 | offsetof(struct user32, u_debugreg[7]): | |
1030 | regno -= offsetof(struct user32, u_debugreg[0]); | |
1031 | return ptrace_set_debugreg(child, regno / 4, value); | |
1032 | ||
1033 | default: | |
1034 | if (regno > sizeof(struct user32) || (regno & 3)) | |
1035 | return -EIO; | |
1036 | ||
1037 | /* | |
1038 | * Other dummy fields in the virtual user structure | |
1039 | * are ignored | |
1040 | */ | |
1041 | break; | |
1042 | } | |
1043 | return 0; | |
1044 | } | |
1045 | ||
1046 | #undef R32 | |
1047 | #undef SEG32 | |
1048 | ||
1049 | #define R32(l,q) \ | |
1050 | case offsetof(struct user32, regs.l): \ | |
1051 | *val = regs->q; break | |
1052 | ||
1053 | #define SEG32(rs) \ | |
1054 | case offsetof(struct user32, regs.rs): \ | |
1055 | *val = get_segment_reg(child, \ | |
1056 | offsetof(struct user_regs_struct, rs)); \ | |
1057 | break | |
1058 | ||
1059 | static int getreg32(struct task_struct *child, unsigned regno, u32 *val) | |
1060 | { | |
1061 | struct pt_regs *regs = task_pt_regs(child); | |
1062 | ||
1063 | switch (regno) { | |
1064 | ||
1065 | SEG32(ds); | |
1066 | SEG32(es); | |
1067 | SEG32(fs); | |
1068 | SEG32(gs); | |
1069 | ||
1070 | R32(cs, cs); | |
1071 | R32(ss, ss); | |
1072 | R32(ebx, bx); | |
1073 | R32(ecx, cx); | |
1074 | R32(edx, dx); | |
1075 | R32(edi, di); | |
1076 | R32(esi, si); | |
1077 | R32(ebp, bp); | |
1078 | R32(eax, ax); | |
1079 | R32(orig_eax, orig_ax); | |
1080 | R32(eip, ip); | |
1081 | R32(esp, sp); | |
1082 | ||
1083 | case offsetof(struct user32, regs.eflags): | |
1084 | *val = get_flags(child); | |
1085 | break; | |
1086 | ||
1087 | case offsetof(struct user32, u_debugreg[0]) ... | |
1088 | offsetof(struct user32, u_debugreg[7]): | |
1089 | regno -= offsetof(struct user32, u_debugreg[0]); | |
1090 | *val = ptrace_get_debugreg(child, regno / 4); | |
1091 | break; | |
1092 | ||
1093 | default: | |
1094 | if (regno > sizeof(struct user32) || (regno & 3)) | |
1095 | return -EIO; | |
1096 | ||
1097 | /* | |
1098 | * Other dummy fields in the virtual user structure | |
1099 | * are ignored | |
1100 | */ | |
1101 | *val = 0; | |
1102 | break; | |
1103 | } | |
1104 | return 0; | |
1105 | } | |
1106 | ||
1107 | #undef R32 | |
1108 | #undef SEG32 | |
1109 | ||
91e7b707 RM |
1110 | static int genregs32_get(struct task_struct *target, |
1111 | const struct user_regset *regset, | |
1112 | unsigned int pos, unsigned int count, | |
1113 | void *kbuf, void __user *ubuf) | |
1114 | { | |
1115 | if (kbuf) { | |
1116 | compat_ulong_t *k = kbuf; | |
04a1e62c | 1117 | while (count >= sizeof(*k)) { |
91e7b707 RM |
1118 | getreg32(target, pos, k++); |
1119 | count -= sizeof(*k); | |
1120 | pos += sizeof(*k); | |
1121 | } | |
1122 | } else { | |
1123 | compat_ulong_t __user *u = ubuf; | |
04a1e62c | 1124 | while (count >= sizeof(*u)) { |
91e7b707 RM |
1125 | compat_ulong_t word; |
1126 | getreg32(target, pos, &word); | |
1127 | if (__put_user(word, u++)) | |
1128 | return -EFAULT; | |
1129 | count -= sizeof(*u); | |
1130 | pos += sizeof(*u); | |
1131 | } | |
1132 | } | |
1133 | ||
1134 | return 0; | |
1135 | } | |
1136 | ||
1137 | static int genregs32_set(struct task_struct *target, | |
1138 | const struct user_regset *regset, | |
1139 | unsigned int pos, unsigned int count, | |
1140 | const void *kbuf, const void __user *ubuf) | |
1141 | { | |
1142 | int ret = 0; | |
1143 | if (kbuf) { | |
1144 | const compat_ulong_t *k = kbuf; | |
04a1e62c | 1145 | while (count >= sizeof(*k) && !ret) { |
f9cb02b0 | 1146 | ret = putreg32(target, pos, *k++); |
91e7b707 RM |
1147 | count -= sizeof(*k); |
1148 | pos += sizeof(*k); | |
1149 | } | |
1150 | } else { | |
1151 | const compat_ulong_t __user *u = ubuf; | |
04a1e62c | 1152 | while (count >= sizeof(*u) && !ret) { |
91e7b707 RM |
1153 | compat_ulong_t word; |
1154 | ret = __get_user(word, u++); | |
1155 | if (ret) | |
1156 | break; | |
f9cb02b0 | 1157 | ret = putreg32(target, pos, word); |
91e7b707 RM |
1158 | count -= sizeof(*u); |
1159 | pos += sizeof(*u); | |
1160 | } | |
1161 | } | |
1162 | return ret; | |
1163 | } | |
1164 | ||
55283e25 L |
1165 | #ifdef CONFIG_X86_X32_ABI |
1166 | static long x32_arch_ptrace(struct task_struct *child, | |
1167 | compat_long_t request, compat_ulong_t caddr, | |
1168 | compat_ulong_t cdata) | |
1169 | { | |
1170 | unsigned long addr = caddr; | |
1171 | unsigned long data = cdata; | |
1172 | void __user *datap = compat_ptr(data); | |
1173 | int ret; | |
1174 | ||
1175 | switch (request) { | |
1176 | /* Read 32bits at location addr in the USER area. Only allow | |
1177 | to return the lower 32bits of segment and debug registers. */ | |
1178 | case PTRACE_PEEKUSR: { | |
1179 | u32 tmp; | |
1180 | ||
1181 | ret = -EIO; | |
1182 | if ((addr & (sizeof(data) - 1)) || addr >= sizeof(struct user) || | |
1183 | addr < offsetof(struct user_regs_struct, cs)) | |
1184 | break; | |
1185 | ||
1186 | tmp = 0; /* Default return condition */ | |
1187 | if (addr < sizeof(struct user_regs_struct)) | |
1188 | tmp = getreg(child, addr); | |
1189 | else if (addr >= offsetof(struct user, u_debugreg[0]) && | |
1190 | addr <= offsetof(struct user, u_debugreg[7])) { | |
1191 | addr -= offsetof(struct user, u_debugreg[0]); | |
1192 | tmp = ptrace_get_debugreg(child, addr / sizeof(data)); | |
1193 | } | |
1194 | ret = put_user(tmp, (__u32 __user *)datap); | |
1195 | break; | |
1196 | } | |
1197 | ||
1198 | /* Write the word at location addr in the USER area. Only allow | |
1199 | to update segment and debug registers with the upper 32bits | |
1200 | zero-extended. */ | |
1201 | case PTRACE_POKEUSR: | |
1202 | ret = -EIO; | |
1203 | if ((addr & (sizeof(data) - 1)) || addr >= sizeof(struct user) || | |
1204 | addr < offsetof(struct user_regs_struct, cs)) | |
1205 | break; | |
1206 | ||
1207 | if (addr < sizeof(struct user_regs_struct)) | |
1208 | ret = putreg(child, addr, data); | |
1209 | else if (addr >= offsetof(struct user, u_debugreg[0]) && | |
1210 | addr <= offsetof(struct user, u_debugreg[7])) { | |
1211 | addr -= offsetof(struct user, u_debugreg[0]); | |
1212 | ret = ptrace_set_debugreg(child, | |
1213 | addr / sizeof(data), data); | |
1214 | } | |
1215 | break; | |
1216 | ||
1217 | case PTRACE_GETREGS: /* Get all gp regs from the child. */ | |
1218 | return copy_regset_to_user(child, | |
1219 | task_user_regset_view(current), | |
1220 | REGSET_GENERAL, | |
1221 | 0, sizeof(struct user_regs_struct), | |
1222 | datap); | |
1223 | ||
1224 | case PTRACE_SETREGS: /* Set all gp regs in the child. */ | |
1225 | return copy_regset_from_user(child, | |
1226 | task_user_regset_view(current), | |
1227 | REGSET_GENERAL, | |
1228 | 0, sizeof(struct user_regs_struct), | |
1229 | datap); | |
1230 | ||
1231 | case PTRACE_GETFPREGS: /* Get the child FPU state. */ | |
1232 | return copy_regset_to_user(child, | |
1233 | task_user_regset_view(current), | |
1234 | REGSET_FP, | |
1235 | 0, sizeof(struct user_i387_struct), | |
1236 | datap); | |
1237 | ||
1238 | case PTRACE_SETFPREGS: /* Set the child FPU state. */ | |
1239 | return copy_regset_from_user(child, | |
1240 | task_user_regset_view(current), | |
1241 | REGSET_FP, | |
1242 | 0, sizeof(struct user_i387_struct), | |
1243 | datap); | |
1244 | ||
55283e25 L |
1245 | default: |
1246 | return compat_ptrace_request(child, request, addr, data); | |
1247 | } | |
1248 | ||
1249 | return ret; | |
1250 | } | |
1251 | #endif | |
1252 | ||
562b80ba RM |
1253 | long compat_arch_ptrace(struct task_struct *child, compat_long_t request, |
1254 | compat_ulong_t caddr, compat_ulong_t cdata) | |
099cd6e9 | 1255 | { |
562b80ba RM |
1256 | unsigned long addr = caddr; |
1257 | unsigned long data = cdata; | |
099cd6e9 RM |
1258 | void __user *datap = compat_ptr(data); |
1259 | int ret; | |
1260 | __u32 val; | |
1261 | ||
55283e25 L |
1262 | #ifdef CONFIG_X86_X32_ABI |
1263 | if (!is_ia32_task()) | |
1264 | return x32_arch_ptrace(child, request, caddr, cdata); | |
1265 | #endif | |
1266 | ||
099cd6e9 | 1267 | switch (request) { |
099cd6e9 RM |
1268 | case PTRACE_PEEKUSR: |
1269 | ret = getreg32(child, addr, &val); | |
1270 | if (ret == 0) | |
1271 | ret = put_user(val, (__u32 __user *)datap); | |
1272 | break; | |
1273 | ||
1274 | case PTRACE_POKEUSR: | |
1275 | ret = putreg32(child, addr, data); | |
1276 | break; | |
1277 | ||
5a4646a4 RM |
1278 | case PTRACE_GETREGS: /* Get all gp regs from the child. */ |
1279 | return copy_regset_to_user(child, &user_x86_32_view, | |
1280 | REGSET_GENERAL, | |
1281 | 0, sizeof(struct user_regs_struct32), | |
1282 | datap); | |
1283 | ||
1284 | case PTRACE_SETREGS: /* Set all gp regs in the child. */ | |
1285 | return copy_regset_from_user(child, &user_x86_32_view, | |
1286 | REGSET_GENERAL, 0, | |
1287 | sizeof(struct user_regs_struct32), | |
1288 | datap); | |
1289 | ||
1290 | case PTRACE_GETFPREGS: /* Get the child FPU state. */ | |
1291 | return copy_regset_to_user(child, &user_x86_32_view, | |
1292 | REGSET_FP, 0, | |
1293 | sizeof(struct user_i387_ia32_struct), | |
1294 | datap); | |
1295 | ||
1296 | case PTRACE_SETFPREGS: /* Set the child FPU state. */ | |
1297 | return copy_regset_from_user( | |
1298 | child, &user_x86_32_view, REGSET_FP, | |
1299 | 0, sizeof(struct user_i387_ia32_struct), datap); | |
1300 | ||
1301 | case PTRACE_GETFPXREGS: /* Get the child extended FPU state. */ | |
1302 | return copy_regset_to_user(child, &user_x86_32_view, | |
1303 | REGSET_XFP, 0, | |
1304 | sizeof(struct user32_fxsr_struct), | |
1305 | datap); | |
1306 | ||
1307 | case PTRACE_SETFPXREGS: /* Set the child extended FPU state. */ | |
1308 | return copy_regset_from_user(child, &user_x86_32_view, | |
1309 | REGSET_XFP, 0, | |
1310 | sizeof(struct user32_fxsr_struct), | |
1311 | datap); | |
099cd6e9 | 1312 | |
562b80ba RM |
1313 | case PTRACE_GET_THREAD_AREA: |
1314 | case PTRACE_SET_THREAD_AREA: | |
1315 | return arch_ptrace(child, request, addr, data); | |
1316 | ||
099cd6e9 | 1317 | default: |
fdadd54d | 1318 | return compat_ptrace_request(child, request, addr, data); |
099cd6e9 RM |
1319 | } |
1320 | ||
099cd6e9 RM |
1321 | return ret; |
1322 | } | |
1323 | ||
cb757c41 RM |
1324 | #endif /* CONFIG_IA32_EMULATION */ |
1325 | ||
070459d9 RM |
1326 | #ifdef CONFIG_X86_64 |
1327 | ||
5b3efd50 | 1328 | static struct user_regset x86_64_regsets[] __read_mostly = { |
070459d9 RM |
1329 | [REGSET_GENERAL] = { |
1330 | .core_note_type = NT_PRSTATUS, | |
1331 | .n = sizeof(struct user_regs_struct) / sizeof(long), | |
1332 | .size = sizeof(long), .align = sizeof(long), | |
1333 | .get = genregs_get, .set = genregs_set | |
1334 | }, | |
1335 | [REGSET_FP] = { | |
1336 | .core_note_type = NT_PRFPREG, | |
1337 | .n = sizeof(struct user_i387_struct) / sizeof(long), | |
1338 | .size = sizeof(long), .align = sizeof(long), | |
1339 | .active = xfpregs_active, .get = xfpregs_get, .set = xfpregs_set | |
1340 | }, | |
5b3efd50 SS |
1341 | [REGSET_XSTATE] = { |
1342 | .core_note_type = NT_X86_XSTATE, | |
1343 | .size = sizeof(u64), .align = sizeof(u64), | |
1344 | .active = xstateregs_active, .get = xstateregs_get, | |
1345 | .set = xstateregs_set | |
1346 | }, | |
325af5fb RM |
1347 | [REGSET_IOPERM64] = { |
1348 | .core_note_type = NT_386_IOPERM, | |
1349 | .n = IO_BITMAP_LONGS, | |
1350 | .size = sizeof(long), .align = sizeof(long), | |
1351 | .active = ioperm_active, .get = ioperm_get | |
1352 | }, | |
070459d9 RM |
1353 | }; |
1354 | ||
1355 | static const struct user_regset_view user_x86_64_view = { | |
1356 | .name = "x86_64", .e_machine = EM_X86_64, | |
1357 | .regsets = x86_64_regsets, .n = ARRAY_SIZE(x86_64_regsets) | |
1358 | }; | |
1359 | ||
1360 | #else /* CONFIG_X86_32 */ | |
1361 | ||
1362 | #define user_regs_struct32 user_regs_struct | |
1363 | #define genregs32_get genregs_get | |
1364 | #define genregs32_set genregs_set | |
1365 | ||
1366 | #endif /* CONFIG_X86_64 */ | |
1367 | ||
1368 | #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION | |
5b3efd50 | 1369 | static struct user_regset x86_32_regsets[] __read_mostly = { |
070459d9 RM |
1370 | [REGSET_GENERAL] = { |
1371 | .core_note_type = NT_PRSTATUS, | |
1372 | .n = sizeof(struct user_regs_struct32) / sizeof(u32), | |
1373 | .size = sizeof(u32), .align = sizeof(u32), | |
1374 | .get = genregs32_get, .set = genregs32_set | |
1375 | }, | |
1376 | [REGSET_FP] = { | |
1377 | .core_note_type = NT_PRFPREG, | |
1f465f4e | 1378 | .n = sizeof(struct user_i387_ia32_struct) / sizeof(u32), |
070459d9 RM |
1379 | .size = sizeof(u32), .align = sizeof(u32), |
1380 | .active = fpregs_active, .get = fpregs_get, .set = fpregs_set | |
1381 | }, | |
1382 | [REGSET_XFP] = { | |
1383 | .core_note_type = NT_PRXFPREG, | |
1f465f4e | 1384 | .n = sizeof(struct user32_fxsr_struct) / sizeof(u32), |
070459d9 RM |
1385 | .size = sizeof(u32), .align = sizeof(u32), |
1386 | .active = xfpregs_active, .get = xfpregs_get, .set = xfpregs_set | |
1387 | }, | |
5b3efd50 SS |
1388 | [REGSET_XSTATE] = { |
1389 | .core_note_type = NT_X86_XSTATE, | |
1390 | .size = sizeof(u64), .align = sizeof(u64), | |
1391 | .active = xstateregs_active, .get = xstateregs_get, | |
1392 | .set = xstateregs_set | |
1393 | }, | |
070459d9 | 1394 | [REGSET_TLS] = { |
bb61682b | 1395 | .core_note_type = NT_386_TLS, |
070459d9 RM |
1396 | .n = GDT_ENTRY_TLS_ENTRIES, .bias = GDT_ENTRY_TLS_MIN, |
1397 | .size = sizeof(struct user_desc), | |
1398 | .align = sizeof(struct user_desc), | |
1399 | .active = regset_tls_active, | |
1400 | .get = regset_tls_get, .set = regset_tls_set | |
1401 | }, | |
325af5fb RM |
1402 | [REGSET_IOPERM32] = { |
1403 | .core_note_type = NT_386_IOPERM, | |
1404 | .n = IO_BITMAP_BYTES / sizeof(u32), | |
1405 | .size = sizeof(u32), .align = sizeof(u32), | |
1406 | .active = ioperm_active, .get = ioperm_get | |
1407 | }, | |
070459d9 RM |
1408 | }; |
1409 | ||
1410 | static const struct user_regset_view user_x86_32_view = { | |
1411 | .name = "i386", .e_machine = EM_386, | |
1412 | .regsets = x86_32_regsets, .n = ARRAY_SIZE(x86_32_regsets) | |
1413 | }; | |
1414 | #endif | |
1415 | ||
5b3efd50 SS |
1416 | /* |
1417 | * This represents bytes 464..511 in the memory layout exported through | |
1418 | * the REGSET_XSTATE interface. | |
1419 | */ | |
1420 | u64 xstate_fx_sw_bytes[USER_XSTATE_FX_SW_WORDS]; | |
1421 | ||
1422 | void update_regset_xstate_info(unsigned int size, u64 xstate_mask) | |
1423 | { | |
1424 | #ifdef CONFIG_X86_64 | |
1425 | x86_64_regsets[REGSET_XSTATE].n = size / sizeof(u64); | |
1426 | #endif | |
1427 | #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION | |
1428 | x86_32_regsets[REGSET_XSTATE].n = size / sizeof(u64); | |
1429 | #endif | |
1430 | xstate_fx_sw_bytes[USER_XSTATE_XCR0_WORD] = xstate_mask; | |
1431 | } | |
1432 | ||
070459d9 RM |
1433 | const struct user_regset_view *task_user_regset_view(struct task_struct *task) |
1434 | { | |
1435 | #ifdef CONFIG_IA32_EMULATION | |
1436 | if (test_tsk_thread_flag(task, TIF_IA32)) | |
1437 | #endif | |
1438 | #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION | |
1439 | return &user_x86_32_view; | |
1440 | #endif | |
1441 | #ifdef CONFIG_X86_64 | |
1442 | return &user_x86_64_view; | |
1443 | #endif | |
1444 | } | |
1445 | ||
7f38551f ON |
1446 | static void fill_sigtrap_info(struct task_struct *tsk, |
1447 | struct pt_regs *regs, | |
1448 | int error_code, int si_code, | |
1449 | struct siginfo *info) | |
1da177e4 | 1450 | { |
51e7dc70 | 1451 | tsk->thread.trap_nr = X86_TRAP_DB; |
1da177e4 LT |
1452 | tsk->thread.error_code = error_code; |
1453 | ||
7f38551f ON |
1454 | memset(info, 0, sizeof(*info)); |
1455 | info->si_signo = SIGTRAP; | |
1456 | info->si_code = si_code; | |
1457 | info->si_addr = user_mode_vm(regs) ? (void __user *)regs->ip : NULL; | |
1458 | } | |
1459 | ||
1460 | void user_single_step_siginfo(struct task_struct *tsk, | |
1461 | struct pt_regs *regs, | |
1462 | struct siginfo *info) | |
1463 | { | |
1464 | fill_sigtrap_info(tsk, regs, 0, TRAP_BRKPT, info); | |
1465 | } | |
1da177e4 | 1466 | |
7f38551f ON |
1467 | void send_sigtrap(struct task_struct *tsk, struct pt_regs *regs, |
1468 | int error_code, int si_code) | |
1469 | { | |
1470 | struct siginfo info; | |
1da177e4 | 1471 | |
7f38551f | 1472 | fill_sigtrap_info(tsk, regs, error_code, si_code, &info); |
27b46d76 | 1473 | /* Send us the fake SIGTRAP */ |
1da177e4 LT |
1474 | force_sig_info(SIGTRAP, &info, tsk); |
1475 | } | |
1476 | ||
86976cd8 | 1477 | |
d4d67150 RM |
1478 | #ifdef CONFIG_X86_32 |
1479 | # define IS_IA32 1 | |
1480 | #elif defined CONFIG_IA32_EMULATION | |
ccbe495c | 1481 | # define IS_IA32 is_compat_task() |
d4d67150 RM |
1482 | #else |
1483 | # define IS_IA32 0 | |
1484 | #endif | |
1485 | ||
1486 | /* | |
1487 | * We must return the syscall number to actually look up in the table. | |
1488 | * This can be -1L to skip running any syscall at all. | |
1489 | */ | |
1b4ac2a9 | 1490 | long syscall_trace_enter(struct pt_regs *regs) |
86976cd8 | 1491 | { |
d4d67150 RM |
1492 | long ret = 0; |
1493 | ||
bf5a3c13 FW |
1494 | rcu_user_exit(); |
1495 | ||
380fdd75 RM |
1496 | /* |
1497 | * If we stepped into a sysenter/syscall insn, it trapped in | |
1498 | * kernel mode; do_debug() cleared TF and set TIF_SINGLESTEP. | |
1499 | * If user-mode had set TF itself, then it's still clear from | |
1500 | * do_debug() and we need to set it again to restore the user | |
1501 | * state. If we entered on the slow path, TF was already set. | |
1502 | */ | |
1503 | if (test_thread_flag(TIF_SINGLESTEP)) | |
1504 | regs->flags |= X86_EFLAGS_TF; | |
1505 | ||
86976cd8 | 1506 | /* do the secure computing check first */ |
c6cfbeb4 WD |
1507 | if (secure_computing(regs->orig_ax)) { |
1508 | /* seccomp failures shouldn't expose any additional code. */ | |
1509 | ret = -1L; | |
1510 | goto out; | |
1511 | } | |
86976cd8 | 1512 | |
d4d67150 RM |
1513 | if (unlikely(test_thread_flag(TIF_SYSCALL_EMU))) |
1514 | ret = -1L; | |
1515 | ||
eeea3c3f RM |
1516 | if ((ret || test_thread_flag(TIF_SYSCALL_TRACE)) && |
1517 | tracehook_report_syscall_entry(regs)) | |
1518 | ret = -1L; | |
86976cd8 | 1519 | |
66700001 | 1520 | if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) |
1c569f02 | 1521 | trace_sys_enter(regs, regs->orig_ax); |
1b3fa2ce | 1522 | |
b05d8447 EP |
1523 | if (IS_IA32) |
1524 | audit_syscall_entry(AUDIT_ARCH_I386, | |
1525 | regs->orig_ax, | |
1526 | regs->bx, regs->cx, | |
1527 | regs->dx, regs->si); | |
d4d67150 | 1528 | #ifdef CONFIG_X86_64 |
b05d8447 EP |
1529 | else |
1530 | audit_syscall_entry(AUDIT_ARCH_X86_64, | |
1531 | regs->orig_ax, | |
1532 | regs->di, regs->si, | |
1533 | regs->dx, regs->r10); | |
d4d67150 | 1534 | #endif |
d4d67150 | 1535 | |
c6cfbeb4 | 1536 | out: |
d4d67150 | 1537 | return ret ?: regs->orig_ax; |
86976cd8 RM |
1538 | } |
1539 | ||
1b4ac2a9 | 1540 | void syscall_trace_leave(struct pt_regs *regs) |
86976cd8 | 1541 | { |
d5196503 ON |
1542 | bool step; |
1543 | ||
2c5594df FW |
1544 | /* |
1545 | * We may come here right after calling schedule_user() | |
1546 | * or do_notify_resume(), in which case we can be in RCU | |
1547 | * user mode. | |
1548 | */ | |
1549 | rcu_user_exit(); | |
1550 | ||
d7e7528b | 1551 | audit_syscall_exit(regs); |
86976cd8 | 1552 | |
66700001 | 1553 | if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) |
1c569f02 | 1554 | trace_sys_exit(regs, regs->ax); |
1b3fa2ce | 1555 | |
d4d67150 RM |
1556 | /* |
1557 | * If TIF_SYSCALL_EMU is set, we only get here because of | |
1558 | * TIF_SINGLESTEP (i.e. this is PTRACE_SYSEMU_SINGLESTEP). | |
1559 | * We already reported this syscall instruction in | |
d5196503 | 1560 | * syscall_trace_enter(). |
d4d67150 | 1561 | */ |
d5196503 ON |
1562 | step = unlikely(test_thread_flag(TIF_SINGLESTEP)) && |
1563 | !test_thread_flag(TIF_SYSCALL_EMU); | |
1564 | if (step || test_thread_flag(TIF_SYSCALL_TRACE)) | |
1565 | tracehook_report_syscall_exit(regs, step); | |
bf5a3c13 FW |
1566 | |
1567 | rcu_user_enter(); | |
d4d67150 | 1568 | } |