Merge master.kernel.org:/home/rmk/linux-2.6-arm
[deliverable/linux.git] / arch / x86 / kernel / reboot.c
CommitLineData
1da177e4 1#include <linux/module.h>
cd6ed525 2#include <linux/reboot.h>
4d022e35
MB
3#include <linux/init.h>
4#include <linux/pm.h>
5#include <linux/efi.h>
6c6c51e4 6#include <linux/dmi.h>
d43c36dc 7#include <linux/sched.h>
69575d38 8#include <linux/tboot.h>
4d022e35
MB
9#include <acpi/reboot.h>
10#include <asm/io.h>
1da177e4 11#include <asm/apic.h>
4d37e7e3 12#include <asm/desc.h>
4d022e35 13#include <asm/hpet.h>
68db065c 14#include <asm/pgtable.h>
4412620f 15#include <asm/proto.h>
973efae2 16#include <asm/reboot_fixups.h>
07f3331c 17#include <asm/reboot.h>
82487711 18#include <asm/pci_x86.h>
d176720d 19#include <asm/virtext.h>
96b89dc6 20#include <asm/cpu.h>
1da177e4 21
4d022e35 22#ifdef CONFIG_X86_32
4d022e35
MB
23# include <linux/ctype.h>
24# include <linux/mc146818rtc.h>
4d022e35 25#else
338bac52 26# include <asm/x86_init.h>
4d022e35
MB
27#endif
28
1da177e4
LT
29/*
30 * Power off function, if any
31 */
32void (*pm_power_off)(void);
129f6946 33EXPORT_SYMBOL(pm_power_off);
1da177e4 34
ebdd561a 35static const struct desc_ptr no_idt = {};
1da177e4 36static int reboot_mode;
8d00450d 37enum reboot_type reboot_type = BOOT_KBD;
4d022e35 38int reboot_force;
1da177e4 39
4d022e35 40#if defined(CONFIG_X86_32) && defined(CONFIG_SMP)
1da177e4 41static int reboot_cpu = -1;
1da177e4 42#endif
4d022e35 43
d176720d
EH
44/* This is set if we need to go through the 'emergency' path.
45 * When machine_emergency_restart() is called, we may be on
46 * an inconsistent state and won't be able to do a clean cleanup
47 */
48static int reboot_emergency;
49
14d7ca5c
PA
50/* This is set by the PCI code if either type 1 or type 2 PCI is detected */
51bool port_cf9_safe = false;
52
53/* reboot=b[ios] | s[mp] | t[riple] | k[bd] | e[fi] [, [w]arm | [c]old] | p[ci]
4d022e35
MB
54 warm Don't set the cold reboot flag
55 cold Set the cold reboot flag
56 bios Reboot by jumping through the BIOS (only for X86_32)
57 smp Reboot by executing reset on BSP or other CPU (only for X86_32)
58 triple Force a triple fault (init)
59 kbd Use the keyboard controller. cold reset (default)
60 acpi Use the RESET_REG in the FADT
61 efi Use efi reset_system runtime service
14d7ca5c 62 pci Use the so-called "PCI reset register", CF9
4d022e35
MB
63 force Avoid anything that could hang.
64 */
1da177e4
LT
65static int __init reboot_setup(char *str)
66{
4d022e35 67 for (;;) {
1da177e4 68 switch (*str) {
4d022e35 69 case 'w':
1da177e4
LT
70 reboot_mode = 0x1234;
71 break;
4d022e35
MB
72
73 case 'c':
74 reboot_mode = 0;
1da177e4 75 break;
4d022e35
MB
76
77#ifdef CONFIG_X86_32
1da177e4 78#ifdef CONFIG_SMP
4d022e35 79 case 's':
6f673d83 80 if (isdigit(*(str+1))) {
1da177e4 81 reboot_cpu = (int) (*(str+1) - '0');
6f673d83 82 if (isdigit(*(str+2)))
1da177e4
LT
83 reboot_cpu = reboot_cpu*10 + (int)(*(str+2) - '0');
84 }
4d022e35
MB
85 /* we will leave sorting out the final value
86 when we are ready to reboot, since we might not
87 have set up boot_cpu_id or smp_num_cpu */
1da177e4 88 break;
4d022e35
MB
89#endif /* CONFIG_SMP */
90
91 case 'b':
1da177e4 92#endif
4d022e35
MB
93 case 'a':
94 case 'k':
95 case 't':
96 case 'e':
14d7ca5c 97 case 'p':
4d022e35
MB
98 reboot_type = *str;
99 break;
100
101 case 'f':
102 reboot_force = 1;
103 break;
1da177e4 104 }
4d022e35
MB
105
106 str = strchr(str, ',');
107 if (str)
1da177e4
LT
108 str++;
109 else
110 break;
111 }
112 return 1;
113}
114
115__setup("reboot=", reboot_setup);
116
4d022e35
MB
117
118#ifdef CONFIG_X86_32
1da177e4
LT
119/*
120 * Reboot options and system auto-detection code provided by
121 * Dell Inc. so their systems "just work". :-)
122 */
123
124/*
4d022e35
MB
125 * Some machines require the "reboot=b" commandline option,
126 * this quirk makes that automatic.
1da177e4 127 */
1855256c 128static int __init set_bios_reboot(const struct dmi_system_id *d)
1da177e4 129{
4d022e35
MB
130 if (reboot_type != BOOT_BIOS) {
131 reboot_type = BOOT_BIOS;
1da177e4
LT
132 printk(KERN_INFO "%s series board detected. Selecting BIOS-method for reboots.\n", d->ident);
133 }
134 return 0;
135}
136
1da177e4 137static struct dmi_system_id __initdata reboot_dmi_table[] = {
b9e82af8
TG
138 { /* Handle problems with rebooting on Dell E520's */
139 .callback = set_bios_reboot,
140 .ident = "Dell E520",
141 .matches = {
142 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
143 DMI_MATCH(DMI_PRODUCT_NAME, "Dell DM061"),
144 },
145 },
1da177e4 146 { /* Handle problems with rebooting on Dell 1300's */
dd2a1305 147 .callback = set_bios_reboot,
1da177e4
LT
148 .ident = "Dell PowerEdge 1300",
149 .matches = {
150 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
151 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1300/"),
152 },
153 },
154 { /* Handle problems with rebooting on Dell 300's */
155 .callback = set_bios_reboot,
156 .ident = "Dell PowerEdge 300",
157 .matches = {
158 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
159 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 300/"),
160 },
161 },
df2edcf3
JJ
162 { /* Handle problems with rebooting on Dell Optiplex 745's SFF*/
163 .callback = set_bios_reboot,
164 .ident = "Dell OptiPlex 745",
165 .matches = {
166 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
167 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"),
df2edcf3
JJ
168 },
169 },
fc115bf1
CK
170 { /* Handle problems with rebooting on Dell Optiplex 745's DFF*/
171 .callback = set_bios_reboot,
172 .ident = "Dell OptiPlex 745",
173 .matches = {
174 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
175 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"),
176 DMI_MATCH(DMI_BOARD_NAME, "0MM599"),
177 },
178 },
fc1c8925
HAA
179 { /* Handle problems with rebooting on Dell Optiplex 745 with 0KW626 */
180 .callback = set_bios_reboot,
181 .ident = "Dell OptiPlex 745",
182 .matches = {
183 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
184 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"),
185 DMI_MATCH(DMI_BOARD_NAME, "0KW626"),
186 },
187 },
093bac15
SC
188 { /* Handle problems with rebooting on Dell Optiplex 330 with 0KP561 */
189 .callback = set_bios_reboot,
190 .ident = "Dell OptiPlex 330",
191 .matches = {
192 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
193 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 330"),
194 DMI_MATCH(DMI_BOARD_NAME, "0KP561"),
195 },
196 },
4a4aca64
JD
197 { /* Handle problems with rebooting on Dell Optiplex 360 with 0T656F */
198 .callback = set_bios_reboot,
199 .ident = "Dell OptiPlex 360",
200 .matches = {
201 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
202 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 360"),
203 DMI_MATCH(DMI_BOARD_NAME, "0T656F"),
204 },
205 },
1da177e4
LT
206 { /* Handle problems with rebooting on Dell 2400's */
207 .callback = set_bios_reboot,
208 .ident = "Dell PowerEdge 2400",
209 .matches = {
210 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
211 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2400"),
212 },
213 },
fab3b58d
IM
214 { /* Handle problems with rebooting on Dell T5400's */
215 .callback = set_bios_reboot,
216 .ident = "Dell Precision T5400",
217 .matches = {
218 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
219 DMI_MATCH(DMI_PRODUCT_NAME, "Precision WorkStation T5400"),
220 },
221 },
766c3f94 222 { /* Handle problems with rebooting on HP laptops */
d91b14c4 223 .callback = set_bios_reboot,
766c3f94 224 .ident = "HP Compaq Laptop",
d91b14c4
TV
225 .matches = {
226 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
766c3f94 227 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq"),
d91b14c4
TV
228 },
229 },
dd4124a8
LO
230 { /* Handle problems with rebooting on Dell XPS710 */
231 .callback = set_bios_reboot,
232 .ident = "Dell XPS710",
233 .matches = {
234 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
235 DMI_MATCH(DMI_PRODUCT_NAME, "Dell XPS710"),
236 },
237 },
c5da9a2b
AC
238 { /* Handle problems with rebooting on Dell DXP061 */
239 .callback = set_bios_reboot,
240 .ident = "Dell DXP061",
241 .matches = {
242 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
243 DMI_MATCH(DMI_PRODUCT_NAME, "Dell DXP061"),
244 },
245 },
88dff493
ZR
246 { /* Handle problems with rebooting on Sony VGN-Z540N */
247 .callback = set_bios_reboot,
248 .ident = "Sony VGN-Z540N",
249 .matches = {
250 DMI_MATCH(DMI_SYS_VENDOR, "Sony Corporation"),
251 DMI_MATCH(DMI_PRODUCT_NAME, "VGN-Z540N"),
252 },
253 },
77f32dfd
DT
254 { /* Handle problems with rebooting on CompuLab SBC-FITPC2 */
255 .callback = set_bios_reboot,
256 .ident = "CompuLab SBC-FITPC2",
257 .matches = {
258 DMI_MATCH(DMI_SYS_VENDOR, "CompuLab"),
259 DMI_MATCH(DMI_PRODUCT_NAME, "SBC-FITPC2"),
260 },
261 },
4832ddda
LO
262 { /* Handle problems with rebooting on ASUS P4S800 */
263 .callback = set_bios_reboot,
264 .ident = "ASUS P4S800",
265 .matches = {
266 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
267 DMI_MATCH(DMI_BOARD_NAME, "P4S800"),
268 },
269 },
1da177e4
LT
270 { }
271};
272
273static int __init reboot_init(void)
274{
275 dmi_check_system(reboot_dmi_table);
276 return 0;
277}
1da177e4
LT
278core_initcall(reboot_init);
279
280/* The following code and data reboots the machine by switching to real
281 mode and jumping to the BIOS reset entry point, as if the CPU has
282 really been reset. The previous version asked the keyboard
283 controller to pulse the CPU reset line, which is more thorough, but
284 doesn't work with at least one type of 486 motherboard. It is easy
285 to stop this code working; hence the copious comments. */
ebdd561a 286static const unsigned long long
1da177e4
LT
287real_mode_gdt_entries [3] =
288{
289 0x0000000000000000ULL, /* Null descriptor */
ebdd561a
JB
290 0x00009b000000ffffULL, /* 16-bit real-mode 64k code at 0x00000000 */
291 0x000093000100ffffULL /* 16-bit real-mode 64k data at 0x00000100 */
1da177e4
LT
292};
293
ebdd561a 294static const struct desc_ptr
05f4a3ec 295real_mode_gdt = { sizeof (real_mode_gdt_entries) - 1, (long)real_mode_gdt_entries },
4d022e35 296real_mode_idt = { 0x3ff, 0 };
1da177e4
LT
297
298/* This is 16-bit protected mode code to disable paging and the cache,
299 switch to real mode and jump to the BIOS reset code.
300
301 The instruction that switches to real mode by writing to CR0 must be
302 followed immediately by a far jump instruction, which set CS to a
303 valid value for real mode, and flushes the prefetch queue to avoid
304 running instructions that have already been decoded in protected
305 mode.
306
307 Clears all the flags except ET, especially PG (paging), PE
308 (protected-mode enable) and TS (task switch for coprocessor state
309 save). Flushes the TLB after paging has been disabled. Sets CD and
310 NW, to disable the cache on a 486, and invalidates the cache. This
311 is more like the state of a 486 after reset. I don't know if
312 something else should be done for other chips.
313
314 More could be done here to set up the registers as if a CPU reset had
315 occurred; hopefully real BIOSs don't assume much. */
ebdd561a 316static const unsigned char real_mode_switch [] =
1da177e4
LT
317{
318 0x66, 0x0f, 0x20, 0xc0, /* movl %cr0,%eax */
319 0x66, 0x83, 0xe0, 0x11, /* andl $0x00000011,%eax */
320 0x66, 0x0d, 0x00, 0x00, 0x00, 0x60, /* orl $0x60000000,%eax */
321 0x66, 0x0f, 0x22, 0xc0, /* movl %eax,%cr0 */
322 0x66, 0x0f, 0x22, 0xd8, /* movl %eax,%cr3 */
323 0x66, 0x0f, 0x20, 0xc3, /* movl %cr0,%ebx */
324 0x66, 0x81, 0xe3, 0x00, 0x00, 0x00, 0x60, /* andl $0x60000000,%ebx */
325 0x74, 0x02, /* jz f */
326 0x0f, 0x09, /* wbinvd */
327 0x24, 0x10, /* f: andb $0x10,al */
328 0x66, 0x0f, 0x22, 0xc0 /* movl %eax,%cr0 */
329};
ebdd561a 330static const unsigned char jump_to_bios [] =
1da177e4
LT
331{
332 0xea, 0x00, 0x00, 0xff, 0xff /* ljmp $0xffff,$0x0000 */
333};
334
335/*
336 * Switch to real mode and then execute the code
337 * specified by the code and length parameters.
338 * We assume that length will aways be less that 100!
339 */
ebdd561a 340void machine_real_restart(const unsigned char *code, int length)
1da177e4 341{
1da177e4
LT
342 local_irq_disable();
343
344 /* Write zero to CMOS register number 0x0f, which the BIOS POST
345 routine will recognize as telling it to do a proper reboot. (Well
346 that's what this book in front of me says -- it may only apply to
347 the Phoenix BIOS though, it's not clear). At the same time,
348 disable NMIs by setting the top bit in the CMOS address register,
349 as we're about to do peculiar things to the CPU. I'm not sure if
350 `outb_p' is needed instead of just `outb'. Use it to be on the
351 safe side. (Yes, CMOS_WRITE does outb_p's. - Paul G.)
352 */
62dbc210 353 spin_lock(&rtc_lock);
1da177e4 354 CMOS_WRITE(0x00, 0x8f);
62dbc210 355 spin_unlock(&rtc_lock);
1da177e4
LT
356
357 /* Remap the kernel at virtual address zero, as well as offset zero
358 from the kernel segment. This assumes the kernel segment starts at
359 virtual address PAGE_OFFSET. */
68db065c 360 memcpy(swapper_pg_dir, swapper_pg_dir + KERNEL_PGD_BOUNDARY,
4d022e35 361 sizeof(swapper_pg_dir [0]) * KERNEL_PGD_PTRS);
1da177e4
LT
362
363 /*
364 * Use `swapper_pg_dir' as our page directory.
365 */
366 load_cr3(swapper_pg_dir);
367
368 /* Write 0x1234 to absolute memory location 0x472. The BIOS reads
369 this on booting to tell it to "Bypass memory test (also warm
370 boot)". This seems like a fairly standard thing that gets set by
371 REBOOT.COM programs, and the previous reset routine did this
372 too. */
1da177e4
LT
373 *((unsigned short *)0x472) = reboot_mode;
374
375 /* For the switch to real mode, copy some code to low memory. It has
376 to be in the first 64k because it is running in 16-bit mode, and it
377 has to have the same physical and virtual address, because it turns
378 off paging. Copy it near the end of the first page, out of the way
379 of BIOS variables. */
4d022e35 380 memcpy((void *)(0x1000 - sizeof(real_mode_switch) - 100),
1da177e4 381 real_mode_switch, sizeof (real_mode_switch));
4d022e35 382 memcpy((void *)(0x1000 - 100), code, length);
1da177e4
LT
383
384 /* Set up the IDT for real mode. */
4d37e7e3 385 load_idt(&real_mode_idt);
1da177e4
LT
386
387 /* Set up a GDT from which we can load segment descriptors for real
388 mode. The GDT is not used in real mode; it is just needed here to
389 prepare the descriptors. */
4d37e7e3 390 load_gdt(&real_mode_gdt);
1da177e4
LT
391
392 /* Load the data segment registers, and thus the descriptors ready for
393 real mode. The base address of each segment is 0x100, 16 times the
394 selector value being loaded here. This is so that the segment
395 registers don't have to be reloaded after switching to real mode:
396 the values are consistent for real mode operation already. */
1da177e4
LT
397 __asm__ __volatile__ ("movl $0x0010,%%eax\n"
398 "\tmovl %%eax,%%ds\n"
399 "\tmovl %%eax,%%es\n"
400 "\tmovl %%eax,%%fs\n"
401 "\tmovl %%eax,%%gs\n"
402 "\tmovl %%eax,%%ss" : : : "eax");
403
404 /* Jump to the 16-bit code that we copied earlier. It disables paging
405 and the cache, switches to real mode, and jumps to the BIOS reset
406 entry point. */
1da177e4
LT
407 __asm__ __volatile__ ("ljmp $0x0008,%0"
408 :
4d022e35 409 : "i" ((void *)(0x1000 - sizeof (real_mode_switch) - 100)));
1da177e4 410}
129f6946
AD
411#ifdef CONFIG_APM_MODULE
412EXPORT_SYMBOL(machine_real_restart);
413#endif
1da177e4 414
4d022e35
MB
415#endif /* CONFIG_X86_32 */
416
6c6c51e4 417/*
498cdbfb 418 * Some Apple MacBook and MacBookPro's needs reboot=p to be able to reboot
6c6c51e4
PM
419 */
420static int __init set_pci_reboot(const struct dmi_system_id *d)
421{
422 if (reboot_type != BOOT_CF9) {
423 reboot_type = BOOT_CF9;
424 printk(KERN_INFO "%s series board detected. "
425 "Selecting PCI-method for reboots.\n", d->ident);
426 }
427 return 0;
428}
429
430static struct dmi_system_id __initdata pci_reboot_dmi_table[] = {
3e03bbea 431 { /* Handle problems with rebooting on Apple MacBook5 */
6c6c51e4 432 .callback = set_pci_reboot,
3e03bbea 433 .ident = "Apple MacBook5",
6c6c51e4
PM
434 .matches = {
435 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
3e03bbea 436 DMI_MATCH(DMI_PRODUCT_NAME, "MacBook5"),
6c6c51e4
PM
437 },
438 },
3e03bbea 439 { /* Handle problems with rebooting on Apple MacBookPro5 */
498cdbfb 440 .callback = set_pci_reboot,
3e03bbea 441 .ident = "Apple MacBookPro5",
498cdbfb
OÇ
442 .matches = {
443 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
3e03bbea 444 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro5"),
498cdbfb
OÇ
445 },
446 },
05154752
GH
447 { /* Handle problems with rebooting on Apple Macmini3,1 */
448 .callback = set_pci_reboot,
449 .ident = "Apple Macmini3,1",
450 .matches = {
451 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
452 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini3,1"),
453 },
454 },
6c6c51e4
PM
455 { }
456};
457
458static int __init pci_reboot_init(void)
459{
460 dmi_check_system(pci_reboot_dmi_table);
461 return 0;
462}
463core_initcall(pci_reboot_init);
464
4d022e35
MB
465static inline void kb_wait(void)
466{
467 int i;
468
c84d6af8
AC
469 for (i = 0; i < 0x10000; i++) {
470 if ((inb(0x64) & 0x02) == 0)
4d022e35 471 break;
c84d6af8
AC
472 udelay(2);
473 }
4d022e35
MB
474}
475
d176720d
EH
476static void vmxoff_nmi(int cpu, struct die_args *args)
477{
478 cpu_emergency_vmxoff();
479}
480
481/* Use NMIs as IPIs to tell all CPUs to disable virtualization
482 */
483static void emergency_vmx_disable_all(void)
484{
485 /* Just make sure we won't change CPUs while doing this */
486 local_irq_disable();
487
488 /* We need to disable VMX on all CPUs before rebooting, otherwise
489 * we risk hanging up the machine, because the CPU ignore INIT
490 * signals when VMX is enabled.
491 *
492 * We can't take any locks and we may be on an inconsistent
493 * state, so we use NMIs as IPIs to tell the other CPUs to disable
494 * VMX and halt.
495 *
496 * For safety, we will avoid running the nmi_shootdown_cpus()
497 * stuff unnecessarily, but we don't have a way to check
498 * if other CPUs have VMX enabled. So we will call it only if the
499 * CPU we are running on has VMX enabled.
500 *
501 * We will miss cases where VMX is not enabled on all CPUs. This
502 * shouldn't do much harm because KVM always enable VMX on all
503 * CPUs anyway. But we can miss it on the small window where KVM
504 * is still enabling VMX.
505 */
506 if (cpu_has_vmx() && cpu_vmx_enabled()) {
507 /* Disable VMX on this CPU.
508 */
509 cpu_vmxoff();
510
511 /* Halt and disable VMX on the other CPUs */
512 nmi_shootdown_cpus(vmxoff_nmi);
513
514 }
515}
516
517
7432d149
IM
518void __attribute__((weak)) mach_reboot_fixups(void)
519{
520}
521
416e2d63 522static void native_machine_emergency_restart(void)
1da177e4 523{
4d022e35
MB
524 int i;
525
d176720d
EH
526 if (reboot_emergency)
527 emergency_vmx_disable_all();
528
840c2baf
JC
529 tboot_shutdown(TB_SHUTDOWN_REBOOT);
530
4d022e35
MB
531 /* Tell the BIOS if we want cold or warm reboot */
532 *((unsigned short *)__va(0x472)) = reboot_mode;
533
534 for (;;) {
535 /* Could also try the reset bit in the Hammer NB */
536 switch (reboot_type) {
537 case BOOT_KBD:
7432d149
IM
538 mach_reboot_fixups(); /* for board specific fixups */
539
4d022e35
MB
540 for (i = 0; i < 10; i++) {
541 kb_wait();
542 udelay(50);
543 outb(0xfe, 0x64); /* pulse reset low */
544 udelay(50);
545 }
546
547 case BOOT_TRIPLE:
ebdd561a 548 load_idt(&no_idt);
4d022e35
MB
549 __asm__ __volatile__("int3");
550
551 reboot_type = BOOT_KBD;
552 break;
553
554#ifdef CONFIG_X86_32
555 case BOOT_BIOS:
556 machine_real_restart(jump_to_bios, sizeof(jump_to_bios));
557
558 reboot_type = BOOT_KBD;
559 break;
560#endif
561
562 case BOOT_ACPI:
563 acpi_reboot();
564 reboot_type = BOOT_KBD;
565 break;
566
4d022e35
MB
567 case BOOT_EFI:
568 if (efi_enabled)
14d7ca5c
PA
569 efi.reset_system(reboot_mode ?
570 EFI_RESET_WARM :
571 EFI_RESET_COLD,
4d022e35 572 EFI_SUCCESS, 0, NULL);
b47b9288 573 reboot_type = BOOT_KBD;
14d7ca5c 574 break;
4d022e35 575
14d7ca5c
PA
576 case BOOT_CF9:
577 port_cf9_safe = true;
578 /* fall through */
4d022e35 579
14d7ca5c
PA
580 case BOOT_CF9_COND:
581 if (port_cf9_safe) {
582 u8 cf9 = inb(0xcf9) & ~6;
583 outb(cf9|2, 0xcf9); /* Request hard reset */
584 udelay(50);
585 outb(cf9|6, 0xcf9); /* Actually do the reset */
586 udelay(50);
587 }
4d022e35
MB
588 reboot_type = BOOT_KBD;
589 break;
590 }
591 }
592}
593
3c62c625 594void native_machine_shutdown(void)
4d022e35
MB
595{
596 /* Stop the cpus and apics */
1da177e4 597#ifdef CONFIG_SMP
dd2a1305
EB
598
599 /* The boot cpu is always logical cpu 0 */
65c01184 600 int reboot_cpu_id = 0;
dd2a1305 601
4d022e35 602#ifdef CONFIG_X86_32
dd2a1305 603 /* See if there has been given a command line override */
9628937d 604 if ((reboot_cpu != -1) && (reboot_cpu < nr_cpu_ids) &&
0bc3cc03 605 cpu_online(reboot_cpu))
dd2a1305 606 reboot_cpu_id = reboot_cpu;
4d022e35 607#endif
1da177e4 608
4d022e35 609 /* Make certain the cpu I'm about to reboot on is online */
0bc3cc03 610 if (!cpu_online(reboot_cpu_id))
dd2a1305 611 reboot_cpu_id = smp_processor_id();
dd2a1305
EB
612
613 /* Make certain I only run on the appropriate processor */
9628937d 614 set_cpus_allowed_ptr(current, cpumask_of(reboot_cpu_id));
dd2a1305 615
4d022e35
MB
616 /* O.K Now that I'm on the appropriate processor,
617 * stop all of the others.
1da177e4
LT
618 */
619 smp_send_stop();
4d022e35 620#endif
1da177e4
LT
621
622 lapic_shutdown();
623
624#ifdef CONFIG_X86_IO_APIC
625 disable_IO_APIC();
626#endif
4d022e35 627
c86c7fbc
OH
628#ifdef CONFIG_HPET_TIMER
629 hpet_disable();
630#endif
dd2a1305 631
4d022e35 632#ifdef CONFIG_X86_64
338bac52 633 x86_platform.iommu_shutdown();
4d022e35 634#endif
973efae2
JF
635}
636
d176720d
EH
637static void __machine_emergency_restart(int emergency)
638{
639 reboot_emergency = emergency;
640 machine_ops.emergency_restart();
641}
642
416e2d63 643static void native_machine_restart(char *__unused)
dd2a1305 644{
4d022e35 645 printk("machine restart\n");
1da177e4 646
4d022e35
MB
647 if (!reboot_force)
648 machine_shutdown();
d176720d 649 __machine_emergency_restart(0);
4a1421f8
EB
650}
651
416e2d63 652static void native_machine_halt(void)
1da177e4 653{
d3ec5cae
IV
654 /* stop other cpus and apics */
655 machine_shutdown();
656
840c2baf
JC
657 tboot_shutdown(TB_SHUTDOWN_HALT);
658
d3ec5cae
IV
659 /* stop this cpu */
660 stop_this_cpu(NULL);
1da177e4
LT
661}
662
416e2d63 663static void native_machine_power_off(void)
1da177e4 664{
6e3fbee5 665 if (pm_power_off) {
4d022e35
MB
666 if (!reboot_force)
667 machine_shutdown();
1da177e4 668 pm_power_off();
6e3fbee5 669 }
840c2baf
JC
670 /* a fallback in case there is no PM info available */
671 tboot_shutdown(TB_SHUTDOWN_HALT);
1da177e4
LT
672}
673
07f3331c 674struct machine_ops machine_ops = {
416e2d63
JB
675 .power_off = native_machine_power_off,
676 .shutdown = native_machine_shutdown,
677 .emergency_restart = native_machine_emergency_restart,
678 .restart = native_machine_restart,
ed23dc6f
GC
679 .halt = native_machine_halt,
680#ifdef CONFIG_KEXEC
681 .crash_shutdown = native_machine_crash_shutdown,
682#endif
07f3331c 683};
416e2d63
JB
684
685void machine_power_off(void)
686{
687 machine_ops.power_off();
688}
689
690void machine_shutdown(void)
691{
692 machine_ops.shutdown();
693}
694
695void machine_emergency_restart(void)
696{
d176720d 697 __machine_emergency_restart(1);
416e2d63
JB
698}
699
700void machine_restart(char *cmd)
701{
702 machine_ops.restart(cmd);
703}
704
705void machine_halt(void)
706{
707 machine_ops.halt();
708}
709
ed23dc6f
GC
710#ifdef CONFIG_KEXEC
711void machine_crash_shutdown(struct pt_regs *regs)
712{
713 machine_ops.crash_shutdown(regs);
714}
715#endif
2ddded21
EH
716
717
bb8dd270 718#if defined(CONFIG_SMP)
2ddded21
EH
719
720/* This keeps a track of which one is crashing cpu. */
721static int crashing_cpu;
722static nmi_shootdown_cb shootdown_callback;
723
724static atomic_t waiting_for_crash_ipi;
725
726static int crash_nmi_callback(struct notifier_block *self,
727 unsigned long val, void *data)
728{
729 int cpu;
730
731 if (val != DIE_NMI_IPI)
732 return NOTIFY_OK;
733
734 cpu = raw_smp_processor_id();
735
736 /* Don't do anything if this handler is invoked on crashing cpu.
737 * Otherwise, system will completely hang. Crashing cpu can get
738 * an NMI if system was initially booted with nmi_watchdog parameter.
739 */
740 if (cpu == crashing_cpu)
741 return NOTIFY_STOP;
742 local_irq_disable();
743
744 shootdown_callback(cpu, (struct die_args *)data);
745
746 atomic_dec(&waiting_for_crash_ipi);
747 /* Assume hlt works */
748 halt();
749 for (;;)
750 cpu_relax();
751
752 return 1;
753}
754
755static void smp_send_nmi_allbutself(void)
756{
dac5f412 757 apic->send_IPI_allbutself(NMI_VECTOR);
2ddded21
EH
758}
759
760static struct notifier_block crash_nmi_nb = {
761 .notifier_call = crash_nmi_callback,
762};
763
bb8dd270
EH
764/* Halt all other CPUs, calling the specified function on each of them
765 *
766 * This function can be used to halt all other CPUs on crash
767 * or emergency reboot time. The function passed as parameter
768 * will be called inside a NMI handler on all CPUs.
769 */
2ddded21
EH
770void nmi_shootdown_cpus(nmi_shootdown_cb callback)
771{
772 unsigned long msecs;
c415b3dc 773 local_irq_disable();
2ddded21
EH
774
775 /* Make a note of crashing cpu. Will be used in NMI callback.*/
776 crashing_cpu = safe_smp_processor_id();
777
778 shootdown_callback = callback;
779
780 atomic_set(&waiting_for_crash_ipi, num_online_cpus() - 1);
781 /* Would it be better to replace the trap vector here? */
782 if (register_die_notifier(&crash_nmi_nb))
783 return; /* return what? */
784 /* Ensure the new callback function is set before sending
785 * out the NMI
786 */
787 wmb();
788
789 smp_send_nmi_allbutself();
790
791 msecs = 1000; /* Wait at most a second for the other cpus to stop */
792 while ((atomic_read(&waiting_for_crash_ipi) > 0) && msecs) {
793 mdelay(1);
794 msecs--;
795 }
796
797 /* Leave the nmi callback set */
798}
bb8dd270
EH
799#else /* !CONFIG_SMP */
800void nmi_shootdown_cpus(nmi_shootdown_cb callback)
801{
802 /* No other CPUs to shoot down */
803}
2ddded21 804#endif
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