Commit | Line | Data |
---|---|---|
1da177e4 | 1 | #include <linux/module.h> |
cd6ed525 | 2 | #include <linux/reboot.h> |
4d022e35 MB |
3 | #include <linux/init.h> |
4 | #include <linux/pm.h> | |
5 | #include <linux/efi.h> | |
6c6c51e4 | 6 | #include <linux/dmi.h> |
d43c36dc | 7 | #include <linux/sched.h> |
69575d38 | 8 | #include <linux/tboot.h> |
4d022e35 MB |
9 | #include <acpi/reboot.h> |
10 | #include <asm/io.h> | |
1da177e4 | 11 | #include <asm/apic.h> |
4d37e7e3 | 12 | #include <asm/desc.h> |
4d022e35 | 13 | #include <asm/hpet.h> |
68db065c | 14 | #include <asm/pgtable.h> |
4412620f | 15 | #include <asm/proto.h> |
973efae2 | 16 | #include <asm/reboot_fixups.h> |
07f3331c | 17 | #include <asm/reboot.h> |
82487711 | 18 | #include <asm/pci_x86.h> |
d176720d | 19 | #include <asm/virtext.h> |
96b89dc6 | 20 | #include <asm/cpu.h> |
1da177e4 | 21 | |
4d022e35 | 22 | #ifdef CONFIG_X86_32 |
4d022e35 MB |
23 | # include <linux/ctype.h> |
24 | # include <linux/mc146818rtc.h> | |
4d022e35 | 25 | #else |
338bac52 | 26 | # include <asm/x86_init.h> |
4d022e35 MB |
27 | #endif |
28 | ||
1da177e4 LT |
29 | /* |
30 | * Power off function, if any | |
31 | */ | |
32 | void (*pm_power_off)(void); | |
129f6946 | 33 | EXPORT_SYMBOL(pm_power_off); |
1da177e4 | 34 | |
ebdd561a | 35 | static const struct desc_ptr no_idt = {}; |
1da177e4 | 36 | static int reboot_mode; |
8d00450d | 37 | enum reboot_type reboot_type = BOOT_KBD; |
4d022e35 | 38 | int reboot_force; |
1da177e4 | 39 | |
4d022e35 | 40 | #if defined(CONFIG_X86_32) && defined(CONFIG_SMP) |
1da177e4 | 41 | static int reboot_cpu = -1; |
1da177e4 | 42 | #endif |
4d022e35 | 43 | |
d176720d EH |
44 | /* This is set if we need to go through the 'emergency' path. |
45 | * When machine_emergency_restart() is called, we may be on | |
46 | * an inconsistent state and won't be able to do a clean cleanup | |
47 | */ | |
48 | static int reboot_emergency; | |
49 | ||
14d7ca5c PA |
50 | /* This is set by the PCI code if either type 1 or type 2 PCI is detected */ |
51 | bool port_cf9_safe = false; | |
52 | ||
53 | /* reboot=b[ios] | s[mp] | t[riple] | k[bd] | e[fi] [, [w]arm | [c]old] | p[ci] | |
4d022e35 MB |
54 | warm Don't set the cold reboot flag |
55 | cold Set the cold reboot flag | |
56 | bios Reboot by jumping through the BIOS (only for X86_32) | |
57 | smp Reboot by executing reset on BSP or other CPU (only for X86_32) | |
58 | triple Force a triple fault (init) | |
59 | kbd Use the keyboard controller. cold reset (default) | |
60 | acpi Use the RESET_REG in the FADT | |
61 | efi Use efi reset_system runtime service | |
14d7ca5c | 62 | pci Use the so-called "PCI reset register", CF9 |
4d022e35 MB |
63 | force Avoid anything that could hang. |
64 | */ | |
1da177e4 LT |
65 | static int __init reboot_setup(char *str) |
66 | { | |
4d022e35 | 67 | for (;;) { |
1da177e4 | 68 | switch (*str) { |
4d022e35 | 69 | case 'w': |
1da177e4 LT |
70 | reboot_mode = 0x1234; |
71 | break; | |
4d022e35 MB |
72 | |
73 | case 'c': | |
74 | reboot_mode = 0; | |
1da177e4 | 75 | break; |
4d022e35 MB |
76 | |
77 | #ifdef CONFIG_X86_32 | |
1da177e4 | 78 | #ifdef CONFIG_SMP |
4d022e35 | 79 | case 's': |
6f673d83 | 80 | if (isdigit(*(str+1))) { |
1da177e4 | 81 | reboot_cpu = (int) (*(str+1) - '0'); |
6f673d83 | 82 | if (isdigit(*(str+2))) |
1da177e4 LT |
83 | reboot_cpu = reboot_cpu*10 + (int)(*(str+2) - '0'); |
84 | } | |
4d022e35 MB |
85 | /* we will leave sorting out the final value |
86 | when we are ready to reboot, since we might not | |
f6e9456c | 87 | have detected BSP APIC ID or smp_num_cpu */ |
1da177e4 | 88 | break; |
4d022e35 MB |
89 | #endif /* CONFIG_SMP */ |
90 | ||
91 | case 'b': | |
1da177e4 | 92 | #endif |
4d022e35 MB |
93 | case 'a': |
94 | case 'k': | |
95 | case 't': | |
96 | case 'e': | |
14d7ca5c | 97 | case 'p': |
4d022e35 MB |
98 | reboot_type = *str; |
99 | break; | |
100 | ||
101 | case 'f': | |
102 | reboot_force = 1; | |
103 | break; | |
1da177e4 | 104 | } |
4d022e35 MB |
105 | |
106 | str = strchr(str, ','); | |
107 | if (str) | |
1da177e4 LT |
108 | str++; |
109 | else | |
110 | break; | |
111 | } | |
112 | return 1; | |
113 | } | |
114 | ||
115 | __setup("reboot=", reboot_setup); | |
116 | ||
4d022e35 MB |
117 | |
118 | #ifdef CONFIG_X86_32 | |
1da177e4 LT |
119 | /* |
120 | * Reboot options and system auto-detection code provided by | |
121 | * Dell Inc. so their systems "just work". :-) | |
122 | */ | |
123 | ||
124 | /* | |
4d022e35 MB |
125 | * Some machines require the "reboot=b" commandline option, |
126 | * this quirk makes that automatic. | |
1da177e4 | 127 | */ |
1855256c | 128 | static int __init set_bios_reboot(const struct dmi_system_id *d) |
1da177e4 | 129 | { |
4d022e35 MB |
130 | if (reboot_type != BOOT_BIOS) { |
131 | reboot_type = BOOT_BIOS; | |
1da177e4 LT |
132 | printk(KERN_INFO "%s series board detected. Selecting BIOS-method for reboots.\n", d->ident); |
133 | } | |
134 | return 0; | |
135 | } | |
136 | ||
1da177e4 | 137 | static struct dmi_system_id __initdata reboot_dmi_table[] = { |
b9e82af8 TG |
138 | { /* Handle problems with rebooting on Dell E520's */ |
139 | .callback = set_bios_reboot, | |
140 | .ident = "Dell E520", | |
141 | .matches = { | |
142 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
143 | DMI_MATCH(DMI_PRODUCT_NAME, "Dell DM061"), | |
144 | }, | |
145 | }, | |
1da177e4 | 146 | { /* Handle problems with rebooting on Dell 1300's */ |
dd2a1305 | 147 | .callback = set_bios_reboot, |
1da177e4 LT |
148 | .ident = "Dell PowerEdge 1300", |
149 | .matches = { | |
150 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"), | |
151 | DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1300/"), | |
152 | }, | |
153 | }, | |
154 | { /* Handle problems with rebooting on Dell 300's */ | |
155 | .callback = set_bios_reboot, | |
156 | .ident = "Dell PowerEdge 300", | |
157 | .matches = { | |
158 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"), | |
159 | DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 300/"), | |
160 | }, | |
161 | }, | |
df2edcf3 JJ |
162 | { /* Handle problems with rebooting on Dell Optiplex 745's SFF*/ |
163 | .callback = set_bios_reboot, | |
164 | .ident = "Dell OptiPlex 745", | |
165 | .matches = { | |
166 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
167 | DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"), | |
df2edcf3 JJ |
168 | }, |
169 | }, | |
fc115bf1 CK |
170 | { /* Handle problems with rebooting on Dell Optiplex 745's DFF*/ |
171 | .callback = set_bios_reboot, | |
172 | .ident = "Dell OptiPlex 745", | |
173 | .matches = { | |
174 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
175 | DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"), | |
176 | DMI_MATCH(DMI_BOARD_NAME, "0MM599"), | |
177 | }, | |
178 | }, | |
fc1c8925 HAA |
179 | { /* Handle problems with rebooting on Dell Optiplex 745 with 0KW626 */ |
180 | .callback = set_bios_reboot, | |
181 | .ident = "Dell OptiPlex 745", | |
182 | .matches = { | |
183 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
184 | DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"), | |
185 | DMI_MATCH(DMI_BOARD_NAME, "0KW626"), | |
186 | }, | |
187 | }, | |
093bac15 SC |
188 | { /* Handle problems with rebooting on Dell Optiplex 330 with 0KP561 */ |
189 | .callback = set_bios_reboot, | |
190 | .ident = "Dell OptiPlex 330", | |
191 | .matches = { | |
192 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
193 | DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 330"), | |
194 | DMI_MATCH(DMI_BOARD_NAME, "0KP561"), | |
195 | }, | |
196 | }, | |
4a4aca64 JD |
197 | { /* Handle problems with rebooting on Dell Optiplex 360 with 0T656F */ |
198 | .callback = set_bios_reboot, | |
199 | .ident = "Dell OptiPlex 360", | |
200 | .matches = { | |
201 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
202 | DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 360"), | |
203 | DMI_MATCH(DMI_BOARD_NAME, "0T656F"), | |
204 | }, | |
205 | }, | |
35ea63d7 LO |
206 | { /* Handle problems with rebooting on Dell OptiPlex 760 with 0G919G*/ |
207 | .callback = set_bios_reboot, | |
208 | .ident = "Dell OptiPlex 760", | |
209 | .matches = { | |
210 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
211 | DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 760"), | |
212 | DMI_MATCH(DMI_BOARD_NAME, "0G919G"), | |
213 | }, | |
214 | }, | |
1da177e4 LT |
215 | { /* Handle problems with rebooting on Dell 2400's */ |
216 | .callback = set_bios_reboot, | |
217 | .ident = "Dell PowerEdge 2400", | |
218 | .matches = { | |
219 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"), | |
220 | DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2400"), | |
221 | }, | |
222 | }, | |
fab3b58d IM |
223 | { /* Handle problems with rebooting on Dell T5400's */ |
224 | .callback = set_bios_reboot, | |
225 | .ident = "Dell Precision T5400", | |
226 | .matches = { | |
227 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
228 | DMI_MATCH(DMI_PRODUCT_NAME, "Precision WorkStation T5400"), | |
229 | }, | |
230 | }, | |
890ffedc TB |
231 | { /* Handle problems with rebooting on Dell T7400's */ |
232 | .callback = set_bios_reboot, | |
233 | .ident = "Dell Precision T7400", | |
234 | .matches = { | |
235 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
236 | DMI_MATCH(DMI_PRODUCT_NAME, "Precision WorkStation T7400"), | |
237 | }, | |
238 | }, | |
766c3f94 | 239 | { /* Handle problems with rebooting on HP laptops */ |
d91b14c4 | 240 | .callback = set_bios_reboot, |
766c3f94 | 241 | .ident = "HP Compaq Laptop", |
d91b14c4 TV |
242 | .matches = { |
243 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
766c3f94 | 244 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq"), |
d91b14c4 TV |
245 | }, |
246 | }, | |
dd4124a8 LO |
247 | { /* Handle problems with rebooting on Dell XPS710 */ |
248 | .callback = set_bios_reboot, | |
249 | .ident = "Dell XPS710", | |
250 | .matches = { | |
251 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
252 | DMI_MATCH(DMI_PRODUCT_NAME, "Dell XPS710"), | |
253 | }, | |
254 | }, | |
c5da9a2b AC |
255 | { /* Handle problems with rebooting on Dell DXP061 */ |
256 | .callback = set_bios_reboot, | |
257 | .ident = "Dell DXP061", | |
258 | .matches = { | |
259 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
260 | DMI_MATCH(DMI_PRODUCT_NAME, "Dell DXP061"), | |
261 | }, | |
262 | }, | |
88dff493 ZR |
263 | { /* Handle problems with rebooting on Sony VGN-Z540N */ |
264 | .callback = set_bios_reboot, | |
265 | .ident = "Sony VGN-Z540N", | |
266 | .matches = { | |
267 | DMI_MATCH(DMI_SYS_VENDOR, "Sony Corporation"), | |
268 | DMI_MATCH(DMI_PRODUCT_NAME, "VGN-Z540N"), | |
269 | }, | |
270 | }, | |
77f32dfd DT |
271 | { /* Handle problems with rebooting on CompuLab SBC-FITPC2 */ |
272 | .callback = set_bios_reboot, | |
273 | .ident = "CompuLab SBC-FITPC2", | |
274 | .matches = { | |
275 | DMI_MATCH(DMI_SYS_VENDOR, "CompuLab"), | |
276 | DMI_MATCH(DMI_PRODUCT_NAME, "SBC-FITPC2"), | |
277 | }, | |
278 | }, | |
4832ddda LO |
279 | { /* Handle problems with rebooting on ASUS P4S800 */ |
280 | .callback = set_bios_reboot, | |
281 | .ident = "ASUS P4S800", | |
282 | .matches = { | |
283 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), | |
284 | DMI_MATCH(DMI_BOARD_NAME, "P4S800"), | |
285 | }, | |
286 | }, | |
1da177e4 LT |
287 | { } |
288 | }; | |
289 | ||
290 | static int __init reboot_init(void) | |
291 | { | |
292 | dmi_check_system(reboot_dmi_table); | |
293 | return 0; | |
294 | } | |
1da177e4 LT |
295 | core_initcall(reboot_init); |
296 | ||
297 | /* The following code and data reboots the machine by switching to real | |
298 | mode and jumping to the BIOS reset entry point, as if the CPU has | |
299 | really been reset. The previous version asked the keyboard | |
300 | controller to pulse the CPU reset line, which is more thorough, but | |
301 | doesn't work with at least one type of 486 motherboard. It is easy | |
302 | to stop this code working; hence the copious comments. */ | |
ebdd561a | 303 | static const unsigned long long |
1da177e4 LT |
304 | real_mode_gdt_entries [3] = |
305 | { | |
306 | 0x0000000000000000ULL, /* Null descriptor */ | |
ebdd561a JB |
307 | 0x00009b000000ffffULL, /* 16-bit real-mode 64k code at 0x00000000 */ |
308 | 0x000093000100ffffULL /* 16-bit real-mode 64k data at 0x00000100 */ | |
1da177e4 LT |
309 | }; |
310 | ||
ebdd561a | 311 | static const struct desc_ptr |
05f4a3ec | 312 | real_mode_gdt = { sizeof (real_mode_gdt_entries) - 1, (long)real_mode_gdt_entries }, |
4d022e35 | 313 | real_mode_idt = { 0x3ff, 0 }; |
1da177e4 LT |
314 | |
315 | /* This is 16-bit protected mode code to disable paging and the cache, | |
316 | switch to real mode and jump to the BIOS reset code. | |
317 | ||
318 | The instruction that switches to real mode by writing to CR0 must be | |
319 | followed immediately by a far jump instruction, which set CS to a | |
320 | valid value for real mode, and flushes the prefetch queue to avoid | |
321 | running instructions that have already been decoded in protected | |
322 | mode. | |
323 | ||
324 | Clears all the flags except ET, especially PG (paging), PE | |
325 | (protected-mode enable) and TS (task switch for coprocessor state | |
326 | save). Flushes the TLB after paging has been disabled. Sets CD and | |
327 | NW, to disable the cache on a 486, and invalidates the cache. This | |
328 | is more like the state of a 486 after reset. I don't know if | |
329 | something else should be done for other chips. | |
330 | ||
331 | More could be done here to set up the registers as if a CPU reset had | |
332 | occurred; hopefully real BIOSs don't assume much. */ | |
ebdd561a | 333 | static const unsigned char real_mode_switch [] = |
1da177e4 LT |
334 | { |
335 | 0x66, 0x0f, 0x20, 0xc0, /* movl %cr0,%eax */ | |
336 | 0x66, 0x83, 0xe0, 0x11, /* andl $0x00000011,%eax */ | |
337 | 0x66, 0x0d, 0x00, 0x00, 0x00, 0x60, /* orl $0x60000000,%eax */ | |
338 | 0x66, 0x0f, 0x22, 0xc0, /* movl %eax,%cr0 */ | |
339 | 0x66, 0x0f, 0x22, 0xd8, /* movl %eax,%cr3 */ | |
340 | 0x66, 0x0f, 0x20, 0xc3, /* movl %cr0,%ebx */ | |
341 | 0x66, 0x81, 0xe3, 0x00, 0x00, 0x00, 0x60, /* andl $0x60000000,%ebx */ | |
342 | 0x74, 0x02, /* jz f */ | |
343 | 0x0f, 0x09, /* wbinvd */ | |
344 | 0x24, 0x10, /* f: andb $0x10,al */ | |
345 | 0x66, 0x0f, 0x22, 0xc0 /* movl %eax,%cr0 */ | |
346 | }; | |
ebdd561a | 347 | static const unsigned char jump_to_bios [] = |
1da177e4 LT |
348 | { |
349 | 0xea, 0x00, 0x00, 0xff, 0xff /* ljmp $0xffff,$0x0000 */ | |
350 | }; | |
351 | ||
352 | /* | |
353 | * Switch to real mode and then execute the code | |
354 | * specified by the code and length parameters. | |
355 | * We assume that length will aways be less that 100! | |
356 | */ | |
ebdd561a | 357 | void machine_real_restart(const unsigned char *code, int length) |
1da177e4 | 358 | { |
1da177e4 LT |
359 | local_irq_disable(); |
360 | ||
361 | /* Write zero to CMOS register number 0x0f, which the BIOS POST | |
362 | routine will recognize as telling it to do a proper reboot. (Well | |
363 | that's what this book in front of me says -- it may only apply to | |
364 | the Phoenix BIOS though, it's not clear). At the same time, | |
365 | disable NMIs by setting the top bit in the CMOS address register, | |
366 | as we're about to do peculiar things to the CPU. I'm not sure if | |
367 | `outb_p' is needed instead of just `outb'. Use it to be on the | |
368 | safe side. (Yes, CMOS_WRITE does outb_p's. - Paul G.) | |
369 | */ | |
62dbc210 | 370 | spin_lock(&rtc_lock); |
1da177e4 | 371 | CMOS_WRITE(0x00, 0x8f); |
62dbc210 | 372 | spin_unlock(&rtc_lock); |
1da177e4 LT |
373 | |
374 | /* Remap the kernel at virtual address zero, as well as offset zero | |
375 | from the kernel segment. This assumes the kernel segment starts at | |
376 | virtual address PAGE_OFFSET. */ | |
68db065c | 377 | memcpy(swapper_pg_dir, swapper_pg_dir + KERNEL_PGD_BOUNDARY, |
4d022e35 | 378 | sizeof(swapper_pg_dir [0]) * KERNEL_PGD_PTRS); |
1da177e4 LT |
379 | |
380 | /* | |
381 | * Use `swapper_pg_dir' as our page directory. | |
382 | */ | |
383 | load_cr3(swapper_pg_dir); | |
384 | ||
385 | /* Write 0x1234 to absolute memory location 0x472. The BIOS reads | |
386 | this on booting to tell it to "Bypass memory test (also warm | |
387 | boot)". This seems like a fairly standard thing that gets set by | |
388 | REBOOT.COM programs, and the previous reset routine did this | |
389 | too. */ | |
1da177e4 LT |
390 | *((unsigned short *)0x472) = reboot_mode; |
391 | ||
392 | /* For the switch to real mode, copy some code to low memory. It has | |
393 | to be in the first 64k because it is running in 16-bit mode, and it | |
394 | has to have the same physical and virtual address, because it turns | |
395 | off paging. Copy it near the end of the first page, out of the way | |
396 | of BIOS variables. */ | |
4d022e35 | 397 | memcpy((void *)(0x1000 - sizeof(real_mode_switch) - 100), |
1da177e4 | 398 | real_mode_switch, sizeof (real_mode_switch)); |
4d022e35 | 399 | memcpy((void *)(0x1000 - 100), code, length); |
1da177e4 LT |
400 | |
401 | /* Set up the IDT for real mode. */ | |
4d37e7e3 | 402 | load_idt(&real_mode_idt); |
1da177e4 LT |
403 | |
404 | /* Set up a GDT from which we can load segment descriptors for real | |
405 | mode. The GDT is not used in real mode; it is just needed here to | |
406 | prepare the descriptors. */ | |
4d37e7e3 | 407 | load_gdt(&real_mode_gdt); |
1da177e4 LT |
408 | |
409 | /* Load the data segment registers, and thus the descriptors ready for | |
410 | real mode. The base address of each segment is 0x100, 16 times the | |
411 | selector value being loaded here. This is so that the segment | |
412 | registers don't have to be reloaded after switching to real mode: | |
413 | the values are consistent for real mode operation already. */ | |
1da177e4 LT |
414 | __asm__ __volatile__ ("movl $0x0010,%%eax\n" |
415 | "\tmovl %%eax,%%ds\n" | |
416 | "\tmovl %%eax,%%es\n" | |
417 | "\tmovl %%eax,%%fs\n" | |
418 | "\tmovl %%eax,%%gs\n" | |
419 | "\tmovl %%eax,%%ss" : : : "eax"); | |
420 | ||
421 | /* Jump to the 16-bit code that we copied earlier. It disables paging | |
422 | and the cache, switches to real mode, and jumps to the BIOS reset | |
423 | entry point. */ | |
1da177e4 LT |
424 | __asm__ __volatile__ ("ljmp $0x0008,%0" |
425 | : | |
4d022e35 | 426 | : "i" ((void *)(0x1000 - sizeof (real_mode_switch) - 100))); |
1da177e4 | 427 | } |
129f6946 AD |
428 | #ifdef CONFIG_APM_MODULE |
429 | EXPORT_SYMBOL(machine_real_restart); | |
430 | #endif | |
1da177e4 | 431 | |
4d022e35 MB |
432 | #endif /* CONFIG_X86_32 */ |
433 | ||
6c6c51e4 | 434 | /* |
498cdbfb | 435 | * Some Apple MacBook and MacBookPro's needs reboot=p to be able to reboot |
6c6c51e4 PM |
436 | */ |
437 | static int __init set_pci_reboot(const struct dmi_system_id *d) | |
438 | { | |
439 | if (reboot_type != BOOT_CF9) { | |
440 | reboot_type = BOOT_CF9; | |
441 | printk(KERN_INFO "%s series board detected. " | |
442 | "Selecting PCI-method for reboots.\n", d->ident); | |
443 | } | |
444 | return 0; | |
445 | } | |
446 | ||
447 | static struct dmi_system_id __initdata pci_reboot_dmi_table[] = { | |
3e03bbea | 448 | { /* Handle problems with rebooting on Apple MacBook5 */ |
6c6c51e4 | 449 | .callback = set_pci_reboot, |
3e03bbea | 450 | .ident = "Apple MacBook5", |
6c6c51e4 PM |
451 | .matches = { |
452 | DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), | |
3e03bbea | 453 | DMI_MATCH(DMI_PRODUCT_NAME, "MacBook5"), |
6c6c51e4 PM |
454 | }, |
455 | }, | |
3e03bbea | 456 | { /* Handle problems with rebooting on Apple MacBookPro5 */ |
498cdbfb | 457 | .callback = set_pci_reboot, |
3e03bbea | 458 | .ident = "Apple MacBookPro5", |
498cdbfb OÇ |
459 | .matches = { |
460 | DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), | |
3e03bbea | 461 | DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro5"), |
498cdbfb OÇ |
462 | }, |
463 | }, | |
05154752 GH |
464 | { /* Handle problems with rebooting on Apple Macmini3,1 */ |
465 | .callback = set_pci_reboot, | |
466 | .ident = "Apple Macmini3,1", | |
467 | .matches = { | |
468 | DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), | |
469 | DMI_MATCH(DMI_PRODUCT_NAME, "Macmini3,1"), | |
470 | }, | |
471 | }, | |
0a832320 JM |
472 | { /* Handle problems with rebooting on the iMac9,1. */ |
473 | .callback = set_pci_reboot, | |
474 | .ident = "Apple iMac9,1", | |
475 | .matches = { | |
476 | DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), | |
477 | DMI_MATCH(DMI_PRODUCT_NAME, "iMac9,1"), | |
478 | }, | |
479 | }, | |
6c6c51e4 PM |
480 | { } |
481 | }; | |
482 | ||
483 | static int __init pci_reboot_init(void) | |
484 | { | |
485 | dmi_check_system(pci_reboot_dmi_table); | |
486 | return 0; | |
487 | } | |
488 | core_initcall(pci_reboot_init); | |
489 | ||
4d022e35 MB |
490 | static inline void kb_wait(void) |
491 | { | |
492 | int i; | |
493 | ||
c84d6af8 AC |
494 | for (i = 0; i < 0x10000; i++) { |
495 | if ((inb(0x64) & 0x02) == 0) | |
4d022e35 | 496 | break; |
c84d6af8 AC |
497 | udelay(2); |
498 | } | |
4d022e35 MB |
499 | } |
500 | ||
d176720d EH |
501 | static void vmxoff_nmi(int cpu, struct die_args *args) |
502 | { | |
503 | cpu_emergency_vmxoff(); | |
504 | } | |
505 | ||
506 | /* Use NMIs as IPIs to tell all CPUs to disable virtualization | |
507 | */ | |
508 | static void emergency_vmx_disable_all(void) | |
509 | { | |
510 | /* Just make sure we won't change CPUs while doing this */ | |
511 | local_irq_disable(); | |
512 | ||
513 | /* We need to disable VMX on all CPUs before rebooting, otherwise | |
514 | * we risk hanging up the machine, because the CPU ignore INIT | |
515 | * signals when VMX is enabled. | |
516 | * | |
517 | * We can't take any locks and we may be on an inconsistent | |
518 | * state, so we use NMIs as IPIs to tell the other CPUs to disable | |
519 | * VMX and halt. | |
520 | * | |
521 | * For safety, we will avoid running the nmi_shootdown_cpus() | |
522 | * stuff unnecessarily, but we don't have a way to check | |
523 | * if other CPUs have VMX enabled. So we will call it only if the | |
524 | * CPU we are running on has VMX enabled. | |
525 | * | |
526 | * We will miss cases where VMX is not enabled on all CPUs. This | |
527 | * shouldn't do much harm because KVM always enable VMX on all | |
528 | * CPUs anyway. But we can miss it on the small window where KVM | |
529 | * is still enabling VMX. | |
530 | */ | |
531 | if (cpu_has_vmx() && cpu_vmx_enabled()) { | |
532 | /* Disable VMX on this CPU. | |
533 | */ | |
534 | cpu_vmxoff(); | |
535 | ||
536 | /* Halt and disable VMX on the other CPUs */ | |
537 | nmi_shootdown_cpus(vmxoff_nmi); | |
538 | ||
539 | } | |
540 | } | |
541 | ||
542 | ||
7432d149 IM |
543 | void __attribute__((weak)) mach_reboot_fixups(void) |
544 | { | |
545 | } | |
546 | ||
416e2d63 | 547 | static void native_machine_emergency_restart(void) |
1da177e4 | 548 | { |
4d022e35 MB |
549 | int i; |
550 | ||
d176720d EH |
551 | if (reboot_emergency) |
552 | emergency_vmx_disable_all(); | |
553 | ||
840c2baf JC |
554 | tboot_shutdown(TB_SHUTDOWN_REBOOT); |
555 | ||
4d022e35 MB |
556 | /* Tell the BIOS if we want cold or warm reboot */ |
557 | *((unsigned short *)__va(0x472)) = reboot_mode; | |
558 | ||
559 | for (;;) { | |
560 | /* Could also try the reset bit in the Hammer NB */ | |
561 | switch (reboot_type) { | |
562 | case BOOT_KBD: | |
7432d149 IM |
563 | mach_reboot_fixups(); /* for board specific fixups */ |
564 | ||
4d022e35 MB |
565 | for (i = 0; i < 10; i++) { |
566 | kb_wait(); | |
567 | udelay(50); | |
568 | outb(0xfe, 0x64); /* pulse reset low */ | |
569 | udelay(50); | |
570 | } | |
571 | ||
572 | case BOOT_TRIPLE: | |
ebdd561a | 573 | load_idt(&no_idt); |
4d022e35 MB |
574 | __asm__ __volatile__("int3"); |
575 | ||
576 | reboot_type = BOOT_KBD; | |
577 | break; | |
578 | ||
579 | #ifdef CONFIG_X86_32 | |
580 | case BOOT_BIOS: | |
581 | machine_real_restart(jump_to_bios, sizeof(jump_to_bios)); | |
582 | ||
583 | reboot_type = BOOT_KBD; | |
584 | break; | |
585 | #endif | |
586 | ||
587 | case BOOT_ACPI: | |
588 | acpi_reboot(); | |
589 | reboot_type = BOOT_KBD; | |
590 | break; | |
591 | ||
4d022e35 MB |
592 | case BOOT_EFI: |
593 | if (efi_enabled) | |
14d7ca5c PA |
594 | efi.reset_system(reboot_mode ? |
595 | EFI_RESET_WARM : | |
596 | EFI_RESET_COLD, | |
4d022e35 | 597 | EFI_SUCCESS, 0, NULL); |
b47b9288 | 598 | reboot_type = BOOT_KBD; |
14d7ca5c | 599 | break; |
4d022e35 | 600 | |
14d7ca5c PA |
601 | case BOOT_CF9: |
602 | port_cf9_safe = true; | |
603 | /* fall through */ | |
4d022e35 | 604 | |
14d7ca5c PA |
605 | case BOOT_CF9_COND: |
606 | if (port_cf9_safe) { | |
607 | u8 cf9 = inb(0xcf9) & ~6; | |
608 | outb(cf9|2, 0xcf9); /* Request hard reset */ | |
609 | udelay(50); | |
610 | outb(cf9|6, 0xcf9); /* Actually do the reset */ | |
611 | udelay(50); | |
612 | } | |
4d022e35 MB |
613 | reboot_type = BOOT_KBD; |
614 | break; | |
615 | } | |
616 | } | |
617 | } | |
618 | ||
3c62c625 | 619 | void native_machine_shutdown(void) |
4d022e35 MB |
620 | { |
621 | /* Stop the cpus and apics */ | |
1da177e4 | 622 | #ifdef CONFIG_SMP |
dd2a1305 EB |
623 | |
624 | /* The boot cpu is always logical cpu 0 */ | |
65c01184 | 625 | int reboot_cpu_id = 0; |
dd2a1305 | 626 | |
4d022e35 | 627 | #ifdef CONFIG_X86_32 |
dd2a1305 | 628 | /* See if there has been given a command line override */ |
9628937d | 629 | if ((reboot_cpu != -1) && (reboot_cpu < nr_cpu_ids) && |
0bc3cc03 | 630 | cpu_online(reboot_cpu)) |
dd2a1305 | 631 | reboot_cpu_id = reboot_cpu; |
4d022e35 | 632 | #endif |
1da177e4 | 633 | |
4d022e35 | 634 | /* Make certain the cpu I'm about to reboot on is online */ |
0bc3cc03 | 635 | if (!cpu_online(reboot_cpu_id)) |
dd2a1305 | 636 | reboot_cpu_id = smp_processor_id(); |
dd2a1305 EB |
637 | |
638 | /* Make certain I only run on the appropriate processor */ | |
9628937d | 639 | set_cpus_allowed_ptr(current, cpumask_of(reboot_cpu_id)); |
dd2a1305 | 640 | |
4d022e35 MB |
641 | /* O.K Now that I'm on the appropriate processor, |
642 | * stop all of the others. | |
1da177e4 LT |
643 | */ |
644 | smp_send_stop(); | |
4d022e35 | 645 | #endif |
1da177e4 LT |
646 | |
647 | lapic_shutdown(); | |
648 | ||
649 | #ifdef CONFIG_X86_IO_APIC | |
650 | disable_IO_APIC(); | |
651 | #endif | |
4d022e35 | 652 | |
c86c7fbc OH |
653 | #ifdef CONFIG_HPET_TIMER |
654 | hpet_disable(); | |
655 | #endif | |
dd2a1305 | 656 | |
4d022e35 | 657 | #ifdef CONFIG_X86_64 |
338bac52 | 658 | x86_platform.iommu_shutdown(); |
4d022e35 | 659 | #endif |
973efae2 JF |
660 | } |
661 | ||
d176720d EH |
662 | static void __machine_emergency_restart(int emergency) |
663 | { | |
664 | reboot_emergency = emergency; | |
665 | machine_ops.emergency_restart(); | |
666 | } | |
667 | ||
416e2d63 | 668 | static void native_machine_restart(char *__unused) |
dd2a1305 | 669 | { |
4d022e35 | 670 | printk("machine restart\n"); |
1da177e4 | 671 | |
4d022e35 MB |
672 | if (!reboot_force) |
673 | machine_shutdown(); | |
d176720d | 674 | __machine_emergency_restart(0); |
4a1421f8 EB |
675 | } |
676 | ||
416e2d63 | 677 | static void native_machine_halt(void) |
1da177e4 | 678 | { |
d3ec5cae IV |
679 | /* stop other cpus and apics */ |
680 | machine_shutdown(); | |
681 | ||
840c2baf JC |
682 | tboot_shutdown(TB_SHUTDOWN_HALT); |
683 | ||
d3ec5cae IV |
684 | /* stop this cpu */ |
685 | stop_this_cpu(NULL); | |
1da177e4 LT |
686 | } |
687 | ||
416e2d63 | 688 | static void native_machine_power_off(void) |
1da177e4 | 689 | { |
6e3fbee5 | 690 | if (pm_power_off) { |
4d022e35 MB |
691 | if (!reboot_force) |
692 | machine_shutdown(); | |
1da177e4 | 693 | pm_power_off(); |
6e3fbee5 | 694 | } |
840c2baf JC |
695 | /* a fallback in case there is no PM info available */ |
696 | tboot_shutdown(TB_SHUTDOWN_HALT); | |
1da177e4 LT |
697 | } |
698 | ||
07f3331c | 699 | struct machine_ops machine_ops = { |
416e2d63 JB |
700 | .power_off = native_machine_power_off, |
701 | .shutdown = native_machine_shutdown, | |
702 | .emergency_restart = native_machine_emergency_restart, | |
703 | .restart = native_machine_restart, | |
ed23dc6f GC |
704 | .halt = native_machine_halt, |
705 | #ifdef CONFIG_KEXEC | |
706 | .crash_shutdown = native_machine_crash_shutdown, | |
707 | #endif | |
07f3331c | 708 | }; |
416e2d63 JB |
709 | |
710 | void machine_power_off(void) | |
711 | { | |
712 | machine_ops.power_off(); | |
713 | } | |
714 | ||
715 | void machine_shutdown(void) | |
716 | { | |
717 | machine_ops.shutdown(); | |
718 | } | |
719 | ||
720 | void machine_emergency_restart(void) | |
721 | { | |
d176720d | 722 | __machine_emergency_restart(1); |
416e2d63 JB |
723 | } |
724 | ||
725 | void machine_restart(char *cmd) | |
726 | { | |
727 | machine_ops.restart(cmd); | |
728 | } | |
729 | ||
730 | void machine_halt(void) | |
731 | { | |
732 | machine_ops.halt(); | |
733 | } | |
734 | ||
ed23dc6f GC |
735 | #ifdef CONFIG_KEXEC |
736 | void machine_crash_shutdown(struct pt_regs *regs) | |
737 | { | |
738 | machine_ops.crash_shutdown(regs); | |
739 | } | |
740 | #endif | |
2ddded21 EH |
741 | |
742 | ||
bb8dd270 | 743 | #if defined(CONFIG_SMP) |
2ddded21 EH |
744 | |
745 | /* This keeps a track of which one is crashing cpu. */ | |
746 | static int crashing_cpu; | |
747 | static nmi_shootdown_cb shootdown_callback; | |
748 | ||
749 | static atomic_t waiting_for_crash_ipi; | |
750 | ||
751 | static int crash_nmi_callback(struct notifier_block *self, | |
752 | unsigned long val, void *data) | |
753 | { | |
754 | int cpu; | |
755 | ||
756 | if (val != DIE_NMI_IPI) | |
757 | return NOTIFY_OK; | |
758 | ||
759 | cpu = raw_smp_processor_id(); | |
760 | ||
761 | /* Don't do anything if this handler is invoked on crashing cpu. | |
762 | * Otherwise, system will completely hang. Crashing cpu can get | |
763 | * an NMI if system was initially booted with nmi_watchdog parameter. | |
764 | */ | |
765 | if (cpu == crashing_cpu) | |
766 | return NOTIFY_STOP; | |
767 | local_irq_disable(); | |
768 | ||
769 | shootdown_callback(cpu, (struct die_args *)data); | |
770 | ||
771 | atomic_dec(&waiting_for_crash_ipi); | |
772 | /* Assume hlt works */ | |
773 | halt(); | |
774 | for (;;) | |
775 | cpu_relax(); | |
776 | ||
777 | return 1; | |
778 | } | |
779 | ||
780 | static void smp_send_nmi_allbutself(void) | |
781 | { | |
dac5f412 | 782 | apic->send_IPI_allbutself(NMI_VECTOR); |
2ddded21 EH |
783 | } |
784 | ||
785 | static struct notifier_block crash_nmi_nb = { | |
786 | .notifier_call = crash_nmi_callback, | |
787 | }; | |
788 | ||
bb8dd270 EH |
789 | /* Halt all other CPUs, calling the specified function on each of them |
790 | * | |
791 | * This function can be used to halt all other CPUs on crash | |
792 | * or emergency reboot time. The function passed as parameter | |
793 | * will be called inside a NMI handler on all CPUs. | |
794 | */ | |
2ddded21 EH |
795 | void nmi_shootdown_cpus(nmi_shootdown_cb callback) |
796 | { | |
797 | unsigned long msecs; | |
c415b3dc | 798 | local_irq_disable(); |
2ddded21 EH |
799 | |
800 | /* Make a note of crashing cpu. Will be used in NMI callback.*/ | |
801 | crashing_cpu = safe_smp_processor_id(); | |
802 | ||
803 | shootdown_callback = callback; | |
804 | ||
805 | atomic_set(&waiting_for_crash_ipi, num_online_cpus() - 1); | |
806 | /* Would it be better to replace the trap vector here? */ | |
807 | if (register_die_notifier(&crash_nmi_nb)) | |
808 | return; /* return what? */ | |
809 | /* Ensure the new callback function is set before sending | |
810 | * out the NMI | |
811 | */ | |
812 | wmb(); | |
813 | ||
814 | smp_send_nmi_allbutself(); | |
815 | ||
816 | msecs = 1000; /* Wait at most a second for the other cpus to stop */ | |
817 | while ((atomic_read(&waiting_for_crash_ipi) > 0) && msecs) { | |
818 | mdelay(1); | |
819 | msecs--; | |
820 | } | |
821 | ||
822 | /* Leave the nmi callback set */ | |
823 | } | |
bb8dd270 EH |
824 | #else /* !CONFIG_SMP */ |
825 | void nmi_shootdown_cpus(nmi_shootdown_cb callback) | |
826 | { | |
827 | /* No other CPUs to shoot down */ | |
828 | } | |
2ddded21 | 829 | #endif |