x86: Fix UV BAU activation descriptor init
[deliverable/linux.git] / arch / x86 / kernel / reboot.c
CommitLineData
1da177e4 1#include <linux/module.h>
cd6ed525 2#include <linux/reboot.h>
4d022e35
MB
3#include <linux/init.h>
4#include <linux/pm.h>
5#include <linux/efi.h>
6#include <acpi/reboot.h>
7#include <asm/io.h>
1da177e4 8#include <asm/apic.h>
4d37e7e3 9#include <asm/desc.h>
4d022e35 10#include <asm/hpet.h>
68db065c 11#include <asm/pgtable.h>
4412620f 12#include <asm/proto.h>
973efae2 13#include <asm/reboot_fixups.h>
07f3331c 14#include <asm/reboot.h>
82487711 15#include <asm/pci_x86.h>
d176720d 16#include <asm/virtext.h>
96b89dc6 17#include <asm/cpu.h>
1da177e4 18
4d022e35
MB
19#ifdef CONFIG_X86_32
20# include <linux/dmi.h>
21# include <linux/ctype.h>
22# include <linux/mc146818rtc.h>
4d022e35
MB
23#else
24# include <asm/iommu.h>
25#endif
26
1da177e4
LT
27/*
28 * Power off function, if any
29 */
30void (*pm_power_off)(void);
129f6946 31EXPORT_SYMBOL(pm_power_off);
1da177e4 32
ebdd561a 33static const struct desc_ptr no_idt = {};
1da177e4 34static int reboot_mode;
8d00450d 35enum reboot_type reboot_type = BOOT_KBD;
4d022e35 36int reboot_force;
1da177e4 37
4d022e35 38#if defined(CONFIG_X86_32) && defined(CONFIG_SMP)
1da177e4 39static int reboot_cpu = -1;
1da177e4 40#endif
4d022e35 41
d176720d
EH
42/* This is set if we need to go through the 'emergency' path.
43 * When machine_emergency_restart() is called, we may be on
44 * an inconsistent state and won't be able to do a clean cleanup
45 */
46static int reboot_emergency;
47
14d7ca5c
PA
48/* This is set by the PCI code if either type 1 or type 2 PCI is detected */
49bool port_cf9_safe = false;
50
51/* reboot=b[ios] | s[mp] | t[riple] | k[bd] | e[fi] [, [w]arm | [c]old] | p[ci]
4d022e35
MB
52 warm Don't set the cold reboot flag
53 cold Set the cold reboot flag
54 bios Reboot by jumping through the BIOS (only for X86_32)
55 smp Reboot by executing reset on BSP or other CPU (only for X86_32)
56 triple Force a triple fault (init)
57 kbd Use the keyboard controller. cold reset (default)
58 acpi Use the RESET_REG in the FADT
59 efi Use efi reset_system runtime service
14d7ca5c 60 pci Use the so-called "PCI reset register", CF9
4d022e35
MB
61 force Avoid anything that could hang.
62 */
1da177e4
LT
63static int __init reboot_setup(char *str)
64{
4d022e35 65 for (;;) {
1da177e4 66 switch (*str) {
4d022e35 67 case 'w':
1da177e4
LT
68 reboot_mode = 0x1234;
69 break;
4d022e35
MB
70
71 case 'c':
72 reboot_mode = 0;
1da177e4 73 break;
4d022e35
MB
74
75#ifdef CONFIG_X86_32
1da177e4 76#ifdef CONFIG_SMP
4d022e35 77 case 's':
6f673d83 78 if (isdigit(*(str+1))) {
1da177e4 79 reboot_cpu = (int) (*(str+1) - '0');
6f673d83 80 if (isdigit(*(str+2)))
1da177e4
LT
81 reboot_cpu = reboot_cpu*10 + (int)(*(str+2) - '0');
82 }
4d022e35
MB
83 /* we will leave sorting out the final value
84 when we are ready to reboot, since we might not
85 have set up boot_cpu_id or smp_num_cpu */
1da177e4 86 break;
4d022e35
MB
87#endif /* CONFIG_SMP */
88
89 case 'b':
1da177e4 90#endif
4d022e35
MB
91 case 'a':
92 case 'k':
93 case 't':
94 case 'e':
14d7ca5c 95 case 'p':
4d022e35
MB
96 reboot_type = *str;
97 break;
98
99 case 'f':
100 reboot_force = 1;
101 break;
1da177e4 102 }
4d022e35
MB
103
104 str = strchr(str, ',');
105 if (str)
1da177e4
LT
106 str++;
107 else
108 break;
109 }
110 return 1;
111}
112
113__setup("reboot=", reboot_setup);
114
4d022e35
MB
115
116#ifdef CONFIG_X86_32
1da177e4
LT
117/*
118 * Reboot options and system auto-detection code provided by
119 * Dell Inc. so their systems "just work". :-)
120 */
121
122/*
4d022e35
MB
123 * Some machines require the "reboot=b" commandline option,
124 * this quirk makes that automatic.
1da177e4 125 */
1855256c 126static int __init set_bios_reboot(const struct dmi_system_id *d)
1da177e4 127{
4d022e35
MB
128 if (reboot_type != BOOT_BIOS) {
129 reboot_type = BOOT_BIOS;
1da177e4
LT
130 printk(KERN_INFO "%s series board detected. Selecting BIOS-method for reboots.\n", d->ident);
131 }
132 return 0;
133}
134
1da177e4 135static struct dmi_system_id __initdata reboot_dmi_table[] = {
b9e82af8
TG
136 { /* Handle problems with rebooting on Dell E520's */
137 .callback = set_bios_reboot,
138 .ident = "Dell E520",
139 .matches = {
140 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
141 DMI_MATCH(DMI_PRODUCT_NAME, "Dell DM061"),
142 },
143 },
1da177e4 144 { /* Handle problems with rebooting on Dell 1300's */
dd2a1305 145 .callback = set_bios_reboot,
1da177e4
LT
146 .ident = "Dell PowerEdge 1300",
147 .matches = {
148 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
149 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1300/"),
150 },
151 },
152 { /* Handle problems with rebooting on Dell 300's */
153 .callback = set_bios_reboot,
154 .ident = "Dell PowerEdge 300",
155 .matches = {
156 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
157 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 300/"),
158 },
159 },
df2edcf3
JJ
160 { /* Handle problems with rebooting on Dell Optiplex 745's SFF*/
161 .callback = set_bios_reboot,
162 .ident = "Dell OptiPlex 745",
163 .matches = {
164 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
165 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"),
df2edcf3
JJ
166 },
167 },
fc115bf1
CK
168 { /* Handle problems with rebooting on Dell Optiplex 745's DFF*/
169 .callback = set_bios_reboot,
170 .ident = "Dell OptiPlex 745",
171 .matches = {
172 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
173 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"),
174 DMI_MATCH(DMI_BOARD_NAME, "0MM599"),
175 },
176 },
fc1c8925
HAA
177 { /* Handle problems with rebooting on Dell Optiplex 745 with 0KW626 */
178 .callback = set_bios_reboot,
179 .ident = "Dell OptiPlex 745",
180 .matches = {
181 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
182 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"),
183 DMI_MATCH(DMI_BOARD_NAME, "0KW626"),
184 },
185 },
093bac15
SC
186 { /* Handle problems with rebooting on Dell Optiplex 330 with 0KP561 */
187 .callback = set_bios_reboot,
188 .ident = "Dell OptiPlex 330",
189 .matches = {
190 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
191 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 330"),
192 DMI_MATCH(DMI_BOARD_NAME, "0KP561"),
193 },
194 },
1da177e4
LT
195 { /* Handle problems with rebooting on Dell 2400's */
196 .callback = set_bios_reboot,
197 .ident = "Dell PowerEdge 2400",
198 .matches = {
199 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
200 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2400"),
201 },
202 },
fab3b58d
IM
203 { /* Handle problems with rebooting on Dell T5400's */
204 .callback = set_bios_reboot,
205 .ident = "Dell Precision T5400",
206 .matches = {
207 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
208 DMI_MATCH(DMI_PRODUCT_NAME, "Precision WorkStation T5400"),
209 },
210 },
766c3f94 211 { /* Handle problems with rebooting on HP laptops */
d91b14c4 212 .callback = set_bios_reboot,
766c3f94 213 .ident = "HP Compaq Laptop",
d91b14c4
TV
214 .matches = {
215 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
766c3f94 216 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq"),
d91b14c4
TV
217 },
218 },
dd4124a8
LO
219 { /* Handle problems with rebooting on Dell XPS710 */
220 .callback = set_bios_reboot,
221 .ident = "Dell XPS710",
222 .matches = {
223 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
224 DMI_MATCH(DMI_PRODUCT_NAME, "Dell XPS710"),
225 },
226 },
c5da9a2b
AC
227 { /* Handle problems with rebooting on Dell DXP061 */
228 .callback = set_bios_reboot,
229 .ident = "Dell DXP061",
230 .matches = {
231 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
232 DMI_MATCH(DMI_PRODUCT_NAME, "Dell DXP061"),
233 },
234 },
88dff493
ZR
235 { /* Handle problems with rebooting on Sony VGN-Z540N */
236 .callback = set_bios_reboot,
237 .ident = "Sony VGN-Z540N",
238 .matches = {
239 DMI_MATCH(DMI_SYS_VENDOR, "Sony Corporation"),
240 DMI_MATCH(DMI_PRODUCT_NAME, "VGN-Z540N"),
241 },
242 },
1da177e4
LT
243 { }
244};
245
246static int __init reboot_init(void)
247{
248 dmi_check_system(reboot_dmi_table);
249 return 0;
250}
1da177e4
LT
251core_initcall(reboot_init);
252
253/* The following code and data reboots the machine by switching to real
254 mode and jumping to the BIOS reset entry point, as if the CPU has
255 really been reset. The previous version asked the keyboard
256 controller to pulse the CPU reset line, which is more thorough, but
257 doesn't work with at least one type of 486 motherboard. It is easy
258 to stop this code working; hence the copious comments. */
ebdd561a 259static const unsigned long long
1da177e4
LT
260real_mode_gdt_entries [3] =
261{
262 0x0000000000000000ULL, /* Null descriptor */
ebdd561a
JB
263 0x00009b000000ffffULL, /* 16-bit real-mode 64k code at 0x00000000 */
264 0x000093000100ffffULL /* 16-bit real-mode 64k data at 0x00000100 */
1da177e4
LT
265};
266
ebdd561a 267static const struct desc_ptr
05f4a3ec 268real_mode_gdt = { sizeof (real_mode_gdt_entries) - 1, (long)real_mode_gdt_entries },
4d022e35 269real_mode_idt = { 0x3ff, 0 };
1da177e4
LT
270
271/* This is 16-bit protected mode code to disable paging and the cache,
272 switch to real mode and jump to the BIOS reset code.
273
274 The instruction that switches to real mode by writing to CR0 must be
275 followed immediately by a far jump instruction, which set CS to a
276 valid value for real mode, and flushes the prefetch queue to avoid
277 running instructions that have already been decoded in protected
278 mode.
279
280 Clears all the flags except ET, especially PG (paging), PE
281 (protected-mode enable) and TS (task switch for coprocessor state
282 save). Flushes the TLB after paging has been disabled. Sets CD and
283 NW, to disable the cache on a 486, and invalidates the cache. This
284 is more like the state of a 486 after reset. I don't know if
285 something else should be done for other chips.
286
287 More could be done here to set up the registers as if a CPU reset had
288 occurred; hopefully real BIOSs don't assume much. */
ebdd561a 289static const unsigned char real_mode_switch [] =
1da177e4
LT
290{
291 0x66, 0x0f, 0x20, 0xc0, /* movl %cr0,%eax */
292 0x66, 0x83, 0xe0, 0x11, /* andl $0x00000011,%eax */
293 0x66, 0x0d, 0x00, 0x00, 0x00, 0x60, /* orl $0x60000000,%eax */
294 0x66, 0x0f, 0x22, 0xc0, /* movl %eax,%cr0 */
295 0x66, 0x0f, 0x22, 0xd8, /* movl %eax,%cr3 */
296 0x66, 0x0f, 0x20, 0xc3, /* movl %cr0,%ebx */
297 0x66, 0x81, 0xe3, 0x00, 0x00, 0x00, 0x60, /* andl $0x60000000,%ebx */
298 0x74, 0x02, /* jz f */
299 0x0f, 0x09, /* wbinvd */
300 0x24, 0x10, /* f: andb $0x10,al */
301 0x66, 0x0f, 0x22, 0xc0 /* movl %eax,%cr0 */
302};
ebdd561a 303static const unsigned char jump_to_bios [] =
1da177e4
LT
304{
305 0xea, 0x00, 0x00, 0xff, 0xff /* ljmp $0xffff,$0x0000 */
306};
307
308/*
309 * Switch to real mode and then execute the code
310 * specified by the code and length parameters.
311 * We assume that length will aways be less that 100!
312 */
ebdd561a 313void machine_real_restart(const unsigned char *code, int length)
1da177e4 314{
1da177e4
LT
315 local_irq_disable();
316
317 /* Write zero to CMOS register number 0x0f, which the BIOS POST
318 routine will recognize as telling it to do a proper reboot. (Well
319 that's what this book in front of me says -- it may only apply to
320 the Phoenix BIOS though, it's not clear). At the same time,
321 disable NMIs by setting the top bit in the CMOS address register,
322 as we're about to do peculiar things to the CPU. I'm not sure if
323 `outb_p' is needed instead of just `outb'. Use it to be on the
324 safe side. (Yes, CMOS_WRITE does outb_p's. - Paul G.)
325 */
62dbc210 326 spin_lock(&rtc_lock);
1da177e4 327 CMOS_WRITE(0x00, 0x8f);
62dbc210 328 spin_unlock(&rtc_lock);
1da177e4
LT
329
330 /* Remap the kernel at virtual address zero, as well as offset zero
331 from the kernel segment. This assumes the kernel segment starts at
332 virtual address PAGE_OFFSET. */
68db065c 333 memcpy(swapper_pg_dir, swapper_pg_dir + KERNEL_PGD_BOUNDARY,
4d022e35 334 sizeof(swapper_pg_dir [0]) * KERNEL_PGD_PTRS);
1da177e4
LT
335
336 /*
337 * Use `swapper_pg_dir' as our page directory.
338 */
339 load_cr3(swapper_pg_dir);
340
341 /* Write 0x1234 to absolute memory location 0x472. The BIOS reads
342 this on booting to tell it to "Bypass memory test (also warm
343 boot)". This seems like a fairly standard thing that gets set by
344 REBOOT.COM programs, and the previous reset routine did this
345 too. */
1da177e4
LT
346 *((unsigned short *)0x472) = reboot_mode;
347
348 /* For the switch to real mode, copy some code to low memory. It has
349 to be in the first 64k because it is running in 16-bit mode, and it
350 has to have the same physical and virtual address, because it turns
351 off paging. Copy it near the end of the first page, out of the way
352 of BIOS variables. */
4d022e35 353 memcpy((void *)(0x1000 - sizeof(real_mode_switch) - 100),
1da177e4 354 real_mode_switch, sizeof (real_mode_switch));
4d022e35 355 memcpy((void *)(0x1000 - 100), code, length);
1da177e4
LT
356
357 /* Set up the IDT for real mode. */
4d37e7e3 358 load_idt(&real_mode_idt);
1da177e4
LT
359
360 /* Set up a GDT from which we can load segment descriptors for real
361 mode. The GDT is not used in real mode; it is just needed here to
362 prepare the descriptors. */
4d37e7e3 363 load_gdt(&real_mode_gdt);
1da177e4
LT
364
365 /* Load the data segment registers, and thus the descriptors ready for
366 real mode. The base address of each segment is 0x100, 16 times the
367 selector value being loaded here. This is so that the segment
368 registers don't have to be reloaded after switching to real mode:
369 the values are consistent for real mode operation already. */
1da177e4
LT
370 __asm__ __volatile__ ("movl $0x0010,%%eax\n"
371 "\tmovl %%eax,%%ds\n"
372 "\tmovl %%eax,%%es\n"
373 "\tmovl %%eax,%%fs\n"
374 "\tmovl %%eax,%%gs\n"
375 "\tmovl %%eax,%%ss" : : : "eax");
376
377 /* Jump to the 16-bit code that we copied earlier. It disables paging
378 and the cache, switches to real mode, and jumps to the BIOS reset
379 entry point. */
1da177e4
LT
380 __asm__ __volatile__ ("ljmp $0x0008,%0"
381 :
4d022e35 382 : "i" ((void *)(0x1000 - sizeof (real_mode_switch) - 100)));
1da177e4 383}
129f6946
AD
384#ifdef CONFIG_APM_MODULE
385EXPORT_SYMBOL(machine_real_restart);
386#endif
1da177e4 387
4d022e35
MB
388#endif /* CONFIG_X86_32 */
389
390static inline void kb_wait(void)
391{
392 int i;
393
c84d6af8
AC
394 for (i = 0; i < 0x10000; i++) {
395 if ((inb(0x64) & 0x02) == 0)
4d022e35 396 break;
c84d6af8
AC
397 udelay(2);
398 }
4d022e35
MB
399}
400
d176720d
EH
401static void vmxoff_nmi(int cpu, struct die_args *args)
402{
403 cpu_emergency_vmxoff();
404}
405
406/* Use NMIs as IPIs to tell all CPUs to disable virtualization
407 */
408static void emergency_vmx_disable_all(void)
409{
410 /* Just make sure we won't change CPUs while doing this */
411 local_irq_disable();
412
413 /* We need to disable VMX on all CPUs before rebooting, otherwise
414 * we risk hanging up the machine, because the CPU ignore INIT
415 * signals when VMX is enabled.
416 *
417 * We can't take any locks and we may be on an inconsistent
418 * state, so we use NMIs as IPIs to tell the other CPUs to disable
419 * VMX and halt.
420 *
421 * For safety, we will avoid running the nmi_shootdown_cpus()
422 * stuff unnecessarily, but we don't have a way to check
423 * if other CPUs have VMX enabled. So we will call it only if the
424 * CPU we are running on has VMX enabled.
425 *
426 * We will miss cases where VMX is not enabled on all CPUs. This
427 * shouldn't do much harm because KVM always enable VMX on all
428 * CPUs anyway. But we can miss it on the small window where KVM
429 * is still enabling VMX.
430 */
431 if (cpu_has_vmx() && cpu_vmx_enabled()) {
432 /* Disable VMX on this CPU.
433 */
434 cpu_vmxoff();
435
436 /* Halt and disable VMX on the other CPUs */
437 nmi_shootdown_cpus(vmxoff_nmi);
438
439 }
440}
441
442
7432d149
IM
443void __attribute__((weak)) mach_reboot_fixups(void)
444{
445}
446
416e2d63 447static void native_machine_emergency_restart(void)
1da177e4 448{
4d022e35
MB
449 int i;
450
d176720d
EH
451 if (reboot_emergency)
452 emergency_vmx_disable_all();
453
4d022e35
MB
454 /* Tell the BIOS if we want cold or warm reboot */
455 *((unsigned short *)__va(0x472)) = reboot_mode;
456
457 for (;;) {
458 /* Could also try the reset bit in the Hammer NB */
459 switch (reboot_type) {
460 case BOOT_KBD:
7432d149
IM
461 mach_reboot_fixups(); /* for board specific fixups */
462
4d022e35
MB
463 for (i = 0; i < 10; i++) {
464 kb_wait();
465 udelay(50);
466 outb(0xfe, 0x64); /* pulse reset low */
467 udelay(50);
468 }
469
470 case BOOT_TRIPLE:
ebdd561a 471 load_idt(&no_idt);
4d022e35
MB
472 __asm__ __volatile__("int3");
473
474 reboot_type = BOOT_KBD;
475 break;
476
477#ifdef CONFIG_X86_32
478 case BOOT_BIOS:
479 machine_real_restart(jump_to_bios, sizeof(jump_to_bios));
480
481 reboot_type = BOOT_KBD;
482 break;
483#endif
484
485 case BOOT_ACPI:
486 acpi_reboot();
487 reboot_type = BOOT_KBD;
488 break;
489
4d022e35
MB
490 case BOOT_EFI:
491 if (efi_enabled)
14d7ca5c
PA
492 efi.reset_system(reboot_mode ?
493 EFI_RESET_WARM :
494 EFI_RESET_COLD,
4d022e35 495 EFI_SUCCESS, 0, NULL);
b47b9288 496 reboot_type = BOOT_KBD;
14d7ca5c 497 break;
4d022e35 498
14d7ca5c
PA
499 case BOOT_CF9:
500 port_cf9_safe = true;
501 /* fall through */
4d022e35 502
14d7ca5c
PA
503 case BOOT_CF9_COND:
504 if (port_cf9_safe) {
505 u8 cf9 = inb(0xcf9) & ~6;
506 outb(cf9|2, 0xcf9); /* Request hard reset */
507 udelay(50);
508 outb(cf9|6, 0xcf9); /* Actually do the reset */
509 udelay(50);
510 }
4d022e35
MB
511 reboot_type = BOOT_KBD;
512 break;
513 }
514 }
515}
516
3c62c625 517void native_machine_shutdown(void)
4d022e35
MB
518{
519 /* Stop the cpus and apics */
1da177e4 520#ifdef CONFIG_SMP
dd2a1305
EB
521
522 /* The boot cpu is always logical cpu 0 */
65c01184 523 int reboot_cpu_id = 0;
dd2a1305 524
4d022e35 525#ifdef CONFIG_X86_32
dd2a1305 526 /* See if there has been given a command line override */
9628937d 527 if ((reboot_cpu != -1) && (reboot_cpu < nr_cpu_ids) &&
0bc3cc03 528 cpu_online(reboot_cpu))
dd2a1305 529 reboot_cpu_id = reboot_cpu;
4d022e35 530#endif
1da177e4 531
4d022e35 532 /* Make certain the cpu I'm about to reboot on is online */
0bc3cc03 533 if (!cpu_online(reboot_cpu_id))
dd2a1305 534 reboot_cpu_id = smp_processor_id();
dd2a1305
EB
535
536 /* Make certain I only run on the appropriate processor */
9628937d 537 set_cpus_allowed_ptr(current, cpumask_of(reboot_cpu_id));
dd2a1305 538
4d022e35
MB
539 /* O.K Now that I'm on the appropriate processor,
540 * stop all of the others.
1da177e4
LT
541 */
542 smp_send_stop();
4d022e35 543#endif
1da177e4
LT
544
545 lapic_shutdown();
546
547#ifdef CONFIG_X86_IO_APIC
548 disable_IO_APIC();
549#endif
4d022e35 550
c86c7fbc
OH
551#ifdef CONFIG_HPET_TIMER
552 hpet_disable();
553#endif
dd2a1305 554
4d022e35
MB
555#ifdef CONFIG_X86_64
556 pci_iommu_shutdown();
557#endif
973efae2
JF
558}
559
d176720d
EH
560static void __machine_emergency_restart(int emergency)
561{
562 reboot_emergency = emergency;
563 machine_ops.emergency_restart();
564}
565
416e2d63 566static void native_machine_restart(char *__unused)
dd2a1305 567{
4d022e35 568 printk("machine restart\n");
1da177e4 569
4d022e35
MB
570 if (!reboot_force)
571 machine_shutdown();
d176720d 572 __machine_emergency_restart(0);
4a1421f8
EB
573}
574
416e2d63 575static void native_machine_halt(void)
1da177e4 576{
d3ec5cae
IV
577 /* stop other cpus and apics */
578 machine_shutdown();
579
580 /* stop this cpu */
581 stop_this_cpu(NULL);
1da177e4
LT
582}
583
416e2d63 584static void native_machine_power_off(void)
1da177e4 585{
6e3fbee5 586 if (pm_power_off) {
4d022e35
MB
587 if (!reboot_force)
588 machine_shutdown();
1da177e4 589 pm_power_off();
6e3fbee5 590 }
1da177e4
LT
591}
592
07f3331c 593struct machine_ops machine_ops = {
416e2d63
JB
594 .power_off = native_machine_power_off,
595 .shutdown = native_machine_shutdown,
596 .emergency_restart = native_machine_emergency_restart,
597 .restart = native_machine_restart,
ed23dc6f
GC
598 .halt = native_machine_halt,
599#ifdef CONFIG_KEXEC
600 .crash_shutdown = native_machine_crash_shutdown,
601#endif
07f3331c 602};
416e2d63
JB
603
604void machine_power_off(void)
605{
606 machine_ops.power_off();
607}
608
609void machine_shutdown(void)
610{
611 machine_ops.shutdown();
612}
613
614void machine_emergency_restart(void)
615{
d176720d 616 __machine_emergency_restart(1);
416e2d63
JB
617}
618
619void machine_restart(char *cmd)
620{
621 machine_ops.restart(cmd);
622}
623
624void machine_halt(void)
625{
626 machine_ops.halt();
627}
628
ed23dc6f
GC
629#ifdef CONFIG_KEXEC
630void machine_crash_shutdown(struct pt_regs *regs)
631{
632 machine_ops.crash_shutdown(regs);
633}
634#endif
2ddded21
EH
635
636
bb8dd270 637#if defined(CONFIG_SMP)
2ddded21
EH
638
639/* This keeps a track of which one is crashing cpu. */
640static int crashing_cpu;
641static nmi_shootdown_cb shootdown_callback;
642
643static atomic_t waiting_for_crash_ipi;
644
645static int crash_nmi_callback(struct notifier_block *self,
646 unsigned long val, void *data)
647{
648 int cpu;
649
650 if (val != DIE_NMI_IPI)
651 return NOTIFY_OK;
652
653 cpu = raw_smp_processor_id();
654
655 /* Don't do anything if this handler is invoked on crashing cpu.
656 * Otherwise, system will completely hang. Crashing cpu can get
657 * an NMI if system was initially booted with nmi_watchdog parameter.
658 */
659 if (cpu == crashing_cpu)
660 return NOTIFY_STOP;
661 local_irq_disable();
662
663 shootdown_callback(cpu, (struct die_args *)data);
664
665 atomic_dec(&waiting_for_crash_ipi);
666 /* Assume hlt works */
667 halt();
668 for (;;)
669 cpu_relax();
670
671 return 1;
672}
673
674static void smp_send_nmi_allbutself(void)
675{
dac5f412 676 apic->send_IPI_allbutself(NMI_VECTOR);
2ddded21
EH
677}
678
679static struct notifier_block crash_nmi_nb = {
680 .notifier_call = crash_nmi_callback,
681};
682
bb8dd270
EH
683/* Halt all other CPUs, calling the specified function on each of them
684 *
685 * This function can be used to halt all other CPUs on crash
686 * or emergency reboot time. The function passed as parameter
687 * will be called inside a NMI handler on all CPUs.
688 */
2ddded21
EH
689void nmi_shootdown_cpus(nmi_shootdown_cb callback)
690{
691 unsigned long msecs;
c415b3dc 692 local_irq_disable();
2ddded21
EH
693
694 /* Make a note of crashing cpu. Will be used in NMI callback.*/
695 crashing_cpu = safe_smp_processor_id();
696
697 shootdown_callback = callback;
698
699 atomic_set(&waiting_for_crash_ipi, num_online_cpus() - 1);
700 /* Would it be better to replace the trap vector here? */
701 if (register_die_notifier(&crash_nmi_nb))
702 return; /* return what? */
703 /* Ensure the new callback function is set before sending
704 * out the NMI
705 */
706 wmb();
707
708 smp_send_nmi_allbutself();
709
710 msecs = 1000; /* Wait at most a second for the other cpus to stop */
711 while ((atomic_read(&waiting_for_crash_ipi) > 0) && msecs) {
712 mdelay(1);
713 msecs--;
714 }
715
716 /* Leave the nmi callback set */
717}
bb8dd270
EH
718#else /* !CONFIG_SMP */
719void nmi_shootdown_cpus(nmi_shootdown_cb callback)
720{
721 /* No other CPUs to shoot down */
722}
2ddded21 723#endif
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