Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
fe599f9f | 2 | * RTC related functions |
1da177e4 | 3 | */ |
8383d821 JSR |
4 | #include <linux/platform_device.h> |
5 | #include <linux/mc146818rtc.h> | |
1122b134 | 6 | #include <linux/acpi.h> |
fe599f9f | 7 | #include <linux/bcd.h> |
69c60c88 | 8 | #include <linux/export.h> |
1da2e3d6 | 9 | #include <linux/pnp.h> |
3bcbaf6e | 10 | #include <linux/of.h> |
1da177e4 | 11 | |
cdc7957d | 12 | #include <asm/vsyscall.h> |
7bd867df | 13 | #include <asm/x86_init.h> |
8383d821 | 14 | #include <asm/time.h> |
05454c26 | 15 | #include <asm/intel-mid.h> |
3195ef59 | 16 | #include <asm/rtc.h> |
1da177e4 | 17 | |
1122b134 | 18 | #ifdef CONFIG_X86_32 |
1122b134 TG |
19 | /* |
20 | * This is a special lock that is owned by the CPU and holds the index | |
21 | * register we are working with. It is required for NMI access to the | |
22 | * CMOS/RTC registers. See include/asm-i386/mc146818rtc.h for details. | |
23 | */ | |
8383d821 | 24 | volatile unsigned long cmos_lock; |
1122b134 | 25 | EXPORT_SYMBOL(cmos_lock); |
8383d821 | 26 | #endif /* CONFIG_X86_32 */ |
1122b134 | 27 | |
b62576a2 AK |
28 | /* For two digit years assume time is always after that */ |
29 | #define CMOS_YEARS_OFFS 2000 | |
30 | ||
1122b134 TG |
31 | DEFINE_SPINLOCK(rtc_lock); |
32 | EXPORT_SYMBOL(rtc_lock); | |
33 | ||
1da177e4 LT |
34 | /* |
35 | * In order to set the CMOS clock precisely, set_rtc_mmss has to be | |
36 | * called 500 ms after the second nowtime has started, because when | |
37 | * nowtime is written into the registers of the CMOS clock, it will | |
38 | * jump to the next second precisely 500 ms later. Check the Motorola | |
39 | * MC146818A or Dallas DS12887 data sheet for details. | |
1da177e4 | 40 | */ |
3565184e | 41 | int mach_set_rtc_mmss(const struct timespec *now) |
1da177e4 | 42 | { |
3565184e | 43 | unsigned long nowtime = now->tv_sec; |
3195ef59 | 44 | struct rtc_time tm; |
8383d821 | 45 | int retval = 0; |
1da177e4 | 46 | |
3195ef59 PB |
47 | rtc_time_to_tm(nowtime, &tm); |
48 | if (!rtc_valid_tm(&tm)) { | |
49 | retval = set_rtc_time(&tm); | |
50 | if (retval) | |
51 | printk(KERN_ERR "%s: RTC write failed with error %d\n", | |
52 | __FUNCTION__, retval); | |
1da177e4 | 53 | } else { |
3195ef59 PB |
54 | printk(KERN_ERR |
55 | "%s: Invalid RTC value: write of %lx to RTC failed\n", | |
56 | __FUNCTION__, nowtime); | |
57 | retval = -EINVAL; | |
1da177e4 | 58 | } |
1da177e4 LT |
59 | return retval; |
60 | } | |
61 | ||
3565184e | 62 | void mach_get_cmos_time(struct timespec *now) |
1da177e4 | 63 | { |
068c9222 | 64 | unsigned int status, year, mon, day, hour, min, sec, century = 0; |
47997d75 MF |
65 | unsigned long flags; |
66 | ||
67 | spin_lock_irqsave(&rtc_lock, flags); | |
1122b134 TG |
68 | |
69 | /* | |
70 | * If UIP is clear, then we have >= 244 microseconds before | |
71 | * RTC registers will be updated. Spec sheet says that this | |
72 | * is the reliable way to read RTC - registers. If UIP is set | |
73 | * then the register access might be invalid. | |
74 | */ | |
75 | while ((CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP)) | |
76 | cpu_relax(); | |
77 | ||
78 | sec = CMOS_READ(RTC_SECONDS); | |
79 | min = CMOS_READ(RTC_MINUTES); | |
80 | hour = CMOS_READ(RTC_HOURS); | |
81 | day = CMOS_READ(RTC_DAY_OF_MONTH); | |
82 | mon = CMOS_READ(RTC_MONTH); | |
83 | year = CMOS_READ(RTC_YEAR); | |
84 | ||
45de7079 | 85 | #ifdef CONFIG_ACPI |
1122b134 TG |
86 | if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID && |
87 | acpi_gbl_FADT.century) | |
88 | century = CMOS_READ(acpi_gbl_FADT.century); | |
89 | #endif | |
90 | ||
068c9222 | 91 | status = CMOS_READ(RTC_CONTROL); |
45de7079 | 92 | WARN_ON_ONCE(RTC_ALWAYS_BCD && (status & RTC_DM_BINARY)); |
068c9222 | 93 | |
47997d75 MF |
94 | spin_unlock_irqrestore(&rtc_lock, flags); |
95 | ||
068c9222 | 96 | if (RTC_ALWAYS_BCD || !(status & RTC_DM_BINARY)) { |
357c6e63 AB |
97 | sec = bcd2bin(sec); |
98 | min = bcd2bin(min); | |
99 | hour = bcd2bin(hour); | |
100 | day = bcd2bin(day); | |
101 | mon = bcd2bin(mon); | |
102 | year = bcd2bin(year); | |
41623b06 MM |
103 | } |
104 | ||
1122b134 | 105 | if (century) { |
357c6e63 | 106 | century = bcd2bin(century); |
1122b134 | 107 | year += century * 100; |
b62576a2 | 108 | } else |
1122b134 | 109 | year += CMOS_YEARS_OFFS; |
1da177e4 | 110 | |
3565184e DV |
111 | now->tv_sec = mktime(year, mon, day, hour, min, sec); |
112 | now->tv_nsec = 0; | |
1da177e4 LT |
113 | } |
114 | ||
fe599f9f TG |
115 | /* Routines for accessing the CMOS RAM/RTC. */ |
116 | unsigned char rtc_cmos_read(unsigned char addr) | |
117 | { | |
118 | unsigned char val; | |
119 | ||
120 | lock_cmos_prefix(addr); | |
04aaa7ba DR |
121 | outb(addr, RTC_PORT(0)); |
122 | val = inb(RTC_PORT(1)); | |
fe599f9f | 123 | lock_cmos_suffix(addr); |
8383d821 | 124 | |
fe599f9f TG |
125 | return val; |
126 | } | |
127 | EXPORT_SYMBOL(rtc_cmos_read); | |
128 | ||
129 | void rtc_cmos_write(unsigned char val, unsigned char addr) | |
130 | { | |
131 | lock_cmos_prefix(addr); | |
04aaa7ba DR |
132 | outb(addr, RTC_PORT(0)); |
133 | outb(val, RTC_PORT(1)); | |
fe599f9f TG |
134 | lock_cmos_suffix(addr); |
135 | } | |
136 | EXPORT_SYMBOL(rtc_cmos_write); | |
137 | ||
7bd867df | 138 | int update_persistent_clock(struct timespec now) |
fe599f9f | 139 | { |
3565184e | 140 | return x86_platform.set_wallclock(&now); |
fe599f9f TG |
141 | } |
142 | ||
143 | /* not static: needed by APM */ | |
d4f587c6 | 144 | void read_persistent_clock(struct timespec *ts) |
fe599f9f | 145 | { |
3565184e | 146 | x86_platform.get_wallclock(ts); |
fe599f9f TG |
147 | } |
148 | ||
1da2e3d6 SS |
149 | |
150 | static struct resource rtc_resources[] = { | |
151 | [0] = { | |
152 | .start = RTC_PORT(0), | |
153 | .end = RTC_PORT(1), | |
154 | .flags = IORESOURCE_IO, | |
155 | }, | |
156 | [1] = { | |
157 | .start = RTC_IRQ, | |
158 | .end = RTC_IRQ, | |
159 | .flags = IORESOURCE_IRQ, | |
160 | } | |
161 | }; | |
162 | ||
163 | static struct platform_device rtc_device = { | |
164 | .name = "rtc_cmos", | |
165 | .id = -1, | |
166 | .resource = rtc_resources, | |
167 | .num_resources = ARRAY_SIZE(rtc_resources), | |
168 | }; | |
169 | ||
170 | static __init int add_rtc_cmos(void) | |
171 | { | |
172 | #ifdef CONFIG_PNP | |
75fdd155 | 173 | static const char * const const ids[] __initconst = |
758a7f7b BH |
174 | { "PNP0b00", "PNP0b01", "PNP0b02", }; |
175 | struct pnp_dev *dev; | |
176 | struct pnp_id *id; | |
177 | int i; | |
178 | ||
179 | pnp_for_each_dev(dev) { | |
180 | for (id = dev->id; id; id = id->next) { | |
181 | for (i = 0; i < ARRAY_SIZE(ids); i++) { | |
182 | if (compare_pnp_id(id, ids[i]) != 0) | |
183 | return 0; | |
184 | } | |
185 | } | |
186 | } | |
187 | #endif | |
3bcbaf6e SAS |
188 | if (of_have_populated_dt()) |
189 | return 0; | |
758a7f7b | 190 | |
35d47699 | 191 | /* Intel MID platforms don't have ioport rtc */ |
712b6aa8 | 192 | if (intel_mid_identify_cpu()) |
35d47699 MN |
193 | return -ENODEV; |
194 | ||
ee5872be JB |
195 | #ifdef CONFIG_ACPI |
196 | if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_CMOS_RTC) { | |
197 | /* This warning can likely go away again in a year or two. */ | |
198 | pr_info("ACPI: not registering RTC platform device\n"); | |
199 | return -ENODEV; | |
200 | } | |
201 | #endif | |
202 | ||
1da2e3d6 | 203 | platform_device_register(&rtc_device); |
758a7f7b BH |
204 | dev_info(&rtc_device.dev, |
205 | "registered platform RTC device (no PNP device found)\n"); | |
8383d821 | 206 | |
1da2e3d6 SS |
207 | return 0; |
208 | } | |
209 | device_initcall(add_rtc_cmos); |