Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 | 2 | * Copyright (C) 1995 Linus Torvalds |
1da177e4 LT |
3 | */ |
4 | ||
5 | /* | |
6 | * This file handles the architecture-dependent parts of initialization | |
7 | */ | |
8 | ||
9 | #include <linux/errno.h> | |
10 | #include <linux/sched.h> | |
11 | #include <linux/kernel.h> | |
12 | #include <linux/mm.h> | |
13 | #include <linux/stddef.h> | |
14 | #include <linux/unistd.h> | |
15 | #include <linux/ptrace.h> | |
16 | #include <linux/slab.h> | |
17 | #include <linux/user.h> | |
894673ee | 18 | #include <linux/screen_info.h> |
1da177e4 LT |
19 | #include <linux/ioport.h> |
20 | #include <linux/delay.h> | |
1da177e4 LT |
21 | #include <linux/init.h> |
22 | #include <linux/initrd.h> | |
23 | #include <linux/highmem.h> | |
24 | #include <linux/bootmem.h> | |
25 | #include <linux/module.h> | |
26 | #include <asm/processor.h> | |
27 | #include <linux/console.h> | |
28 | #include <linux/seq_file.h> | |
aac04b32 | 29 | #include <linux/crash_dump.h> |
1da177e4 LT |
30 | #include <linux/root_dev.h> |
31 | #include <linux/pci.h> | |
eee206c3 | 32 | #include <asm/pci-direct.h> |
5b83683f | 33 | #include <linux/efi.h> |
1da177e4 LT |
34 | #include <linux/acpi.h> |
35 | #include <linux/kallsyms.h> | |
36 | #include <linux/edd.h> | |
138fe4e0 | 37 | #include <linux/iscsi_ibft.h> |
bbfceef4 | 38 | #include <linux/mmzone.h> |
5f5609df | 39 | #include <linux/kexec.h> |
95235ca2 | 40 | #include <linux/cpufreq.h> |
e9928674 | 41 | #include <linux/dmi.h> |
17a941d8 | 42 | #include <linux/dma-mapping.h> |
681558fd | 43 | #include <linux/ctype.h> |
eee206c3 | 44 | #include <linux/sort.h> |
746ef0cd | 45 | #include <linux/uaccess.h> |
f212ec4b | 46 | #include <linux/init_ohci1394_dma.h> |
790c73f6 | 47 | #include <linux/kvm_para.h> |
bbfceef4 | 48 | |
1da177e4 LT |
49 | #include <asm/mtrr.h> |
50 | #include <asm/uaccess.h> | |
51 | #include <asm/system.h> | |
e4026440 | 52 | #include <asm/vsyscall.h> |
1da177e4 LT |
53 | #include <asm/io.h> |
54 | #include <asm/smp.h> | |
55 | #include <asm/msr.h> | |
56 | #include <asm/desc.h> | |
57 | #include <video/edid.h> | |
58 | #include <asm/e820.h> | |
59 | #include <asm/dma.h> | |
aaf23042 | 60 | #include <asm/gart.h> |
1da177e4 LT |
61 | #include <asm/mpspec.h> |
62 | #include <asm/mmu_context.h> | |
1da177e4 LT |
63 | #include <asm/proto.h> |
64 | #include <asm/setup.h> | |
1da177e4 | 65 | #include <asm/numa.h> |
2bc0414e | 66 | #include <asm/sections.h> |
f2d3efed | 67 | #include <asm/dmi.h> |
00bf4098 | 68 | #include <asm/cacheflush.h> |
af7a78e9 | 69 | #include <asm/mce.h> |
eee3af4a | 70 | #include <asm/ds.h> |
df3825c5 | 71 | #include <asm/topology.h> |
e44b7b75 | 72 | #include <asm/trampoline.h> |
8d4a4300 | 73 | #include <asm/pat.h> |
d364319b | 74 | #include <asm/mmconfig.h> |
1da177e4 | 75 | |
dd46e3ca | 76 | #include <mach_apic.h> |
746ef0cd GOC |
77 | #ifdef CONFIG_PARAVIRT |
78 | #include <asm/paravirt.h> | |
79 | #else | |
80 | #define ARCH_SETUP | |
81 | #endif | |
82 | ||
1da177e4 LT |
83 | /* |
84 | * Machine setup.. | |
85 | */ | |
86 | ||
6c231b7b | 87 | struct cpuinfo_x86 boot_cpu_data __read_mostly; |
2ee60e17 | 88 | EXPORT_SYMBOL(boot_cpu_data); |
1da177e4 | 89 | |
7d851c8d AK |
90 | __u32 cleared_cpu_caps[NCAPINTS] __cpuinitdata; |
91 | ||
1da177e4 LT |
92 | unsigned long mmu_cr4_features; |
93 | ||
1da177e4 LT |
94 | /* Boot loader ID as an integer, for the benefit of proc_dointvec */ |
95 | int bootloader_type; | |
96 | ||
97 | unsigned long saved_video_mode; | |
98 | ||
04e1ba85 | 99 | /* |
f2d3efed AK |
100 | * Early DMI memory |
101 | */ | |
102 | int dmi_alloc_index; | |
103 | char dmi_alloc_data[DMI_MAX_DATA]; | |
104 | ||
1da177e4 LT |
105 | /* |
106 | * Setup options | |
107 | */ | |
1da177e4 | 108 | struct screen_info screen_info; |
2ee60e17 | 109 | EXPORT_SYMBOL(screen_info); |
1da177e4 LT |
110 | struct sys_desc_table_struct { |
111 | unsigned short length; | |
112 | unsigned char table[0]; | |
113 | }; | |
114 | ||
115 | struct edid_info edid_info; | |
ba70710e | 116 | EXPORT_SYMBOL_GPL(edid_info); |
1da177e4 LT |
117 | |
118 | extern int root_mountflags; | |
1da177e4 | 119 | |
adf48856 | 120 | char __initdata command_line[COMMAND_LINE_SIZE]; |
1da177e4 | 121 | |
a2b4bd9c | 122 | static struct resource standard_io_resources[] = { |
1da177e4 LT |
123 | { .name = "dma1", .start = 0x00, .end = 0x1f, |
124 | .flags = IORESOURCE_BUSY | IORESOURCE_IO }, | |
125 | { .name = "pic1", .start = 0x20, .end = 0x21, | |
126 | .flags = IORESOURCE_BUSY | IORESOURCE_IO }, | |
127 | { .name = "timer0", .start = 0x40, .end = 0x43, | |
128 | .flags = IORESOURCE_BUSY | IORESOURCE_IO }, | |
129 | { .name = "timer1", .start = 0x50, .end = 0x53, | |
130 | .flags = IORESOURCE_BUSY | IORESOURCE_IO }, | |
9096bd7a HW |
131 | { .name = "keyboard", .start = 0x60, .end = 0x60, |
132 | .flags = IORESOURCE_BUSY | IORESOURCE_IO }, | |
133 | { .name = "keyboard", .start = 0x64, .end = 0x64, | |
1da177e4 LT |
134 | .flags = IORESOURCE_BUSY | IORESOURCE_IO }, |
135 | { .name = "dma page reg", .start = 0x80, .end = 0x8f, | |
136 | .flags = IORESOURCE_BUSY | IORESOURCE_IO }, | |
137 | { .name = "pic2", .start = 0xa0, .end = 0xa1, | |
138 | .flags = IORESOURCE_BUSY | IORESOURCE_IO }, | |
139 | { .name = "dma2", .start = 0xc0, .end = 0xdf, | |
140 | .flags = IORESOURCE_BUSY | IORESOURCE_IO }, | |
141 | { .name = "fpu", .start = 0xf0, .end = 0xff, | |
142 | .flags = IORESOURCE_BUSY | IORESOURCE_IO } | |
143 | }; | |
144 | ||
1da177e4 LT |
145 | #define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM) |
146 | ||
c9cce83d | 147 | static struct resource data_resource = { |
1da177e4 LT |
148 | .name = "Kernel data", |
149 | .start = 0, | |
150 | .end = 0, | |
151 | .flags = IORESOURCE_RAM, | |
152 | }; | |
c9cce83d | 153 | static struct resource code_resource = { |
1da177e4 LT |
154 | .name = "Kernel code", |
155 | .start = 0, | |
156 | .end = 0, | |
157 | .flags = IORESOURCE_RAM, | |
158 | }; | |
c9cce83d | 159 | static struct resource bss_resource = { |
00bf4098 BW |
160 | .name = "Kernel bss", |
161 | .start = 0, | |
162 | .end = 0, | |
163 | .flags = IORESOURCE_RAM, | |
164 | }; | |
1da177e4 | 165 | |
8c61b900 TG |
166 | static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c); |
167 | ||
2c8c0e6b AK |
168 | #ifdef CONFIG_PROC_VMCORE |
169 | /* elfcorehdr= specifies the location of elf core header | |
170 | * stored by the crashed kernel. This option will be passed | |
171 | * by kexec loader to the capture kernel. | |
172 | */ | |
173 | static int __init setup_elfcorehdr(char *arg) | |
681558fd | 174 | { |
2c8c0e6b AK |
175 | char *end; |
176 | if (!arg) | |
177 | return -EINVAL; | |
178 | elfcorehdr_addr = memparse(arg, &end); | |
179 | return end > arg ? 0 : -EINVAL; | |
681558fd | 180 | } |
2c8c0e6b | 181 | early_param("elfcorehdr", setup_elfcorehdr); |
e2c03888 AK |
182 | #endif |
183 | ||
2b97690f | 184 | #ifndef CONFIG_NUMA |
bbfceef4 MT |
185 | static void __init |
186 | contig_initmem_init(unsigned long start_pfn, unsigned long end_pfn) | |
1da177e4 | 187 | { |
bbfceef4 MT |
188 | unsigned long bootmap_size, bootmap; |
189 | ||
bbfceef4 | 190 | bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT; |
24a5da73 YL |
191 | bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size, |
192 | PAGE_SIZE); | |
bbfceef4 | 193 | if (bootmap == -1L) |
04e1ba85 | 194 | panic("Cannot find bootmem map of size %ld\n", bootmap_size); |
bbfceef4 | 195 | bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn); |
5cb248ab MG |
196 | e820_register_active_regions(0, start_pfn, end_pfn); |
197 | free_bootmem_with_active_regions(0, end_pfn); | |
1a27fc0a | 198 | early_res_to_bootmem(0, end_pfn<<PAGE_SHIFT); |
72a7fe39 | 199 | reserve_bootmem(bootmap, bootmap_size, BOOTMEM_DEFAULT); |
04e1ba85 | 200 | } |
1da177e4 LT |
201 | #endif |
202 | ||
1da177e4 LT |
203 | #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE) |
204 | struct edd edd; | |
205 | #ifdef CONFIG_EDD_MODULE | |
206 | EXPORT_SYMBOL(edd); | |
207 | #endif | |
208 | /** | |
209 | * copy_edd() - Copy the BIOS EDD information | |
210 | * from boot_params into a safe place. | |
211 | * | |
212 | */ | |
213 | static inline void copy_edd(void) | |
214 | { | |
30c82645 PA |
215 | memcpy(edd.mbr_signature, boot_params.edd_mbr_sig_buffer, |
216 | sizeof(edd.mbr_signature)); | |
217 | memcpy(edd.edd_info, boot_params.eddbuf, sizeof(edd.edd_info)); | |
218 | edd.mbr_signature_nr = boot_params.edd_mbr_sig_buf_entries; | |
219 | edd.edd_info_nr = boot_params.eddbuf_entries; | |
1da177e4 LT |
220 | } |
221 | #else | |
222 | static inline void copy_edd(void) | |
223 | { | |
224 | } | |
225 | #endif | |
226 | ||
5c3391f9 BW |
227 | #ifdef CONFIG_KEXEC |
228 | static void __init reserve_crashkernel(void) | |
229 | { | |
18a01a3b | 230 | unsigned long long total_mem; |
5c3391f9 BW |
231 | unsigned long long crash_size, crash_base; |
232 | int ret; | |
233 | ||
18a01a3b | 234 | total_mem = ((unsigned long long)max_low_pfn - min_low_pfn) << PAGE_SHIFT; |
5c3391f9 | 235 | |
18a01a3b | 236 | ret = parse_crashkernel(boot_command_line, total_mem, |
5c3391f9 BW |
237 | &crash_size, &crash_base); |
238 | if (ret == 0 && crash_size) { | |
18a01a3b | 239 | if (crash_base <= 0) { |
5c3391f9 BW |
240 | printk(KERN_INFO "crashkernel reservation failed - " |
241 | "you have to specify a base address\n"); | |
18a01a3b BW |
242 | return; |
243 | } | |
244 | ||
245 | if (reserve_bootmem(crash_base, crash_size, | |
246 | BOOTMEM_EXCLUSIVE) < 0) { | |
247 | printk(KERN_INFO "crashkernel reservation failed - " | |
248 | "memory is in use\n"); | |
249 | return; | |
250 | } | |
251 | ||
252 | printk(KERN_INFO "Reserving %ldMB of memory at %ldMB " | |
253 | "for crashkernel (System RAM: %ldMB)\n", | |
254 | (unsigned long)(crash_size >> 20), | |
255 | (unsigned long)(crash_base >> 20), | |
256 | (unsigned long)(total_mem >> 20)); | |
257 | crashk_res.start = crash_base; | |
258 | crashk_res.end = crash_base + crash_size - 1; | |
3def3d6d | 259 | insert_resource(&iomem_resource, &crashk_res); |
5c3391f9 BW |
260 | } |
261 | } | |
262 | #else | |
263 | static inline void __init reserve_crashkernel(void) | |
264 | {} | |
265 | #endif | |
266 | ||
746ef0cd | 267 | /* Overridden in paravirt.c if CONFIG_PARAVIRT */ |
e3cfac84 | 268 | void __attribute__((weak)) __init memory_setup(void) |
746ef0cd GOC |
269 | { |
270 | machine_specific_memory_setup(); | |
271 | } | |
272 | ||
8b664aa6 HY |
273 | static void __init parse_setup_data(void) |
274 | { | |
275 | struct setup_data *data; | |
276 | unsigned long pa_data; | |
277 | ||
278 | if (boot_params.hdr.version < 0x0209) | |
279 | return; | |
280 | pa_data = boot_params.hdr.setup_data; | |
281 | while (pa_data) { | |
282 | data = early_ioremap(pa_data, PAGE_SIZE); | |
283 | switch (data->type) { | |
284 | default: | |
285 | break; | |
286 | } | |
c14b2adf | 287 | #ifndef CONFIG_DEBUG_BOOT_PARAMS |
8b664aa6 | 288 | free_early(pa_data, pa_data+sizeof(*data)+data->len); |
c14b2adf | 289 | #endif |
8b664aa6 HY |
290 | pa_data = data->next; |
291 | early_iounmap(data, PAGE_SIZE); | |
292 | } | |
293 | } | |
294 | ||
f212ec4b BK |
295 | /* |
296 | * setup_arch - architecture-specific boot-time initializations | |
297 | * | |
298 | * Note: On x86_64, fixmaps are ready for use even before this is called. | |
299 | */ | |
1da177e4 LT |
300 | void __init setup_arch(char **cmdline_p) |
301 | { | |
04e1ba85 TG |
302 | unsigned i; |
303 | ||
adf48856 | 304 | printk(KERN_INFO "Command line: %s\n", boot_command_line); |
43c85c9c | 305 | |
30c82645 PA |
306 | ROOT_DEV = old_decode_dev(boot_params.hdr.root_dev); |
307 | screen_info = boot_params.screen_info; | |
308 | edid_info = boot_params.edid_info; | |
309 | saved_video_mode = boot_params.hdr.vid_mode; | |
310 | bootloader_type = boot_params.hdr.type_of_loader; | |
1da177e4 LT |
311 | |
312 | #ifdef CONFIG_BLK_DEV_RAM | |
30c82645 PA |
313 | rd_image_start = boot_params.hdr.ram_size & RAMDISK_IMAGE_START_MASK; |
314 | rd_prompt = ((boot_params.hdr.ram_size & RAMDISK_PROMPT_FLAG) != 0); | |
315 | rd_doload = ((boot_params.hdr.ram_size & RAMDISK_LOAD_FLAG) != 0); | |
1da177e4 | 316 | #endif |
5b83683f HY |
317 | #ifdef CONFIG_EFI |
318 | if (!strncmp((char *)&boot_params.efi_info.efi_loader_signature, | |
319 | "EL64", 4)) | |
320 | efi_enabled = 1; | |
321 | #endif | |
746ef0cd GOC |
322 | |
323 | ARCH_SETUP | |
324 | ||
325 | memory_setup(); | |
1da177e4 LT |
326 | copy_edd(); |
327 | ||
30c82645 | 328 | if (!boot_params.hdr.root_flags) |
1da177e4 LT |
329 | root_mountflags &= ~MS_RDONLY; |
330 | init_mm.start_code = (unsigned long) &_text; | |
331 | init_mm.end_code = (unsigned long) &_etext; | |
332 | init_mm.end_data = (unsigned long) &_edata; | |
333 | init_mm.brk = (unsigned long) &_end; | |
334 | ||
e3ebadd9 LT |
335 | code_resource.start = virt_to_phys(&_text); |
336 | code_resource.end = virt_to_phys(&_etext)-1; | |
337 | data_resource.start = virt_to_phys(&_etext); | |
338 | data_resource.end = virt_to_phys(&_edata)-1; | |
00bf4098 BW |
339 | bss_resource.start = virt_to_phys(&__bss_start); |
340 | bss_resource.end = virt_to_phys(&__bss_stop)-1; | |
1da177e4 | 341 | |
1da177e4 LT |
342 | early_identify_cpu(&boot_cpu_data); |
343 | ||
adf48856 | 344 | strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE); |
2c8c0e6b AK |
345 | *cmdline_p = command_line; |
346 | ||
8b664aa6 HY |
347 | parse_setup_data(); |
348 | ||
2c8c0e6b AK |
349 | parse_early_param(); |
350 | ||
f212ec4b BK |
351 | #ifdef CONFIG_PROVIDE_OHCI1394_DMA_INIT |
352 | if (init_ohci1394_dma_early) | |
353 | init_ohci1394_dma_on_all_controllers(); | |
354 | #endif | |
355 | ||
2c8c0e6b | 356 | finish_e820_parsing(); |
9ca33eb6 | 357 | |
3def3d6d YL |
358 | /* after parse_early_param, so could debug it */ |
359 | insert_resource(&iomem_resource, &code_resource); | |
360 | insert_resource(&iomem_resource, &data_resource); | |
361 | insert_resource(&iomem_resource, &bss_resource); | |
362 | ||
aaf23042 YL |
363 | early_gart_iommu_check(); |
364 | ||
5cb248ab | 365 | e820_register_active_regions(0, 0, -1UL); |
1da177e4 LT |
366 | /* |
367 | * partially used pages are not usable - thus | |
368 | * we are rounding upwards: | |
369 | */ | |
370 | end_pfn = e820_end_of_ram(); | |
99fc8d42 JB |
371 | /* update e820 for memory not covered by WB MTRRs */ |
372 | mtrr_bp_init(); | |
373 | if (mtrr_trim_uncached_memory(end_pfn)) { | |
374 | e820_register_active_regions(0, 0, -1UL); | |
375 | end_pfn = e820_end_of_ram(); | |
376 | } | |
377 | ||
caff0710 | 378 | num_physpages = end_pfn; |
1da177e4 LT |
379 | |
380 | check_efer(); | |
381 | ||
cc615032 | 382 | max_pfn_mapped = init_memory_mapping(0, (max_pfn_mapped << PAGE_SHIFT)); |
5b83683f HY |
383 | if (efi_enabled) |
384 | efi_init(); | |
1da177e4 | 385 | |
2785c8d0 | 386 | vsmp_init(); |
2785c8d0 | 387 | |
f2d3efed AK |
388 | dmi_scan_machine(); |
389 | ||
b02aae9c RH |
390 | io_delay_init(); |
391 | ||
790c73f6 GOC |
392 | #ifdef CONFIG_KVM_CLOCK |
393 | kvmclock_init(); | |
394 | #endif | |
395 | ||
71fff5e6 | 396 | #ifdef CONFIG_SMP |
df3825c5 | 397 | /* setup to use the early static init tables during kernel startup */ |
3effef1f YL |
398 | x86_cpu_to_apicid_early_ptr = (void *)x86_cpu_to_apicid_init; |
399 | x86_bios_cpu_apicid_early_ptr = (void *)x86_bios_cpu_apicid_init; | |
e8c10ef9 | 400 | #ifdef CONFIG_NUMA |
3effef1f | 401 | x86_cpu_to_node_map_early_ptr = (void *)x86_cpu_to_node_map_init; |
71fff5e6 | 402 | #endif |
e8c10ef9 | 403 | #endif |
71fff5e6 | 404 | |
888ba6c6 | 405 | #ifdef CONFIG_ACPI |
1da177e4 LT |
406 | /* |
407 | * Initialize the ACPI boot-time table parser (gets the RSDP and SDT). | |
408 | * Call this early for SRAT node setup. | |
409 | */ | |
410 | acpi_boot_table_init(); | |
411 | #endif | |
412 | ||
caff0710 JB |
413 | /* How many end-of-memory variables you have, grandma! */ |
414 | max_low_pfn = end_pfn; | |
415 | max_pfn = end_pfn; | |
416 | high_memory = (void *)__va(end_pfn * PAGE_SIZE - 1) + 1; | |
417 | ||
5cb248ab MG |
418 | /* Remove active ranges so rediscovery with NUMA-awareness happens */ |
419 | remove_all_active_ranges(); | |
420 | ||
1da177e4 LT |
421 | #ifdef CONFIG_ACPI_NUMA |
422 | /* | |
423 | * Parse SRAT to discover nodes. | |
424 | */ | |
425 | acpi_numa_init(); | |
426 | #endif | |
427 | ||
2b97690f | 428 | #ifdef CONFIG_NUMA |
04e1ba85 | 429 | numa_initmem_init(0, end_pfn); |
1da177e4 | 430 | #else |
bbfceef4 | 431 | contig_initmem_init(0, end_pfn); |
1da177e4 LT |
432 | #endif |
433 | ||
752bea4a YL |
434 | dma32_reserve_bootmem(); |
435 | ||
673d5b43 | 436 | #ifdef CONFIG_ACPI_SLEEP |
1da177e4 | 437 | /* |
04e1ba85 | 438 | * Reserve low memory region for sleep support. |
1da177e4 | 439 | */ |
04e1ba85 TG |
440 | acpi_reserve_bootmem(); |
441 | #endif | |
5b83683f | 442 | |
a3828064 | 443 | if (efi_enabled) |
5b83683f | 444 | efi_reserve_bootmem(); |
5b83683f | 445 | |
04e1ba85 TG |
446 | /* |
447 | * Find and reserve possible boot-time SMP configuration: | |
448 | */ | |
1da177e4 | 449 | find_smp_config(); |
1da177e4 | 450 | #ifdef CONFIG_BLK_DEV_INITRD |
30c82645 PA |
451 | if (boot_params.hdr.type_of_loader && boot_params.hdr.ramdisk_image) { |
452 | unsigned long ramdisk_image = boot_params.hdr.ramdisk_image; | |
453 | unsigned long ramdisk_size = boot_params.hdr.ramdisk_size; | |
454 | unsigned long ramdisk_end = ramdisk_image + ramdisk_size; | |
455 | unsigned long end_of_mem = end_pfn << PAGE_SHIFT; | |
456 | ||
457 | if (ramdisk_end <= end_of_mem) { | |
2b8106a0 YL |
458 | /* |
459 | * don't need to reserve again, already reserved early | |
460 | * in x86_64_start_kernel, and early_res_to_bootmem | |
461 | * convert that to reserved in bootmem | |
462 | */ | |
30c82645 PA |
463 | initrd_start = ramdisk_image + PAGE_OFFSET; |
464 | initrd_end = initrd_start+ramdisk_size; | |
465 | } else { | |
75175278 | 466 | free_bootmem(ramdisk_image, ramdisk_size); |
1da177e4 | 467 | printk(KERN_ERR "initrd extends beyond end of memory " |
30c82645 PA |
468 | "(0x%08lx > 0x%08lx)\ndisabling initrd\n", |
469 | ramdisk_end, end_of_mem); | |
1da177e4 LT |
470 | initrd_start = 0; |
471 | } | |
472 | } | |
473 | #endif | |
5c3391f9 | 474 | reserve_crashkernel(); |
138fe4e0 KR |
475 | |
476 | reserve_ibft_region(); | |
477 | ||
1da177e4 | 478 | paging_init(); |
e4026440 | 479 | map_vsyscall(); |
1da177e4 | 480 | |
dfa4698c | 481 | early_quirks(); |
1da177e4 | 482 | |
888ba6c6 | 483 | #ifdef CONFIG_ACPI |
1da177e4 LT |
484 | /* |
485 | * Read APIC and some other early information from ACPI tables. | |
486 | */ | |
487 | acpi_boot_init(); | |
488 | #endif | |
489 | ||
05b3cbd8 RT |
490 | init_cpu_to_node(); |
491 | ||
1da177e4 LT |
492 | /* |
493 | * get boot-time SMP configuration: | |
494 | */ | |
495 | if (smp_found_config) | |
496 | get_smp_config(); | |
497 | init_apic_mappings(); | |
3e35a0e5 | 498 | ioapic_init_mappings(); |
1da177e4 | 499 | |
0cf1bfd2 MT |
500 | kvm_guest_init(); |
501 | ||
1da177e4 | 502 | /* |
fc986db4 | 503 | * We trust e820 completely. No explicit ROM probing in memory. |
04e1ba85 | 504 | */ |
3def3d6d | 505 | e820_reserve_resources(); |
e8eff5ac | 506 | e820_mark_nosave_regions(); |
1da177e4 | 507 | |
1da177e4 | 508 | /* request I/O space for devices used on all i[345]86 PCs */ |
9d0ef4fd | 509 | for (i = 0; i < ARRAY_SIZE(standard_io_resources); i++) |
1da177e4 | 510 | request_resource(&ioport_resource, &standard_io_resources[i]); |
1da177e4 | 511 | |
a1e97782 | 512 | e820_setup_gap(); |
1da177e4 | 513 | |
1da177e4 LT |
514 | #ifdef CONFIG_VT |
515 | #if defined(CONFIG_VGA_CONSOLE) | |
5b83683f HY |
516 | if (!efi_enabled || (efi_mem_type(0xa0000) != EFI_CONVENTIONAL_MEMORY)) |
517 | conswitchp = &vga_con; | |
1da177e4 LT |
518 | #elif defined(CONFIG_DUMMY_CONSOLE) |
519 | conswitchp = &dummy_con; | |
520 | #endif | |
521 | #endif | |
5f0b2976 YL |
522 | |
523 | /* do this before identify_cpu for boot cpu */ | |
524 | check_enable_amd_mmconf_dmi(); | |
1da177e4 LT |
525 | } |
526 | ||
4d285878 | 527 | int __cpuinit get_model_name(struct cpuinfo_x86 *c) |
1da177e4 LT |
528 | { |
529 | unsigned int *v; | |
530 | ||
ebfcaa96 | 531 | if (c->extended_cpuid_level < 0x80000004) |
1da177e4 LT |
532 | return 0; |
533 | ||
534 | v = (unsigned int *) c->x86_model_id; | |
535 | cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]); | |
536 | cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]); | |
537 | cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]); | |
538 | c->x86_model_id[48] = 0; | |
539 | return 1; | |
540 | } | |
541 | ||
542 | ||
4d285878 | 543 | void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c) |
1da177e4 LT |
544 | { |
545 | unsigned int n, dummy, eax, ebx, ecx, edx; | |
546 | ||
ebfcaa96 | 547 | n = c->extended_cpuid_level; |
1da177e4 LT |
548 | |
549 | if (n >= 0x80000005) { | |
550 | cpuid(0x80000005, &dummy, &ebx, &ecx, &edx); | |
04e1ba85 TG |
551 | printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), " |
552 | "D cache %dK (%d bytes/line)\n", | |
553 | edx>>24, edx&0xFF, ecx>>24, ecx&0xFF); | |
554 | c->x86_cache_size = (ecx>>24) + (edx>>24); | |
1da177e4 LT |
555 | /* On K8 L1 TLB is inclusive, so don't count it */ |
556 | c->x86_tlbsize = 0; | |
557 | } | |
558 | ||
559 | if (n >= 0x80000006) { | |
560 | cpuid(0x80000006, &dummy, &ebx, &ecx, &edx); | |
561 | ecx = cpuid_ecx(0x80000006); | |
562 | c->x86_cache_size = ecx >> 16; | |
563 | c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff); | |
564 | ||
565 | printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n", | |
566 | c->x86_cache_size, ecx & 0xFF); | |
567 | } | |
1da177e4 | 568 | if (n >= 0x80000008) { |
04e1ba85 | 569 | cpuid(0x80000008, &eax, &dummy, &dummy, &dummy); |
1da177e4 LT |
570 | c->x86_virt_bits = (eax >> 8) & 0xff; |
571 | c->x86_phys_bits = eax & 0xff; | |
572 | } | |
573 | } | |
574 | ||
1a53905a | 575 | void __cpuinit detect_ht(struct cpuinfo_x86 *c) |
1da177e4 LT |
576 | { |
577 | #ifdef CONFIG_SMP | |
04e1ba85 TG |
578 | u32 eax, ebx, ecx, edx; |
579 | int index_msb, core_bits; | |
94605eff SS |
580 | |
581 | cpuid(1, &eax, &ebx, &ecx, &edx); | |
582 | ||
94605eff | 583 | |
e42f9437 | 584 | if (!cpu_has(c, X86_FEATURE_HT)) |
1da177e4 | 585 | return; |
04e1ba85 | 586 | if (cpu_has(c, X86_FEATURE_CMP_LEGACY)) |
e42f9437 | 587 | goto out; |
1da177e4 | 588 | |
1da177e4 | 589 | smp_num_siblings = (ebx & 0xff0000) >> 16; |
94605eff | 590 | |
1da177e4 LT |
591 | if (smp_num_siblings == 1) { |
592 | printk(KERN_INFO "CPU: Hyper-Threading is disabled\n"); | |
04e1ba85 | 593 | } else if (smp_num_siblings > 1) { |
94605eff | 594 | |
1da177e4 | 595 | if (smp_num_siblings > NR_CPUS) { |
04e1ba85 TG |
596 | printk(KERN_WARNING "CPU: Unsupported number of " |
597 | "siblings %d", smp_num_siblings); | |
1da177e4 LT |
598 | smp_num_siblings = 1; |
599 | return; | |
600 | } | |
94605eff SS |
601 | |
602 | index_msb = get_count_order(smp_num_siblings); | |
f3fa8ebc | 603 | c->phys_proc_id = phys_pkg_id(index_msb); |
3dd9d514 | 604 | |
94605eff | 605 | smp_num_siblings = smp_num_siblings / c->x86_max_cores; |
3dd9d514 | 606 | |
04e1ba85 | 607 | index_msb = get_count_order(smp_num_siblings); |
94605eff SS |
608 | |
609 | core_bits = get_count_order(c->x86_max_cores); | |
3dd9d514 | 610 | |
f3fa8ebc | 611 | c->cpu_core_id = phys_pkg_id(index_msb) & |
94605eff | 612 | ((1 << core_bits) - 1); |
1da177e4 | 613 | } |
e42f9437 RS |
614 | out: |
615 | if ((c->x86_max_cores * smp_num_siblings) > 1) { | |
04e1ba85 TG |
616 | printk(KERN_INFO "CPU: Physical Processor ID: %d\n", |
617 | c->phys_proc_id); | |
618 | printk(KERN_INFO "CPU: Processor Core ID: %d\n", | |
619 | c->cpu_core_id); | |
e42f9437 RS |
620 | } |
621 | ||
1da177e4 LT |
622 | #endif |
623 | } | |
624 | ||
3dd9d514 AK |
625 | /* |
626 | * find out the number of processor cores on the die | |
627 | */ | |
e6982c67 | 628 | static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c) |
3dd9d514 | 629 | { |
2bbc419f | 630 | unsigned int eax, t; |
3dd9d514 AK |
631 | |
632 | if (c->cpuid_level < 4) | |
633 | return 1; | |
634 | ||
2bbc419f | 635 | cpuid_count(4, 0, &eax, &t, &t, &t); |
3dd9d514 AK |
636 | |
637 | if (eax & 0x1f) | |
638 | return ((eax >> 26) + 1); | |
639 | else | |
640 | return 1; | |
641 | } | |
642 | ||
04d733bd | 643 | static void __cpuinit srat_detect_node(void) |
df0cc26b AK |
644 | { |
645 | #ifdef CONFIG_NUMA | |
ddea7be0 | 646 | unsigned node; |
df0cc26b | 647 | int cpu = smp_processor_id(); |
e42f9437 | 648 | int apicid = hard_smp_processor_id(); |
df0cc26b AK |
649 | |
650 | /* Don't do the funky fallback heuristics the AMD version employs | |
651 | for now. */ | |
e42f9437 | 652 | node = apicid_to_node[apicid]; |
475613b9 | 653 | if (node == NUMA_NO_NODE || !node_online(node)) |
0d015324 | 654 | node = first_node(node_online_map); |
69d81fcd | 655 | numa_set_node(cpu, node); |
df0cc26b | 656 | |
c31fbb1a | 657 | printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node); |
df0cc26b AK |
658 | #endif |
659 | } | |
660 | ||
2b16a235 AK |
661 | static void __cpuinit early_init_intel(struct cpuinfo_x86 *c) |
662 | { | |
663 | if ((c->x86 == 0xf && c->x86_model >= 0x03) || | |
664 | (c->x86 == 0x6 && c->x86_model >= 0x0e)) | |
9716951e | 665 | set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC); |
2b16a235 AK |
666 | } |
667 | ||
e6982c67 | 668 | static void __cpuinit init_intel(struct cpuinfo_x86 *c) |
1da177e4 LT |
669 | { |
670 | /* Cache sizes */ | |
671 | unsigned n; | |
672 | ||
673 | init_intel_cacheinfo(c); | |
04e1ba85 | 674 | if (c->cpuid_level > 9) { |
0080e667 VP |
675 | unsigned eax = cpuid_eax(10); |
676 | /* Check for version and the number of counters */ | |
677 | if ((eax & 0xff) && (((eax>>8) & 0xff) > 1)) | |
53756d37 | 678 | set_cpu_cap(c, X86_FEATURE_ARCH_PERFMON); |
0080e667 VP |
679 | } |
680 | ||
36b2a8d5 SE |
681 | if (cpu_has_ds) { |
682 | unsigned int l1, l2; | |
683 | rdmsr(MSR_IA32_MISC_ENABLE, l1, l2); | |
ee58fad5 | 684 | if (!(l1 & (1<<11))) |
53756d37 | 685 | set_cpu_cap(c, X86_FEATURE_BTS); |
36b2a8d5 | 686 | if (!(l1 & (1<<12))) |
53756d37 | 687 | set_cpu_cap(c, X86_FEATURE_PEBS); |
36b2a8d5 SE |
688 | } |
689 | ||
eee3af4a MM |
690 | |
691 | if (cpu_has_bts) | |
692 | ds_init_intel(c); | |
693 | ||
ebfcaa96 | 694 | n = c->extended_cpuid_level; |
1da177e4 LT |
695 | if (n >= 0x80000008) { |
696 | unsigned eax = cpuid_eax(0x80000008); | |
697 | c->x86_virt_bits = (eax >> 8) & 0xff; | |
698 | c->x86_phys_bits = eax & 0xff; | |
af9c142d SL |
699 | /* CPUID workaround for Intel 0F34 CPU */ |
700 | if (c->x86_vendor == X86_VENDOR_INTEL && | |
701 | c->x86 == 0xF && c->x86_model == 0x3 && | |
702 | c->x86_mask == 0x4) | |
703 | c->x86_phys_bits = 36; | |
1da177e4 LT |
704 | } |
705 | ||
706 | if (c->x86 == 15) | |
707 | c->x86_cache_alignment = c->x86_clflush_size * 2; | |
27fbe5b2 | 708 | if (c->x86 == 6) |
53756d37 | 709 | set_cpu_cap(c, X86_FEATURE_REP_GOOD); |
707fa8ed | 710 | set_cpu_cap(c, X86_FEATURE_LFENCE_RDTSC); |
04e1ba85 | 711 | c->x86_max_cores = intel_num_cpu_cores(c); |
df0cc26b AK |
712 | |
713 | srat_detect_node(); | |
1da177e4 LT |
714 | } |
715 | ||
0e03eb86 DJ |
716 | static void __cpuinit early_init_centaur(struct cpuinfo_x86 *c) |
717 | { | |
718 | if (c->x86 == 0x6 && c->x86_model >= 0xf) | |
8c45a4e4 | 719 | set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC); |
0e03eb86 DJ |
720 | } |
721 | ||
722 | static void __cpuinit init_centaur(struct cpuinfo_x86 *c) | |
723 | { | |
724 | /* Cache sizes */ | |
725 | unsigned n; | |
726 | ||
727 | n = c->extended_cpuid_level; | |
728 | if (n >= 0x80000008) { | |
729 | unsigned eax = cpuid_eax(0x80000008); | |
730 | c->x86_virt_bits = (eax >> 8) & 0xff; | |
731 | c->x86_phys_bits = eax & 0xff; | |
732 | } | |
733 | ||
734 | if (c->x86 == 0x6 && c->x86_model >= 0xf) { | |
735 | c->x86_cache_alignment = c->x86_clflush_size * 2; | |
736 | set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC); | |
737 | set_cpu_cap(c, X86_FEATURE_REP_GOOD); | |
738 | } | |
739 | set_cpu_cap(c, X86_FEATURE_LFENCE_RDTSC); | |
740 | } | |
741 | ||
672289e9 | 742 | static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c) |
1da177e4 LT |
743 | { |
744 | char *v = c->x86_vendor_id; | |
745 | ||
746 | if (!strcmp(v, "AuthenticAMD")) | |
747 | c->x86_vendor = X86_VENDOR_AMD; | |
748 | else if (!strcmp(v, "GenuineIntel")) | |
749 | c->x86_vendor = X86_VENDOR_INTEL; | |
0e03eb86 DJ |
750 | else if (!strcmp(v, "CentaurHauls")) |
751 | c->x86_vendor = X86_VENDOR_CENTAUR; | |
1da177e4 LT |
752 | else |
753 | c->x86_vendor = X86_VENDOR_UNKNOWN; | |
754 | } | |
755 | ||
4d285878 DJ |
756 | // FIXME: Needs to use cpu_vendor_dev_register |
757 | extern void __cpuinit early_init_amd(struct cpuinfo_x86 *c); | |
758 | extern void __cpuinit init_amd(struct cpuinfo_x86 *c); | |
759 | ||
1da177e4 LT |
760 | /* Do some early cpuid on the boot CPU to get some parameter that are |
761 | needed before check_bugs. Everything advanced is in identify_cpu | |
762 | below. */ | |
8c61b900 | 763 | static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c) |
1da177e4 | 764 | { |
a860b63c | 765 | u32 tfms, xlvl; |
1da177e4 LT |
766 | |
767 | c->loops_per_jiffy = loops_per_jiffy; | |
768 | c->x86_cache_size = -1; | |
769 | c->x86_vendor = X86_VENDOR_UNKNOWN; | |
770 | c->x86_model = c->x86_mask = 0; /* So far unknown... */ | |
771 | c->x86_vendor_id[0] = '\0'; /* Unset */ | |
772 | c->x86_model_id[0] = '\0'; /* Unset */ | |
773 | c->x86_clflush_size = 64; | |
774 | c->x86_cache_alignment = c->x86_clflush_size; | |
94605eff | 775 | c->x86_max_cores = 1; |
a860b63c | 776 | c->x86_coreid_bits = 0; |
ebfcaa96 | 777 | c->extended_cpuid_level = 0; |
1da177e4 LT |
778 | memset(&c->x86_capability, 0, sizeof c->x86_capability); |
779 | ||
780 | /* Get vendor name */ | |
781 | cpuid(0x00000000, (unsigned int *)&c->cpuid_level, | |
782 | (unsigned int *)&c->x86_vendor_id[0], | |
783 | (unsigned int *)&c->x86_vendor_id[8], | |
784 | (unsigned int *)&c->x86_vendor_id[4]); | |
04e1ba85 | 785 | |
1da177e4 LT |
786 | get_cpu_vendor(c); |
787 | ||
788 | /* Initialize the standard set of capabilities */ | |
789 | /* Note that the vendor-specific code below might override */ | |
790 | ||
791 | /* Intel-defined flags: level 0x00000001 */ | |
792 | if (c->cpuid_level >= 0x00000001) { | |
793 | __u32 misc; | |
794 | cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4], | |
795 | &c->x86_capability[0]); | |
796 | c->x86 = (tfms >> 8) & 0xf; | |
797 | c->x86_model = (tfms >> 4) & 0xf; | |
798 | c->x86_mask = tfms & 0xf; | |
f5f786d0 | 799 | if (c->x86 == 0xf) |
1da177e4 | 800 | c->x86 += (tfms >> 20) & 0xff; |
f5f786d0 | 801 | if (c->x86 >= 0x6) |
1da177e4 | 802 | c->x86_model += ((tfms >> 16) & 0xF) << 4; |
9716951e | 803 | if (test_cpu_cap(c, X86_FEATURE_CLFLSH)) |
1da177e4 | 804 | c->x86_clflush_size = ((misc >> 8) & 0xff) * 8; |
1da177e4 LT |
805 | } else { |
806 | /* Have CPUID level 0 only - unheard of */ | |
807 | c->x86 = 4; | |
808 | } | |
a158608b | 809 | |
01aaea1a | 810 | c->initial_apicid = (cpuid_ebx(1) >> 24) & 0xff; |
a158608b | 811 | #ifdef CONFIG_SMP |
01aaea1a | 812 | c->phys_proc_id = c->initial_apicid; |
a158608b | 813 | #endif |
1da177e4 LT |
814 | /* AMD-defined flags: level 0x80000001 */ |
815 | xlvl = cpuid_eax(0x80000000); | |
ebfcaa96 | 816 | c->extended_cpuid_level = xlvl; |
1da177e4 LT |
817 | if ((xlvl & 0xffff0000) == 0x80000000) { |
818 | if (xlvl >= 0x80000001) { | |
819 | c->x86_capability[1] = cpuid_edx(0x80000001); | |
5b7abc6f | 820 | c->x86_capability[6] = cpuid_ecx(0x80000001); |
1da177e4 LT |
821 | } |
822 | if (xlvl >= 0x80000004) | |
823 | get_model_name(c); /* Default name */ | |
824 | } | |
825 | ||
826 | /* Transmeta-defined flags: level 0x80860001 */ | |
827 | xlvl = cpuid_eax(0x80860000); | |
828 | if ((xlvl & 0xffff0000) == 0x80860000) { | |
829 | /* Don't set x86_cpuid_level here for now to not confuse. */ | |
830 | if (xlvl >= 0x80860001) | |
831 | c->x86_capability[2] = cpuid_edx(0x80860001); | |
832 | } | |
833 | ||
9566e91d AH |
834 | c->extended_cpuid_level = cpuid_eax(0x80000000); |
835 | if (c->extended_cpuid_level >= 0x80000007) | |
836 | c->x86_power = cpuid_edx(0x80000007); | |
837 | ||
a860b63c YL |
838 | switch (c->x86_vendor) { |
839 | case X86_VENDOR_AMD: | |
840 | early_init_amd(c); | |
841 | break; | |
71617bf1 YL |
842 | case X86_VENDOR_INTEL: |
843 | early_init_intel(c); | |
844 | break; | |
0e03eb86 DJ |
845 | case X86_VENDOR_CENTAUR: |
846 | early_init_centaur(c); | |
847 | break; | |
a860b63c YL |
848 | } |
849 | ||
8d4a4300 | 850 | validate_pat_support(c); |
a860b63c YL |
851 | } |
852 | ||
853 | /* | |
854 | * This does the hard work of actually picking apart the CPU stuff... | |
855 | */ | |
856 | void __cpuinit identify_cpu(struct cpuinfo_x86 *c) | |
857 | { | |
858 | int i; | |
859 | ||
860 | early_identify_cpu(c); | |
861 | ||
1d67953f VP |
862 | init_scattered_cpuid_features(c); |
863 | ||
1e9f28fa SS |
864 | c->apicid = phys_pkg_id(0); |
865 | ||
1da177e4 LT |
866 | /* |
867 | * Vendor-specific initialization. In this section we | |
868 | * canonicalize the feature flags, meaning if there are | |
869 | * features a certain CPU supports which CPUID doesn't | |
870 | * tell us, CPUID claiming incorrect flags, or other bugs, | |
871 | * we handle them here. | |
872 | * | |
873 | * At the end of this section, c->x86_capability better | |
874 | * indicate the features this CPU genuinely supports! | |
875 | */ | |
876 | switch (c->x86_vendor) { | |
877 | case X86_VENDOR_AMD: | |
878 | init_amd(c); | |
879 | break; | |
880 | ||
881 | case X86_VENDOR_INTEL: | |
882 | init_intel(c); | |
883 | break; | |
884 | ||
0e03eb86 DJ |
885 | case X86_VENDOR_CENTAUR: |
886 | init_centaur(c); | |
887 | break; | |
888 | ||
1da177e4 LT |
889 | case X86_VENDOR_UNKNOWN: |
890 | default: | |
891 | display_cacheinfo(c); | |
892 | break; | |
893 | } | |
894 | ||
04e1ba85 | 895 | detect_ht(c); |
1da177e4 LT |
896 | |
897 | /* | |
898 | * On SMP, boot_cpu_data holds the common feature set between | |
899 | * all CPUs; so make sure that we indicate which features are | |
900 | * common between the CPUs. The first time this routine gets | |
901 | * executed, c == &boot_cpu_data. | |
902 | */ | |
903 | if (c != &boot_cpu_data) { | |
904 | /* AND the already accumulated flags with these */ | |
04e1ba85 | 905 | for (i = 0; i < NCAPINTS; i++) |
1da177e4 LT |
906 | boot_cpu_data.x86_capability[i] &= c->x86_capability[i]; |
907 | } | |
908 | ||
7d851c8d AK |
909 | /* Clear all flags overriden by options */ |
910 | for (i = 0; i < NCAPINTS; i++) | |
12c247a6 | 911 | c->x86_capability[i] &= ~cleared_cpu_caps[i]; |
7d851c8d | 912 | |
1da177e4 LT |
913 | #ifdef CONFIG_X86_MCE |
914 | mcheck_init(c); | |
915 | #endif | |
74ff305b HS |
916 | select_idle_routine(c); |
917 | ||
1da177e4 | 918 | #ifdef CONFIG_NUMA |
3019e8eb | 919 | numa_add_cpu(smp_processor_id()); |
1da177e4 | 920 | #endif |
2b16a235 | 921 | |
1da177e4 | 922 | } |
1da177e4 | 923 | |
7a636af6 GOC |
924 | void __cpuinit identify_boot_cpu(void) |
925 | { | |
926 | identify_cpu(&boot_cpu_data); | |
927 | } | |
928 | ||
929 | void __cpuinit identify_secondary_cpu(struct cpuinfo_x86 *c) | |
930 | { | |
931 | BUG_ON(c == &boot_cpu_data); | |
932 | identify_cpu(c); | |
933 | mtrr_ap_init(); | |
934 | } | |
935 | ||
191679fd AK |
936 | static __init int setup_noclflush(char *arg) |
937 | { | |
938 | setup_clear_cpu_cap(X86_FEATURE_CLFLSH); | |
939 | return 1; | |
940 | } | |
941 | __setup("noclflush", setup_noclflush); | |
942 | ||
e6982c67 | 943 | void __cpuinit print_cpu_info(struct cpuinfo_x86 *c) |
1da177e4 LT |
944 | { |
945 | if (c->x86_model_id[0]) | |
d8ff0bbf | 946 | printk(KERN_CONT "%s", c->x86_model_id); |
1da177e4 | 947 | |
04e1ba85 TG |
948 | if (c->x86_mask || c->cpuid_level >= 0) |
949 | printk(KERN_CONT " stepping %02x\n", c->x86_mask); | |
1da177e4 | 950 | else |
04e1ba85 | 951 | printk(KERN_CONT "\n"); |
1da177e4 LT |
952 | } |
953 | ||
ac72e788 AK |
954 | static __init int setup_disablecpuid(char *arg) |
955 | { | |
956 | int bit; | |
957 | if (get_option(&arg, &bit) && bit < NCAPINTS*32) | |
958 | setup_clear_cpu_cap(bit); | |
959 | else | |
960 | return 0; | |
961 | return 1; | |
962 | } | |
963 | __setup("clearcpuid=", setup_disablecpuid); |