x86: allow user to impress friends.
[deliverable/linux.git] / arch / x86 / kernel / smpboot.c
CommitLineData
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1#include <linux/init.h>
2#include <linux/smp.h>
a355352b 3#include <linux/module.h>
70708a18 4#include <linux/sched.h>
69c18c15 5#include <linux/percpu.h>
91718e8d 6#include <linux/bootmem.h>
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7
8#include <asm/nmi.h>
9#include <asm/irq.h>
10#include <asm/smp.h>
11#include <asm/cpu.h>
12#include <asm/numa.h>
68a1c3f8 13
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14/* Number of siblings per CPU package */
15int smp_num_siblings = 1;
16EXPORT_SYMBOL(smp_num_siblings);
17
18/* Last level cache ID of each logical CPU */
19DEFINE_PER_CPU(u16, cpu_llc_id) = BAD_APICID;
20
21/* bitmap of online cpus */
22cpumask_t cpu_online_map __read_mostly;
23EXPORT_SYMBOL(cpu_online_map);
24
25cpumask_t cpu_callin_map;
26cpumask_t cpu_callout_map;
27cpumask_t cpu_possible_map;
28EXPORT_SYMBOL(cpu_possible_map);
29
30/* representing HT siblings of each logical CPU */
31DEFINE_PER_CPU(cpumask_t, cpu_sibling_map);
32EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
33
34/* representing HT and core siblings of each logical CPU */
35DEFINE_PER_CPU(cpumask_t, cpu_core_map);
36EXPORT_PER_CPU_SYMBOL(cpu_core_map);
37
38/* Per CPU bogomips and other parameters */
39DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info);
40EXPORT_PER_CPU_SYMBOL(cpu_info);
768d9505 41
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42/* ready for x86_64, no harm for x86, since it will overwrite after alloc */
43unsigned char *trampoline_base = __va(SMP_TRAMPOLINE_BASE);
44
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45/* representing cpus for which sibling maps can be computed */
46static cpumask_t cpu_sibling_setup_map;
47
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48#ifdef CONFIG_X86_32
49/* Set if we find a B stepping CPU */
50int __cpuinitdata smp_b_stepping;
51#endif
52
53static void __cpuinit smp_apply_quirks(struct cpuinfo_x86 *c)
54{
55#ifdef CONFIG_X86_32
56 /*
57 * Mask B, Pentium, but not Pentium MMX
58 */
59 if (c->x86_vendor == X86_VENDOR_INTEL &&
60 c->x86 == 5 &&
61 c->x86_mask >= 1 && c->x86_mask <= 4 &&
62 c->x86_model <= 3)
63 /*
64 * Remember we have B step Pentia with bugs
65 */
66 smp_b_stepping = 1;
67
68 /*
69 * Certain Athlons might work (for various values of 'work') in SMP
70 * but they are not certified as MP capable.
71 */
72 if ((c->x86_vendor == X86_VENDOR_AMD) && (c->x86 == 6)) {
73
74 if (num_possible_cpus() == 1)
75 goto valid_k7;
76
77 /* Athlon 660/661 is valid. */
78 if ((c->x86_model == 6) && ((c->x86_mask == 0) ||
79 (c->x86_mask == 1)))
80 goto valid_k7;
81
82 /* Duron 670 is valid */
83 if ((c->x86_model == 7) && (c->x86_mask == 0))
84 goto valid_k7;
85
86 /*
87 * Athlon 662, Duron 671, and Athlon >model 7 have capability
88 * bit. It's worth noting that the A5 stepping (662) of some
89 * Athlon XP's have the MP bit set.
90 * See http://www.heise.de/newsticker/data/jow-18.10.01-000 for
91 * more.
92 */
93 if (((c->x86_model == 6) && (c->x86_mask >= 2)) ||
94 ((c->x86_model == 7) && (c->x86_mask >= 1)) ||
95 (c->x86_model > 7))
96 if (cpu_has_mp)
97 goto valid_k7;
98
99 /* If we get here, not a certified SMP capable AMD system. */
100 add_taint(TAINT_UNSAFE_SMP);
101 }
102
103valid_k7:
104 ;
105#endif
106}
107
108/*
109 * The bootstrap kernel entry code has set these up. Save them for
110 * a given CPU
111 */
112
113void __cpuinit smp_store_cpu_info(int id)
114{
115 struct cpuinfo_x86 *c = &cpu_data(id);
116
117 *c = boot_cpu_data;
118 c->cpu_index = id;
119 if (id != 0)
120 identify_secondary_cpu(c);
121 smp_apply_quirks(c);
122}
123
124
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125void __cpuinit set_cpu_sibling_map(int cpu)
126{
127 int i;
128 struct cpuinfo_x86 *c = &cpu_data(cpu);
129
130 cpu_set(cpu, cpu_sibling_setup_map);
131
132 if (smp_num_siblings > 1) {
133 for_each_cpu_mask(i, cpu_sibling_setup_map) {
134 if (c->phys_proc_id == cpu_data(i).phys_proc_id &&
135 c->cpu_core_id == cpu_data(i).cpu_core_id) {
136 cpu_set(i, per_cpu(cpu_sibling_map, cpu));
137 cpu_set(cpu, per_cpu(cpu_sibling_map, i));
138 cpu_set(i, per_cpu(cpu_core_map, cpu));
139 cpu_set(cpu, per_cpu(cpu_core_map, i));
140 cpu_set(i, c->llc_shared_map);
141 cpu_set(cpu, cpu_data(i).llc_shared_map);
142 }
143 }
144 } else {
145 cpu_set(cpu, per_cpu(cpu_sibling_map, cpu));
146 }
147
148 cpu_set(cpu, c->llc_shared_map);
149
150 if (current_cpu_data.x86_max_cores == 1) {
151 per_cpu(cpu_core_map, cpu) = per_cpu(cpu_sibling_map, cpu);
152 c->booted_cores = 1;
153 return;
154 }
155
156 for_each_cpu_mask(i, cpu_sibling_setup_map) {
157 if (per_cpu(cpu_llc_id, cpu) != BAD_APICID &&
158 per_cpu(cpu_llc_id, cpu) == per_cpu(cpu_llc_id, i)) {
159 cpu_set(i, c->llc_shared_map);
160 cpu_set(cpu, cpu_data(i).llc_shared_map);
161 }
162 if (c->phys_proc_id == cpu_data(i).phys_proc_id) {
163 cpu_set(i, per_cpu(cpu_core_map, cpu));
164 cpu_set(cpu, per_cpu(cpu_core_map, i));
165 /*
166 * Does this new cpu bringup a new core?
167 */
168 if (cpus_weight(per_cpu(cpu_sibling_map, cpu)) == 1) {
169 /*
170 * for each core in package, increment
171 * the booted_cores for this new cpu
172 */
173 if (first_cpu(per_cpu(cpu_sibling_map, i)) == i)
174 c->booted_cores++;
175 /*
176 * increment the core count for all
177 * the other cpus in this package
178 */
179 if (i != cpu)
180 cpu_data(i).booted_cores++;
181 } else if (i != cpu && !c->booted_cores)
182 c->booted_cores = cpu_data(i).booted_cores;
183 }
184 }
185}
186
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187/* maps the cpu to the sched domain representing multi-core */
188cpumask_t cpu_coregroup_map(int cpu)
189{
190 struct cpuinfo_x86 *c = &cpu_data(cpu);
191 /*
192 * For perf, we return last level cache shared map.
193 * And for power savings, we return cpu_core_map
194 */
195 if (sched_mc_power_savings || sched_smt_power_savings)
196 return per_cpu(cpu_core_map, cpu);
197 else
198 return c->llc_shared_map;
199}
200
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201/*
202 * Currently trivial. Write the real->protected mode
203 * bootstrap into the page concerned. The caller
204 * has made sure it's suitably aligned.
205 */
206
207unsigned long __cpuinit setup_trampoline(void)
208{
209 memcpy(trampoline_base, trampoline_data,
210 trampoline_end - trampoline_data);
211 return virt_to_phys(trampoline_base);
212}
213
214#ifdef CONFIG_X86_32
215/*
216 * We are called very early to get the low memory for the
217 * SMP bootup trampoline page.
218 */
219void __init smp_alloc_memory(void)
220{
221 trampoline_base = alloc_bootmem_low_pages(PAGE_SIZE);
222 /*
223 * Has to be in very low memory so we can execute
224 * real-mode AP code.
225 */
226 if (__pa(trampoline_base) >= 0x9F000)
227 BUG();
228}
229#endif
70708a18 230
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231void impress_friends(void)
232{
233 int cpu;
234 unsigned long bogosum = 0;
235 /*
236 * Allow the user to impress friends.
237 */
238 Dprintk("Before bogomips.\n");
239 for_each_possible_cpu(cpu)
240 if (cpu_isset(cpu, cpu_callout_map))
241 bogosum += cpu_data(cpu).loops_per_jiffy;
242 printk(KERN_INFO
243 "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
244 cpus_weight(cpu_present_map),
245 bogosum/(500000/HZ),
246 (bogosum/(5000/HZ))%100);
247
248 Dprintk("Before bogocount - setting activated=1.\n");
249}
250
68a1c3f8 251#ifdef CONFIG_HOTPLUG_CPU
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252void remove_siblinginfo(int cpu)
253{
254 int sibling;
255 struct cpuinfo_x86 *c = &cpu_data(cpu);
256
257 for_each_cpu_mask(sibling, per_cpu(cpu_core_map, cpu)) {
258 cpu_clear(cpu, per_cpu(cpu_core_map, sibling));
259 /*/
260 * last thread sibling in this cpu core going down
261 */
262 if (cpus_weight(per_cpu(cpu_sibling_map, cpu)) == 1)
263 cpu_data(sibling).booted_cores--;
264 }
265
266 for_each_cpu_mask(sibling, per_cpu(cpu_sibling_map, cpu))
267 cpu_clear(cpu, per_cpu(cpu_sibling_map, sibling));
268 cpus_clear(per_cpu(cpu_sibling_map, cpu));
269 cpus_clear(per_cpu(cpu_core_map, cpu));
270 c->phys_proc_id = 0;
271 c->cpu_core_id = 0;
272 cpu_clear(cpu, cpu_sibling_setup_map);
273}
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274
275int additional_cpus __initdata = -1;
276
277static __init int setup_additional_cpus(char *s)
278{
279 return s && get_option(&s, &additional_cpus) ? 0 : -EINVAL;
280}
281early_param("additional_cpus", setup_additional_cpus);
282
283/*
284 * cpu_possible_map should be static, it cannot change as cpu's
285 * are onlined, or offlined. The reason is per-cpu data-structures
286 * are allocated by some modules at init time, and dont expect to
287 * do this dynamically on cpu arrival/departure.
288 * cpu_present_map on the other hand can change dynamically.
289 * In case when cpu_hotplug is not compiled, then we resort to current
290 * behaviour, which is cpu_possible == cpu_present.
291 * - Ashok Raj
292 *
293 * Three ways to find out the number of additional hotplug CPUs:
294 * - If the BIOS specified disabled CPUs in ACPI/mptables use that.
295 * - The user can overwrite it with additional_cpus=NUM
296 * - Otherwise don't reserve additional CPUs.
297 * We do this because additional CPUs waste a lot of memory.
298 * -AK
299 */
300__init void prefill_possible_map(void)
301{
302 int i;
303 int possible;
304
305 if (additional_cpus == -1) {
306 if (disabled_cpus > 0)
307 additional_cpus = disabled_cpus;
308 else
309 additional_cpus = 0;
310 }
311 possible = num_processors + additional_cpus;
312 if (possible > NR_CPUS)
313 possible = NR_CPUS;
314
315 printk(KERN_INFO "SMP: Allowing %d CPUs, %d hotplug CPUs\n",
316 possible, max_t(int, possible - num_processors, 0));
317
318 for (i = 0; i < possible; i++)
319 cpu_set(i, cpu_possible_map);
320}
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321
322static void __ref remove_cpu_from_maps(int cpu)
323{
324 cpu_clear(cpu, cpu_online_map);
325#ifdef CONFIG_X86_64
326 cpu_clear(cpu, cpu_callout_map);
327 cpu_clear(cpu, cpu_callin_map);
328 /* was set by cpu_init() */
329 clear_bit(cpu, (unsigned long *)&cpu_initialized);
330 clear_node_cpumask(cpu);
331#endif
332}
333
334int __cpu_disable(void)
335{
336 int cpu = smp_processor_id();
337
338 /*
339 * Perhaps use cpufreq to drop frequency, but that could go
340 * into generic code.
341 *
342 * We won't take down the boot processor on i386 due to some
343 * interrupts only being able to be serviced by the BSP.
344 * Especially so if we're not using an IOAPIC -zwane
345 */
346 if (cpu == 0)
347 return -EBUSY;
348
349 if (nmi_watchdog == NMI_LOCAL_APIC)
350 stop_apic_nmi_watchdog(NULL);
351 clear_local_APIC();
352
353 /*
354 * HACK:
355 * Allow any queued timer interrupts to get serviced
356 * This is only a temporary solution until we cleanup
357 * fixup_irqs as we do for IA64.
358 */
359 local_irq_enable();
360 mdelay(1);
361
362 local_irq_disable();
363 remove_siblinginfo(cpu);
364
365 /* It's now safe to remove this processor from the online map */
366 remove_cpu_from_maps(cpu);
367 fixup_irqs(cpu_online_map);
368 return 0;
369}
370
371void __cpu_die(unsigned int cpu)
372{
373 /* We don't do anything here: idle task is faking death itself. */
374 unsigned int i;
375
376 for (i = 0; i < 10; i++) {
377 /* They ack this in play_dead by setting CPU_DEAD */
378 if (per_cpu(cpu_state, cpu) == CPU_DEAD) {
379 printk(KERN_INFO "CPU %d is now offline\n", cpu);
380 if (1 == num_online_cpus())
381 alternatives_smp_switch(0);
382 return;
383 }
384 msleep(100);
385 }
386 printk(KERN_ERR "CPU %u didn't die...\n", cpu);
387}
388#else /* ... !CONFIG_HOTPLUG_CPU */
389int __cpu_disable(void)
390{
391 return -ENOSYS;
392}
393
394void __cpu_die(unsigned int cpu)
395{
396 /* We said "no" in __cpu_disable */
397 BUG();
398}
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399#endif
400
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GC
401/*
402 * If the BIOS enumerates physical processors before logical,
403 * maxcpus=N at enumeration-time can be used to disable HT.
404 */
405static int __init parse_maxcpus(char *arg)
406{
407 extern unsigned int maxcpus;
408
409 maxcpus = simple_strtoul(arg, NULL, 0);
410 return 0;
411}
412early_param("maxcpus", parse_maxcpus);
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