[deliverable/linux.git] / arch / x86 / kernel / time_64.c

/*
 *  linux/arch/x86-64/kernel/time.c
 *
 *  "High Precision Event Timer" based timekeeping.
 *
 *  Copyright (c) 1991,1992,1995  Linus Torvalds
 *  Copyright (c) 1994  Alan Modra
 *  Copyright (c) 1995  Markus Kuhn
 *  Copyright (c) 1996  Ingo Molnar
 *  Copyright (c) 1998  Andrea Arcangeli
 *  Copyright (c) 2002,2006  Vojtech Pavlik
 *  Copyright (c) 2003  Andi Kleen
 *  RTC support code taken from arch/i386/kernel/timers/time_hpet.c
 */

#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/mc146818rtc.h>
#include <linux/time.h>
#include <linux/ioport.h>
#include <linux/module.h>
#include <linux/device.h>
#include <linux/sysdev.h>
#include <linux/bcd.h>
#include <linux/notifier.h>
#include <linux/cpu.h>
#include <linux/kallsyms.h>
#include <linux/acpi.h>
#include <linux/clockchips.h>

#ifdef CONFIG_ACPI
#include <acpi/achware.h>	/* for PM timer frequency */
#include <acpi/acpi_bus.h>
#endif
#include <asm/i8253.h>
#include <asm/pgtable.h>
#include <asm/vsyscall.h>
#include <asm/timex.h>
#include <asm/proto.h>
#include <asm/hpet.h>
#include <asm/sections.h>
#include <linux/hpet.h>
#include <asm/apic.h>
#include <asm/hpet.h>
#include <asm/mpspec.h>
#include <asm/nmi.h>
#include <asm/vgtod.h>

DEFINE_SPINLOCK(rtc_lock);
EXPORT_SYMBOL(rtc_lock);

volatile unsigned long __jiffies __section_jiffies = INITIAL_JIFFIES;

unsigned long profile_pc(struct pt_regs *regs)
{
	unsigned long pc = instruction_pointer(regs);

	/* Assume the lock function has either no stack frame or a copy
	   of eflags from PUSHF
	   Eflags always has bits 22 and up cleared unlike kernel addresses. */
	if (!user_mode(regs) && in_lock_functions(pc)) {
		unsigned long *sp = (unsigned long *)regs->rsp;
		if (sp[0] >> 22)
			return sp[0];
		if (sp[1] >> 22)
			return sp[1];
	}
	return pc;
}
EXPORT_SYMBOL(profile_pc);

/*
 * In order to set the CMOS clock precisely, set_rtc_mmss has to be called 500
 * ms after the second nowtime has started, because when nowtime is written
 * into the registers of the CMOS clock, it will jump to the next second
 * precisely 500 ms later. Check the Motorola MC146818A or Dallas DS12887 data
 * sheet for details.
 */

static int set_rtc_mmss(unsigned long nowtime)
{
	int retval = 0;
	int real_seconds, real_minutes, cmos_minutes;
	unsigned char control, freq_select;

/*
 * IRQs are disabled when we're called from the timer interrupt,
 * no need for spin_lock_irqsave()
 */

	spin_lock(&rtc_lock);

/*
 * Tell the clock it's being set and stop it.
 */

	control = CMOS_READ(RTC_CONTROL);
	CMOS_WRITE(control | RTC_SET, RTC_CONTROL);

	freq_select = CMOS_READ(RTC_FREQ_SELECT);
	CMOS_WRITE(freq_select | RTC_DIV_RESET2, RTC_FREQ_SELECT);

	cmos_minutes = CMOS_READ(RTC_MINUTES);
		BCD_TO_BIN(cmos_minutes);

/*
 * since we're only adjusting minutes and seconds, don't interfere with hour
 * overflow. This avoids messing with unknown time zones but requires your RTC
 * not to be off by more than 15 minutes. Since we're calling it only when
 * our clock is externally synchronized using NTP, this shouldn't be a problem.
 */

	real_seconds = nowtime % 60;
	real_minutes = nowtime / 60;
	if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1)
		real_minutes += 30;		/* correct for half hour time zone */
	real_minutes %= 60;

	if (abs(real_minutes - cmos_minutes) >= 30) {
		printk(KERN_WARNING "time.c: can't update CMOS clock "
		       "from %d to %d\n", cmos_minutes, real_minutes);
		retval = -1;
	} else {
		BIN_TO_BCD(real_seconds);
		BIN_TO_BCD(real_minutes);
		CMOS_WRITE(real_seconds, RTC_SECONDS);
		CMOS_WRITE(real_minutes, RTC_MINUTES);
	}

/*
 * The following flags have to be released exactly in this order, otherwise the
 * DS12887 (popular MC146818A clone with integrated battery and quartz) will
 * not reset the oscillator and will not update precisely 500 ms later. You
 * won't find this mentioned in the Dallas Semiconductor data sheets, but who
 * believes data sheets anyway ... -- Markus Kuhn
 */

	CMOS_WRITE(control, RTC_CONTROL);
	CMOS_WRITE(freq_select, RTC_FREQ_SELECT);

	spin_unlock(&rtc_lock);

	return retval;
}

int update_persistent_clock(struct timespec now)
{
	return set_rtc_mmss(now.tv_sec);
}

static irqreturn_t timer_event_interrupt(int irq, void *dev_id)
{
	add_pda(irq0_irqs, 1);

	global_clock_event->event_handler(global_clock_event);

	return IRQ_HANDLED;
}

unsigned long read_persistent_clock(void)
{
	unsigned int year, mon, day, hour, min, sec;
	unsigned long flags;
	unsigned century = 0;

	spin_lock_irqsave(&rtc_lock, flags);

	do {
		sec = CMOS_READ(RTC_SECONDS);
		min = CMOS_READ(RTC_MINUTES);
		hour = CMOS_READ(RTC_HOURS);
		day = CMOS_READ(RTC_DAY_OF_MONTH);
		mon = CMOS_READ(RTC_MONTH);
		year = CMOS_READ(RTC_YEAR);
#ifdef CONFIG_ACPI
		if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
					acpi_gbl_FADT.century)
			century = CMOS_READ(acpi_gbl_FADT.century);
#endif
	} while (sec != CMOS_READ(RTC_SECONDS));

	spin_unlock_irqrestore(&rtc_lock, flags);

	/*
	 * We know that x86-64 always uses BCD format, no need to check the
	 * config register.
	 */

	BCD_TO_BIN(sec);
	BCD_TO_BIN(min);
	BCD_TO_BIN(hour);
	BCD_TO_BIN(day);
	BCD_TO_BIN(mon);
	BCD_TO_BIN(year);

	if (century) {
		BCD_TO_BIN(century);
		year += century * 100;
		printk(KERN_INFO "Extended CMOS year: %d\n", century * 100);
	} else {
		/*
		 * x86-64 systems only exists since 2002.
		 * This will work up to Dec 31, 2100
		 */
		year += 2000;
	}

	return mktime(year, mon, day, hour, min, sec);
}

/* calibrate_cpu is used on systems with fixed rate TSCs to determine
 * processor frequency */
#define TICK_COUNT 100000000
static unsigned int __init tsc_calibrate_cpu_khz(void)
{
	int tsc_start, tsc_now;
	int i, no_ctr_free;
	unsigned long evntsel3 = 0, pmc3 = 0, pmc_now = 0;
	unsigned long flags;

	for (i = 0; i < 4; i++)
		if (avail_to_resrv_perfctr_nmi_bit(i))
			break;
	no_ctr_free = (i == 4);
	if (no_ctr_free) {
		i = 3;
		rdmsrl(MSR_K7_EVNTSEL3, evntsel3);
		wrmsrl(MSR_K7_EVNTSEL3, 0);
		rdmsrl(MSR_K7_PERFCTR3, pmc3);
	} else {
		reserve_perfctr_nmi(MSR_K7_PERFCTR0 + i);
		reserve_evntsel_nmi(MSR_K7_EVNTSEL0 + i);
	}
	local_irq_save(flags);
	/* start meauring cycles, incrementing from 0 */
	wrmsrl(MSR_K7_PERFCTR0 + i, 0);
	wrmsrl(MSR_K7_EVNTSEL0 + i, 1 << 22 | 3 << 16 | 0x76);
	rdtscl(tsc_start);
	do {
		rdmsrl(MSR_K7_PERFCTR0 + i, pmc_now);
		tsc_now = get_cycles_sync();
	} while ((tsc_now - tsc_start) < TICK_COUNT);

	local_irq_restore(flags);
	if (no_ctr_free) {
		wrmsrl(MSR_K7_EVNTSEL3, 0);
		wrmsrl(MSR_K7_PERFCTR3, pmc3);
		wrmsrl(MSR_K7_EVNTSEL3, evntsel3);
	} else {
		release_perfctr_nmi(MSR_K7_PERFCTR0 + i);
		release_evntsel_nmi(MSR_K7_EVNTSEL0 + i);
	}

	return pmc_now * tsc_khz / (tsc_now - tsc_start);
}

static struct irqaction irq0 = {
	.handler	= timer_event_interrupt,
	.flags		= IRQF_DISABLED | IRQF_IRQPOLL | IRQF_NOBALANCING,
	.mask		= CPU_MASK_NONE,
	.name		= "timer"
};

void __init time_init(void)
{
	if (!hpet_enable())
		setup_pit_timer();

	setup_irq(0, &irq0);

	tsc_calibrate();

	cpu_khz = tsc_khz;
	if (cpu_has(&boot_cpu_data, X86_FEATURE_CONSTANT_TSC) &&
		boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
		boot_cpu_data.x86 == 16)
		cpu_khz = tsc_calibrate_cpu_khz();

	if (unsynchronized_tsc())
		mark_tsc_unstable("TSCs unsynchronized");

	if (cpu_has(&boot_cpu_data, X86_FEATURE_RDTSCP))
		vgetcpu_mode = VGETCPU_RDTSCP;
	else
		vgetcpu_mode = VGETCPU_LSL;

	printk(KERN_INFO "time.c: Detected %d.%03d MHz processor.\n",
		cpu_khz / 1000, cpu_khz % 1000);
	init_tsc_clocksource();
}
Commit	Line	Data
1da177e4 LT	1	/*
	2	* linux/arch/x86-64/kernel/time.c
	3	*
	4	* "High Precision Event Timer" based timekeeping.
	5	*
	6	* Copyright (c) 1991,1992,1995 Linus Torvalds
	7	* Copyright (c) 1994 Alan Modra
	8	* Copyright (c) 1995 Markus Kuhn
	9	* Copyright (c) 1996 Ingo Molnar
	10	* Copyright (c) 1998 Andrea Arcangeli
2f82bde4	11	* Copyright (c) 2002,2006 Vojtech Pavlik
1da177e4 LT	12	* Copyright (c) 2003 Andi Kleen
	13	* RTC support code taken from arch/i386/kernel/timers/time_hpet.c
	14	*/
	15
	16	#include <linux/kernel.h>
	17	#include <linux/sched.h>
	18	#include <linux/interrupt.h>
	19	#include <linux/init.h>
	20	#include <linux/mc146818rtc.h>
1da177e4 LT	21	#include <linux/time.h>
	22	#include <linux/ioport.h>
	23	#include <linux/module.h>
	24	#include <linux/device.h>
	25	#include <linux/sysdev.h>
	26	#include <linux/bcd.h>
a670fad0 VP	27	#include <linux/notifier.h>
a670fad0 VP	28	#include <linux/cpu.h>
1da177e4	29	#include <linux/kallsyms.h>
312df5f1	30	#include <linux/acpi.h>
b8ce3359 TG	31	#include <linux/clockchips.h>
b8ce3359 TG	32
8d916406	33	#ifdef CONFIG_ACPI
312df5f1	34	#include <acpi/achware.h> /* for PM timer frequency */
0e5f61b0	35	#include <acpi/acpi_bus.h>
8d916406	36	#endif
28318daf	37	#include <asm/i8253.h>
1da177e4 LT	38	#include <asm/pgtable.h>
	39	#include <asm/vsyscall.h>
	40	#include <asm/timex.h>
	41	#include <asm/proto.h>
	42	#include <asm/hpet.h>
	43	#include <asm/sections.h>
1da177e4	44	#include <linux/hpet.h>
1da177e4	45	#include <asm/apic.h>
c37e7bb5	46	#include <asm/hpet.h>
803d80f6	47	#include <asm/mpspec.h>
6b37f5a2	48	#include <asm/nmi.h>
2aae950b	49	#include <asm/vgtod.h>
1da177e4 LT	50
1da177e4 LT	51	DEFINE_SPINLOCK(rtc_lock);
2ee60e17	52	EXPORT_SYMBOL(rtc_lock);
1da177e4	53
1da177e4	54	volatile unsigned long __jiffies __section_jiffies = INITIAL_JIFFIES;
1da177e4	55
1da177e4 LT	56	unsigned long profile_pc(struct pt_regs *regs)
	57	{
	58	unsigned long pc = instruction_pointer(regs);
	59
31679f38 AK	60	/* Assume the lock function has either no stack frame or a copy
	61	of eflags from PUSHF
	62	Eflags always has bits 22 and up cleared unlike kernel addresses. */
d5a26017	63	if (!user_mode(regs) && in_lock_functions(pc)) {
31679f38 AK	64	unsigned long sp = (unsigned long )regs->rsp;
	65	if (sp[0] >> 22)
	66	return sp[0];
	67	if (sp[1] >> 22)
	68	return sp[1];
1da177e4 LT	69	}
	70	return pc;
	71	}
	72	EXPORT_SYMBOL(profile_pc);
	73
	74	/*
	75	* In order to set the CMOS clock precisely, set_rtc_mmss has to be called 500
	76	* ms after the second nowtime has started, because when nowtime is written
	77	* into the registers of the CMOS clock, it will jump to the next second
	78	* precisely 500 ms later. Check the Motorola MC146818A or Dallas DS12887 data
	79	* sheet for details.
	80	*/
	81
af74522a	82	static int set_rtc_mmss(unsigned long nowtime)
1da177e4	83	{
af74522a	84	int retval = 0;
1da177e4 LT	85	int real_seconds, real_minutes, cmos_minutes;
	86	unsigned char control, freq_select;
	87
	88	/*
	89	* IRQs are disabled when we're called from the timer interrupt,
	90	* no need for spin_lock_irqsave()
	91	*/
	92
	93	spin_lock(&rtc_lock);
	94
	95	/*
	96	* Tell the clock it's being set and stop it.
	97	*/
	98
	99	control = CMOS_READ(RTC_CONTROL);
	100	CMOS_WRITE(control \| RTC_SET, RTC_CONTROL);
	101
	102	freq_select = CMOS_READ(RTC_FREQ_SELECT);
	103	CMOS_WRITE(freq_select \| RTC_DIV_RESET2, RTC_FREQ_SELECT);
	104
	105	cmos_minutes = CMOS_READ(RTC_MINUTES);
	106	BCD_TO_BIN(cmos_minutes);
	107
	108	/*
	109	* since we're only adjusting minutes and seconds, don't interfere with hour
	110	* overflow. This avoids messing with unknown time zones but requires your RTC
	111	* not to be off by more than 15 minutes. Since we're calling it only when
	112	* our clock is externally synchronized using NTP, this shouldn't be a problem.
	113	*/
	114
	115	real_seconds = nowtime % 60;
	116	real_minutes = nowtime / 60;
	117	if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1)
	118	real_minutes += 30; /* correct for half hour time zone */
	119	real_minutes %= 60;
	120
1da177e4 LT	121	if (abs(real_minutes - cmos_minutes) >= 30) {
	122	printk(KERN_WARNING "time.c: can't update CMOS clock "
	123	"from %d to %d\n", cmos_minutes, real_minutes);
af74522a	124	retval = -1;
28456ede	125	} else {
0b91317e AK	126	BIN_TO_BCD(real_seconds);
0b91317e AK	127	BIN_TO_BCD(real_minutes);
1da177e4 LT	128	CMOS_WRITE(real_seconds, RTC_SECONDS);
	129	CMOS_WRITE(real_minutes, RTC_MINUTES);
	130	}
	131
	132	/*
	133	* The following flags have to be released exactly in this order, otherwise the
	134	* DS12887 (popular MC146818A clone with integrated battery and quartz) will
	135	* not reset the oscillator and will not update precisely 500 ms later. You
	136	* won't find this mentioned in the Dallas Semiconductor data sheets, but who
	137	* believes data sheets anyway ... -- Markus Kuhn
	138	*/
	139
	140	CMOS_WRITE(control, RTC_CONTROL);
	141	CMOS_WRITE(freq_select, RTC_FREQ_SELECT);
	142
	143	spin_unlock(&rtc_lock);
af74522a TG	144
af74522a TG	145	return retval;
1da177e4 LT	146	}
1da177e4 LT	147
af74522a TG	148	int update_persistent_clock(struct timespec now)
	149	{
	150	return set_rtc_mmss(now.tv_sec);
	151	}
1da177e4	152
b8ce3359 TG	153	static irqreturn_t timer_event_interrupt(int irq, void *dev_id)
b8ce3359 TG	154	{
4e77ae3e TG	155	add_pda(irq0_irqs, 1);
4e77ae3e TG	156
b8ce3359 TG	157	global_clock_event->event_handler(global_clock_event);
	158
	159	return IRQ_HANDLED;
	160	}
	161
ef81ab2c	162	unsigned long read_persistent_clock(void)
1da177e4	163	{
641f71f5	164	unsigned int year, mon, day, hour, min, sec;
1da177e4	165	unsigned long flags;
ad71860a	166	unsigned century = 0;
1da177e4	167
1da177e4 LT	168	spin_lock_irqsave(&rtc_lock, flags);
1da177e4 LT	169
641f71f5 MM	170	do {
	171	sec = CMOS_READ(RTC_SECONDS);
	172	min = CMOS_READ(RTC_MINUTES);
	173	hour = CMOS_READ(RTC_HOURS);
	174	day = CMOS_READ(RTC_DAY_OF_MONTH);
	175	mon = CMOS_READ(RTC_MONTH);
	176	year = CMOS_READ(RTC_YEAR);
6954bee8	177	#ifdef CONFIG_ACPI
ad71860a AS	178	if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
	179	acpi_gbl_FADT.century)
	180	century = CMOS_READ(acpi_gbl_FADT.century);
6954bee8	181	#endif
641f71f5	182	} while (sec != CMOS_READ(RTC_SECONDS));
6954bee8	183
1da177e4 LT	184	spin_unlock_irqrestore(&rtc_lock, flags);
1da177e4 LT	185
0b91317e AK	186	/*
	187	* We know that x86-64 always uses BCD format, no need to check the
	188	* config register.
2618f86e	189	*/
1da177e4	190
0b91317e AK	191	BCD_TO_BIN(sec);
	192	BCD_TO_BIN(min);
	193	BCD_TO_BIN(hour);
	194	BCD_TO_BIN(day);
	195	BCD_TO_BIN(mon);
	196	BCD_TO_BIN(year);
1da177e4	197
ad71860a AS	198	if (century) {
	199	BCD_TO_BIN(century);
	200	year += century * 100;
	201	printk(KERN_INFO "Extended CMOS year: %d\n", century * 100);
2618f86e	202	} else {
6954bee8 AK	203	/*
	204	* x86-64 systems only exists since 2002.
	205	* This will work up to Dec 31, 2100
2618f86e	206	*/
6954bee8 AK	207	year += 2000;
6954bee8 AK	208	}
1da177e4 LT	209
	210	return mktime(year, mon, day, hour, min, sec);
	211	}
	212
6b37f5a2 JR	213	/* calibrate_cpu is used on systems with fixed rate TSCs to determine
	214	* processor frequency */
	215	#define TICK_COUNT 100000000
	216	static unsigned int __init tsc_calibrate_cpu_khz(void)
	217	{
2618f86e TG	218	int tsc_start, tsc_now;
	219	int i, no_ctr_free;
	220	unsigned long evntsel3 = 0, pmc3 = 0, pmc_now = 0;
	221	unsigned long flags;
	222
	223	for (i = 0; i < 4; i++)
	224	if (avail_to_resrv_perfctr_nmi_bit(i))
	225	break;
	226	no_ctr_free = (i == 4);
	227	if (no_ctr_free) {
	228	i = 3;
	229	rdmsrl(MSR_K7_EVNTSEL3, evntsel3);
	230	wrmsrl(MSR_K7_EVNTSEL3, 0);
	231	rdmsrl(MSR_K7_PERFCTR3, pmc3);
	232	} else {
	233	reserve_perfctr_nmi(MSR_K7_PERFCTR0 + i);
	234	reserve_evntsel_nmi(MSR_K7_EVNTSEL0 + i);
	235	}
	236	local_irq_save(flags);
	237	/* start meauring cycles, incrementing from 0 */
	238	wrmsrl(MSR_K7_PERFCTR0 + i, 0);
	239	wrmsrl(MSR_K7_EVNTSEL0 + i, 1 << 22 \| 3 << 16 \| 0x76);
	240	rdtscl(tsc_start);
	241	do {
	242	rdmsrl(MSR_K7_PERFCTR0 + i, pmc_now);
	243	tsc_now = get_cycles_sync();
	244	} while ((tsc_now - tsc_start) < TICK_COUNT);
	245
	246	local_irq_restore(flags);
	247	if (no_ctr_free) {
	248	wrmsrl(MSR_K7_EVNTSEL3, 0);
	249	wrmsrl(MSR_K7_PERFCTR3, pmc3);
	250	wrmsrl(MSR_K7_EVNTSEL3, evntsel3);
	251	} else {
	252	release_perfctr_nmi(MSR_K7_PERFCTR0 + i);
	253	release_evntsel_nmi(MSR_K7_EVNTSEL0 + i);
	254	}
	255
	256	return pmc_now * tsc_khz / (tsc_now - tsc_start);
6b37f5a2	257	}
1da177e4	258
1da177e4	259	static struct irqaction irq0 = {
b8ce3359	260	.handler = timer_event_interrupt,
5fa3a246	261	.flags = IRQF_DISABLED \| IRQF_IRQPOLL \| IRQF_NOBALANCING,
e6d828f4	262	.mask = CPU_MASK_NONE,
2618f86e	263	.name = "timer"
1da177e4 LT	264	};
1da177e4 LT	265
a670fad0 VP	266	void __init time_init(void)
a670fad0 VP	267	{
b8ce3359 TG	268	if (!hpet_enable())
b8ce3359 TG	269	setup_pit_timer();
a3a00751	270
b8ce3359	271	setup_irq(0, &irq0);
1da177e4	272
d371698e TG	273	tsc_calibrate();
d371698e TG	274
6b37f5a2 JR	275	cpu_khz = tsc_khz;
	276	if (cpu_has(&boot_cpu_data, X86_FEATURE_CONSTANT_TSC) &&
	277	boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
	278	boot_cpu_data.x86 == 16)
	279	cpu_khz = tsc_calibrate_cpu_khz();
	280
312df5f1	281	if (unsynchronized_tsc())
5a90cf20	282	mark_tsc_unstable("TSCs unsynchronized");
a670fad0	283
2d0c87c3	284	if (cpu_has(&boot_cpu_data, X86_FEATURE_RDTSCP))
c08c8205 VP	285	vgetcpu_mode = VGETCPU_RDTSCP;
	286	else
	287	vgetcpu_mode = VGETCPU_LSL;
	288
a670fad0 VP	289	printk(KERN_INFO "time.c: Detected %d.%03d MHz processor.\n",
a670fad0 VP	290	cpu_khz / 1000, cpu_khz % 1000);
6bb74df4	291	init_tsc_clocksource();
1da177e4	292	}