x86, UV: Disable BAU on network congestion
[deliverable/linux.git] / arch / x86 / kernel / tlb_uv.c
CommitLineData
1812924b
CW
1/*
2 * SGI UltraViolet TLB flush routines.
3 *
b8f7fb13 4 * (c) 2008-2010 Cliff Wickman <cpw@sgi.com>, SGI.
1812924b
CW
5 *
6 * This code is released under the GNU General Public License version 2 or
7 * later.
8 */
aef8f5b8 9#include <linux/seq_file.h>
1812924b 10#include <linux/proc_fs.h>
e8e5e8a8 11#include <linux/debugfs.h>
1812924b 12#include <linux/kernel.h>
5a0e3ad6 13#include <linux/slab.h>
1812924b 14
1812924b 15#include <asm/mmu_context.h>
bdbcdd48 16#include <asm/uv/uv.h>
1812924b 17#include <asm/uv/uv_mmrs.h>
b4c286e6 18#include <asm/uv/uv_hub.h>
1812924b 19#include <asm/uv/uv_bau.h>
7b6aa335 20#include <asm/apic.h>
b4c286e6 21#include <asm/idle.h>
b194b120 22#include <asm/tsc.h>
99dd8713 23#include <asm/irq_vectors.h>
b8f7fb13 24#include <asm/timer.h>
1812924b 25
b8f7fb13
CW
26struct msg_desc {
27 struct bau_payload_queue_entry *msg;
28 int msg_slot;
29 int sw_ack_slot;
30 struct bau_payload_queue_entry *va_queue_first;
31 struct bau_payload_queue_entry *va_queue_last;
32};
b4c286e6 33
12a6611f
CW
34/* timeouts in nanoseconds (indexed by UVH_AGING_PRESCALE_SEL urgency7 30:28) */
35static int timeout_base_ns[] = {
36 20,
37 160,
38 1280,
39 10240,
40 81920,
41 655360,
42 5242880,
43 167772160
44};
45static int timeout_us;
e8e5e8a8 46static int nobau;
50fb55ac
CW
47static int baudisabled;
48static spinlock_t disable_lock;
49static cycles_t congested_cycles;
12a6611f 50
e8e5e8a8
CW
51/* tunables: */
52static int max_bau_concurrent = MAX_BAU_CONCURRENT;
53static int max_bau_concurrent_constant = MAX_BAU_CONCURRENT;
54static int plugged_delay = PLUGGED_DELAY;
55static int plugsb4reset = PLUGSB4RESET;
56static int timeoutsb4reset = TIMEOUTSB4RESET;
57static int ipi_reset_limit = IPI_RESET_LIMIT;
58static int complete_threshold = COMPLETE_THRESHOLD;
59static int congested_response_us = CONGESTED_RESPONSE_US;
60static int congested_reps = CONGESTED_REPS;
61static int congested_period = CONGESTED_PERIOD;
62static struct dentry *tunables_dir;
63static struct dentry *tunables_file;
b4c286e6 64
b8f7fb13
CW
65static int __init setup_nobau(char *arg)
66{
67 nobau = 1;
68 return 0;
69}
70early_param("nobau", setup_nobau);
b4c286e6 71
b8f7fb13
CW
72/* base pnode in this partition */
73static int uv_partition_base_pnode __read_mostly;
74/* position of pnode (which is nasid>>1): */
75static int uv_nshift __read_mostly;
76static unsigned long uv_mmask __read_mostly;
1812924b 77
dc163a41
IM
78static DEFINE_PER_CPU(struct ptc_stats, ptcstats);
79static DEFINE_PER_CPU(struct bau_control, bau_control);
b8f7fb13
CW
80static DEFINE_PER_CPU(cpumask_var_t, uv_flush_tlb_mask);
81
82struct reset_args {
83 int sender;
84};
1812924b 85
9674f35b 86/*
b8f7fb13
CW
87 * Determine the first node on a uvhub. 'Nodes' are used for kernel
88 * memory allocation.
9674f35b 89 */
b8f7fb13 90static int __init uvhub_to_first_node(int uvhub)
9674f35b
CW
91{
92 int node, b;
93
94 for_each_online_node(node) {
95 b = uv_node_to_blade_id(node);
b8f7fb13 96 if (uvhub == b)
9674f35b
CW
97 return node;
98 }
b8f7fb13 99 return -1;
9674f35b
CW
100}
101
102/*
b8f7fb13 103 * Determine the apicid of the first cpu on a uvhub.
9674f35b 104 */
b8f7fb13 105static int __init uvhub_to_first_apicid(int uvhub)
9674f35b
CW
106{
107 int cpu;
108
109 for_each_present_cpu(cpu)
b8f7fb13 110 if (uvhub == uv_cpu_to_blade_id(cpu))
9674f35b
CW
111 return per_cpu(x86_cpu_to_apicid, cpu);
112 return -1;
113}
114
1812924b
CW
115/*
116 * Free a software acknowledge hardware resource by clearing its Pending
117 * bit. This will return a reply to the sender.
118 * If the message has timed out, a reply has already been sent by the
119 * hardware but the resource has not been released. In that case our
120 * clear of the Timeout bit (as well) will free the resource. No reply will
121 * be sent (the hardware will only do one reply per message).
122 */
b8f7fb13
CW
123static inline void uv_reply_to_message(struct msg_desc *mdp,
124 struct bau_control *bcp)
1812924b 125{
b194b120 126 unsigned long dw;
b8f7fb13 127 struct bau_payload_queue_entry *msg;
1812924b 128
b8f7fb13
CW
129 msg = mdp->msg;
130 if (!msg->canceled) {
131 dw = (msg->sw_ack_vector << UV_SW_ACK_NPENDING) |
132 msg->sw_ack_vector;
133 uv_write_local_mmr(
134 UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS, dw);
135 }
1812924b
CW
136 msg->replied_to = 1;
137 msg->sw_ack_vector = 0;
1812924b
CW
138}
139
140/*
b8f7fb13 141 * Process the receipt of a RETRY message
1812924b 142 */
b8f7fb13
CW
143static inline void uv_bau_process_retry_msg(struct msg_desc *mdp,
144 struct bau_control *bcp)
1812924b 145{
b8f7fb13
CW
146 int i;
147 int cancel_count = 0;
148 int slot2;
149 unsigned long msg_res;
150 unsigned long mmr = 0;
151 struct bau_payload_queue_entry *msg;
152 struct bau_payload_queue_entry *msg2;
153 struct ptc_stats *stat;
1812924b 154
b8f7fb13
CW
155 msg = mdp->msg;
156 stat = &per_cpu(ptcstats, bcp->cpu);
157 stat->d_retries++;
158 /*
159 * cancel any message from msg+1 to the retry itself
160 */
161 for (msg2 = msg+1, i = 0; i < DEST_Q_SIZE; msg2++, i++) {
162 if (msg2 > mdp->va_queue_last)
163 msg2 = mdp->va_queue_first;
164 if (msg2 == msg)
165 break;
166
167 /* same conditions for cancellation as uv_do_reset */
168 if ((msg2->replied_to == 0) && (msg2->canceled == 0) &&
169 (msg2->sw_ack_vector) && ((msg2->sw_ack_vector &
170 msg->sw_ack_vector) == 0) &&
171 (msg2->sending_cpu == msg->sending_cpu) &&
172 (msg2->msg_type != MSG_NOOP)) {
173 slot2 = msg2 - mdp->va_queue_first;
174 mmr = uv_read_local_mmr
175 (UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE);
176 msg_res = ((msg2->sw_ack_vector << 8) |
177 msg2->sw_ack_vector);
178 /*
179 * This is a message retry; clear the resources held
180 * by the previous message only if they timed out.
181 * If it has not timed out we have an unexpected
182 * situation to report.
183 */
184 if (mmr & (msg_res << 8)) {
185 /*
186 * is the resource timed out?
187 * make everyone ignore the cancelled message.
188 */
189 msg2->canceled = 1;
190 stat->d_canceled++;
191 cancel_count++;
192 uv_write_local_mmr(
193 UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS,
194 (msg_res << 8) | msg_res);
195 } else
196 printk(KERN_INFO "note bau retry: no effect\n");
197 }
198 }
199 if (!cancel_count)
200 stat->d_nocanceled++;
201}
1812924b 202
b8f7fb13
CW
203/*
204 * Do all the things a cpu should do for a TLB shootdown message.
205 * Other cpu's may come here at the same time for this message.
206 */
207static void uv_bau_process_message(struct msg_desc *mdp,
208 struct bau_control *bcp)
209{
210 int msg_ack_count;
211 short socket_ack_count = 0;
212 struct ptc_stats *stat;
213 struct bau_payload_queue_entry *msg;
214 struct bau_control *smaster = bcp->socket_master;
1812924b 215
b8f7fb13
CW
216 /*
217 * This must be a normal message, or retry of a normal message
218 */
219 msg = mdp->msg;
220 stat = &per_cpu(ptcstats, bcp->cpu);
1812924b
CW
221 if (msg->address == TLB_FLUSH_ALL) {
222 local_flush_tlb();
b8f7fb13 223 stat->d_alltlb++;
1812924b
CW
224 } else {
225 __flush_tlb_one(msg->address);
b8f7fb13 226 stat->d_onetlb++;
1812924b 227 }
b8f7fb13
CW
228 stat->d_requestee++;
229
230 /*
231 * One cpu on each uvhub has the additional job on a RETRY
232 * of releasing the resource held by the message that is
233 * being retried. That message is identified by sending
234 * cpu number.
235 */
236 if (msg->msg_type == MSG_RETRY && bcp == bcp->uvhub_master)
237 uv_bau_process_retry_msg(mdp, bcp);
1812924b 238
b8f7fb13
CW
239 /*
240 * This is a sw_ack message, so we have to reply to it.
241 * Count each responding cpu on the socket. This avoids
242 * pinging the count's cache line back and forth between
243 * the sockets.
244 */
245 socket_ack_count = atomic_add_short_return(1, (struct atomic_short *)
246 &smaster->socket_acknowledge_count[mdp->msg_slot]);
247 if (socket_ack_count == bcp->cpus_in_socket) {
248 /*
249 * Both sockets dump their completed count total into
250 * the message's count.
251 */
252 smaster->socket_acknowledge_count[mdp->msg_slot] = 0;
253 msg_ack_count = atomic_add_short_return(socket_ack_count,
254 (struct atomic_short *)&msg->acknowledge_count);
255
256 if (msg_ack_count == bcp->cpus_in_uvhub) {
257 /*
258 * All cpus in uvhub saw it; reply
259 */
260 uv_reply_to_message(mdp, bcp);
261 }
262 }
1812924b 263
b8f7fb13 264 return;
1812924b
CW
265}
266
267/*
b8f7fb13
CW
268 * Determine the first cpu on a uvhub.
269 */
270static int uvhub_to_first_cpu(int uvhub)
271{
272 int cpu;
273 for_each_present_cpu(cpu)
274 if (uvhub == uv_cpu_to_blade_id(cpu))
275 return cpu;
276 return -1;
277}
278
279/*
280 * Last resort when we get a large number of destination timeouts is
281 * to clear resources held by a given cpu.
282 * Do this with IPI so that all messages in the BAU message queue
283 * can be identified by their nonzero sw_ack_vector field.
1812924b 284 *
b8f7fb13
CW
285 * This is entered for a single cpu on the uvhub.
286 * The sender want's this uvhub to free a specific message's
287 * sw_ack resources.
1812924b 288 */
b8f7fb13
CW
289static void
290uv_do_reset(void *ptr)
1812924b 291{
b4c286e6 292 int i;
b8f7fb13
CW
293 int slot;
294 int count = 0;
295 unsigned long mmr;
296 unsigned long msg_res;
297 struct bau_control *bcp;
298 struct reset_args *rap;
299 struct bau_payload_queue_entry *msg;
300 struct ptc_stats *stat;
1812924b 301
b8f7fb13
CW
302 bcp = &per_cpu(bau_control, smp_processor_id());
303 rap = (struct reset_args *)ptr;
304 stat = &per_cpu(ptcstats, bcp->cpu);
305 stat->d_resets++;
306
307 /*
308 * We're looking for the given sender, and
309 * will free its sw_ack resource.
310 * If all cpu's finally responded after the timeout, its
311 * message 'replied_to' was set.
312 */
313 for (msg = bcp->va_queue_first, i = 0; i < DEST_Q_SIZE; msg++, i++) {
314 /* uv_do_reset: same conditions for cancellation as
315 uv_bau_process_retry_msg() */
316 if ((msg->replied_to == 0) &&
317 (msg->canceled == 0) &&
318 (msg->sending_cpu == rap->sender) &&
319 (msg->sw_ack_vector) &&
320 (msg->msg_type != MSG_NOOP)) {
321 /*
322 * make everyone else ignore this message
323 */
324 msg->canceled = 1;
325 slot = msg - bcp->va_queue_first;
326 count++;
327 /*
328 * only reset the resource if it is still pending
329 */
330 mmr = uv_read_local_mmr
331 (UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE);
332 msg_res = ((msg->sw_ack_vector << 8) |
333 msg->sw_ack_vector);
334 if (mmr & msg_res) {
335 stat->d_rcanceled++;
336 uv_write_local_mmr(
337 UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS,
338 msg_res);
dc163a41 339 }
dc163a41
IM
340 }
341 }
b8f7fb13 342 return;
dc163a41
IM
343}
344
345/*
b8f7fb13
CW
346 * Use IPI to get all target uvhubs to release resources held by
347 * a given sending cpu number.
dc163a41 348 */
b8f7fb13
CW
349static void uv_reset_with_ipi(struct bau_target_uvhubmask *distribution,
350 int sender)
dc163a41 351{
b8f7fb13
CW
352 int uvhub;
353 int cpu;
354 cpumask_t mask;
355 struct reset_args reset_args;
dc163a41 356
b8f7fb13 357 reset_args.sender = sender;
dc163a41 358
b8f7fb13
CW
359 cpus_clear(mask);
360 /* find a single cpu for each uvhub in this distribution mask */
361 for (uvhub = 0;
362 uvhub < sizeof(struct bau_target_uvhubmask) * BITSPERBYTE;
363 uvhub++) {
364 if (!bau_uvhub_isset(uvhub, distribution))
b194b120 365 continue;
b8f7fb13
CW
366 /* find a cpu for this uvhub */
367 cpu = uvhub_to_first_cpu(uvhub);
368 cpu_set(cpu, mask);
1812924b 369 }
b8f7fb13
CW
370 /* IPI all cpus; Preemption is already disabled */
371 smp_call_function_many(&mask, uv_do_reset, (void *)&reset_args, 1);
372 return;
373}
374
375static inline unsigned long
376cycles_2_us(unsigned long long cyc)
377{
378 unsigned long long ns;
379 unsigned long us;
380 ns = (cyc * per_cpu(cyc2ns, smp_processor_id()))
381 >> CYC2NS_SCALE_FACTOR;
382 us = ns / 1000;
383 return us;
1812924b
CW
384}
385
b194b120 386/*
b8f7fb13
CW
387 * wait for all cpus on this hub to finish their sends and go quiet
388 * leaves uvhub_quiesce set so that no new broadcasts are started by
389 * bau_flush_send_and_wait()
390 */
391static inline void
392quiesce_local_uvhub(struct bau_control *hmaster)
393{
394 atomic_add_short_return(1, (struct atomic_short *)
395 &hmaster->uvhub_quiesce);
396}
397
398/*
399 * mark this quiet-requestor as done
400 */
401static inline void
402end_uvhub_quiesce(struct bau_control *hmaster)
403{
404 atomic_add_short_return(-1, (struct atomic_short *)
405 &hmaster->uvhub_quiesce);
406}
407
408/*
409 * Wait for completion of a broadcast software ack message
410 * return COMPLETE, RETRY(PLUGGED or TIMEOUT) or GIVEUP
b194b120 411 */
dc163a41 412static int uv_wait_completion(struct bau_desc *bau_desc,
b8f7fb13
CW
413 unsigned long mmr_offset, int right_shift, int this_cpu,
414 struct bau_control *bcp, struct bau_control *smaster, long try)
b194b120 415{
b8f7fb13 416 int relaxes = 0;
b194b120 417 unsigned long descriptor_status;
b8f7fb13
CW
418 unsigned long mmr;
419 unsigned long mask;
420 cycles_t ttime;
421 cycles_t timeout_time;
422 struct ptc_stats *stat = &per_cpu(ptcstats, this_cpu);
423 struct bau_control *hmaster;
b194b120 424
b8f7fb13
CW
425 hmaster = bcp->uvhub_master;
426 timeout_time = get_cycles() + bcp->timeout_interval;
b194b120 427
b8f7fb13 428 /* spin on the status MMR, waiting for it to go idle */
b194b120
CW
429 while ((descriptor_status = (((unsigned long)
430 uv_read_local_mmr(mmr_offset) >>
431 right_shift) & UV_ACT_STATUS_MASK)) !=
432 DESC_STATUS_IDLE) {
b194b120 433 /*
b8f7fb13
CW
434 * Our software ack messages may be blocked because there are
435 * no swack resources available. As long as none of them
436 * has timed out hardware will NACK our message and its
437 * state will stay IDLE.
b194b120 438 */
b8f7fb13
CW
439 if (descriptor_status == DESC_STATUS_SOURCE_TIMEOUT) {
440 stat->s_stimeout++;
441 return FLUSH_GIVEUP;
442 } else if (descriptor_status ==
443 DESC_STATUS_DESTINATION_TIMEOUT) {
444 stat->s_dtimeout++;
445 ttime = get_cycles();
446
447 /*
448 * Our retries may be blocked by all destination
449 * swack resources being consumed, and a timeout
450 * pending. In that case hardware returns the
451 * ERROR that looks like a destination timeout.
452 */
12a6611f
CW
453 if (cycles_2_us(ttime - bcp->send_message) <
454 timeout_us) {
b8f7fb13
CW
455 bcp->conseccompletes = 0;
456 return FLUSH_RETRY_PLUGGED;
457 }
458
459 bcp->conseccompletes = 0;
460 return FLUSH_RETRY_TIMEOUT;
461 } else {
462 /*
463 * descriptor_status is still BUSY
464 */
465 cpu_relax();
466 relaxes++;
467 if (relaxes >= 10000) {
468 relaxes = 0;
469 if (get_cycles() > timeout_time) {
470 quiesce_local_uvhub(hmaster);
471
472 /* single-thread the register change */
473 spin_lock(&hmaster->masks_lock);
474 mmr = uv_read_local_mmr(mmr_offset);
475 mask = 0UL;
476 mask |= (3UL < right_shift);
477 mask = ~mask;
478 mmr &= mask;
479 uv_write_local_mmr(mmr_offset, mmr);
480 spin_unlock(&hmaster->masks_lock);
481 end_uvhub_quiesce(hmaster);
482 stat->s_busy++;
b194b120
CW
483 return FLUSH_GIVEUP;
484 }
b194b120
CW
485 }
486 }
487 }
b8f7fb13 488 bcp->conseccompletes++;
b194b120
CW
489 return FLUSH_COMPLETE;
490}
491
b8f7fb13
CW
492static inline cycles_t
493sec_2_cycles(unsigned long sec)
494{
495 unsigned long ns;
496 cycles_t cyc;
497
498 ns = sec * 1000000000;
499 cyc = (ns << CYC2NS_SCALE_FACTOR)/(per_cpu(cyc2ns, smp_processor_id()));
500 return cyc;
501}
502
503/*
504 * conditionally add 1 to *v, unless *v is >= u
505 * return 0 if we cannot add 1 to *v because it is >= u
506 * return 1 if we can add 1 to *v because it is < u
507 * the add is atomic
508 *
509 * This is close to atomic_add_unless(), but this allows the 'u' value
510 * to be lowered below the current 'v'. atomic_add_unless can only stop
511 * on equal.
512 */
513static inline int atomic_inc_unless_ge(spinlock_t *lock, atomic_t *v, int u)
514{
515 spin_lock(lock);
516 if (atomic_read(v) >= u) {
517 spin_unlock(lock);
518 return 0;
519 }
520 atomic_inc(v);
521 spin_unlock(lock);
522 return 1;
523}
524
50fb55ac
CW
525/*
526 * Completions are taking a very long time due to a congested numalink
527 * network.
528 */
529static void
530disable_for_congestion(struct bau_control *bcp, struct ptc_stats *stat)
531{
532 int tcpu;
533 struct bau_control *tbcp;
534
535 /* let only one cpu do this disabling */
536 spin_lock(&disable_lock);
537 if (!baudisabled && bcp->period_requests &&
538 ((bcp->period_time / bcp->period_requests) > congested_cycles)) {
539 /* it becomes this cpu's job to turn on the use of the
540 BAU again */
541 baudisabled = 1;
542 bcp->set_bau_off = 1;
543 bcp->set_bau_on_time = get_cycles() +
544 sec_2_cycles(bcp->congested_period);
545 stat->s_bau_disabled++;
546 for_each_present_cpu(tcpu) {
547 tbcp = &per_cpu(bau_control, tcpu);
548 tbcp->baudisabled = 1;
549 }
550 }
551 spin_unlock(&disable_lock);
552}
553
b194b120
CW
554/**
555 * uv_flush_send_and_wait
556 *
b8f7fb13 557 * Send a broadcast and wait for it to complete.
b194b120 558 *
b8f7fb13
CW
559 * The flush_mask contains the cpus the broadcast is to be sent to, plus
560 * cpus that are on the local uvhub.
b194b120 561 *
b8f7fb13
CW
562 * Returns NULL if all flushing represented in the mask was done. The mask
563 * is zeroed.
bdbcdd48 564 * Returns @flush_mask if some remote flushing remains to be done. The
b8f7fb13
CW
565 * mask will have some bits still set, representing any cpus on the local
566 * uvhub (not current cpu) and any on remote uvhubs if the broadcast failed.
b194b120 567 */
b8f7fb13
CW
568const struct cpumask *uv_flush_send_and_wait(struct bau_desc *bau_desc,
569 struct cpumask *flush_mask,
570 struct bau_control *bcp)
b194b120 571{
b194b120 572 int right_shift;
b8f7fb13 573 int uvhub;
b4c286e6 574 int bit;
b8f7fb13
CW
575 int completion_status = 0;
576 int seq_number = 0;
577 long try = 0;
578 int cpu = bcp->uvhub_cpu;
579 int this_cpu = bcp->cpu;
580 int this_uvhub = bcp->uvhub;
b194b120 581 unsigned long mmr_offset;
b4c286e6 582 unsigned long index;
b194b120
CW
583 cycles_t time1;
584 cycles_t time2;
e8e5e8a8 585 cycles_t elapsed;
b8f7fb13
CW
586 struct ptc_stats *stat = &per_cpu(ptcstats, bcp->cpu);
587 struct bau_control *smaster = bcp->socket_master;
588 struct bau_control *hmaster = bcp->uvhub_master;
589
590 /*
e8e5e8a8 591 * Spin here while there are hmaster->max_bau_concurrent or more active
b8f7fb13
CW
592 * descriptors. This is the per-uvhub 'throttle'.
593 */
594 if (!atomic_inc_unless_ge(&hmaster->uvhub_lock,
595 &hmaster->active_descriptor_count,
e8e5e8a8 596 hmaster->max_bau_concurrent)) {
b8f7fb13
CW
597 stat->s_throttles++;
598 do {
599 cpu_relax();
600 } while (!atomic_inc_unless_ge(&hmaster->uvhub_lock,
601 &hmaster->active_descriptor_count,
e8e5e8a8 602 hmaster->max_bau_concurrent));
b8f7fb13
CW
603 }
604
605 while (hmaster->uvhub_quiesce)
606 cpu_relax();
b194b120
CW
607
608 if (cpu < UV_CPUS_PER_ACT_STATUS) {
609 mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_0;
610 right_shift = cpu * UV_ACT_STATUS_SIZE;
611 } else {
612 mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_1;
613 right_shift =
614 ((cpu - UV_CPUS_PER_ACT_STATUS) * UV_ACT_STATUS_SIZE);
615 }
616 time1 = get_cycles();
617 do {
b8f7fb13
CW
618 /*
619 * Every message from any given cpu gets a unique message
620 * sequence number. But retries use that same number.
621 * Our message may have timed out at the destination because
622 * all sw-ack resources are in use and there is a timeout
623 * pending there. In that case, our last send never got
624 * placed into the queue and we need to persist until it
625 * does.
626 *
627 * Make any retry a type MSG_RETRY so that the destination will
628 * free any resource held by a previous message from this cpu.
629 */
630 if (try == 0) {
631 /* use message type set by the caller the first time */
632 seq_number = bcp->message_number++;
633 } else {
634 /* use RETRY type on all the rest; same sequence */
635 bau_desc->header.msg_type = MSG_RETRY;
636 stat->s_retry_messages++;
637 }
638 bau_desc->header.sequence = seq_number;
dc163a41 639 index = (1UL << UVH_LB_BAU_SB_ACTIVATION_CONTROL_PUSH_SHFT) |
b8f7fb13
CW
640 bcp->uvhub_cpu;
641 bcp->send_message = get_cycles();
642
b194b120 643 uv_write_local_mmr(UVH_LB_BAU_SB_ACTIVATION_CONTROL, index);
b8f7fb13
CW
644
645 try++;
b194b120 646 completion_status = uv_wait_completion(bau_desc, mmr_offset,
b8f7fb13
CW
647 right_shift, this_cpu, bcp, smaster, try);
648
649 if (completion_status == FLUSH_RETRY_PLUGGED) {
650 /*
651 * Our retries may be blocked by all destination swack
652 * resources being consumed, and a timeout pending. In
653 * that case hardware immediately returns the ERROR
654 * that looks like a destination timeout.
655 */
e8e5e8a8 656 udelay(bcp->plugged_delay);
b8f7fb13 657 bcp->plugged_tries++;
e8e5e8a8 658 if (bcp->plugged_tries >= bcp->plugsb4reset) {
b8f7fb13
CW
659 bcp->plugged_tries = 0;
660 quiesce_local_uvhub(hmaster);
661 spin_lock(&hmaster->queue_lock);
662 uv_reset_with_ipi(&bau_desc->distribution,
663 this_cpu);
664 spin_unlock(&hmaster->queue_lock);
665 end_uvhub_quiesce(hmaster);
666 bcp->ipi_attempts++;
667 stat->s_resets_plug++;
668 }
669 } else if (completion_status == FLUSH_RETRY_TIMEOUT) {
e8e5e8a8 670 hmaster->max_bau_concurrent = 1;
b8f7fb13
CW
671 bcp->timeout_tries++;
672 udelay(TIMEOUT_DELAY);
e8e5e8a8 673 if (bcp->timeout_tries >= bcp->timeoutsb4reset) {
b8f7fb13
CW
674 bcp->timeout_tries = 0;
675 quiesce_local_uvhub(hmaster);
676 spin_lock(&hmaster->queue_lock);
677 uv_reset_with_ipi(&bau_desc->distribution,
678 this_cpu);
679 spin_unlock(&hmaster->queue_lock);
680 end_uvhub_quiesce(hmaster);
681 bcp->ipi_attempts++;
682 stat->s_resets_timeout++;
683 }
684 }
e8e5e8a8 685 if (bcp->ipi_attempts >= bcp->ipi_reset_limit) {
b8f7fb13
CW
686 bcp->ipi_attempts = 0;
687 completion_status = FLUSH_GIVEUP;
688 break;
689 }
690 cpu_relax();
691 } while ((completion_status == FLUSH_RETRY_PLUGGED) ||
692 (completion_status == FLUSH_RETRY_TIMEOUT));
b194b120 693 time2 = get_cycles();
b194b120 694
e8e5e8a8
CW
695 bcp->plugged_tries = 0;
696 bcp->timeout_tries = 0;
697
698 if ((completion_status == FLUSH_COMPLETE) &&
699 (bcp->conseccompletes > bcp->complete_threshold) &&
700 (hmaster->max_bau_concurrent <
701 hmaster->max_bau_concurrent_constant))
702 hmaster->max_bau_concurrent++;
b8f7fb13
CW
703
704 /*
705 * hold any cpu not timing out here; no other cpu currently held by
706 * the 'throttle' should enter the activation code
707 */
708 while (hmaster->uvhub_quiesce)
709 cpu_relax();
710 atomic_dec(&hmaster->active_descriptor_count);
711
712 /* guard against cycles wrap */
e8e5e8a8
CW
713 if (time2 > time1) {
714 elapsed = time2 - time1;
715 stat->s_time += elapsed;
50fb55ac
CW
716 if ((completion_status == FLUSH_COMPLETE) && (try == 1)) {
717 bcp->period_requests++;
718 bcp->period_time += elapsed;
719 if ((elapsed > congested_cycles) &&
720 (bcp->period_requests > bcp->congested_reps)) {
721 disable_for_congestion(bcp, stat);
722 }
723 }
e8e5e8a8 724 } else
b8f7fb13
CW
725 stat->s_requestor--; /* don't count this one */
726 if (completion_status == FLUSH_COMPLETE && try > 1)
727 stat->s_retriesok++;
728 else if (completion_status == FLUSH_GIVEUP) {
b194b120
CW
729 /*
730 * Cause the caller to do an IPI-style TLB shootdown on
b8f7fb13 731 * the target cpu's, all of which are still in the mask.
b194b120 732 */
b8f7fb13 733 stat->s_giveup++;
2749ebe3 734 return flush_mask;
b194b120
CW
735 }
736
737 /*
738 * Success, so clear the remote cpu's from the mask so we don't
739 * use the IPI method of shootdown on them.
740 */
bdbcdd48 741 for_each_cpu(bit, flush_mask) {
b8f7fb13
CW
742 uvhub = uv_cpu_to_blade_id(bit);
743 if (uvhub == this_uvhub)
b194b120 744 continue;
bdbcdd48 745 cpumask_clear_cpu(bit, flush_mask);
b194b120 746 }
bdbcdd48
TH
747 if (!cpumask_empty(flush_mask))
748 return flush_mask;
b8f7fb13 749
bdbcdd48 750 return NULL;
b194b120
CW
751}
752
1812924b
CW
753/**
754 * uv_flush_tlb_others - globally purge translation cache of a virtual
755 * address or all TLB's
bdbcdd48 756 * @cpumask: mask of all cpu's in which the address is to be removed
1812924b
CW
757 * @mm: mm_struct containing virtual address range
758 * @va: virtual address to be removed (or TLB_FLUSH_ALL for all TLB's on cpu)
bdbcdd48 759 * @cpu: the current cpu
1812924b
CW
760 *
761 * This is the entry point for initiating any UV global TLB shootdown.
762 *
763 * Purges the translation caches of all specified processors of the given
764 * virtual address, or purges all TLB's on specified processors.
765 *
bdbcdd48
TH
766 * The caller has derived the cpumask from the mm_struct. This function
767 * is called only if there are bits set in the mask. (e.g. flush_tlb_page())
1812924b 768 *
b8f7fb13
CW
769 * The cpumask is converted into a uvhubmask of the uvhubs containing
770 * those cpus.
b194b120 771 *
bdbcdd48
TH
772 * Note that this function should be called with preemption disabled.
773 *
774 * Returns NULL if all remote flushing was done.
775 * Returns pointer to cpumask if some remote flushing remains to be
776 * done. The returned pointer is valid till preemption is re-enabled.
1812924b 777 */
bdbcdd48
TH
778const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
779 struct mm_struct *mm,
780 unsigned long va, unsigned int cpu)
1812924b 781{
b8f7fb13
CW
782 int remotes;
783 int tcpu;
784 int uvhub;
b194b120 785 int locals = 0;
dc163a41 786 struct bau_desc *bau_desc;
b8f7fb13
CW
787 struct cpumask *flush_mask;
788 struct ptc_stats *stat;
789 struct bau_control *bcp;
50fb55ac 790 struct bau_control *tbcp;
bdbcdd48 791
e8e5e8a8 792 /* kernel was booted 'nobau' */
b8f7fb13
CW
793 if (nobau)
794 return cpumask;
bdbcdd48 795
b8f7fb13 796 bcp = &per_cpu(bau_control, cpu);
50fb55ac
CW
797 stat = &per_cpu(ptcstats, cpu);
798
799 /* bau was disabled due to slow response */
800 if (bcp->baudisabled) {
801 /* the cpu that disabled it must re-enable it */
802 if (bcp->set_bau_off) {
803 if (get_cycles() >= bcp->set_bau_on_time) {
804 stat->s_bau_reenabled++;
805 baudisabled = 0;
806 for_each_present_cpu(tcpu) {
807 tbcp = &per_cpu(bau_control, tcpu);
808 tbcp->baudisabled = 0;
809 tbcp->period_requests = 0;
810 tbcp->period_time = 0;
811 }
812 }
813 }
814 return cpumask;
815 }
e8e5e8a8 816
b8f7fb13
CW
817 /*
818 * Each sending cpu has a per-cpu mask which it fills from the caller's
819 * cpu mask. Only remote cpus are converted to uvhubs and copied.
820 */
821 flush_mask = (struct cpumask *)per_cpu(uv_flush_tlb_mask, cpu);
822 /*
823 * copy cpumask to flush_mask, removing current cpu
824 * (current cpu should already have been flushed by the caller and
825 * should never be returned if we return flush_mask)
826 */
827 cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu));
828 if (cpu_isset(cpu, *cpumask))
829 locals++; /* current cpu was targeted */
1812924b 830
b8f7fb13
CW
831 bau_desc = bcp->descriptor_base;
832 bau_desc += UV_ITEMS_PER_DESCRIPTOR * bcp->uvhub_cpu;
1812924b 833
b8f7fb13
CW
834 bau_uvhubs_clear(&bau_desc->distribution, UV_DISTRIBUTION_SIZE);
835 remotes = 0;
836 for_each_cpu(tcpu, flush_mask) {
837 uvhub = uv_cpu_to_blade_id(tcpu);
838 if (uvhub == bcp->uvhub) {
b194b120 839 locals++;
1812924b 840 continue;
b194b120 841 }
b8f7fb13
CW
842 bau_uvhub_set(uvhub, &bau_desc->distribution);
843 remotes++;
1812924b 844 }
b8f7fb13 845 if (remotes == 0) {
b194b120 846 /*
b8f7fb13
CW
847 * No off_hub flushing; return status for local hub.
848 * Return the caller's mask if all were local (the current
849 * cpu may be in that mask).
b194b120
CW
850 */
851 if (locals)
b8f7fb13 852 return cpumask;
b194b120 853 else
bdbcdd48 854 return NULL;
b194b120 855 }
b8f7fb13
CW
856 stat->s_requestor++;
857 stat->s_ntargcpu += remotes;
858 remotes = bau_uvhub_weight(&bau_desc->distribution);
859 stat->s_ntarguvhub += remotes;
860 if (remotes >= 16)
861 stat->s_ntarguvhub16++;
862 else if (remotes >= 8)
863 stat->s_ntarguvhub8++;
864 else if (remotes >= 4)
865 stat->s_ntarguvhub4++;
866 else if (remotes >= 2)
867 stat->s_ntarguvhub2++;
868 else
869 stat->s_ntarguvhub1++;
1812924b
CW
870
871 bau_desc->payload.address = va;
bdbcdd48 872 bau_desc->payload.sending_cpu = cpu;
1812924b 873
b8f7fb13
CW
874 /*
875 * uv_flush_send_and_wait returns null if all cpu's were messaged, or
876 * the adjusted flush_mask if any cpu's were not messaged.
877 */
878 return uv_flush_send_and_wait(bau_desc, flush_mask, bcp);
1812924b
CW
879}
880
881/*
882 * The BAU message interrupt comes here. (registered by set_intr_gate)
883 * See entry_64.S
884 *
885 * We received a broadcast assist message.
886 *
b8f7fb13 887 * Interrupts are disabled; this interrupt could represent
1812924b
CW
888 * the receipt of several messages.
889 *
b8f7fb13
CW
890 * All cores/threads on this hub get this interrupt.
891 * The last one to see it does the software ack.
1812924b 892 * (the resource will not be freed until noninterruptable cpus see this
b8f7fb13 893 * interrupt; hardware may timeout the s/w ack and reply ERROR)
1812924b 894 */
b194b120 895void uv_bau_message_interrupt(struct pt_regs *regs)
1812924b 896{
1812924b 897 int count = 0;
b8f7fb13
CW
898 cycles_t time_start;
899 struct bau_payload_queue_entry *msg;
900 struct bau_control *bcp;
901 struct ptc_stats *stat;
902 struct msg_desc msgdesc;
903
904 time_start = get_cycles();
905 bcp = &per_cpu(bau_control, smp_processor_id());
906 stat = &per_cpu(ptcstats, smp_processor_id());
907 msgdesc.va_queue_first = bcp->va_queue_first;
908 msgdesc.va_queue_last = bcp->va_queue_last;
909 msg = bcp->bau_msg_head;
1812924b
CW
910 while (msg->sw_ack_vector) {
911 count++;
b8f7fb13
CW
912 msgdesc.msg_slot = msg - msgdesc.va_queue_first;
913 msgdesc.sw_ack_slot = ffs(msg->sw_ack_vector) - 1;
914 msgdesc.msg = msg;
915 uv_bau_process_message(&msgdesc, bcp);
1812924b 916 msg++;
b8f7fb13
CW
917 if (msg > msgdesc.va_queue_last)
918 msg = msgdesc.va_queue_first;
919 bcp->bau_msg_head = msg;
1812924b 920 }
b8f7fb13 921 stat->d_time += (get_cycles() - time_start);
1812924b 922 if (!count)
b8f7fb13 923 stat->d_nomsg++;
1812924b 924 else if (count > 1)
b8f7fb13
CW
925 stat->d_multmsg++;
926 ack_APIC_irq();
1812924b
CW
927}
928
c4c4688f
CW
929/*
930 * uv_enable_timeouts
931 *
b8f7fb13 932 * Each target uvhub (i.e. a uvhub that has no cpu's) needs to have
c4c4688f
CW
933 * shootdown message timeouts enabled. The timeout does not cause
934 * an interrupt, but causes an error message to be returned to
935 * the sender.
936 */
b194b120 937static void uv_enable_timeouts(void)
1812924b 938{
b8f7fb13
CW
939 int uvhub;
940 int nuvhubs;
1812924b 941 int pnode;
c4c4688f 942 unsigned long mmr_image;
1812924b 943
b8f7fb13 944 nuvhubs = uv_num_possible_blades();
1812924b 945
b8f7fb13
CW
946 for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
947 if (!uv_blade_nr_possible_cpus(uvhub))
1812924b 948 continue;
c4c4688f 949
b8f7fb13 950 pnode = uv_blade_to_pnode(uvhub);
c4c4688f
CW
951 mmr_image =
952 uv_read_global_mmr64(pnode, UVH_LB_BAU_MISC_CONTROL);
953 /*
954 * Set the timeout period and then lock it in, in three
955 * steps; captures and locks in the period.
956 *
957 * To program the period, the SOFT_ACK_MODE must be off.
958 */
959 mmr_image &= ~((unsigned long)1 <<
6f4edd69 960 UVH_LB_BAU_MISC_CONTROL_ENABLE_INTD_SOFT_ACK_MODE_SHFT);
c4c4688f
CW
961 uv_write_global_mmr64
962 (pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image);
963 /*
964 * Set the 4-bit period.
965 */
966 mmr_image &= ~((unsigned long)0xf <<
6f4edd69 967 UVH_LB_BAU_MISC_CONTROL_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHFT);
c4c4688f 968 mmr_image |= (UV_INTD_SOFT_ACK_TIMEOUT_PERIOD <<
6f4edd69 969 UVH_LB_BAU_MISC_CONTROL_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHFT);
c4c4688f
CW
970 uv_write_global_mmr64
971 (pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image);
972 /*
973 * Subsequent reversals of the timebase bit (3) cause an
974 * immediate timeout of one or all INTD resources as
975 * indicated in bits 2:0 (7 causes all of them to timeout).
976 */
977 mmr_image |= ((unsigned long)1 <<
6f4edd69 978 UVH_LB_BAU_MISC_CONTROL_ENABLE_INTD_SOFT_ACK_MODE_SHFT);
c4c4688f
CW
979 uv_write_global_mmr64
980 (pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image);
1812924b 981 }
1812924b
CW
982}
983
b194b120 984static void *uv_ptc_seq_start(struct seq_file *file, loff_t *offset)
1812924b
CW
985{
986 if (*offset < num_possible_cpus())
987 return offset;
988 return NULL;
989}
990
b194b120 991static void *uv_ptc_seq_next(struct seq_file *file, void *data, loff_t *offset)
1812924b
CW
992{
993 (*offset)++;
994 if (*offset < num_possible_cpus())
995 return offset;
996 return NULL;
997}
998
b194b120 999static void uv_ptc_seq_stop(struct seq_file *file, void *data)
1812924b
CW
1000{
1001}
1002
b8f7fb13 1003static inline unsigned long long
12a6611f 1004microsec_2_cycles(unsigned long microsec)
b8f7fb13
CW
1005{
1006 unsigned long ns;
1007 unsigned long long cyc;
1008
12a6611f 1009 ns = microsec * 1000;
b8f7fb13
CW
1010 cyc = (ns << CYC2NS_SCALE_FACTOR)/(per_cpu(cyc2ns, smp_processor_id()));
1011 return cyc;
1012}
1013
1812924b 1014/*
b8f7fb13
CW
1015 * Display the statistics thru /proc.
1016 * 'data' points to the cpu number
1812924b 1017 */
b194b120 1018static int uv_ptc_seq_show(struct seq_file *file, void *data)
1812924b
CW
1019{
1020 struct ptc_stats *stat;
1021 int cpu;
1022
1023 cpu = *(loff_t *)data;
1024
1025 if (!cpu) {
1026 seq_printf(file,
b8f7fb13 1027 "# cpu sent stime numuvhubs numuvhubs16 numuvhubs8 ");
1812924b 1028 seq_printf(file,
b8f7fb13
CW
1029 "numuvhubs4 numuvhubs2 numuvhubs1 numcpus dto ");
1030 seq_printf(file,
1031 "retries rok resetp resett giveup sto bz throt ");
1032 seq_printf(file,
1033 "sw_ack recv rtime all ");
1034 seq_printf(file,
50fb55ac
CW
1035 "one mult none retry canc nocan reset rcan ");
1036 seq_printf(file,
1037 "disable enable\n");
1812924b
CW
1038 }
1039 if (cpu < num_possible_cpus() && cpu_online(cpu)) {
1040 stat = &per_cpu(ptcstats, cpu);
b8f7fb13
CW
1041 /* source side statistics */
1042 seq_printf(file,
1043 "cpu %d %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
1044 cpu, stat->s_requestor, cycles_2_us(stat->s_time),
1045 stat->s_ntarguvhub, stat->s_ntarguvhub16,
1046 stat->s_ntarguvhub8, stat->s_ntarguvhub4,
1047 stat->s_ntarguvhub2, stat->s_ntarguvhub1,
1048 stat->s_ntargcpu, stat->s_dtimeout);
1049 seq_printf(file, "%ld %ld %ld %ld %ld %ld %ld %ld ",
1050 stat->s_retry_messages, stat->s_retriesok,
1051 stat->s_resets_plug, stat->s_resets_timeout,
1052 stat->s_giveup, stat->s_stimeout,
1053 stat->s_busy, stat->s_throttles);
e8e5e8a8 1054
b8f7fb13
CW
1055 /* destination side statistics */
1056 seq_printf(file,
50fb55ac 1057 "%lx %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
9674f35b 1058 uv_read_global_mmr64(uv_cpu_to_pnode(cpu),
1812924b 1059 UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE),
b8f7fb13
CW
1060 stat->d_requestee, cycles_2_us(stat->d_time),
1061 stat->d_alltlb, stat->d_onetlb, stat->d_multmsg,
1062 stat->d_nomsg, stat->d_retries, stat->d_canceled,
1063 stat->d_nocanceled, stat->d_resets,
1064 stat->d_rcanceled);
50fb55ac
CW
1065 seq_printf(file, "%ld %ld\n",
1066 stat->s_bau_disabled, stat->s_bau_reenabled);
1812924b
CW
1067 }
1068
1069 return 0;
1070}
1071
e8e5e8a8
CW
1072/*
1073 * Display the tunables thru debugfs
1074 */
1075static ssize_t tunables_read(struct file *file, char __user *userbuf,
1076 size_t count, loff_t *ppos)
1077{
1078 char buf[300];
1079 int ret;
1080
1081 ret = snprintf(buf, 300, "%s %s %s\n%d %d %d %d %d %d %d %d %d\n",
1082 "max_bau_concurrent plugged_delay plugsb4reset",
1083 "timeoutsb4reset ipi_reset_limit complete_threshold",
1084 "congested_response_us congested_reps congested_period",
1085 max_bau_concurrent, plugged_delay, plugsb4reset,
1086 timeoutsb4reset, ipi_reset_limit, complete_threshold,
1087 congested_response_us, congested_reps, congested_period);
1088
1089 return simple_read_from_buffer(userbuf, count, ppos, buf, ret);
1090}
1091
1812924b 1092/*
b8f7fb13 1093 * -1: resetf the statistics
1812924b 1094 * 0: display meaning of the statistics
1812924b 1095 */
b194b120 1096static ssize_t uv_ptc_proc_write(struct file *file, const char __user *user,
b4c286e6 1097 size_t count, loff_t *data)
1812924b 1098{
b8f7fb13
CW
1099 int cpu;
1100 long input_arg;
1812924b 1101 char optstr[64];
b8f7fb13 1102 struct ptc_stats *stat;
1812924b 1103
e7eb8726 1104 if (count == 0 || count > sizeof(optstr))
cef53278 1105 return -EINVAL;
1812924b
CW
1106 if (copy_from_user(optstr, user, count))
1107 return -EFAULT;
1108 optstr[count - 1] = '\0';
b8f7fb13 1109 if (strict_strtol(optstr, 10, &input_arg) < 0) {
1812924b
CW
1110 printk(KERN_DEBUG "%s is invalid\n", optstr);
1111 return -EINVAL;
1112 }
1113
b8f7fb13 1114 if (input_arg == 0) {
1812924b 1115 printk(KERN_DEBUG "# cpu: cpu number\n");
b8f7fb13
CW
1116 printk(KERN_DEBUG "Sender statistics:\n");
1117 printk(KERN_DEBUG
1118 "sent: number of shootdown messages sent\n");
1119 printk(KERN_DEBUG
1120 "stime: time spent sending messages\n");
1121 printk(KERN_DEBUG
1122 "numuvhubs: number of hubs targeted with shootdown\n");
1123 printk(KERN_DEBUG
1124 "numuvhubs16: number times 16 or more hubs targeted\n");
1125 printk(KERN_DEBUG
1126 "numuvhubs8: number times 8 or more hubs targeted\n");
1127 printk(KERN_DEBUG
1128 "numuvhubs4: number times 4 or more hubs targeted\n");
1129 printk(KERN_DEBUG
1130 "numuvhubs2: number times 2 or more hubs targeted\n");
1131 printk(KERN_DEBUG
1132 "numuvhubs1: number times 1 hub targeted\n");
1133 printk(KERN_DEBUG
1134 "numcpus: number of cpus targeted with shootdown\n");
1135 printk(KERN_DEBUG
1136 "dto: number of destination timeouts\n");
1137 printk(KERN_DEBUG
1138 "retries: destination timeout retries sent\n");
1139 printk(KERN_DEBUG
1140 "rok: : destination timeouts successfully retried\n");
1141 printk(KERN_DEBUG
1142 "resetp: ipi-style resource resets for plugs\n");
1143 printk(KERN_DEBUG
1144 "resett: ipi-style resource resets for timeouts\n");
1145 printk(KERN_DEBUG
1146 "giveup: fall-backs to ipi-style shootdowns\n");
1147 printk(KERN_DEBUG
1148 "sto: number of source timeouts\n");
1149 printk(KERN_DEBUG
1150 "bz: number of stay-busy's\n");
1151 printk(KERN_DEBUG
1152 "throt: number times spun in throttle\n");
1153 printk(KERN_DEBUG "Destination side statistics:\n");
1812924b 1154 printk(KERN_DEBUG
b8f7fb13 1155 "sw_ack: image of UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE\n");
1812924b 1156 printk(KERN_DEBUG
b8f7fb13 1157 "recv: shootdown messages received\n");
1812924b 1158 printk(KERN_DEBUG
b8f7fb13 1159 "rtime: time spent processing messages\n");
1812924b 1160 printk(KERN_DEBUG
b8f7fb13 1161 "all: shootdown all-tlb messages\n");
1812924b 1162 printk(KERN_DEBUG
b8f7fb13 1163 "one: shootdown one-tlb messages\n");
1812924b 1164 printk(KERN_DEBUG
b8f7fb13 1165 "mult: interrupts that found multiple messages\n");
1812924b 1166 printk(KERN_DEBUG
b8f7fb13 1167 "none: interrupts that found no messages\n");
1812924b 1168 printk(KERN_DEBUG
b8f7fb13 1169 "retry: number of retry messages processed\n");
1812924b 1170 printk(KERN_DEBUG
b8f7fb13 1171 "canc: number messages canceled by retries\n");
1812924b 1172 printk(KERN_DEBUG
b8f7fb13 1173 "nocan: number retries that found nothing to cancel\n");
1812924b 1174 printk(KERN_DEBUG
b8f7fb13
CW
1175 "reset: number of ipi-style reset requests processed\n");
1176 printk(KERN_DEBUG
1177 "rcan: number messages canceled by reset requests\n");
50fb55ac
CW
1178 printk(KERN_DEBUG
1179 "disable: number times use of the BAU was disabled\n");
1180 printk(KERN_DEBUG
1181 "enable: number times use of the BAU was re-enabled\n");
b8f7fb13
CW
1182 } else if (input_arg == -1) {
1183 for_each_present_cpu(cpu) {
1184 stat = &per_cpu(ptcstats, cpu);
1185 memset(stat, 0, sizeof(struct ptc_stats));
1186 }
e8e5e8a8
CW
1187 }
1188
1189 return count;
1190}
1191
1192static int local_atoi(const char *name)
1193{
1194 int val = 0;
1195
1196 for (;; name++) {
1197 switch (*name) {
1198 case '0' ... '9':
1199 val = 10*val+(*name-'0');
1200 break;
1201 default:
1202 return val;
b8f7fb13 1203 }
1812924b 1204 }
e8e5e8a8
CW
1205}
1206
1207/*
1208 * set the tunables
1209 * 0 values reset them to defaults
1210 */
1211static ssize_t tunables_write(struct file *file, const char __user *user,
1212 size_t count, loff_t *data)
1213{
1214 int cpu;
1215 int cnt = 0;
1216 int val;
1217 char *p;
1218 char *q;
1219 char instr[64];
1220 struct bau_control *bcp;
1812924b 1221
e8e5e8a8
CW
1222 if (count == 0 || count > sizeof(instr)-1)
1223 return -EINVAL;
1224 if (copy_from_user(instr, user, count))
1225 return -EFAULT;
1226
1227 instr[count] = '\0';
1228 /* count the fields */
1229 p = instr + strspn(instr, WHITESPACE);
1230 q = p;
1231 for (; *p; p = q + strspn(q, WHITESPACE)) {
1232 q = p + strcspn(p, WHITESPACE);
1233 cnt++;
1234 if (q == p)
1235 break;
1236 }
1237 if (cnt != 9) {
1238 printk(KERN_INFO "bau tunable error: should be 9 numbers\n");
1239 return -EINVAL;
1240 }
1241
1242 p = instr + strspn(instr, WHITESPACE);
1243 q = p;
1244 for (cnt = 0; *p; p = q + strspn(q, WHITESPACE), cnt++) {
1245 q = p + strcspn(p, WHITESPACE);
1246 val = local_atoi(p);
1247 switch (cnt) {
1248 case 0:
1249 if (val == 0) {
1250 max_bau_concurrent = MAX_BAU_CONCURRENT;
1251 max_bau_concurrent_constant =
1252 MAX_BAU_CONCURRENT;
1253 continue;
1254 }
1255 bcp = &per_cpu(bau_control, smp_processor_id());
1256 if (val < 1 || val > bcp->cpus_in_uvhub) {
1257 printk(KERN_DEBUG
1258 "Error: BAU max concurrent %d is invalid\n",
1259 val);
1260 return -EINVAL;
1261 }
1262 max_bau_concurrent = val;
1263 max_bau_concurrent_constant = val;
1264 continue;
1265 case 1:
1266 if (val == 0)
1267 plugged_delay = PLUGGED_DELAY;
1268 else
1269 plugged_delay = val;
1270 continue;
1271 case 2:
1272 if (val == 0)
1273 plugsb4reset = PLUGSB4RESET;
1274 else
1275 plugsb4reset = val;
1276 continue;
1277 case 3:
1278 if (val == 0)
1279 timeoutsb4reset = TIMEOUTSB4RESET;
1280 else
1281 timeoutsb4reset = val;
1282 continue;
1283 case 4:
1284 if (val == 0)
1285 ipi_reset_limit = IPI_RESET_LIMIT;
1286 else
1287 ipi_reset_limit = val;
1288 continue;
1289 case 5:
1290 if (val == 0)
1291 complete_threshold = COMPLETE_THRESHOLD;
1292 else
1293 complete_threshold = val;
1294 continue;
1295 case 6:
1296 if (val == 0)
1297 congested_response_us = CONGESTED_RESPONSE_US;
1298 else
1299 congested_response_us = val;
1300 continue;
1301 case 7:
1302 if (val == 0)
1303 congested_reps = CONGESTED_REPS;
1304 else
1305 congested_reps = val;
1306 continue;
1307 case 8:
1308 if (val == 0)
1309 congested_period = CONGESTED_PERIOD;
1310 else
1311 congested_period = val;
1312 continue;
1313 }
1314 if (q == p)
1315 break;
1316 }
1317 for_each_present_cpu(cpu) {
1318 bcp = &per_cpu(bau_control, cpu);
1319 bcp->max_bau_concurrent = max_bau_concurrent;
1320 bcp->max_bau_concurrent_constant = max_bau_concurrent;
1321 bcp->plugged_delay = plugged_delay;
1322 bcp->plugsb4reset = plugsb4reset;
1323 bcp->timeoutsb4reset = timeoutsb4reset;
1324 bcp->ipi_reset_limit = ipi_reset_limit;
1325 bcp->complete_threshold = complete_threshold;
1326 bcp->congested_response_us = congested_response_us;
1327 bcp->congested_reps = congested_reps;
1328 bcp->congested_period = congested_period;
1329 }
1812924b
CW
1330 return count;
1331}
1332
1333static const struct seq_operations uv_ptc_seq_ops = {
dc163a41
IM
1334 .start = uv_ptc_seq_start,
1335 .next = uv_ptc_seq_next,
1336 .stop = uv_ptc_seq_stop,
1337 .show = uv_ptc_seq_show
1812924b
CW
1338};
1339
b194b120 1340static int uv_ptc_proc_open(struct inode *inode, struct file *file)
1812924b
CW
1341{
1342 return seq_open(file, &uv_ptc_seq_ops);
1343}
1344
e8e5e8a8
CW
1345static int tunables_open(struct inode *inode, struct file *file)
1346{
1347 return 0;
1348}
1349
1812924b 1350static const struct file_operations proc_uv_ptc_operations = {
b194b120
CW
1351 .open = uv_ptc_proc_open,
1352 .read = seq_read,
1353 .write = uv_ptc_proc_write,
1354 .llseek = seq_lseek,
1355 .release = seq_release,
1812924b
CW
1356};
1357
e8e5e8a8
CW
1358static const struct file_operations tunables_fops = {
1359 .open = tunables_open,
1360 .read = tunables_read,
1361 .write = tunables_write,
1362};
1363
b194b120 1364static int __init uv_ptc_init(void)
1812924b 1365{
b194b120 1366 struct proc_dir_entry *proc_uv_ptc;
1812924b
CW
1367
1368 if (!is_uv_system())
1369 return 0;
1370
10f02d11
AD
1371 proc_uv_ptc = proc_create(UV_PTC_BASENAME, 0444, NULL,
1372 &proc_uv_ptc_operations);
1812924b
CW
1373 if (!proc_uv_ptc) {
1374 printk(KERN_ERR "unable to create %s proc entry\n",
1375 UV_PTC_BASENAME);
1376 return -EINVAL;
1377 }
e8e5e8a8
CW
1378
1379 tunables_dir = debugfs_create_dir(UV_BAU_TUNABLES_DIR, NULL);
1380 if (!tunables_dir) {
1381 printk(KERN_ERR "unable to create debugfs directory %s\n",
1382 UV_BAU_TUNABLES_DIR);
1383 return -EINVAL;
1384 }
1385 tunables_file = debugfs_create_file(UV_BAU_TUNABLES_FILE, 0600,
1386 tunables_dir, NULL, &tunables_fops);
1387 if (!tunables_file) {
1388 printk(KERN_ERR "unable to create debugfs file %s\n",
1389 UV_BAU_TUNABLES_FILE);
1390 return -EINVAL;
1391 }
1812924b
CW
1392 return 0;
1393}
1394
1812924b 1395/*
b194b120 1396 * initialize the sending side's sending buffers
1812924b 1397 */
b8f7fb13 1398static void
b194b120 1399uv_activation_descriptor_init(int node, int pnode)
1812924b
CW
1400{
1401 int i;
b8f7fb13 1402 int cpu;
1812924b 1403 unsigned long pa;
1812924b 1404 unsigned long m;
b194b120 1405 unsigned long n;
b8f7fb13
CW
1406 struct bau_desc *bau_desc;
1407 struct bau_desc *bd2;
1408 struct bau_control *bcp;
b194b120 1409
0e2595cd
CW
1410 /*
1411 * each bau_desc is 64 bytes; there are 8 (UV_ITEMS_PER_DESCRIPTOR)
b8f7fb13 1412 * per cpu; and up to 32 (UV_ADP_SIZE) cpu's per uvhub
0e2595cd 1413 */
b8f7fb13 1414 bau_desc = (struct bau_desc *)kmalloc_node(sizeof(struct bau_desc)*
0e2595cd 1415 UV_ADP_SIZE*UV_ITEMS_PER_DESCRIPTOR, GFP_KERNEL, node);
b8f7fb13 1416 BUG_ON(!bau_desc);
b4c286e6 1417
b8f7fb13
CW
1418 pa = uv_gpa(bau_desc); /* need the real nasid*/
1419 n = pa >> uv_nshift;
b194b120 1420 m = pa & uv_mmask;
b4c286e6 1421
9c26f52b
CW
1422 uv_write_global_mmr64(pnode, UVH_LB_BAU_SB_DESCRIPTOR_BASE,
1423 (n << UV_DESC_BASE_PNODE_SHIFT | m));
b4c286e6 1424
0e2595cd
CW
1425 /*
1426 * initializing all 8 (UV_ITEMS_PER_DESCRIPTOR) descriptors for each
1427 * cpu even though we only use the first one; one descriptor can
b8f7fb13 1428 * describe a broadcast to 256 uv hubs.
0e2595cd 1429 */
b8f7fb13
CW
1430 for (i = 0, bd2 = bau_desc; i < (UV_ADP_SIZE*UV_ITEMS_PER_DESCRIPTOR);
1431 i++, bd2++) {
1432 memset(bd2, 0, sizeof(struct bau_desc));
1433 bd2->header.sw_ack_flag = 1;
94ca8e48 1434 /*
b8f7fb13
CW
1435 * base_dest_nodeid is the nasid (pnode<<1) of the first uvhub
1436 * in the partition. The bit map will indicate uvhub numbers,
1437 * which are 0-N in a partition. Pnodes are unique system-wide.
94ca8e48 1438 */
b8f7fb13
CW
1439 bd2->header.base_dest_nodeid = uv_partition_base_pnode << 1;
1440 bd2->header.dest_subnodeid = 0x10; /* the LB */
1441 bd2->header.command = UV_NET_ENDPOINT_INTD;
1442 bd2->header.int_both = 1;
b194b120
CW
1443 /*
1444 * all others need to be set to zero:
1445 * fairness chaining multilevel count replied_to
1446 */
1447 }
b8f7fb13
CW
1448 for_each_present_cpu(cpu) {
1449 if (pnode != uv_blade_to_pnode(uv_cpu_to_blade_id(cpu)))
1450 continue;
1451 bcp = &per_cpu(bau_control, cpu);
1452 bcp->descriptor_base = bau_desc;
1453 }
b194b120
CW
1454}
1455
1456/*
1457 * initialize the destination side's receiving buffers
b8f7fb13
CW
1458 * entered for each uvhub in the partition
1459 * - node is first node (kernel memory notion) on the uvhub
1460 * - pnode is the uvhub's physical identifier
b194b120 1461 */
b8f7fb13
CW
1462static void
1463uv_payload_queue_init(int node, int pnode)
b194b120 1464{
4ea3c51d 1465 int pn;
b8f7fb13 1466 int cpu;
b4c286e6 1467 char *cp;
b8f7fb13
CW
1468 unsigned long pa;
1469 struct bau_payload_queue_entry *pqp;
1470 struct bau_payload_queue_entry *pqp_malloc;
1471 struct bau_control *bcp;
1812924b 1472
dc163a41
IM
1473 pqp = (struct bau_payload_queue_entry *) kmalloc_node(
1474 (DEST_Q_SIZE + 1) * sizeof(struct bau_payload_queue_entry),
1475 GFP_KERNEL, node);
1476 BUG_ON(!pqp);
b8f7fb13 1477 pqp_malloc = pqp;
b4c286e6 1478
b194b120
CW
1479 cp = (char *)pqp + 31;
1480 pqp = (struct bau_payload_queue_entry *)(((unsigned long)cp >> 5) << 5);
b8f7fb13
CW
1481
1482 for_each_present_cpu(cpu) {
1483 if (pnode != uv_cpu_to_pnode(cpu))
1484 continue;
1485 /* for every cpu on this pnode: */
1486 bcp = &per_cpu(bau_control, cpu);
1487 bcp->va_queue_first = pqp;
1488 bcp->bau_msg_head = pqp;
1489 bcp->va_queue_last = pqp + (DEST_Q_SIZE - 1);
1490 }
4ea3c51d
CW
1491 /*
1492 * need the pnode of where the memory was really allocated
1493 */
1494 pa = uv_gpa(pqp);
b8f7fb13 1495 pn = pa >> uv_nshift;
b194b120
CW
1496 uv_write_global_mmr64(pnode,
1497 UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST,
4ea3c51d 1498 ((unsigned long)pn << UV_PAYLOADQ_PNODE_SHIFT) |
b194b120
CW
1499 uv_physnodeaddr(pqp));
1500 uv_write_global_mmr64(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL,
1501 uv_physnodeaddr(pqp));
b194b120
CW
1502 uv_write_global_mmr64(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_LAST,
1503 (unsigned long)
b8f7fb13
CW
1504 uv_physnodeaddr(pqp + (DEST_Q_SIZE - 1)));
1505 /* in effect, all msg_type's are set to MSG_NOOP */
dc163a41 1506 memset(pqp, 0, sizeof(struct bau_payload_queue_entry) * DEST_Q_SIZE);
b194b120 1507}
1812924b 1508
b194b120 1509/*
b8f7fb13 1510 * Initialization of each UV hub's structures
b194b120 1511 */
b8f7fb13 1512static void __init uv_init_uvhub(int uvhub, int vector)
b194b120 1513{
9674f35b 1514 int node;
b194b120 1515 int pnode;
b194b120 1516 unsigned long apicid;
b8f7fb13
CW
1517
1518 node = uvhub_to_first_node(uvhub);
1519 pnode = uv_blade_to_pnode(uvhub);
1520 uv_activation_descriptor_init(node, pnode);
1521 uv_payload_queue_init(node, pnode);
b194b120
CW
1522 /*
1523 * the below initialization can't be in firmware because the
1524 * messaging IRQ will be determined by the OS
1525 */
b8f7fb13 1526 apicid = uvhub_to_first_apicid(uvhub);
e38e2af1 1527 uv_write_global_mmr64(pnode, UVH_BAU_DATA_CONFIG,
b8f7fb13
CW
1528 ((apicid << 32) | vector));
1529}
1530
12a6611f
CW
1531/*
1532 * We will set BAU_MISC_CONTROL with a timeout period.
1533 * But the BIOS has set UVH_AGING_PRESCALE_SEL and UVH_TRANSACTION_TIMEOUT.
1534 * So the destination timeout period has be be calculated from them.
1535 */
1536static int
1537calculate_destination_timeout(void)
1538{
1539 unsigned long mmr_image;
1540 int mult1;
1541 int mult2;
1542 int index;
1543 int base;
1544 int ret;
1545 unsigned long ts_ns;
1546
1547 mult1 = UV_INTD_SOFT_ACK_TIMEOUT_PERIOD & BAU_MISC_CONTROL_MULT_MASK;
1548 mmr_image = uv_read_local_mmr(UVH_AGING_PRESCALE_SEL);
1549 index = (mmr_image >> BAU_URGENCY_7_SHIFT) & BAU_URGENCY_7_MASK;
1550 mmr_image = uv_read_local_mmr(UVH_TRANSACTION_TIMEOUT);
1551 mult2 = (mmr_image >> BAU_TRANS_SHIFT) & BAU_TRANS_MASK;
1552 base = timeout_base_ns[index];
1553 ts_ns = base * mult1 * mult2;
1554 ret = ts_ns / 1000;
1555 return ret;
1556}
1557
b8f7fb13
CW
1558/*
1559 * initialize the bau_control structure for each cpu
1560 */
1561static void uv_init_per_cpu(int nuvhubs)
1562{
1563 int i, j, k;
1564 int cpu;
1565 int pnode;
1566 int uvhub;
1567 short socket = 0;
1568 struct bau_control *bcp;
1569 struct uvhub_desc *bdp;
1570 struct socket_desc *sdp;
1571 struct bau_control *hmaster = NULL;
1572 struct bau_control *smaster = NULL;
1573 struct socket_desc {
1574 short num_cpus;
1575 short cpu_number[16];
1576 };
1577 struct uvhub_desc {
1578 short num_sockets;
1579 short num_cpus;
1580 short uvhub;
1581 short pnode;
1582 struct socket_desc socket[2];
1583 };
1584 struct uvhub_desc *uvhub_descs;
1585
12a6611f
CW
1586 timeout_us = calculate_destination_timeout();
1587
b8f7fb13
CW
1588 uvhub_descs = (struct uvhub_desc *)
1589 kmalloc(nuvhubs * sizeof(struct uvhub_desc), GFP_KERNEL);
1590 memset(uvhub_descs, 0, nuvhubs * sizeof(struct uvhub_desc));
1591 for_each_present_cpu(cpu) {
1592 bcp = &per_cpu(bau_control, cpu);
1593 memset(bcp, 0, sizeof(struct bau_control));
1594 spin_lock_init(&bcp->masks_lock);
b8f7fb13
CW
1595 pnode = uv_cpu_hub_info(cpu)->pnode;
1596 uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
1597 bdp = &uvhub_descs[uvhub];
1598 bdp->num_cpus++;
1599 bdp->uvhub = uvhub;
1600 bdp->pnode = pnode;
b8f7fb13
CW
1601 /* kludge: assume uv_hub.h is constant */
1602 socket = (cpu_physical_id(cpu)>>5)&1;
1603 if (socket >= bdp->num_sockets)
1604 bdp->num_sockets = socket+1;
1605 sdp = &bdp->socket[socket];
1606 sdp->cpu_number[sdp->num_cpus] = cpu;
1607 sdp->num_cpus++;
1608 }
1609 socket = 0;
1610 for_each_possible_blade(uvhub) {
1611 bdp = &uvhub_descs[uvhub];
1612 for (i = 0; i < bdp->num_sockets; i++) {
1613 sdp = &bdp->socket[i];
1614 for (j = 0; j < sdp->num_cpus; j++) {
1615 cpu = sdp->cpu_number[j];
1616 bcp = &per_cpu(bau_control, cpu);
1617 bcp->cpu = cpu;
1618 if (j == 0) {
1619 smaster = bcp;
1620 if (i == 0)
1621 hmaster = bcp;
1622 }
1623 bcp->cpus_in_uvhub = bdp->num_cpus;
1624 bcp->cpus_in_socket = sdp->num_cpus;
1625 bcp->socket_master = smaster;
1626 bcp->uvhub_master = hmaster;
1627 for (k = 0; k < DEST_Q_SIZE; k++)
1628 bcp->socket_acknowledge_count[k] = 0;
1629 bcp->uvhub_cpu =
1630 uv_cpu_hub_info(cpu)->blade_processor_id;
1631 }
1632 socket++;
1633 }
1634 }
1635 kfree(uvhub_descs);
e8e5e8a8
CW
1636 for_each_present_cpu(cpu) {
1637 bcp = &per_cpu(bau_control, cpu);
50fb55ac 1638 bcp->baudisabled = 0;
e8e5e8a8
CW
1639 /* time interval to catch a hardware stay-busy bug */
1640 bcp->timeout_interval = microsec_2_cycles(2*timeout_us);
1641 bcp->max_bau_concurrent = max_bau_concurrent;
1642 bcp->max_bau_concurrent_constant = max_bau_concurrent;
1643 bcp->plugged_delay = plugged_delay;
1644 bcp->plugsb4reset = plugsb4reset;
1645 bcp->timeoutsb4reset = timeoutsb4reset;
1646 bcp->ipi_reset_limit = ipi_reset_limit;
1647 bcp->complete_threshold = complete_threshold;
1648 bcp->congested_response_us = congested_response_us;
1649 bcp->congested_reps = congested_reps;
1650 bcp->congested_period = congested_period;
1651 }
b194b120
CW
1652}
1653
1654/*
1655 * Initialization of BAU-related structures
1656 */
1657static int __init uv_bau_init(void)
1658{
b8f7fb13
CW
1659 int uvhub;
1660 int pnode;
1661 int nuvhubs;
2c74d666 1662 int cur_cpu;
b8f7fb13
CW
1663 int vector;
1664 unsigned long mmr;
b194b120
CW
1665
1666 if (!is_uv_system())
1667 return 0;
1812924b 1668
b8f7fb13
CW
1669 if (nobau)
1670 return 0;
1671
76ba0ecd 1672 for_each_possible_cpu(cur_cpu)
eaa95840 1673 zalloc_cpumask_var_node(&per_cpu(uv_flush_tlb_mask, cur_cpu),
76ba0ecd
RR
1674 GFP_KERNEL, cpu_to_node(cur_cpu));
1675
e8e5e8a8 1676 max_bau_concurrent = MAX_BAU_CONCURRENT;
b8f7fb13 1677 uv_nshift = uv_hub_info->m_val;
036ed8ba 1678 uv_mmask = (1UL << uv_hub_info->m_val) - 1;
b8f7fb13 1679 nuvhubs = uv_num_possible_blades();
50fb55ac
CW
1680 spin_lock_init(&disable_lock);
1681 congested_cycles = microsec_2_cycles(congested_response_us);
9674f35b 1682
b8f7fb13 1683 uv_init_per_cpu(nuvhubs);
b4c286e6 1684
94ca8e48 1685 uv_partition_base_pnode = 0x7fffffff;
b8f7fb13
CW
1686 for (uvhub = 0; uvhub < nuvhubs; uvhub++)
1687 if (uv_blade_nr_possible_cpus(uvhub) &&
1688 (uv_blade_to_pnode(uvhub) < uv_partition_base_pnode))
1689 uv_partition_base_pnode = uv_blade_to_pnode(uvhub);
1690
1691 vector = UV_BAU_MESSAGE;
1692 for_each_possible_blade(uvhub)
1693 if (uv_blade_nr_possible_cpus(uvhub))
1694 uv_init_uvhub(uvhub, vector);
1695
1812924b 1696 uv_enable_timeouts();
b8f7fb13
CW
1697 alloc_intr_gate(vector, uv_bau_message_intr1);
1698
1699 for_each_possible_blade(uvhub) {
1700 pnode = uv_blade_to_pnode(uvhub);
1701 /* INIT the bau */
1702 uv_write_global_mmr64(pnode, UVH_LB_BAU_SB_ACTIVATION_CONTROL,
1703 ((unsigned long)1 << 63));
1704 mmr = 1; /* should be 1 to broadcast to both sockets */
1705 uv_write_global_mmr64(pnode, UVH_BAU_DATA_BROADCAST, mmr);
1706 }
b4c286e6 1707
1812924b
CW
1708 return 0;
1709}
b8f7fb13 1710core_initcall(uv_bau_init);
e8e5e8a8 1711fs_initcall(uv_ptc_init);
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