Merge branch 'x86-apic-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[deliverable/linux.git] / arch / x86 / kernel / traps.c
CommitLineData
1da177e4 1/*
1da177e4 2 * Copyright (C) 1991, 1992 Linus Torvalds
a8c1be9d 3 * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
1da177e4
LT
4 *
5 * Pentium III FXSR, SSE support
6 * Gareth Hughes <gareth@valinux.com>, May 2000
7 */
8
9/*
c1d518c8 10 * Handle hardware traps and faults.
1da177e4 11 */
c767a54b
JP
12
13#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
14
56dd9470 15#include <linux/context_tracking.h>
b5964405
IM
16#include <linux/interrupt.h>
17#include <linux/kallsyms.h>
18#include <linux/spinlock.h>
b5964405
IM
19#include <linux/kprobes.h>
20#include <linux/uaccess.h>
b5964405 21#include <linux/kdebug.h>
f503b5ae 22#include <linux/kgdb.h>
1da177e4 23#include <linux/kernel.h>
b5964405
IM
24#include <linux/module.h>
25#include <linux/ptrace.h>
b02ef20a 26#include <linux/uprobes.h>
1da177e4 27#include <linux/string.h>
b5964405 28#include <linux/delay.h>
1da177e4 29#include <linux/errno.h>
b5964405
IM
30#include <linux/kexec.h>
31#include <linux/sched.h>
1da177e4 32#include <linux/timer.h>
1da177e4 33#include <linux/init.h>
91768d6c 34#include <linux/bug.h>
b5964405
IM
35#include <linux/nmi.h>
36#include <linux/mm.h>
c1d518c8
AH
37#include <linux/smp.h>
38#include <linux/io.h>
1da177e4
LT
39
40#ifdef CONFIG_EISA
41#include <linux/ioport.h>
42#include <linux/eisa.h>
43#endif
44
c0d12172
DJ
45#if defined(CONFIG_EDAC)
46#include <linux/edac.h>
47#endif
48
f8561296 49#include <asm/kmemcheck.h>
b5964405 50#include <asm/stacktrace.h>
1da177e4 51#include <asm/processor.h>
1da177e4 52#include <asm/debugreg.h>
60063497 53#include <linux/atomic.h>
08d636b6 54#include <asm/ftrace.h>
c1d518c8 55#include <asm/traps.h>
1da177e4
LT
56#include <asm/desc.h>
57#include <asm/i387.h>
1361b83a 58#include <asm/fpu-internal.h>
9e55e44e 59#include <asm/mce.h>
4eefbe79 60#include <asm/fixmap.h>
1164dd00 61#include <asm/mach_traps.h>
17f41571 62#include <asm/alternative.h>
c1d518c8 63
081f75bb 64#ifdef CONFIG_X86_64
428cf902 65#include <asm/x86_init.h>
081f75bb
AH
66#include <asm/pgalloc.h>
67#include <asm/proto.h>
4df05f36
KC
68
69/* No need to be aligned, but done to keep all IDTs defined the same way. */
70gate_desc debug_idt_table[NR_VECTORS] __page_aligned_bss;
081f75bb 71#else
c1d518c8 72#include <asm/processor-flags.h>
8e6dafd6 73#include <asm/setup.h>
1da177e4 74
1da177e4 75asmlinkage int system_call(void);
081f75bb 76#endif
1da177e4 77
4df05f36
KC
78/* Must be page-aligned because the real IDT is used in a fixmap. */
79gate_desc idt_table[NR_VECTORS] __page_aligned_bss;
80
b77b881f
YL
81DECLARE_BITMAP(used_vectors, NR_VECTORS);
82EXPORT_SYMBOL_GPL(used_vectors);
83
762db434
AH
84static inline void conditional_sti(struct pt_regs *regs)
85{
86 if (regs->flags & X86_EFLAGS_IF)
87 local_irq_enable();
88}
89
3d2a71a5
AH
90static inline void preempt_conditional_sti(struct pt_regs *regs)
91{
bdb43806 92 preempt_count_inc();
3d2a71a5
AH
93 if (regs->flags & X86_EFLAGS_IF)
94 local_irq_enable();
95}
96
be716615
TG
97static inline void conditional_cli(struct pt_regs *regs)
98{
99 if (regs->flags & X86_EFLAGS_IF)
100 local_irq_disable();
101}
102
3d2a71a5
AH
103static inline void preempt_conditional_cli(struct pt_regs *regs)
104{
105 if (regs->flags & X86_EFLAGS_IF)
106 local_irq_disable();
bdb43806 107 preempt_count_dec();
3d2a71a5
AH
108}
109
9326638c 110static nokprobe_inline int
c416ddf5
FW
111do_trap_no_signal(struct task_struct *tsk, int trapnr, char *str,
112 struct pt_regs *regs, long error_code)
1da177e4 113{
081f75bb 114#ifdef CONFIG_X86_32
6b6891f9 115 if (regs->flags & X86_VM_MASK) {
3c1326f8 116 /*
c416ddf5 117 * Traps 0, 1, 3, 4, and 5 should be forwarded to vm86.
3c1326f8
AH
118 * On nmi (interrupt 2), do_trap should not be called.
119 */
c416ddf5
FW
120 if (trapnr < X86_TRAP_UD) {
121 if (!handle_vm86_trap((struct kernel_vm86_regs *) regs,
122 error_code, trapnr))
123 return 0;
124 }
125 return -1;
1da177e4 126 }
081f75bb 127#endif
c416ddf5
FW
128 if (!user_mode(regs)) {
129 if (!fixup_exception(regs)) {
130 tsk->thread.error_code = error_code;
131 tsk->thread.trap_nr = trapnr;
132 die(str, regs, error_code);
133 }
134 return 0;
135 }
1da177e4 136
c416ddf5
FW
137 return -1;
138}
1da177e4 139
1c326c4d
ON
140static siginfo_t *fill_trap_info(struct pt_regs *regs, int signr, int trapnr,
141 siginfo_t *info)
958d3d72
ON
142{
143 unsigned long siaddr;
144 int sicode;
145
146 switch (trapnr) {
1c326c4d
ON
147 default:
148 return SEND_SIG_PRIV;
149
958d3d72
ON
150 case X86_TRAP_DE:
151 sicode = FPE_INTDIV;
b02ef20a 152 siaddr = uprobe_get_trap_addr(regs);
958d3d72
ON
153 break;
154 case X86_TRAP_UD:
155 sicode = ILL_ILLOPN;
b02ef20a 156 siaddr = uprobe_get_trap_addr(regs);
958d3d72
ON
157 break;
158 case X86_TRAP_AC:
159 sicode = BUS_ADRALN;
160 siaddr = 0;
161 break;
162 }
163
164 info->si_signo = signr;
165 info->si_errno = 0;
166 info->si_code = sicode;
167 info->si_addr = (void __user *)siaddr;
1c326c4d 168 return info;
958d3d72
ON
169}
170
9326638c 171static void
c416ddf5
FW
172do_trap(int trapnr, int signr, char *str, struct pt_regs *regs,
173 long error_code, siginfo_t *info)
174{
175 struct task_struct *tsk = current;
176
177
178 if (!do_trap_no_signal(tsk, trapnr, str, regs, error_code))
179 return;
b5964405 180 /*
51e7dc70 181 * We want error_code and trap_nr set for userspace faults and
b5964405
IM
182 * kernelspace faults which result in die(), but not
183 * kernelspace faults which are fixed up. die() gives the
184 * process no chance to handle the signal and notice the
185 * kernel fault information, so that won't result in polluting
186 * the information about previously queued, but not yet
187 * delivered, faults. See also do_general_protection below.
188 */
189 tsk->thread.error_code = error_code;
51e7dc70 190 tsk->thread.trap_nr = trapnr;
d1895183 191
081f75bb
AH
192#ifdef CONFIG_X86_64
193 if (show_unhandled_signals && unhandled_signal(tsk, signr) &&
194 printk_ratelimit()) {
c767a54b
JP
195 pr_info("%s[%d] trap %s ip:%lx sp:%lx error:%lx",
196 tsk->comm, tsk->pid, str,
197 regs->ip, regs->sp, error_code);
081f75bb 198 print_vma_addr(" in ", regs->ip);
c767a54b 199 pr_cont("\n");
081f75bb
AH
200 }
201#endif
202
38cad57b 203 force_sig_info(signr, info ?: SEND_SIG_PRIV, tsk);
1da177e4 204}
9326638c 205NOKPROBE_SYMBOL(do_trap);
1da177e4 206
dff0796e 207static void do_error_trap(struct pt_regs *regs, long error_code, char *str,
1c326c4d 208 unsigned long trapnr, int signr)
dff0796e
ON
209{
210 enum ctx_state prev_state = exception_enter();
1c326c4d 211 siginfo_t info;
dff0796e
ON
212
213 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) !=
214 NOTIFY_STOP) {
215 conditional_sti(regs);
1c326c4d
ON
216 do_trap(trapnr, signr, str, regs, error_code,
217 fill_trap_info(regs, signr, trapnr, &info));
dff0796e
ON
218 }
219
220 exception_exit(prev_state);
221}
222
b5964405 223#define DO_ERROR(trapnr, signr, str, name) \
e407d620 224dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
b5964405 225{ \
1c326c4d 226 do_error_trap(regs, error_code, str, trapnr, signr); \
1da177e4
LT
227}
228
0eb14833
ON
229DO_ERROR(X86_TRAP_DE, SIGFPE, "divide error", divide_error)
230DO_ERROR(X86_TRAP_OF, SIGSEGV, "overflow", overflow)
231DO_ERROR(X86_TRAP_BR, SIGSEGV, "bounds", bounds)
232DO_ERROR(X86_TRAP_UD, SIGILL, "invalid opcode", invalid_op)
233DO_ERROR(X86_TRAP_OLD_MF, SIGFPE, "coprocessor segment overrun",coprocessor_segment_overrun)
234DO_ERROR(X86_TRAP_TS, SIGSEGV, "invalid TSS", invalid_TSS)
235DO_ERROR(X86_TRAP_NP, SIGBUS, "segment not present", segment_not_present)
081f75bb 236#ifdef CONFIG_X86_32
0eb14833 237DO_ERROR(X86_TRAP_SS, SIGBUS, "stack segment", stack_segment)
081f75bb 238#endif
0eb14833 239DO_ERROR(X86_TRAP_AC, SIGBUS, "alignment check", alignment_check)
1da177e4 240
081f75bb
AH
241#ifdef CONFIG_X86_64
242/* Runs on IST stack */
243dotraplinkage void do_stack_segment(struct pt_regs *regs, long error_code)
244{
6c1e0256
FW
245 enum ctx_state prev_state;
246
247 prev_state = exception_enter();
081f75bb 248 if (notify_die(DIE_TRAP, "stack segment", regs, error_code,
6ba3c97a
FW
249 X86_TRAP_SS, SIGBUS) != NOTIFY_STOP) {
250 preempt_conditional_sti(regs);
251 do_trap(X86_TRAP_SS, SIGBUS, "stack segment", regs, error_code, NULL);
252 preempt_conditional_cli(regs);
253 }
6c1e0256 254 exception_exit(prev_state);
081f75bb
AH
255}
256
257dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code)
258{
259 static const char str[] = "double fault";
260 struct task_struct *tsk = current;
261
6c1e0256 262 exception_enter();
081f75bb 263 /* Return not checked because double check cannot be ignored */
c9408265 264 notify_die(DIE_TRAP, str, regs, error_code, X86_TRAP_DF, SIGSEGV);
081f75bb
AH
265
266 tsk->thread.error_code = error_code;
51e7dc70 267 tsk->thread.trap_nr = X86_TRAP_DF;
081f75bb 268
4d067d8e
BP
269#ifdef CONFIG_DOUBLEFAULT
270 df_debug(regs, error_code);
271#endif
bd8b96df
IM
272 /*
273 * This is always a kernel trap and never fixable (and thus must
274 * never return).
275 */
081f75bb
AH
276 for (;;)
277 die(str, regs, error_code);
278}
279#endif
280
9326638c 281dotraplinkage void
13485ab5 282do_general_protection(struct pt_regs *regs, long error_code)
1da177e4 283{
13485ab5 284 struct task_struct *tsk;
6c1e0256 285 enum ctx_state prev_state;
b5964405 286
6c1e0256 287 prev_state = exception_enter();
c6df0d71
AH
288 conditional_sti(regs);
289
081f75bb 290#ifdef CONFIG_X86_32
ef3f6288
FW
291 if (regs->flags & X86_VM_MASK) {
292 local_irq_enable();
293 handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
6ba3c97a 294 goto exit;
ef3f6288 295 }
081f75bb 296#endif
1da177e4 297
13485ab5 298 tsk = current;
ef3f6288
FW
299 if (!user_mode(regs)) {
300 if (fixup_exception(regs))
6ba3c97a 301 goto exit;
ef3f6288
FW
302
303 tsk->thread.error_code = error_code;
304 tsk->thread.trap_nr = X86_TRAP_GP;
6ba3c97a
FW
305 if (notify_die(DIE_GPF, "general protection fault", regs, error_code,
306 X86_TRAP_GP, SIGSEGV) != NOTIFY_STOP)
ef3f6288 307 die("general protection fault", regs, error_code);
6ba3c97a 308 goto exit;
ef3f6288 309 }
1da177e4 310
13485ab5 311 tsk->thread.error_code = error_code;
51e7dc70 312 tsk->thread.trap_nr = X86_TRAP_GP;
b5964405 313
13485ab5
AH
314 if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) &&
315 printk_ratelimit()) {
c767a54b 316 pr_info("%s[%d] general protection ip:%lx sp:%lx error:%lx",
13485ab5
AH
317 tsk->comm, task_pid_nr(tsk),
318 regs->ip, regs->sp, error_code);
03252919 319 print_vma_addr(" in ", regs->ip);
c767a54b 320 pr_cont("\n");
03252919 321 }
abd4f750 322
38cad57b 323 force_sig_info(SIGSEGV, SEND_SIG_PRIV, tsk);
6ba3c97a 324exit:
6c1e0256 325 exception_exit(prev_state);
1da177e4 326}
9326638c 327NOKPROBE_SYMBOL(do_general_protection);
1da177e4 328
c1d518c8 329/* May run on IST stack. */
9326638c 330dotraplinkage void notrace do_int3(struct pt_regs *regs, long error_code)
1da177e4 331{
6c1e0256
FW
332 enum ctx_state prev_state;
333
08d636b6 334#ifdef CONFIG_DYNAMIC_FTRACE
a192cd04
SR
335 /*
336 * ftrace must be first, everything else may cause a recursive crash.
337 * See note by declaration of modifying_ftrace_code in ftrace.c
338 */
339 if (unlikely(atomic_read(&modifying_ftrace_code)) &&
340 ftrace_int3_handler(regs))
08d636b6
SR
341 return;
342#endif
17f41571
JK
343 if (poke_int3_handler(regs))
344 return;
345
4cdf77a8 346 prev_state = exception_enter();
f503b5ae 347#ifdef CONFIG_KGDB_LOW_LEVEL_TRAP
c9408265
KC
348 if (kgdb_ll_trap(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
349 SIGTRAP) == NOTIFY_STOP)
6ba3c97a 350 goto exit;
f503b5ae 351#endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */
cc3a1bf5 352
6f6343f5
MH
353#ifdef CONFIG_KPROBES
354 if (kprobe_int3_handler(regs))
4cdf77a8 355 goto exit;
6f6343f5
MH
356#endif
357
c9408265
KC
358 if (notify_die(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
359 SIGTRAP) == NOTIFY_STOP)
6ba3c97a 360 goto exit;
b5964405 361
42181186
SR
362 /*
363 * Let others (NMI) know that the debug stack is in use
364 * as we may switch to the interrupt stack.
365 */
366 debug_stack_usage_inc();
4915a35e 367 preempt_conditional_sti(regs);
c9408265 368 do_trap(X86_TRAP_BP, SIGTRAP, "int3", regs, error_code, NULL);
4915a35e 369 preempt_conditional_cli(regs);
42181186 370 debug_stack_usage_dec();
6ba3c97a 371exit:
6c1e0256 372 exception_exit(prev_state);
1da177e4 373}
9326638c 374NOKPROBE_SYMBOL(do_int3);
1da177e4 375
081f75bb 376#ifdef CONFIG_X86_64
bd8b96df
IM
377/*
378 * Help handler running on IST stack to switch back to user stack
379 * for scheduling or signal handling. The actual stack switch is done in
380 * entry.S
381 */
ec000109 382asmlinkage __visible struct pt_regs *sync_regs(struct pt_regs *eregs)
081f75bb
AH
383{
384 struct pt_regs *regs = eregs;
385 /* Did already sync */
386 if (eregs == (struct pt_regs *)eregs->sp)
387 ;
388 /* Exception from user space */
389 else if (user_mode(eregs))
390 regs = task_pt_regs(current);
bd8b96df
IM
391 /*
392 * Exception from kernel and interrupts are enabled. Move to
393 * kernel process stack.
394 */
081f75bb
AH
395 else if (eregs->flags & X86_EFLAGS_IF)
396 regs = (struct pt_regs *)(eregs->sp -= sizeof(struct pt_regs));
397 if (eregs != regs)
398 *regs = *eregs;
399 return regs;
400}
9326638c 401NOKPROBE_SYMBOL(sync_regs);
081f75bb
AH
402#endif
403
1da177e4
LT
404/*
405 * Our handling of the processor debug registers is non-trivial.
406 * We do not clear them on entry and exit from the kernel. Therefore
407 * it is possible to get a watchpoint trap here from inside the kernel.
408 * However, the code in ./ptrace.c has ensured that the user can
409 * only set watchpoints on userspace addresses. Therefore the in-kernel
410 * watchpoint trap can only occur in code which is reading/writing
411 * from user space. Such code must not hold kernel locks (since it
412 * can equally take a page fault), therefore it is safe to call
413 * force_sig_info even though that claims and releases locks.
b5964405 414 *
1da177e4
LT
415 * Code in ./signal.c ensures that the debug control register
416 * is restored before we deliver any signal, and therefore that
417 * user code runs with the correct debug control register even though
418 * we clear it here.
419 *
420 * Being careful here means that we don't have to be as careful in a
421 * lot of more complicated places (task switching can be a bit lazy
422 * about restoring all the debug state, and ptrace doesn't have to
423 * find every occurrence of the TF bit that could be saved away even
424 * by user code)
c1d518c8
AH
425 *
426 * May run on IST stack.
1da177e4 427 */
9326638c 428dotraplinkage void do_debug(struct pt_regs *regs, long error_code)
1da177e4 429{
1da177e4 430 struct task_struct *tsk = current;
6c1e0256 431 enum ctx_state prev_state;
a1e80faf 432 int user_icebp = 0;
08d68323 433 unsigned long dr6;
da654b74 434 int si_code;
1da177e4 435
4cdf77a8
MH
436 prev_state = exception_enter();
437
08d68323 438 get_debugreg(dr6, 6);
1da177e4 439
40f9249a
P
440 /* Filter out all the reserved bits which are preset to 1 */
441 dr6 &= ~DR6_RESERVED;
442
a1e80faf
FW
443 /*
444 * If dr6 has no reason to give us about the origin of this trap,
445 * then it's very likely the result of an icebp/int01 trap.
446 * User wants a sigtrap for that.
447 */
448 if (!dr6 && user_mode(regs))
449 user_icebp = 1;
450
f8561296 451 /* Catch kmemcheck conditions first of all! */
eadb8a09 452 if ((dr6 & DR_STEP) && kmemcheck_trap(regs))
6ba3c97a 453 goto exit;
f8561296 454
08d68323
P
455 /* DR6 may or may not be cleared by the CPU */
456 set_debugreg(0, 6);
10faa81e 457
ea8e61b7
PZ
458 /*
459 * The processor cleared BTF, so don't mark that we need it set.
460 */
461 clear_tsk_thread_flag(tsk, TIF_BLOCKSTEP);
462
08d68323
P
463 /* Store the virtualized DR6 value */
464 tsk->thread.debugreg6 = dr6;
465
6f6343f5
MH
466#ifdef CONFIG_KPROBES
467 if (kprobe_debug_handler(regs))
468 goto exit;
469#endif
470
5a802e15 471 if (notify_die(DIE_DEBUG, "debug", regs, (long)&dr6, error_code,
62edab90 472 SIGTRAP) == NOTIFY_STOP)
6ba3c97a 473 goto exit;
3d2a71a5 474
42181186
SR
475 /*
476 * Let others (NMI) know that the debug stack is in use
477 * as we may switch to the interrupt stack.
478 */
479 debug_stack_usage_inc();
480
1da177e4 481 /* It's safe to allow irq's after DR6 has been saved */
3d2a71a5 482 preempt_conditional_sti(regs);
1da177e4 483
08d68323 484 if (regs->flags & X86_VM_MASK) {
c9408265
KC
485 handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code,
486 X86_TRAP_DB);
6554287b 487 preempt_conditional_cli(regs);
42181186 488 debug_stack_usage_dec();
6ba3c97a 489 goto exit;
1da177e4
LT
490 }
491
1da177e4 492 /*
08d68323
P
493 * Single-stepping through system calls: ignore any exceptions in
494 * kernel space, but re-enable TF when returning to user mode.
495 *
496 * We already checked v86 mode above, so we can check for kernel mode
497 * by just checking the CPL of CS.
1da177e4 498 */
08d68323
P
499 if ((dr6 & DR_STEP) && !user_mode(regs)) {
500 tsk->thread.debugreg6 &= ~DR_STEP;
501 set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
502 regs->flags &= ~X86_EFLAGS_TF;
1da177e4 503 }
08d68323 504 si_code = get_si_code(tsk->thread.debugreg6);
a1e80faf 505 if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS) || user_icebp)
08d68323 506 send_sigtrap(tsk, regs, error_code, si_code);
3d2a71a5 507 preempt_conditional_cli(regs);
42181186 508 debug_stack_usage_dec();
1da177e4 509
6ba3c97a 510exit:
6c1e0256 511 exception_exit(prev_state);
1da177e4 512}
9326638c 513NOKPROBE_SYMBOL(do_debug);
1da177e4
LT
514
515/*
516 * Note that we play around with the 'TS' bit in an attempt to get
517 * the correct behaviour even in the presence of the asynchronous
518 * IRQ13 behaviour
519 */
5e1b05be 520static void math_error(struct pt_regs *regs, int error_code, int trapnr)
1da177e4 521{
e2e75c91 522 struct task_struct *task = current;
1da177e4 523 siginfo_t info;
9b6dba9e 524 unsigned short err;
c9408265
KC
525 char *str = (trapnr == X86_TRAP_MF) ? "fpu exception" :
526 "simd exception";
e2e75c91
BG
527
528 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, SIGFPE) == NOTIFY_STOP)
529 return;
530 conditional_sti(regs);
531
532 if (!user_mode_vm(regs))
533 {
534 if (!fixup_exception(regs)) {
535 task->thread.error_code = error_code;
51e7dc70 536 task->thread.trap_nr = trapnr;
e2e75c91
BG
537 die(str, regs, error_code);
538 }
539 return;
540 }
1da177e4
LT
541
542 /*
543 * Save the info for the exception handler and clear the error.
544 */
1da177e4 545 save_init_fpu(task);
51e7dc70 546 task->thread.trap_nr = trapnr;
9b6dba9e 547 task->thread.error_code = error_code;
1da177e4
LT
548 info.si_signo = SIGFPE;
549 info.si_errno = 0;
b02ef20a 550 info.si_addr = (void __user *)uprobe_get_trap_addr(regs);
c9408265 551 if (trapnr == X86_TRAP_MF) {
9b6dba9e
BG
552 unsigned short cwd, swd;
553 /*
554 * (~cwd & swd) will mask out exceptions that are not set to unmasked
555 * status. 0x3f is the exception bits in these regs, 0x200 is the
556 * C1 reg you need in case of a stack fault, 0x040 is the stack
557 * fault bit. We should only be taking one exception at a time,
558 * so if this combination doesn't produce any single exception,
559 * then we have a bad program that isn't synchronizing its FPU usage
560 * and it will suffer the consequences since we won't be able to
561 * fully reproduce the context of the exception
562 */
563 cwd = get_fpu_cwd(task);
564 swd = get_fpu_swd(task);
adf77bac 565
9b6dba9e
BG
566 err = swd & ~cwd;
567 } else {
568 /*
569 * The SIMD FPU exceptions are handled a little differently, as there
570 * is only a single status/control register. Thus, to determine which
571 * unmasked exception was caught we must mask the exception mask bits
572 * at 0x1f80, and then use these to mask the exception bits at 0x3f.
573 */
574 unsigned short mxcsr = get_fpu_mxcsr(task);
575 err = ~(mxcsr >> 7) & mxcsr;
576 }
adf77bac
PA
577
578 if (err & 0x001) { /* Invalid op */
b5964405
IM
579 /*
580 * swd & 0x240 == 0x040: Stack Underflow
581 * swd & 0x240 == 0x240: Stack Overflow
582 * User must clear the SF bit (0x40) if set
583 */
584 info.si_code = FPE_FLTINV;
adf77bac 585 } else if (err & 0x004) { /* Divide by Zero */
b5964405 586 info.si_code = FPE_FLTDIV;
adf77bac 587 } else if (err & 0x008) { /* Overflow */
b5964405 588 info.si_code = FPE_FLTOVF;
adf77bac
PA
589 } else if (err & 0x012) { /* Denormal, Underflow */
590 info.si_code = FPE_FLTUND;
591 } else if (err & 0x020) { /* Precision */
b5964405 592 info.si_code = FPE_FLTRES;
adf77bac 593 } else {
bd8b96df 594 /*
c9408265
KC
595 * If we're using IRQ 13, or supposedly even some trap
596 * X86_TRAP_MF implementations, it's possible
597 * we get a spurious trap, which is not an error.
bd8b96df 598 */
c9408265 599 return;
1da177e4
LT
600 }
601 force_sig_info(SIGFPE, &info, task);
602}
603
e407d620 604dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code)
1da177e4 605{
6c1e0256
FW
606 enum ctx_state prev_state;
607
608 prev_state = exception_enter();
c9408265 609 math_error(regs, error_code, X86_TRAP_MF);
6c1e0256 610 exception_exit(prev_state);
1da177e4
LT
611}
612
e407d620
AH
613dotraplinkage void
614do_simd_coprocessor_error(struct pt_regs *regs, long error_code)
1da177e4 615{
6c1e0256
FW
616 enum ctx_state prev_state;
617
618 prev_state = exception_enter();
c9408265 619 math_error(regs, error_code, X86_TRAP_XF);
6c1e0256 620 exception_exit(prev_state);
1da177e4
LT
621}
622
e407d620
AH
623dotraplinkage void
624do_spurious_interrupt_bug(struct pt_regs *regs, long error_code)
1da177e4 625{
cf81978d 626 conditional_sti(regs);
1da177e4
LT
627#if 0
628 /* No need to warn about this any longer. */
c767a54b 629 pr_info("Ignoring P6 Local APIC Spurious Interrupt Bug...\n");
1da177e4
LT
630#endif
631}
632
2605fc21 633asmlinkage __visible void __attribute__((weak)) smp_thermal_interrupt(void)
1da177e4 634{
1da177e4 635}
4efc0670 636
2605fc21 637asmlinkage __visible void __attribute__((weak)) smp_threshold_interrupt(void)
081f75bb
AH
638{
639}
640
1da177e4 641/*
b5964405 642 * 'math_state_restore()' saves the current math information in the
1da177e4
LT
643 * old math state array, and gets the new ones from the current task
644 *
645 * Careful.. There are problems with IBM-designed IRQ13 behaviour.
646 * Don't touch unless you *really* know how it works.
647 *
be98c2cd
LT
648 * Must be called with kernel preemption disabled (eg with local
649 * local interrupts as in the case of do_device_not_available).
1da177e4 650 */
be98c2cd 651void math_state_restore(void)
1da177e4 652{
f94edacf 653 struct task_struct *tsk = current;
1da177e4 654
aa283f49
SS
655 if (!tsk_used_math(tsk)) {
656 local_irq_enable();
657 /*
658 * does a slab alloc which can sleep
659 */
660 if (init_fpu(tsk)) {
661 /*
662 * ran out of memory!
663 */
664 do_group_exit(SIGKILL);
665 return;
666 }
667 local_irq_disable();
668 }
669
f94edacf 670 __thread_fpu_begin(tsk);
304bceda 671
80ab6f1e
LT
672 /*
673 * Paranoid restore. send a SIGSEGV if we fail to restore the state.
674 */
675 if (unlikely(restore_fpu_checking(tsk))) {
304bceda 676 drop_init_fpu(tsk);
38cad57b 677 force_sig_info(SIGSEGV, SEND_SIG_PRIV, tsk);
80ab6f1e
LT
678 return;
679 }
b3b0870e 680
c375f15a 681 tsk->thread.fpu_counter++;
1da177e4 682}
5992b6da 683EXPORT_SYMBOL_GPL(math_state_restore);
1da177e4 684
9326638c 685dotraplinkage void
aa78bcfa 686do_device_not_available(struct pt_regs *regs, long error_code)
7643e9b9 687{
6c1e0256
FW
688 enum ctx_state prev_state;
689
690 prev_state = exception_enter();
5d2bd700 691 BUG_ON(use_eager_fpu());
304bceda 692
a334fe43 693#ifdef CONFIG_MATH_EMULATION
7643e9b9 694 if (read_cr0() & X86_CR0_EM) {
d315760f
TH
695 struct math_emu_info info = { };
696
7643e9b9 697 conditional_sti(regs);
d315760f 698
aa78bcfa 699 info.regs = regs;
d315760f 700 math_emulate(&info);
6c1e0256 701 exception_exit(prev_state);
a334fe43 702 return;
7643e9b9 703 }
a334fe43
BG
704#endif
705 math_state_restore(); /* interrupts still off */
706#ifdef CONFIG_X86_32
707 conditional_sti(regs);
081f75bb 708#endif
6c1e0256 709 exception_exit(prev_state);
7643e9b9 710}
9326638c 711NOKPROBE_SYMBOL(do_device_not_available);
7643e9b9 712
081f75bb 713#ifdef CONFIG_X86_32
e407d620 714dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code)
f8e0870f
AH
715{
716 siginfo_t info;
6c1e0256 717 enum ctx_state prev_state;
6ba3c97a 718
6c1e0256 719 prev_state = exception_enter();
f8e0870f
AH
720 local_irq_enable();
721
722 info.si_signo = SIGILL;
723 info.si_errno = 0;
724 info.si_code = ILL_BADSTK;
fc6fcdfb 725 info.si_addr = NULL;
c9408265 726 if (notify_die(DIE_TRAP, "iret exception", regs, error_code,
6ba3c97a
FW
727 X86_TRAP_IRET, SIGILL) != NOTIFY_STOP) {
728 do_trap(X86_TRAP_IRET, SIGILL, "iret exception", regs, error_code,
729 &info);
730 }
6c1e0256 731 exception_exit(prev_state);
f8e0870f 732}
081f75bb 733#endif
f8e0870f 734
29c84391
JK
735/* Set of traps needed for early debugging. */
736void __init early_trap_init(void)
737{
c9408265 738 set_intr_gate_ist(X86_TRAP_DB, &debug, DEBUG_STACK);
29c84391 739 /* int3 can be called from all */
c9408265 740 set_system_intr_gate_ist(X86_TRAP_BP, &int3, DEBUG_STACK);
8170e6be 741#ifdef CONFIG_X86_32
25c74b10 742 set_intr_gate(X86_TRAP_PF, page_fault);
8170e6be 743#endif
29c84391
JK
744 load_idt(&idt_descr);
745}
746
8170e6be
PA
747void __init early_trap_pf_init(void)
748{
749#ifdef CONFIG_X86_64
25c74b10 750 set_intr_gate(X86_TRAP_PF, page_fault);
8170e6be
PA
751#endif
752}
753
1da177e4
LT
754void __init trap_init(void)
755{
dbeb2be2
RR
756 int i;
757
1da177e4 758#ifdef CONFIG_EISA
927222b1 759 void __iomem *p = early_ioremap(0x0FFFD9, 4);
b5964405
IM
760
761 if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24))
1da177e4 762 EISA_bus = 1;
927222b1 763 early_iounmap(p, 4);
1da177e4
LT
764#endif
765
25c74b10 766 set_intr_gate(X86_TRAP_DE, divide_error);
c9408265 767 set_intr_gate_ist(X86_TRAP_NMI, &nmi, NMI_STACK);
699d2937 768 /* int4 can be called from all */
c9408265 769 set_system_intr_gate(X86_TRAP_OF, &overflow);
25c74b10
SA
770 set_intr_gate(X86_TRAP_BR, bounds);
771 set_intr_gate(X86_TRAP_UD, invalid_op);
772 set_intr_gate(X86_TRAP_NM, device_not_available);
081f75bb 773#ifdef CONFIG_X86_32
c9408265 774 set_task_gate(X86_TRAP_DF, GDT_ENTRY_DOUBLEFAULT_TSS);
081f75bb 775#else
c9408265 776 set_intr_gate_ist(X86_TRAP_DF, &double_fault, DOUBLEFAULT_STACK);
081f75bb 777#endif
25c74b10
SA
778 set_intr_gate(X86_TRAP_OLD_MF, coprocessor_segment_overrun);
779 set_intr_gate(X86_TRAP_TS, invalid_TSS);
780 set_intr_gate(X86_TRAP_NP, segment_not_present);
c9408265 781 set_intr_gate_ist(X86_TRAP_SS, &stack_segment, STACKFAULT_STACK);
25c74b10
SA
782 set_intr_gate(X86_TRAP_GP, general_protection);
783 set_intr_gate(X86_TRAP_SPURIOUS, spurious_interrupt_bug);
784 set_intr_gate(X86_TRAP_MF, coprocessor_error);
785 set_intr_gate(X86_TRAP_AC, alignment_check);
1da177e4 786#ifdef CONFIG_X86_MCE
c9408265 787 set_intr_gate_ist(X86_TRAP_MC, &machine_check, MCE_STACK);
1da177e4 788#endif
25c74b10 789 set_intr_gate(X86_TRAP_XF, simd_coprocessor_error);
1da177e4 790
bb3f0b59
YL
791 /* Reserve all the builtin and the syscall vector: */
792 for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++)
793 set_bit(i, used_vectors);
794
081f75bb
AH
795#ifdef CONFIG_IA32_EMULATION
796 set_system_intr_gate(IA32_SYSCALL_VECTOR, ia32_syscall);
bb3f0b59 797 set_bit(IA32_SYSCALL_VECTOR, used_vectors);
081f75bb
AH
798#endif
799
800#ifdef CONFIG_X86_32
699d2937 801 set_system_trap_gate(SYSCALL_VECTOR, &system_call);
dbeb2be2 802 set_bit(SYSCALL_VECTOR, used_vectors);
081f75bb 803#endif
bb3f0b59 804
4eefbe79
KC
805 /*
806 * Set the IDT descriptor to a fixed read-only location, so that the
807 * "sidt" instruction will not leak the location of the kernel, and
808 * to defend the IDT against arbitrary memory write vulnerabilities.
809 * It will be reloaded in cpu_init() */
810 __set_fixmap(FIX_RO_IDT, __pa_symbol(idt_table), PAGE_KERNEL_RO);
811 idt_descr.address = fix_to_virt(FIX_RO_IDT);
812
1da177e4 813 /*
b5964405 814 * Should be a barrier for any external CPU state:
1da177e4
LT
815 */
816 cpu_init();
817
428cf902 818 x86_init.irqs.trap_init();
228bdaa9
SR
819
820#ifdef CONFIG_X86_64
629f4f9d 821 memcpy(&debug_idt_table, &idt_table, IDT_ENTRIES * 16);
c9408265
KC
822 set_nmi_gate(X86_TRAP_DB, &debug);
823 set_nmi_gate(X86_TRAP_BP, &int3);
228bdaa9 824#endif
1da177e4 825}
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