[deliverable/linux.git] / arch / x86 / kernel / tsc_32.c

#include <linux/sched.h>
#include <linux/clocksource.h>
#include <linux/workqueue.h>
#include <linux/cpufreq.h>
#include <linux/jiffies.h>
#include <linux/init.h>
#include <linux/dmi.h>

#include <asm/delay.h>
#include <asm/tsc.h>
#include <asm/io.h>
#include <asm/timer.h>

#include "mach_timer.h"

static int tsc_enabled;

/*
 * On some systems the TSC frequency does not
 * change with the cpu frequency. So we need
 * an extra value to store the TSC freq
 */
unsigned int tsc_khz;
EXPORT_SYMBOL_GPL(tsc_khz);

int tsc_disable;

#ifdef CONFIG_X86_TSC
static int __init tsc_setup(char *str)
{
	printk(KERN_WARNING "notsc: Kernel compiled with CONFIG_X86_TSC, "
				"cannot disable TSC.\n");
	return 1;
}
#else
/*
 * disable flag for tsc. Takes effect by clearing the TSC cpu flag
 * in cpu/common.c
 */
static int __init tsc_setup(char *str)
{
	tsc_disable = 1;

	return 1;
}
#endif

__setup("notsc", tsc_setup);

/*
 * code to mark and check if the TSC is unstable
 * due to cpufreq or due to unsynced TSCs
 */
static int tsc_unstable;

int check_tsc_unstable(void)
{
	return tsc_unstable;
}
EXPORT_SYMBOL_GPL(check_tsc_unstable);

/* Accellerators for sched_clock()
 * convert from cycles(64bits) => nanoseconds (64bits)
 *  basic equation:
 *		ns = cycles / (freq / ns_per_sec)
 *		ns = cycles * (ns_per_sec / freq)
 *		ns = cycles * (10^9 / (cpu_khz * 10^3))
 *		ns = cycles * (10^6 / cpu_khz)
 *
 *	Then we use scaling math (suggested by george@mvista.com) to get:
 *		ns = cycles * (10^6 * SC / cpu_khz) / SC
 *		ns = cycles * cyc2ns_scale / SC
 *
 *	And since SC is a constant power of two, we can convert the div
 *  into a shift.
 *
 *  We can use khz divisor instead of mhz to keep a better percision, since
 *  cyc2ns_scale is limited to 10^6 * 2^10, which fits in 32 bits.
 *  (mathieu.desnoyers@polymtl.ca)
 *
 *			-johnstul@us.ibm.com "math is hard, lets go shopping!"
 */
unsigned long cyc2ns_scale __read_mostly;

#define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */

static inline void set_cyc2ns_scale(unsigned long cpu_khz)
{
	cyc2ns_scale = (1000000 << CYC2NS_SCALE_FACTOR)/cpu_khz;
}

/*
 * Scheduler clock - returns current time in nanosec units.
 */
unsigned long long native_sched_clock(void)
{
	unsigned long long this_offset;

	/*
	 * Fall back to jiffies if there's no TSC available:
	 * ( But note that we still use it if the TSC is marked
	 *   unstable. We do this because unlike Time Of Day,
	 *   the scheduler clock tolerates small errors and it's
	 *   very important for it to be as fast as the platform
	 *   can achive it. )
	 */
	if (unlikely(!tsc_enabled && !tsc_unstable))
		/* No locking but a rare wrong value is not a big deal: */
		return (jiffies_64 - INITIAL_JIFFIES) * (1000000000 / HZ);

	/* read the Time Stamp Counter: */
	rdtscll(this_offset);

	/* return the value in ns */
	return cycles_2_ns(this_offset);
}

/* We need to define a real function for sched_clock, to override the
   weak default version */
#ifdef CONFIG_PARAVIRT
unsigned long long sched_clock(void)
{
	return paravirt_sched_clock();
}
#else
unsigned long long sched_clock(void)
	__attribute__((alias("native_sched_clock")));
#endif

unsigned long native_calculate_cpu_khz(void)
{
	unsigned long long start, end;
	unsigned long count;
	u64 delta64;
	int i;
	unsigned long flags;

	local_irq_save(flags);

	/* run 3 times to ensure the cache is warm */
	for (i = 0; i < 3; i++) {
		mach_prepare_counter();
		rdtscll(start);
		mach_countup(&count);
		rdtscll(end);
	}
	/*
	 * Error: ECTCNEVERSET
	 * The CTC wasn't reliable: we got a hit on the very first read,
	 * or the CPU was so fast/slow that the quotient wouldn't fit in
	 * 32 bits..
	 */
	if (count <= 1)
		goto err;

	delta64 = end - start;

	/* cpu freq too fast: */
	if (delta64 > (1ULL<<32))
		goto err;

	/* cpu freq too slow: */
	if (delta64 <= CALIBRATE_TIME_MSEC)
		goto err;

	delta64 += CALIBRATE_TIME_MSEC/2; /* round for do_div */
	do_div(delta64,CALIBRATE_TIME_MSEC);

	local_irq_restore(flags);
	return (unsigned long)delta64;
err:
	local_irq_restore(flags);
	return 0;
}

int recalibrate_cpu_khz(void)
{
#ifndef CONFIG_SMP
	unsigned long cpu_khz_old = cpu_khz;

	if (cpu_has_tsc) {
		cpu_khz = calculate_cpu_khz();
		tsc_khz = cpu_khz;
		cpu_data[0].loops_per_jiffy =
			cpufreq_scale(cpu_data[0].loops_per_jiffy,
					cpu_khz_old, cpu_khz);
		return 0;
	} else
		return -ENODEV;
#else
	return -ENODEV;
#endif
}

EXPORT_SYMBOL(recalibrate_cpu_khz);

#ifdef CONFIG_CPU_FREQ

/*
 * if the CPU frequency is scaled, TSC-based delays will need a different
 * loops_per_jiffy value to function properly.
 */
static unsigned int ref_freq = 0;
static unsigned long loops_per_jiffy_ref = 0;
static unsigned long cpu_khz_ref = 0;

static int
time_cpufreq_notifier(struct notifier_block *nb, unsigned long val, void *data)
{
	struct cpufreq_freqs *freq = data;

	if (!ref_freq) {
		if (!freq->old){
			ref_freq = freq->new;
			return 0;
		}
		ref_freq = freq->old;
		loops_per_jiffy_ref = cpu_data[freq->cpu].loops_per_jiffy;
		cpu_khz_ref = cpu_khz;
	}

	if ((val == CPUFREQ_PRECHANGE  && freq->old < freq->new) ||
	    (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
	    (val == CPUFREQ_RESUMECHANGE)) {
		if (!(freq->flags & CPUFREQ_CONST_LOOPS))
			cpu_data[freq->cpu].loops_per_jiffy =
				cpufreq_scale(loops_per_jiffy_ref,
						ref_freq, freq->new);

		if (cpu_khz) {

			if (num_online_cpus() == 1)
				cpu_khz = cpufreq_scale(cpu_khz_ref,
						ref_freq, freq->new);
			if (!(freq->flags & CPUFREQ_CONST_LOOPS)) {
				tsc_khz = cpu_khz;
				set_cyc2ns_scale(cpu_khz);
				/*
				 * TSC based sched_clock turns
				 * to junk w/ cpufreq
				 */
				mark_tsc_unstable("cpufreq changes");
			}
		}
	}

	return 0;
}

static struct notifier_block time_cpufreq_notifier_block = {
	.notifier_call	= time_cpufreq_notifier
};

static int __init cpufreq_tsc(void)
{
	return cpufreq_register_notifier(&time_cpufreq_notifier_block,
					 CPUFREQ_TRANSITION_NOTIFIER);
}
core_initcall(cpufreq_tsc);

#endif

/* clock source code */

static unsigned long current_tsc_khz = 0;

static cycle_t read_tsc(void)
{
	cycle_t ret;

	rdtscll(ret);

	return ret;
}

static struct clocksource clocksource_tsc = {
	.name			= "tsc",
	.rating			= 300,
	.read			= read_tsc,
	.mask			= CLOCKSOURCE_MASK(64),
	.mult			= 0, /* to be set */
	.shift			= 22,
	.flags			= CLOCK_SOURCE_IS_CONTINUOUS |
				  CLOCK_SOURCE_MUST_VERIFY,
};

void mark_tsc_unstable(char *reason)
{
	if (!tsc_unstable) {
		tsc_unstable = 1;
		tsc_enabled = 0;
		printk("Marking TSC unstable due to: %s.\n", reason);
		/* Can be called before registration */
		if (clocksource_tsc.mult)
			clocksource_change_rating(&clocksource_tsc, 0);
		else
			clocksource_tsc.rating = 0;
	}
}
EXPORT_SYMBOL_GPL(mark_tsc_unstable);

static int __init dmi_mark_tsc_unstable(const struct dmi_system_id *d)
{
	printk(KERN_NOTICE "%s detected: marking TSC unstable.\n",
		       d->ident);
	tsc_unstable = 1;
	return 0;
}

/* List of systems that have known TSC problems */
static struct dmi_system_id __initdata bad_tsc_dmi_table[] = {
	{
	 .callback = dmi_mark_tsc_unstable,
	 .ident = "IBM Thinkpad 380XD",
	 .matches = {
		     DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
		     DMI_MATCH(DMI_BOARD_NAME, "2635FA0"),
		     },
	 },
	 {}
};

/*
 * Make an educated guess if the TSC is trustworthy and synchronized
 * over all CPUs.
 */
__cpuinit int unsynchronized_tsc(void)
{
	if (!cpu_has_tsc || tsc_unstable)
		return 1;
	/*
	 * Intel systems are normally all synchronized.
	 * Exceptions must mark TSC as unstable:
	 */
	if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) {
		/* assume multi socket systems are not synchronized: */
		if (num_possible_cpus() > 1)
			tsc_unstable = 1;
	}
	return tsc_unstable;
}

/*
 * Geode_LX - the OLPC CPU has a possibly a very reliable TSC
 */
#ifdef CONFIG_MGEODE_LX
/* RTSC counts during suspend */
#define RTSC_SUSP 0x100

static void __init check_geode_tsc_reliable(void)
{
	unsigned long val;

	rdmsrl(MSR_GEODE_BUSCONT_CONF0, val);
	if ((val & RTSC_SUSP))
		clocksource_tsc.flags &= ~CLOCK_SOURCE_MUST_VERIFY;
}
#else
static inline void check_geode_tsc_reliable(void) { }
#endif


void __init tsc_init(void)
{
	if (!cpu_has_tsc || tsc_disable)
		goto out_no_tsc;

	cpu_khz = calculate_cpu_khz();
	tsc_khz = cpu_khz;

	if (!cpu_khz)
		goto out_no_tsc;

	printk("Detected %lu.%03lu MHz processor.\n",
				(unsigned long)cpu_khz / 1000,
				(unsigned long)cpu_khz % 1000);

	set_cyc2ns_scale(cpu_khz);
	use_tsc_delay();

	/* Check and install the TSC clocksource */
	dmi_check_system(bad_tsc_dmi_table);

	unsynchronized_tsc();
	check_geode_tsc_reliable();
	current_tsc_khz = tsc_khz;
	clocksource_tsc.mult = clocksource_khz2mult(current_tsc_khz,
							clocksource_tsc.shift);
	/* lower the rating if we already know its unstable: */
	if (check_tsc_unstable()) {
		clocksource_tsc.rating = 0;
		clocksource_tsc.flags &= ~CLOCK_SOURCE_IS_CONTINUOUS;
	} else
		tsc_enabled = 1;

	clocksource_register(&clocksource_tsc);

	return;

out_no_tsc:
	/*
	 * Set the tsc_disable flag if there's no TSC support, this
	 * makes it a fast flag for the kernel to see whether it
	 * should be using the TSC.
	 */
	tsc_disable = 1;
}
Commit	Line	Data
bb29ab26	1	#include <linux/sched.h>
5d0cf410	2	#include <linux/clocksource.h>
539eb11e	3	#include <linux/workqueue.h>
	4	#include <linux/cpufreq.h>
	5	#include <linux/jiffies.h>
	6	#include <linux/init.h>
5d0cf410	7	#include <linux/dmi.h>
539eb11e	8
5d0cf410	9	#include <asm/delay.h>
539eb11e	10	#include <asm/tsc.h>
539eb11e	11	#include <asm/io.h>
6cb9a835	12	#include <asm/timer.h>
539eb11e	13
	14	#include "mach_timer.h"
	15
d9a5c0a4 TG	16	static int tsc_enabled;
d9a5c0a4 TG	17
539eb11e	18	/*
	19	* On some systems the TSC frequency does not
	20	* change with the cpu frequency. So we need
	21	* an extra value to store the TSC freq
	22	*/
	23	unsigned int tsc_khz;
d7e28ffe	24	EXPORT_SYMBOL_GPL(tsc_khz);
539eb11e	25
664c0d3d	26	int tsc_disable;
539eb11e	27
	28	#ifdef CONFIG_X86_TSC
	29	static int __init tsc_setup(char *str)
	30	{
	31	printk(KERN_WARNING "notsc: Kernel compiled with CONFIG_X86_TSC, "
	32	"cannot disable TSC.\n");
	33	return 1;
	34	}
	35	#else
	36	/*
	37	* disable flag for tsc. Takes effect by clearing the TSC cpu flag
	38	* in cpu/common.c
	39	*/
	40	static int __init tsc_setup(char *str)
	41	{
	42	tsc_disable = 1;
	43
	44	return 1;
	45	}
	46	#endif
	47
	48	__setup("notsc", tsc_setup);
	49
539eb11e	50	/*
	51	* code to mark and check if the TSC is unstable
	52	* due to cpufreq or due to unsynced TSCs
	53	*/
	54	static int tsc_unstable;
	55
d7e28ffe	56	int check_tsc_unstable(void)
539eb11e	57	{
	58	return tsc_unstable;
	59	}
d7e28ffe	60	EXPORT_SYMBOL_GPL(check_tsc_unstable);
539eb11e	61
539eb11e	62	/* Accellerators for sched_clock()
	63	* convert from cycles(64bits) => nanoseconds (64bits)
	64	* basic equation:
	65	* ns = cycles / (freq / ns_per_sec)
	66	* ns = cycles * (ns_per_sec / freq)
	67	* ns = cycles * (10^9 / (cpu_khz * 10^3))
	68	* ns = cycles * (10^6 / cpu_khz)
	69	*
	70	* Then we use scaling math (suggested by george@mvista.com) to get:
	71	* ns = cycles * (10^6 * SC / cpu_khz) / SC
	72	* ns = cycles * cyc2ns_scale / SC
	73	*
	74	* And since SC is a constant power of two, we can convert the div
	75	* into a shift.
	76	*
	77	* We can use khz divisor instead of mhz to keep a better percision, since
	78	* cyc2ns_scale is limited to 10^6 * 2^10, which fits in 32 bits.
	79	* (mathieu.desnoyers@polymtl.ca)
	80	*
	81	* -johnstul@us.ibm.com "math is hard, lets go shopping!"
	82	*/
688340ea	83	unsigned long cyc2ns_scale __read_mostly;
539eb11e	84
	85	#define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */
	86
	87	static inline void set_cyc2ns_scale(unsigned long cpu_khz)
	88	{
	89	cyc2ns_scale = (1000000 << CYC2NS_SCALE_FACTOR)/cpu_khz;
	90	}
	91
539eb11e	92	/*
	93	* Scheduler clock - returns current time in nanosec units.
	94	*/
688340ea	95	unsigned long long native_sched_clock(void)
539eb11e	96	{
	97	unsigned long long this_offset;
	98
	99	/*
f9690982	100	* Fall back to jiffies if there's no TSC available:
bb29ab26 IM	101	* ( But note that we still use it if the TSC is marked
	102	* unstable. We do this because unlike Time Of Day,
	103	* the scheduler clock tolerates small errors and it's
	104	* very important for it to be as fast as the platform
	105	* can achive it. )
539eb11e	106	*/
bb29ab26	107	if (unlikely(!tsc_enabled && !tsc_unstable))
f9690982	108	/* No locking but a rare wrong value is not a big deal: */
539eb11e	109	return (jiffies_64 - INITIAL_JIFFIES) * (1000000000 / HZ);
	110
	111	/* read the Time Stamp Counter: */
688340ea	112	rdtscll(this_offset);
539eb11e	113
	114	/* return the value in ns */
	115	return cycles_2_ns(this_offset);
	116	}
	117
688340ea JF	118	/* We need to define a real function for sched_clock, to override the
	119	weak default version */
	120	#ifdef CONFIG_PARAVIRT
	121	unsigned long long sched_clock(void)
	122	{
	123	return paravirt_sched_clock();
	124	}
	125	#else
	126	unsigned long long sched_clock(void)
	127	__attribute__((alias("native_sched_clock")));
	128	#endif
	129
1182d852	130	unsigned long native_calculate_cpu_khz(void)
539eb11e	131	{
	132	unsigned long long start, end;
	133	unsigned long count;
	134	u64 delta64;
	135	int i;
	136	unsigned long flags;
	137
	138	local_irq_save(flags);
	139
	140	/* run 3 times to ensure the cache is warm */
	141	for (i = 0; i < 3; i++) {
	142	mach_prepare_counter();
	143	rdtscll(start);
	144	mach_countup(&count);
	145	rdtscll(end);
	146	}
	147	/*
	148	* Error: ECTCNEVERSET
	149	* The CTC wasn't reliable: we got a hit on the very first read,
	150	* or the CPU was so fast/slow that the quotient wouldn't fit in
	151	* 32 bits..
	152	*/
	153	if (count <= 1)
	154	goto err;
	155
	156	delta64 = end - start;
	157
	158	/* cpu freq too fast: */
	159	if (delta64 > (1ULL<<32))
	160	goto err;
	161
	162	/* cpu freq too slow: */
	163	if (delta64 <= CALIBRATE_TIME_MSEC)
	164	goto err;
	165
	166	delta64 += CALIBRATE_TIME_MSEC/2; /* round for do_div */
	167	do_div(delta64,CALIBRATE_TIME_MSEC);
	168
	169	local_irq_restore(flags);
	170	return (unsigned long)delta64;
	171	err:
	172	local_irq_restore(flags);
	173	return 0;
	174	}
	175
	176	int recalibrate_cpu_khz(void)
	177	{
	178	#ifndef CONFIG_SMP
	179	unsigned long cpu_khz_old = cpu_khz;
	180
	181	if (cpu_has_tsc) {
	182	cpu_khz = calculate_cpu_khz();
	183	tsc_khz = cpu_khz;
	184	cpu_data[0].loops_per_jiffy =
	185	cpufreq_scale(cpu_data[0].loops_per_jiffy,
	186	cpu_khz_old, cpu_khz);
	187	return 0;
	188	} else
	189	return -ENODEV;
	190	#else
	191	return -ENODEV;
	192	#endif
	193	}
	194
195	EXPORT_SYMBOL(recalibrate_cpu_khz);
196
539eb11e	197	#ifdef CONFIG_CPU_FREQ
539eb11e	198
539eb11e	199	/*
	200	* if the CPU frequency is scaled, TSC-based delays will need a different
	201	* loops_per_jiffy value to function properly.
	202	*/
	203	static unsigned int ref_freq = 0;
	204	static unsigned long loops_per_jiffy_ref = 0;
	205	static unsigned long cpu_khz_ref = 0;
	206
	207	static int
	208	time_cpufreq_notifier(struct notifier_block nb, unsigned long val, void data)
	209	{
	210	struct cpufreq_freqs *freq = data;
	211
539eb11e	212	if (!ref_freq) {
	213	if (!freq->old){
	214	ref_freq = freq->new;
df3624aa	215	return 0;
539eb11e	216	}
	217	ref_freq = freq->old;
	218	loops_per_jiffy_ref = cpu_data[freq->cpu].loops_per_jiffy;
	219	cpu_khz_ref = cpu_khz;
	220	}
	221
	222	if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) \|\|
	223	(val == CPUFREQ_POSTCHANGE && freq->old > freq->new) \|\|
	224	(val == CPUFREQ_RESUMECHANGE)) {
	225	if (!(freq->flags & CPUFREQ_CONST_LOOPS))
	226	cpu_data[freq->cpu].loops_per_jiffy =
	227	cpufreq_scale(loops_per_jiffy_ref,
	228	ref_freq, freq->new);
	229
	230	if (cpu_khz) {
	231
	232	if (num_online_cpus() == 1)
	233	cpu_khz = cpufreq_scale(cpu_khz_ref,
	234	ref_freq, freq->new);
	235	if (!(freq->flags & CPUFREQ_CONST_LOOPS)) {
	236	tsc_khz = cpu_khz;
	237	set_cyc2ns_scale(cpu_khz);
	238	/*
	239	* TSC based sched_clock turns
	240	* to junk w/ cpufreq
	241	*/
5a90cf20	242	mark_tsc_unstable("cpufreq changes");
539eb11e	243	}
	244	}
	245	}
539eb11e	246
	247	return 0;
	248	}
	249
	250	static struct notifier_block time_cpufreq_notifier_block = {
	251	.notifier_call = time_cpufreq_notifier
	252	};
	253
	254	static int __init cpufreq_tsc(void)
	255	{
26a08eb3 TG	256	return cpufreq_register_notifier(&time_cpufreq_notifier_block,
26a08eb3 TG	257	CPUFREQ_TRANSITION_NOTIFIER);
539eb11e	258	}
539eb11e	259	core_initcall(cpufreq_tsc);
	260
	261	#endif
5d0cf410	262
	263	/* clock source code */
	264
	265	static unsigned long current_tsc_khz = 0;
5d0cf410	266
	267	static cycle_t read_tsc(void)
	268	{
	269	cycle_t ret;
	270
	271	rdtscll(ret);
	272
	273	return ret;
	274	}
	275
	276	static struct clocksource clocksource_tsc = {
	277	.name = "tsc",
	278	.rating = 300,
	279	.read = read_tsc,
7f9f303a	280	.mask = CLOCKSOURCE_MASK(64),
5d0cf410	281	.mult = 0, /* to be set */
5d0cf410	282	.shift = 22,
73b08d2a TG	283	.flags = CLOCK_SOURCE_IS_CONTINUOUS \|
73b08d2a TG	284	CLOCK_SOURCE_MUST_VERIFY,
5d0cf410	285	};
5d0cf410	286
5a90cf20	287	void mark_tsc_unstable(char *reason)
5d0cf410	288	{
7e69f2b1 TG	289	if (!tsc_unstable) {
7e69f2b1 TG	290	tsc_unstable = 1;
d9a5c0a4	291	tsc_enabled = 0;
5a90cf20	292	printk("Marking TSC unstable due to: %s.\n", reason);
7e69f2b1 TG	293	/* Can be called before registration */
	294	if (clocksource_tsc.mult)
	295	clocksource_change_rating(&clocksource_tsc, 0);
	296	else
	297	clocksource_tsc.rating = 0;
5d0cf410	298	}
5d0cf410	299	}
7e69f2b1	300	EXPORT_SYMBOL_GPL(mark_tsc_unstable);
5d0cf410	301
1855256c	302	static int __init dmi_mark_tsc_unstable(const struct dmi_system_id *d)
5d0cf410	303	{
	304	printk(KERN_NOTICE "%s detected: marking TSC unstable.\n",
	305	d->ident);
7e69f2b1	306	tsc_unstable = 1;
5d0cf410	307	return 0;
	308	}
	309
	310	/* List of systems that have known TSC problems */
	311	static struct dmi_system_id __initdata bad_tsc_dmi_table[] = {
	312	{
	313	.callback = dmi_mark_tsc_unstable,
	314	.ident = "IBM Thinkpad 380XD",
	315	.matches = {
	316	DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
	317	DMI_MATCH(DMI_BOARD_NAME, "2635FA0"),
	318	},
	319	},
	320	{}
	321	};
	322
5d0cf410	323	/*
	324	* Make an educated guess if the TSC is trustworthy and synchronized
	325	* over all CPUs.
	326	*/
95492e46	327	__cpuinit int unsynchronized_tsc(void)
5d0cf410	328	{
95492e46 IM	329	if (!cpu_has_tsc \|\| tsc_unstable)
95492e46 IM	330	return 1;
5d0cf410	331	/*
	332	* Intel systems are normally all synchronized.
	333	* Exceptions must mark TSC as unstable:
	334	*/
7e69f2b1 TG	335	if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) {
	336	/* assume multi socket systems are not synchronized: */
	337	if (num_possible_cpus() > 1)
	338	tsc_unstable = 1;
	339	}
	340	return tsc_unstable;
5d0cf410	341	}
5d0cf410	342
07190a08 MT	343	/*
	344	* Geode_LX - the OLPC CPU has a possibly a very reliable TSC
	345	*/
	346	#ifdef CONFIG_MGEODE_LX
	347	/* RTSC counts during suspend */
	348	#define RTSC_SUSP 0x100
	349
	350	static void __init check_geode_tsc_reliable(void)
	351	{
	352	unsigned long val;
	353
	354	rdmsrl(MSR_GEODE_BUSCONT_CONF0, val);
	355	if ((val & RTSC_SUSP))
	356	clocksource_tsc.flags &= ~CLOCK_SOURCE_MUST_VERIFY;
	357	}
	358	#else
	359	static inline void check_geode_tsc_reliable(void) { }
	360	#endif
	361
6bb74df4	362
6bb74df4	363	void __init tsc_init(void)
5d0cf410	364	{
6bb74df4	365	if (!cpu_has_tsc \|\| tsc_disable)
6bb74df4	366	goto out_no_tsc;
5d0cf410	367
6bb74df4	368	cpu_khz = calculate_cpu_khz();
6bb74df4	369	tsc_khz = cpu_khz;
5d0cf410	370
6bb74df4	371	if (!cpu_khz)
6bb74df4	372	goto out_no_tsc;
5d0cf410	373
6bb74df4	374	printk("Detected %lu.%03lu MHz processor.\n",
	375	(unsigned long)cpu_khz / 1000,
	376	(unsigned long)cpu_khz % 1000);
	377
	378	set_cyc2ns_scale(cpu_khz);
	379	use_tsc_delay();
	380
	381	/* Check and install the TSC clocksource */
	382	dmi_check_system(bad_tsc_dmi_table);
	383
	384	unsynchronized_tsc();
	385	check_geode_tsc_reliable();
	386	current_tsc_khz = tsc_khz;
	387	clocksource_tsc.mult = clocksource_khz2mult(current_tsc_khz,
	388	clocksource_tsc.shift);
	389	/* lower the rating if we already know its unstable: */
	390	if (check_tsc_unstable()) {
	391	clocksource_tsc.rating = 0;
	392	clocksource_tsc.flags &= ~CLOCK_SOURCE_IS_CONTINUOUS;
d9a5c0a4 TG	393	} else
	394	tsc_enabled = 1;
	395
6bb74df4	396	clocksource_register(&clocksource_tsc);
5d0cf410	397
6bb74df4	398	return;
5d0cf410	399
6bb74df4	400	out_no_tsc:
	401	/*
	402	* Set the tsc_disable flag if there's no TSC support, this
	403	* makes it a fast flag for the kernel to see whether it
	404	* should be using the TSC.
	405	*/
	406	tsc_disable = 1;
	407	}