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c37e7bb5 | 1 | #include <linux/kernel.h> |
2 | #include <linux/sched.h> | |
3 | #include <linux/interrupt.h> | |
4 | #include <linux/init.h> | |
5 | #include <linux/clocksource.h> | |
6 | #include <linux/time.h> | |
7 | #include <linux/acpi.h> | |
8 | #include <linux/cpufreq.h> | |
d371698e | 9 | #include <linux/acpi_pmtmr.h> |
c37e7bb5 | 10 | |
d371698e | 11 | #include <asm/hpet.h> |
c37e7bb5 | 12 | #include <asm/timex.h> |
53d517cd | 13 | #include <asm/timer.h> |
d8bb6f4c | 14 | #include <asm/vgtod.h> |
c37e7bb5 | 15 | |
1489939f | 16 | static int notsc __initdata = 0; |
c37e7bb5 | 17 | |
18 | unsigned int cpu_khz; /* TSC clocks / usec, not used here */ | |
19 | EXPORT_SYMBOL(cpu_khz); | |
6b37f5a2 JR |
20 | unsigned int tsc_khz; |
21 | EXPORT_SYMBOL(tsc_khz); | |
c37e7bb5 | 22 | |
53d517cd GC |
23 | /* Accelerators for sched_clock() |
24 | * convert from cycles(64bits) => nanoseconds (64bits) | |
25 | * basic equation: | |
26 | * ns = cycles / (freq / ns_per_sec) | |
27 | * ns = cycles * (ns_per_sec / freq) | |
28 | * ns = cycles * (10^9 / (cpu_khz * 10^3)) | |
29 | * ns = cycles * (10^6 / cpu_khz) | |
30 | * | |
31 | * Then we use scaling math (suggested by george@mvista.com) to get: | |
32 | * ns = cycles * (10^6 * SC / cpu_khz) / SC | |
33 | * ns = cycles * cyc2ns_scale / SC | |
34 | * | |
35 | * And since SC is a constant power of two, we can convert the div | |
36 | * into a shift. | |
37 | * | |
38 | * We can use khz divisor instead of mhz to keep a better precision, since | |
39 | * cyc2ns_scale is limited to 10^6 * 2^10, which fits in 32 bits. | |
40 | * (mathieu.desnoyers@polymtl.ca) | |
41 | * | |
42 | * -johnstul@us.ibm.com "math is hard, lets go shopping!" | |
43 | */ | |
44 | DEFINE_PER_CPU(unsigned long, cyc2ns); | |
c37e7bb5 | 45 | |
53d517cd | 46 | static void set_cyc2ns_scale(unsigned long cpu_khz, int cpu) |
c37e7bb5 | 47 | { |
53d517cd | 48 | unsigned long long tsc_now, ns_now; |
1725037f | 49 | unsigned long flags, *scale; |
c37e7bb5 | 50 | |
53d517cd GC |
51 | local_irq_save(flags); |
52 | sched_clock_idle_sleep_event(); | |
53 | ||
54 | scale = &per_cpu(cyc2ns, cpu); | |
55 | ||
56 | rdtscll(tsc_now); | |
57 | ns_now = __cycles_2_ns(tsc_now); | |
58 | ||
53d517cd GC |
59 | if (cpu_khz) |
60 | *scale = (NSEC_PER_MSEC << CYC2NS_SCALE_FACTOR)/cpu_khz; | |
61 | ||
62 | sched_clock_idle_wakeup_event(0); | |
63 | local_irq_restore(flags); | |
c37e7bb5 | 64 | } |
65 | ||
16e2011b | 66 | unsigned long long native_sched_clock(void) |
c37e7bb5 | 67 | { |
68 | unsigned long a = 0; | |
69 | ||
70 | /* Could do CPU core sync here. Opteron can execute rdtsc speculatively, | |
71 | * which means it is not completely exact and may not be monotonous | |
72 | * between CPUs. But the errors should be too small to matter for | |
73 | * scheduling purposes. | |
74 | */ | |
75 | ||
76 | rdtscll(a); | |
77 | return cycles_2_ns(a); | |
78 | } | |
79 | ||
16e2011b GOC |
80 | /* We need to define a real function for sched_clock, to override the |
81 | weak default version */ | |
82 | #ifdef CONFIG_PARAVIRT | |
83 | unsigned long long sched_clock(void) | |
84 | { | |
85 | return paravirt_sched_clock(); | |
86 | } | |
87 | #else | |
88 | unsigned long long | |
89 | sched_clock(void) __attribute__((alias("native_sched_clock"))); | |
90 | #endif | |
91 | ||
92 | ||
1489939f | 93 | static int tsc_unstable; |
94 | ||
dbae5952 | 95 | int check_tsc_unstable(void) |
1489939f | 96 | { |
97 | return tsc_unstable; | |
98 | } | |
dbae5952 GOC |
99 | EXPORT_SYMBOL_GPL(check_tsc_unstable); |
100 | ||
c37e7bb5 | 101 | #ifdef CONFIG_CPU_FREQ |
102 | ||
103 | /* Frequency scaling support. Adjust the TSC based timer when the cpu frequency | |
104 | * changes. | |
105 | * | |
106 | * RED-PEN: On SMP we assume all CPUs run with the same frequency. It's | |
107 | * not that important because current Opteron setups do not support | |
108 | * scaling on SMP anyroads. | |
109 | * | |
110 | * Should fix up last_tsc too. Currently gettimeofday in the | |
111 | * first tick after the change will be slightly wrong. | |
112 | */ | |
113 | ||
7ff98478 TG |
114 | static unsigned int ref_freq; |
115 | static unsigned long loops_per_jiffy_ref; | |
116 | static unsigned long tsc_khz_ref; | |
c37e7bb5 | 117 | |
118 | static int time_cpufreq_notifier(struct notifier_block *nb, unsigned long val, | |
119 | void *data) | |
120 | { | |
121 | struct cpufreq_freqs *freq = data; | |
122 | unsigned long *lpj, dummy; | |
123 | ||
92cb7612 | 124 | if (cpu_has(&cpu_data(freq->cpu), X86_FEATURE_CONSTANT_TSC)) |
c37e7bb5 | 125 | return 0; |
126 | ||
127 | lpj = &dummy; | |
128 | if (!(freq->flags & CPUFREQ_CONST_LOOPS)) | |
129 | #ifdef CONFIG_SMP | |
92cb7612 | 130 | lpj = &cpu_data(freq->cpu).loops_per_jiffy; |
c37e7bb5 | 131 | #else |
132 | lpj = &boot_cpu_data.loops_per_jiffy; | |
133 | #endif | |
134 | ||
135 | if (!ref_freq) { | |
136 | ref_freq = freq->old; | |
137 | loops_per_jiffy_ref = *lpj; | |
6b37f5a2 | 138 | tsc_khz_ref = tsc_khz; |
c37e7bb5 | 139 | } |
140 | if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) || | |
141 | (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) || | |
142 | (val == CPUFREQ_RESUMECHANGE)) { | |
143 | *lpj = | |
144 | cpufreq_scale(loops_per_jiffy_ref, ref_freq, freq->new); | |
145 | ||
6b37f5a2 | 146 | tsc_khz = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new); |
c37e7bb5 | 147 | if (!(freq->flags & CPUFREQ_CONST_LOOPS)) |
5a90cf20 | 148 | mark_tsc_unstable("cpufreq changes"); |
c37e7bb5 | 149 | } |
150 | ||
4f41c94d | 151 | set_cyc2ns_scale(tsc_khz_ref, freq->cpu); |
c37e7bb5 | 152 | |
153 | return 0; | |
154 | } | |
155 | ||
156 | static struct notifier_block time_cpufreq_notifier_block = { | |
157 | .notifier_call = time_cpufreq_notifier | |
158 | }; | |
159 | ||
160 | static int __init cpufreq_tsc(void) | |
161 | { | |
7ff98478 TG |
162 | cpufreq_register_notifier(&time_cpufreq_notifier_block, |
163 | CPUFREQ_TRANSITION_NOTIFIER); | |
c37e7bb5 | 164 | return 0; |
165 | } | |
166 | ||
167 | core_initcall(cpufreq_tsc); | |
168 | ||
169 | #endif | |
170 | ||
d371698e TG |
171 | #define MAX_RETRIES 5 |
172 | #define SMI_TRESHOLD 50000 | |
173 | ||
174 | /* | |
175 | * Read TSC and the reference counters. Take care of SMI disturbance | |
176 | */ | |
177 | static unsigned long __init tsc_read_refs(unsigned long *pm, | |
178 | unsigned long *hpet) | |
179 | { | |
180 | unsigned long t1, t2; | |
181 | int i; | |
182 | ||
183 | for (i = 0; i < MAX_RETRIES; i++) { | |
6d63de8d | 184 | t1 = get_cycles(); |
d371698e TG |
185 | if (hpet) |
186 | *hpet = hpet_readl(HPET_COUNTER) & 0xFFFFFFFF; | |
187 | else | |
188 | *pm = acpi_pm_read_early(); | |
6d63de8d | 189 | t2 = get_cycles(); |
d371698e TG |
190 | if ((t2 - t1) < SMI_TRESHOLD) |
191 | return t2; | |
192 | } | |
193 | return ULONG_MAX; | |
194 | } | |
195 | ||
196 | /** | |
197 | * tsc_calibrate - calibrate the tsc on boot | |
198 | */ | |
199 | void __init tsc_calibrate(void) | |
200 | { | |
201 | unsigned long flags, tsc1, tsc2, tr1, tr2, pm1, pm2, hpet1, hpet2; | |
53d517cd | 202 | int hpet = is_hpet_enabled(), cpu; |
d371698e TG |
203 | |
204 | local_irq_save(flags); | |
205 | ||
206 | tsc1 = tsc_read_refs(&pm1, hpet ? &hpet1 : NULL); | |
207 | ||
208 | outb((inb(0x61) & ~0x02) | 0x01, 0x61); | |
209 | ||
210 | outb(0xb0, 0x43); | |
211 | outb((CLOCK_TICK_RATE / (1000 / 50)) & 0xff, 0x42); | |
212 | outb((CLOCK_TICK_RATE / (1000 / 50)) >> 8, 0x42); | |
6d63de8d | 213 | tr1 = get_cycles(); |
d371698e | 214 | while ((inb(0x61) & 0x20) == 0); |
6d63de8d | 215 | tr2 = get_cycles(); |
d371698e TG |
216 | |
217 | tsc2 = tsc_read_refs(&pm2, hpet ? &hpet2 : NULL); | |
218 | ||
219 | local_irq_restore(flags); | |
220 | ||
221 | /* | |
222 | * Preset the result with the raw and inaccurate PIT | |
223 | * calibration value | |
224 | */ | |
225 | tsc_khz = (tr2 - tr1) / 50; | |
226 | ||
227 | /* hpet or pmtimer available ? */ | |
228 | if (!hpet && !pm1 && !pm2) { | |
229 | printk(KERN_INFO "TSC calibrated against PIT\n"); | |
230 | return; | |
231 | } | |
232 | ||
233 | /* Check, whether the sampling was disturbed by an SMI */ | |
234 | if (tsc1 == ULONG_MAX || tsc2 == ULONG_MAX) { | |
235 | printk(KERN_WARNING "TSC calibration disturbed by SMI, " | |
236 | "using PIT calibration result\n"); | |
237 | return; | |
238 | } | |
239 | ||
240 | tsc2 = (tsc2 - tsc1) * 1000000L; | |
241 | ||
242 | if (hpet) { | |
243 | printk(KERN_INFO "TSC calibrated against HPET\n"); | |
244 | if (hpet2 < hpet1) | |
245 | hpet2 += 0x100000000; | |
246 | hpet2 -= hpet1; | |
247 | tsc1 = (hpet2 * hpet_readl(HPET_PERIOD)) / 1000000; | |
248 | } else { | |
249 | printk(KERN_INFO "TSC calibrated against PM_TIMER\n"); | |
250 | if (pm2 < pm1) | |
251 | pm2 += ACPI_PM_OVRRUN; | |
252 | pm2 -= pm1; | |
253 | tsc1 = (pm2 * 1000000000) / PMTMR_TICKS_PER_SEC; | |
254 | } | |
255 | ||
256 | tsc_khz = tsc2 / tsc1; | |
53d517cd GC |
257 | |
258 | for_each_possible_cpu(cpu) | |
259 | set_cyc2ns_scale(tsc_khz, cpu); | |
d371698e TG |
260 | } |
261 | ||
c37e7bb5 | 262 | /* |
263 | * Make an educated guess if the TSC is trustworthy and synchronized | |
264 | * over all CPUs. | |
265 | */ | |
266 | __cpuinit int unsynchronized_tsc(void) | |
267 | { | |
268 | if (tsc_unstable) | |
269 | return 1; | |
270 | ||
271 | #ifdef CONFIG_SMP | |
272 | if (apic_is_clustered_box()) | |
273 | return 1; | |
274 | #endif | |
51fc97b9 | 275 | |
32c7553f | 276 | if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) |
7ff98478 | 277 | return 0; |
c37e7bb5 | 278 | |
7ff98478 TG |
279 | /* Assume multi socket systems are not synchronized */ |
280 | return num_present_cpus() > 1; | |
c37e7bb5 | 281 | } |
282 | ||
283 | int __init notsc_setup(char *s) | |
284 | { | |
285 | notsc = 1; | |
286 | return 1; | |
287 | } | |
288 | ||
289 | __setup("notsc", notsc_setup); | |
1489939f | 290 | |
d8bb6f4c | 291 | static struct clocksource clocksource_tsc; |
1489939f | 292 | |
d8bb6f4c TG |
293 | /* |
294 | * We compare the TSC to the cycle_last value in the clocksource | |
295 | * structure to avoid a nasty time-warp. This can be observed in a | |
296 | * very small window right after one CPU updated cycle_last under | |
297 | * xtime/vsyscall_gtod lock and the other CPU reads a TSC value which | |
298 | * is smaller than the cycle_last reference value due to a TSC which | |
299 | * is slighty behind. This delta is nowhere else observable, but in | |
300 | * that case it results in a forward time jump in the range of hours | |
301 | * due to the unsigned delta calculation of the time keeping core | |
302 | * code, which is necessary to support wrapping clocksources like pm | |
303 | * timer. | |
304 | */ | |
1489939f | 305 | static cycle_t read_tsc(void) |
306 | { | |
6d63de8d | 307 | cycle_t ret = (cycle_t)get_cycles(); |
d8bb6f4c TG |
308 | |
309 | return ret >= clocksource_tsc.cycle_last ? | |
310 | ret : clocksource_tsc.cycle_last; | |
1489939f | 311 | } |
312 | ||
7460ed28 | 313 | static cycle_t __vsyscall_fn vread_tsc(void) |
314 | { | |
6d63de8d | 315 | cycle_t ret = (cycle_t)vget_cycles(); |
d8bb6f4c TG |
316 | |
317 | return ret >= __vsyscall_gtod_data.clock.cycle_last ? | |
318 | ret : __vsyscall_gtod_data.clock.cycle_last; | |
7460ed28 | 319 | } |
320 | ||
1489939f | 321 | static struct clocksource clocksource_tsc = { |
322 | .name = "tsc", | |
323 | .rating = 300, | |
324 | .read = read_tsc, | |
325 | .mask = CLOCKSOURCE_MASK(64), | |
326 | .shift = 22, | |
327 | .flags = CLOCK_SOURCE_IS_CONTINUOUS | | |
328 | CLOCK_SOURCE_MUST_VERIFY, | |
7460ed28 | 329 | .vread = vread_tsc, |
1489939f | 330 | }; |
331 | ||
5a90cf20 | 332 | void mark_tsc_unstable(char *reason) |
1489939f | 333 | { |
334 | if (!tsc_unstable) { | |
335 | tsc_unstable = 1; | |
5a90cf20 | 336 | printk("Marking TSC unstable due to %s\n", reason); |
1489939f | 337 | /* Change only the rating, when not registered */ |
338 | if (clocksource_tsc.mult) | |
339 | clocksource_change_rating(&clocksource_tsc, 0); | |
340 | else | |
341 | clocksource_tsc.rating = 0; | |
342 | } | |
343 | } | |
344 | EXPORT_SYMBOL_GPL(mark_tsc_unstable); | |
345 | ||
6bb74df4 | 346 | void __init init_tsc_clocksource(void) |
1489939f | 347 | { |
348 | if (!notsc) { | |
6b37f5a2 | 349 | clocksource_tsc.mult = clocksource_khz2mult(tsc_khz, |
1489939f | 350 | clocksource_tsc.shift); |
351 | if (check_tsc_unstable()) | |
352 | clocksource_tsc.rating = 0; | |
353 | ||
6bb74df4 | 354 | clocksource_register(&clocksource_tsc); |
1489939f | 355 | } |
1489939f | 356 | } |