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7ce0bcfd ZA |
1 | /* |
2 | * VMI specific paravirt-ops implementation | |
3 | * | |
4 | * Copyright (C) 2005, VMware, Inc. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, but | |
12 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or | |
14 | * NON INFRINGEMENT. See the GNU General Public License for more | |
15 | * details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
20 | * | |
21 | * Send feedback to zach@vmware.com | |
22 | * | |
23 | */ | |
24 | ||
25 | #include <linux/module.h> | |
7ce0bcfd ZA |
26 | #include <linux/cpu.h> |
27 | #include <linux/bootmem.h> | |
28 | #include <linux/mm.h> | |
eeef9c68 | 29 | #include <linux/highmem.h> |
fa0aa866 | 30 | #include <linux/sched.h> |
7ce0bcfd ZA |
31 | #include <asm/vmi.h> |
32 | #include <asm/io.h> | |
33 | #include <asm/fixmap.h> | |
34 | #include <asm/apicdef.h> | |
7b6aa335 | 35 | #include <asm/apic.h> |
7ce0bcfd ZA |
36 | #include <asm/processor.h> |
37 | #include <asm/timer.h> | |
bbab4f3b | 38 | #include <asm/vmi_time.h> |
8f485612 | 39 | #include <asm/kmap_types.h> |
31343d8a | 40 | #include <asm/setup.h> |
7ce0bcfd ZA |
41 | |
42 | /* Convenient for calling VMI functions indirectly in the ROM */ | |
43 | typedef u32 __attribute__((regparm(1))) (VROMFUNC)(void); | |
44 | typedef u64 __attribute__((regparm(2))) (VROMLONGFUNC)(int); | |
45 | ||
46 | #define call_vrom_func(rom,func) \ | |
47 | (((VROMFUNC *)(rom->func))()) | |
48 | ||
49 | #define call_vrom_long_func(rom,func,arg) \ | |
50 | (((VROMLONGFUNC *)(rom->func)) (arg)) | |
51 | ||
52 | static struct vrom_header *vmi_rom; | |
7ce0bcfd ZA |
53 | static int disable_pge; |
54 | static int disable_pse; | |
55 | static int disable_sep; | |
56 | static int disable_tsc; | |
57 | static int disable_mtrr; | |
7507ba34 | 58 | static int disable_noidle; |
772205f6 | 59 | static int disable_vmi_timer; |
7ce0bcfd ZA |
60 | |
61 | /* Cached VMI operations */ | |
30a1528d | 62 | static struct { |
7ce0bcfd ZA |
63 | void (*cpuid)(void /* non-c */); |
64 | void (*_set_ldt)(u32 selector); | |
65 | void (*set_tr)(u32 selector); | |
8d947344 | 66 | void (*write_idt_entry)(struct desc_struct *, int, u32, u32); |
014b15be | 67 | void (*write_gdt_entry)(struct desc_struct *, int, u32, u32); |
75b8bb3e | 68 | void (*write_ldt_entry)(struct desc_struct *, int, u32, u32); |
faca6227 | 69 | void (*set_kernel_stack)(u32 selector, u32 sp0); |
7ce0bcfd ZA |
70 | void (*allocate_page)(u32, u32, u32, u32, u32); |
71 | void (*release_page)(u32, u32); | |
72 | void (*set_pte)(pte_t, pte_t *, unsigned); | |
73 | void (*update_pte)(pte_t *, unsigned); | |
eeef9c68 ZA |
74 | void (*set_linear_mapping)(int, void *, u32, u32); |
75 | void (*_flush_tlb)(int); | |
7ce0bcfd | 76 | void (*set_initial_ap_state)(int, int); |
bbab4f3b | 77 | void (*halt)(void); |
49f19710 | 78 | void (*set_lazy_mode)(int mode); |
7ce0bcfd ZA |
79 | } vmi_ops; |
80 | ||
e0bb8643 ZA |
81 | /* Cached VMI operations */ |
82 | struct vmi_timer_ops vmi_timer_ops; | |
83 | ||
7ce0bcfd ZA |
84 | /* |
85 | * VMI patching routines. | |
86 | */ | |
87 | #define MNEM_CALL 0xe8 | |
88 | #define MNEM_JMP 0xe9 | |
89 | #define MNEM_RET 0xc3 | |
90 | ||
7ce0bcfd ZA |
91 | #define IRQ_PATCH_INT_MASK 0 |
92 | #define IRQ_PATCH_DISABLE 5 | |
93 | ||
ab144f5e | 94 | static inline void patch_offset(void *insnbuf, |
65ea5b03 | 95 | unsigned long ip, unsigned long dest) |
7ce0bcfd | 96 | { |
65ea5b03 | 97 | *(unsigned long *)(insnbuf+1) = dest-ip-5; |
7ce0bcfd ZA |
98 | } |
99 | ||
ab144f5e | 100 | static unsigned patch_internal(int call, unsigned len, void *insnbuf, |
65ea5b03 | 101 | unsigned long ip) |
7ce0bcfd ZA |
102 | { |
103 | u64 reloc; | |
104 | struct vmi_relocation_info *const rel = (struct vmi_relocation_info *)&reloc; | |
105 | reloc = call_vrom_long_func(vmi_rom, get_reloc, call); | |
106 | switch(rel->type) { | |
107 | case VMI_RELOCATION_CALL_REL: | |
108 | BUG_ON(len < 5); | |
ab144f5e | 109 | *(char *)insnbuf = MNEM_CALL; |
65ea5b03 | 110 | patch_offset(insnbuf, ip, (unsigned long)rel->eip); |
7ce0bcfd ZA |
111 | return 5; |
112 | ||
113 | case VMI_RELOCATION_JUMP_REL: | |
114 | BUG_ON(len < 5); | |
ab144f5e | 115 | *(char *)insnbuf = MNEM_JMP; |
65ea5b03 | 116 | patch_offset(insnbuf, ip, (unsigned long)rel->eip); |
7ce0bcfd ZA |
117 | return 5; |
118 | ||
119 | case VMI_RELOCATION_NOP: | |
120 | /* obliterate the whole thing */ | |
121 | return 0; | |
122 | ||
123 | case VMI_RELOCATION_NONE: | |
124 | /* leave native code in place */ | |
125 | break; | |
126 | ||
127 | default: | |
128 | BUG(); | |
129 | } | |
130 | return len; | |
131 | } | |
132 | ||
133 | /* | |
134 | * Apply patch if appropriate, return length of new instruction | |
135 | * sequence. The callee does nop padding for us. | |
136 | */ | |
ab144f5e | 137 | static unsigned vmi_patch(u8 type, u16 clobbers, void *insns, |
65ea5b03 | 138 | unsigned long ip, unsigned len) |
7ce0bcfd ZA |
139 | { |
140 | switch (type) { | |
93b1eab3 | 141 | case PARAVIRT_PATCH(pv_irq_ops.irq_disable): |
ab144f5e | 142 | return patch_internal(VMI_CALL_DisableInterrupts, len, |
65ea5b03 | 143 | insns, ip); |
93b1eab3 | 144 | case PARAVIRT_PATCH(pv_irq_ops.irq_enable): |
ab144f5e | 145 | return patch_internal(VMI_CALL_EnableInterrupts, len, |
65ea5b03 | 146 | insns, ip); |
93b1eab3 | 147 | case PARAVIRT_PATCH(pv_irq_ops.restore_fl): |
ab144f5e | 148 | return patch_internal(VMI_CALL_SetInterruptMask, len, |
65ea5b03 | 149 | insns, ip); |
93b1eab3 | 150 | case PARAVIRT_PATCH(pv_irq_ops.save_fl): |
ab144f5e | 151 | return patch_internal(VMI_CALL_GetInterruptMask, len, |
65ea5b03 | 152 | insns, ip); |
93b1eab3 | 153 | case PARAVIRT_PATCH(pv_cpu_ops.iret): |
65ea5b03 | 154 | return patch_internal(VMI_CALL_IRET, len, insns, ip); |
d75cd22f | 155 | case PARAVIRT_PATCH(pv_cpu_ops.irq_enable_sysexit): |
65ea5b03 | 156 | return patch_internal(VMI_CALL_SYSEXIT, len, insns, ip); |
7ce0bcfd ZA |
157 | default: |
158 | break; | |
159 | } | |
160 | return len; | |
161 | } | |
162 | ||
163 | /* CPUID has non-C semantics, and paravirt-ops API doesn't match hardware ISA */ | |
65ea5b03 PA |
164 | static void vmi_cpuid(unsigned int *ax, unsigned int *bx, |
165 | unsigned int *cx, unsigned int *dx) | |
7ce0bcfd ZA |
166 | { |
167 | int override = 0; | |
65ea5b03 | 168 | if (*ax == 1) |
7ce0bcfd ZA |
169 | override = 1; |
170 | asm volatile ("call *%6" | |
65ea5b03 PA |
171 | : "=a" (*ax), |
172 | "=b" (*bx), | |
173 | "=c" (*cx), | |
174 | "=d" (*dx) | |
175 | : "0" (*ax), "2" (*cx), "r" (vmi_ops.cpuid)); | |
7ce0bcfd ZA |
176 | if (override) { |
177 | if (disable_pse) | |
65ea5b03 | 178 | *dx &= ~X86_FEATURE_PSE; |
7ce0bcfd | 179 | if (disable_pge) |
65ea5b03 | 180 | *dx &= ~X86_FEATURE_PGE; |
7ce0bcfd | 181 | if (disable_sep) |
65ea5b03 | 182 | *dx &= ~X86_FEATURE_SEP; |
7ce0bcfd | 183 | if (disable_tsc) |
65ea5b03 | 184 | *dx &= ~X86_FEATURE_TSC; |
7ce0bcfd | 185 | if (disable_mtrr) |
65ea5b03 | 186 | *dx &= ~X86_FEATURE_MTRR; |
7ce0bcfd ZA |
187 | } |
188 | } | |
189 | ||
190 | static inline void vmi_maybe_load_tls(struct desc_struct *gdt, int nr, struct desc_struct *new) | |
191 | { | |
192 | if (gdt[nr].a != new->a || gdt[nr].b != new->b) | |
014b15be | 193 | write_gdt_entry(gdt, nr, new, 0); |
7ce0bcfd ZA |
194 | } |
195 | ||
196 | static void vmi_load_tls(struct thread_struct *t, unsigned int cpu) | |
197 | { | |
198 | struct desc_struct *gdt = get_cpu_gdt_table(cpu); | |
199 | vmi_maybe_load_tls(gdt, GDT_ENTRY_TLS_MIN + 0, &t->tls_array[0]); | |
200 | vmi_maybe_load_tls(gdt, GDT_ENTRY_TLS_MIN + 1, &t->tls_array[1]); | |
201 | vmi_maybe_load_tls(gdt, GDT_ENTRY_TLS_MIN + 2, &t->tls_array[2]); | |
202 | } | |
203 | ||
204 | static void vmi_set_ldt(const void *addr, unsigned entries) | |
205 | { | |
206 | unsigned cpu = smp_processor_id(); | |
014b15be | 207 | struct desc_struct desc; |
7ce0bcfd | 208 | |
014b15be | 209 | pack_descriptor(&desc, (unsigned long)addr, |
7ce0bcfd | 210 | entries * sizeof(struct desc_struct) - 1, |
014b15be GOC |
211 | DESC_LDT, 0); |
212 | write_gdt_entry(get_cpu_gdt_table(cpu), GDT_ENTRY_LDT, &desc, DESC_LDT); | |
7ce0bcfd ZA |
213 | vmi_ops._set_ldt(entries ? GDT_ENTRY_LDT*sizeof(struct desc_struct) : 0); |
214 | } | |
215 | ||
216 | static void vmi_set_tr(void) | |
217 | { | |
218 | vmi_ops.set_tr(GDT_ENTRY_TSS*sizeof(struct desc_struct)); | |
219 | } | |
220 | ||
8d947344 GOC |
221 | static void vmi_write_idt_entry(gate_desc *dt, int entry, const gate_desc *g) |
222 | { | |
223 | u32 *idt_entry = (u32 *)g; | |
262d5ee2 | 224 | vmi_ops.write_idt_entry(dt, entry, idt_entry[0], idt_entry[1]); |
8d947344 GOC |
225 | } |
226 | ||
014b15be GOC |
227 | static void vmi_write_gdt_entry(struct desc_struct *dt, int entry, |
228 | const void *desc, int type) | |
229 | { | |
230 | u32 *gdt_entry = (u32 *)desc; | |
262d5ee2 | 231 | vmi_ops.write_gdt_entry(dt, entry, gdt_entry[0], gdt_entry[1]); |
014b15be GOC |
232 | } |
233 | ||
75b8bb3e GOC |
234 | static void vmi_write_ldt_entry(struct desc_struct *dt, int entry, |
235 | const void *desc) | |
236 | { | |
237 | u32 *ldt_entry = (u32 *)desc; | |
de59985e | 238 | vmi_ops.write_ldt_entry(dt, entry, ldt_entry[0], ldt_entry[1]); |
75b8bb3e GOC |
239 | } |
240 | ||
faca6227 | 241 | static void vmi_load_sp0(struct tss_struct *tss, |
7ce0bcfd ZA |
242 | struct thread_struct *thread) |
243 | { | |
faca6227 | 244 | tss->x86_tss.sp0 = thread->sp0; |
7ce0bcfd ZA |
245 | |
246 | /* This can only happen when SEP is enabled, no need to test "SEP"arately */ | |
a75c54f9 RR |
247 | if (unlikely(tss->x86_tss.ss1 != thread->sysenter_cs)) { |
248 | tss->x86_tss.ss1 = thread->sysenter_cs; | |
7ce0bcfd ZA |
249 | wrmsr(MSR_IA32_SYSENTER_CS, thread->sysenter_cs, 0); |
250 | } | |
faca6227 | 251 | vmi_ops.set_kernel_stack(__KERNEL_DS, tss->x86_tss.sp0); |
7ce0bcfd ZA |
252 | } |
253 | ||
254 | static void vmi_flush_tlb_user(void) | |
255 | { | |
eeef9c68 | 256 | vmi_ops._flush_tlb(VMI_FLUSH_TLB); |
7ce0bcfd ZA |
257 | } |
258 | ||
259 | static void vmi_flush_tlb_kernel(void) | |
260 | { | |
eeef9c68 | 261 | vmi_ops._flush_tlb(VMI_FLUSH_TLB | VMI_FLUSH_GLOBAL); |
7ce0bcfd ZA |
262 | } |
263 | ||
264 | /* Stub to do nothing at all; used for delays and unimplemented calls */ | |
265 | static void vmi_nop(void) | |
266 | { | |
267 | } | |
268 | ||
eeef9c68 ZA |
269 | #ifdef CONFIG_HIGHPTE |
270 | static void *vmi_kmap_atomic_pte(struct page *page, enum km_type type) | |
9a1c13e9 | 271 | { |
eeef9c68 ZA |
272 | void *va = kmap_atomic(page, type); |
273 | ||
9a1c13e9 ZA |
274 | /* |
275 | * Internally, the VMI ROM must map virtual addresses to physical | |
276 | * addresses for processing MMU updates. By the time MMU updates | |
277 | * are issued, this information is typically already lost. | |
278 | * Fortunately, the VMI provides a cache of mapping slots for active | |
279 | * page tables. | |
280 | * | |
281 | * We use slot zero for the linear mapping of physical memory, and | |
282 | * in HIGHPTE kernels, slot 1 and 2 for KM_PTE0 and KM_PTE1. | |
283 | * | |
284 | * args: SLOT VA COUNT PFN | |
285 | */ | |
286 | BUG_ON(type != KM_PTE0 && type != KM_PTE1); | |
eeef9c68 ZA |
287 | vmi_ops.set_linear_mapping((type - KM_PTE0)+1, va, 1, page_to_pfn(page)); |
288 | ||
289 | return va; | |
9a1c13e9 | 290 | } |
eeef9c68 | 291 | #endif |
9a1c13e9 | 292 | |
f8639939 | 293 | static void vmi_allocate_pte(struct mm_struct *mm, unsigned long pfn) |
7ce0bcfd | 294 | { |
7ce0bcfd ZA |
295 | vmi_ops.allocate_page(pfn, VMI_PAGE_L1, 0, 0, 0); |
296 | } | |
297 | ||
f8639939 | 298 | static void vmi_allocate_pmd(struct mm_struct *mm, unsigned long pfn) |
7ce0bcfd ZA |
299 | { |
300 | /* | |
301 | * This call comes in very early, before mem_map is setup. | |
302 | * It is called only for swapper_pg_dir, which already has | |
303 | * data on it. | |
304 | */ | |
7ce0bcfd ZA |
305 | vmi_ops.allocate_page(pfn, VMI_PAGE_L2, 0, 0, 0); |
306 | } | |
307 | ||
f8639939 | 308 | static void vmi_allocate_pmd_clone(unsigned long pfn, unsigned long clonepfn, unsigned long start, unsigned long count) |
7ce0bcfd | 309 | { |
7ce0bcfd ZA |
310 | vmi_ops.allocate_page(pfn, VMI_PAGE_L2 | VMI_PAGE_CLONE, clonepfn, start, count); |
311 | } | |
312 | ||
f8639939 | 313 | static void vmi_release_pte(unsigned long pfn) |
7ce0bcfd ZA |
314 | { |
315 | vmi_ops.release_page(pfn, VMI_PAGE_L1); | |
7ce0bcfd ZA |
316 | } |
317 | ||
f8639939 | 318 | static void vmi_release_pmd(unsigned long pfn) |
7ce0bcfd ZA |
319 | { |
320 | vmi_ops.release_page(pfn, VMI_PAGE_L2); | |
7ce0bcfd ZA |
321 | } |
322 | ||
55a8ba4b AK |
323 | /* |
324 | * We use the pgd_free hook for releasing the pgd page: | |
325 | */ | |
326 | static void vmi_pgd_free(struct mm_struct *mm, pgd_t *pgd) | |
327 | { | |
328 | unsigned long pfn = __pa(pgd) >> PAGE_SHIFT; | |
329 | ||
330 | vmi_ops.release_page(pfn, VMI_PAGE_L2); | |
331 | } | |
332 | ||
7ce0bcfd ZA |
333 | /* |
334 | * Helper macros for MMU update flags. We can defer updates until a flush | |
335 | * or page invalidation only if the update is to the current address space | |
336 | * (otherwise, there is no flush). We must check against init_mm, since | |
337 | * this could be a kernel update, which usually passes init_mm, although | |
338 | * sometimes this check can be skipped if we know the particular function | |
339 | * is only called on user mode PTEs. We could change the kernel to pass | |
340 | * current->active_mm here, but in particular, I was unsure if changing | |
341 | * mm/highmem.c to do this would still be correct on other architectures. | |
342 | */ | |
343 | #define is_current_as(mm, mustbeuser) ((mm) == current->active_mm || \ | |
344 | (!mustbeuser && (mm) == &init_mm)) | |
345 | #define vmi_flags_addr(mm, addr, level, user) \ | |
346 | ((level) | (is_current_as(mm, user) ? \ | |
347 | (VMI_PAGE_CURRENT_AS | ((addr) & VMI_PAGE_VA_MASK)) : 0)) | |
348 | #define vmi_flags_addr_defer(mm, addr, level, user) \ | |
349 | ((level) | (is_current_as(mm, user) ? \ | |
350 | (VMI_PAGE_DEFER | VMI_PAGE_CURRENT_AS | ((addr) & VMI_PAGE_VA_MASK)) : 0)) | |
351 | ||
3dc494e8 | 352 | static void vmi_update_pte(struct mm_struct *mm, unsigned long addr, pte_t *ptep) |
7ce0bcfd | 353 | { |
7ce0bcfd ZA |
354 | vmi_ops.update_pte(ptep, vmi_flags_addr(mm, addr, VMI_PAGE_PT, 0)); |
355 | } | |
356 | ||
3dc494e8 | 357 | static void vmi_update_pte_defer(struct mm_struct *mm, unsigned long addr, pte_t *ptep) |
7ce0bcfd | 358 | { |
7ce0bcfd ZA |
359 | vmi_ops.update_pte(ptep, vmi_flags_addr_defer(mm, addr, VMI_PAGE_PT, 0)); |
360 | } | |
361 | ||
362 | static void vmi_set_pte(pte_t *ptep, pte_t pte) | |
363 | { | |
364 | /* XXX because of set_pmd_pte, this can be called on PT or PD layers */ | |
7ce0bcfd ZA |
365 | vmi_ops.set_pte(pte, ptep, VMI_PAGE_PT); |
366 | } | |
367 | ||
3dc494e8 | 368 | static void vmi_set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte) |
7ce0bcfd | 369 | { |
7ce0bcfd ZA |
370 | vmi_ops.set_pte(pte, ptep, vmi_flags_addr(mm, addr, VMI_PAGE_PT, 0)); |
371 | } | |
372 | ||
373 | static void vmi_set_pmd(pmd_t *pmdp, pmd_t pmdval) | |
374 | { | |
375 | #ifdef CONFIG_X86_PAE | |
e3328701 | 376 | const pte_t pte = { .pte = pmdval.pmd }; |
7ce0bcfd ZA |
377 | #else |
378 | const pte_t pte = { pmdval.pud.pgd.pgd }; | |
7ce0bcfd ZA |
379 | #endif |
380 | vmi_ops.set_pte(pte, (pte_t *)pmdp, VMI_PAGE_PD); | |
381 | } | |
382 | ||
383 | #ifdef CONFIG_X86_PAE | |
384 | ||
385 | static void vmi_set_pte_atomic(pte_t *ptep, pte_t pteval) | |
386 | { | |
387 | /* | |
388 | * XXX This is called from set_pmd_pte, but at both PT | |
389 | * and PD layers so the VMI_PAGE_PT flag is wrong. But | |
390 | * it is only called for large page mapping changes, | |
391 | * the Xen backend, doesn't support large pages, and the | |
392 | * ESX backend doesn't depend on the flag. | |
393 | */ | |
394 | set_64bit((unsigned long long *)ptep,pte_val(pteval)); | |
395 | vmi_ops.update_pte(ptep, VMI_PAGE_PT); | |
396 | } | |
397 | ||
398 | static void vmi_set_pte_present(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte) | |
399 | { | |
7ce0bcfd ZA |
400 | vmi_ops.set_pte(pte, ptep, vmi_flags_addr_defer(mm, addr, VMI_PAGE_PT, 1)); |
401 | } | |
402 | ||
403 | static void vmi_set_pud(pud_t *pudp, pud_t pudval) | |
404 | { | |
405 | /* Um, eww */ | |
e3328701 | 406 | const pte_t pte = { .pte = pudval.pgd.pgd }; |
7ce0bcfd ZA |
407 | vmi_ops.set_pte(pte, (pte_t *)pudp, VMI_PAGE_PDP); |
408 | } | |
409 | ||
410 | static void vmi_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) | |
411 | { | |
e3328701 | 412 | const pte_t pte = { .pte = 0 }; |
7ce0bcfd ZA |
413 | vmi_ops.set_pte(pte, ptep, vmi_flags_addr(mm, addr, VMI_PAGE_PT, 0)); |
414 | } | |
415 | ||
8eb68fae | 416 | static void vmi_pmd_clear(pmd_t *pmd) |
7ce0bcfd | 417 | { |
e3328701 | 418 | const pte_t pte = { .pte = 0 }; |
7ce0bcfd ZA |
419 | vmi_ops.set_pte(pte, (pte_t *)pmd, VMI_PAGE_PD); |
420 | } | |
421 | #endif | |
422 | ||
423 | #ifdef CONFIG_SMP | |
c6b36e9a | 424 | static void __devinit |
7ce0bcfd ZA |
425 | vmi_startup_ipi_hook(int phys_apicid, unsigned long start_eip, |
426 | unsigned long start_esp) | |
427 | { | |
c6b36e9a ZA |
428 | struct vmi_ap_state ap; |
429 | ||
7ce0bcfd ZA |
430 | /* Default everything to zero. This is fine for most GPRs. */ |
431 | memset(&ap, 0, sizeof(struct vmi_ap_state)); | |
432 | ||
433 | ap.gdtr_limit = GDT_SIZE - 1; | |
434 | ap.gdtr_base = (unsigned long) get_cpu_gdt_table(phys_apicid); | |
435 | ||
436 | ap.idtr_limit = IDT_ENTRIES * 8 - 1; | |
437 | ap.idtr_base = (unsigned long) idt_table; | |
438 | ||
439 | ap.ldtr = 0; | |
440 | ||
441 | ap.cs = __KERNEL_CS; | |
442 | ap.eip = (unsigned long) start_eip; | |
443 | ap.ss = __KERNEL_DS; | |
444 | ap.esp = (unsigned long) start_esp; | |
445 | ||
446 | ap.ds = __USER_DS; | |
447 | ap.es = __USER_DS; | |
7c3576d2 | 448 | ap.fs = __KERNEL_PERCPU; |
7ce0bcfd ZA |
449 | ap.gs = 0; |
450 | ||
451 | ap.eflags = 0; | |
452 | ||
7ce0bcfd ZA |
453 | #ifdef CONFIG_X86_PAE |
454 | /* efer should match BSP efer. */ | |
455 | if (cpu_has_nx) { | |
456 | unsigned l, h; | |
457 | rdmsr(MSR_EFER, l, h); | |
458 | ap.efer = (unsigned long long) h << 32 | l; | |
459 | } | |
460 | #endif | |
461 | ||
462 | ap.cr3 = __pa(swapper_pg_dir); | |
463 | /* Protected mode, paging, AM, WP, NE, MP. */ | |
464 | ap.cr0 = 0x80050023; | |
465 | ap.cr4 = mmu_cr4_features; | |
c6b36e9a | 466 | vmi_ops.set_initial_ap_state((u32)&ap, phys_apicid); |
7ce0bcfd ZA |
467 | } |
468 | #endif | |
469 | ||
224101ed | 470 | static void vmi_start_context_switch(struct task_struct *prev) |
49f19710 | 471 | { |
224101ed | 472 | paravirt_start_context_switch(prev); |
8965c1c0 JF |
473 | vmi_ops.set_lazy_mode(2); |
474 | } | |
49f19710 | 475 | |
224101ed | 476 | static void vmi_end_context_switch(struct task_struct *next) |
b407fc57 JF |
477 | { |
478 | vmi_ops.set_lazy_mode(0); | |
224101ed | 479 | paravirt_end_context_switch(next); |
b407fc57 JF |
480 | } |
481 | ||
8965c1c0 JF |
482 | static void vmi_enter_lazy_mmu(void) |
483 | { | |
484 | paravirt_enter_lazy_mmu(); | |
485 | vmi_ops.set_lazy_mode(1); | |
486 | } | |
49f19710 | 487 | |
b407fc57 | 488 | static void vmi_leave_lazy_mmu(void) |
8965c1c0 | 489 | { |
8965c1c0 | 490 | vmi_ops.set_lazy_mode(0); |
b407fc57 | 491 | paravirt_leave_lazy_mmu(); |
49f19710 ZA |
492 | } |
493 | ||
7ce0bcfd ZA |
494 | static inline int __init check_vmi_rom(struct vrom_header *rom) |
495 | { | |
496 | struct pci_header *pci; | |
497 | struct pnp_header *pnp; | |
498 | const char *manufacturer = "UNKNOWN"; | |
499 | const char *product = "UNKNOWN"; | |
500 | const char *license = "unspecified"; | |
501 | ||
502 | if (rom->rom_signature != 0xaa55) | |
503 | return 0; | |
504 | if (rom->vrom_signature != VMI_SIGNATURE) | |
505 | return 0; | |
506 | if (rom->api_version_maj != VMI_API_REV_MAJOR || | |
507 | rom->api_version_min+1 < VMI_API_REV_MINOR+1) { | |
508 | printk(KERN_WARNING "VMI: Found mismatched rom version %d.%d\n", | |
509 | rom->api_version_maj, | |
510 | rom->api_version_min); | |
511 | return 0; | |
512 | } | |
513 | ||
514 | /* | |
515 | * Relying on the VMI_SIGNATURE field is not 100% safe, so check | |
516 | * the PCI header and device type to make sure this is really a | |
517 | * VMI device. | |
518 | */ | |
519 | if (!rom->pci_header_offs) { | |
520 | printk(KERN_WARNING "VMI: ROM does not contain PCI header.\n"); | |
521 | return 0; | |
522 | } | |
523 | ||
524 | pci = (struct pci_header *)((char *)rom+rom->pci_header_offs); | |
525 | if (pci->vendorID != PCI_VENDOR_ID_VMWARE || | |
526 | pci->deviceID != PCI_DEVICE_ID_VMWARE_VMI) { | |
527 | /* Allow it to run... anyways, but warn */ | |
528 | printk(KERN_WARNING "VMI: ROM from unknown manufacturer\n"); | |
529 | } | |
530 | ||
531 | if (rom->pnp_header_offs) { | |
532 | pnp = (struct pnp_header *)((char *)rom+rom->pnp_header_offs); | |
533 | if (pnp->manufacturer_offset) | |
534 | manufacturer = (const char *)rom+pnp->manufacturer_offset; | |
535 | if (pnp->product_offset) | |
536 | product = (const char *)rom+pnp->product_offset; | |
537 | } | |
538 | ||
539 | if (rom->license_offs) | |
540 | license = (char *)rom+rom->license_offs; | |
541 | ||
542 | printk(KERN_INFO "VMI: Found %s %s, API version %d.%d, ROM version %d.%d\n", | |
543 | manufacturer, product, | |
544 | rom->api_version_maj, rom->api_version_min, | |
545 | pci->rom_version_maj, pci->rom_version_min); | |
546 | ||
302cf930 AK |
547 | /* Don't allow BSD/MIT here for now because we don't want to end up |
548 | with any binary only shim layers */ | |
549 | if (strcmp(license, "GPL") && strcmp(license, "GPL v2")) { | |
550 | printk(KERN_WARNING "VMI: Non GPL license `%s' found for ROM. Not used.\n", | |
551 | license); | |
552 | return 0; | |
553 | } | |
554 | ||
7ce0bcfd ZA |
555 | return 1; |
556 | } | |
557 | ||
558 | /* | |
559 | * Probe for the VMI option ROM | |
560 | */ | |
561 | static inline int __init probe_vmi_rom(void) | |
562 | { | |
563 | unsigned long base; | |
564 | ||
565 | /* VMI ROM is in option ROM area, check signature */ | |
566 | for (base = 0xC0000; base < 0xE0000; base += 2048) { | |
567 | struct vrom_header *romstart; | |
568 | romstart = (struct vrom_header *)isa_bus_to_virt(base); | |
569 | if (check_vmi_rom(romstart)) { | |
570 | vmi_rom = romstart; | |
571 | return 1; | |
572 | } | |
573 | } | |
574 | return 0; | |
575 | } | |
576 | ||
577 | /* | |
578 | * VMI setup common to all processors | |
579 | */ | |
580 | void vmi_bringup(void) | |
581 | { | |
582 | /* We must establish the lowmem mapping for MMU ops to work */ | |
772205f6 | 583 | if (vmi_ops.set_linear_mapping) |
31343d8a | 584 | vmi_ops.set_linear_mapping(0, (void *)__PAGE_OFFSET, MAXMEM_PFN, 0); |
7ce0bcfd ZA |
585 | } |
586 | ||
587 | /* | |
772205f6 | 588 | * Return a pointer to a VMI function or NULL if unimplemented |
7ce0bcfd ZA |
589 | */ |
590 | static void *vmi_get_function(int vmicall) | |
591 | { | |
592 | u64 reloc; | |
593 | const struct vmi_relocation_info *rel = (struct vmi_relocation_info *)&reloc; | |
594 | reloc = call_vrom_long_func(vmi_rom, get_reloc, vmicall); | |
595 | BUG_ON(rel->type == VMI_RELOCATION_JUMP_REL); | |
596 | if (rel->type == VMI_RELOCATION_CALL_REL) | |
597 | return (void *)rel->eip; | |
598 | else | |
772205f6 | 599 | return NULL; |
7ce0bcfd ZA |
600 | } |
601 | ||
602 | /* | |
603 | * Helper macro for making the VMI paravirt-ops fill code readable. | |
772205f6 ZA |
604 | * For unimplemented operations, fall back to default, unless nop |
605 | * is returned by the ROM. | |
7ce0bcfd ZA |
606 | */ |
607 | #define para_fill(opname, vmicall) \ | |
608 | do { \ | |
609 | reloc = call_vrom_long_func(vmi_rom, get_reloc, \ | |
610 | VMI_CALL_##vmicall); \ | |
0492c371 | 611 | if (rel->type == VMI_RELOCATION_CALL_REL) \ |
93b1eab3 | 612 | opname = (void *)rel->eip; \ |
0492c371 | 613 | else if (rel->type == VMI_RELOCATION_NOP) \ |
93b1eab3 | 614 | opname = (void *)vmi_nop; \ |
0492c371 ZA |
615 | else if (rel->type != VMI_RELOCATION_NONE) \ |
616 | printk(KERN_WARNING "VMI: Unknown relocation " \ | |
617 | "type %d for " #vmicall"\n",\ | |
618 | rel->type); \ | |
772205f6 ZA |
619 | } while (0) |
620 | ||
621 | /* | |
622 | * Helper macro for making the VMI paravirt-ops fill code readable. | |
623 | * For cached operations which do not match the VMI ROM ABI and must | |
624 | * go through a tranlation stub. Ignore NOPs, since it is not clear | |
625 | * a NOP * VMI function corresponds to a NOP paravirt-op when the | |
626 | * functions are not in 1-1 correspondence. | |
627 | */ | |
628 | #define para_wrap(opname, wrapper, cache, vmicall) \ | |
629 | do { \ | |
630 | reloc = call_vrom_long_func(vmi_rom, get_reloc, \ | |
631 | VMI_CALL_##vmicall); \ | |
632 | BUG_ON(rel->type == VMI_RELOCATION_JUMP_REL); \ | |
633 | if (rel->type == VMI_RELOCATION_CALL_REL) { \ | |
93b1eab3 | 634 | opname = wrapper; \ |
772205f6 | 635 | vmi_ops.cache = (void *)rel->eip; \ |
7ce0bcfd ZA |
636 | } \ |
637 | } while (0) | |
638 | ||
639 | /* | |
640 | * Activate the VMI interface and switch into paravirtualized mode | |
641 | */ | |
642 | static inline int __init activate_vmi(void) | |
643 | { | |
644 | short kernel_cs; | |
645 | u64 reloc; | |
646 | const struct vmi_relocation_info *rel = (struct vmi_relocation_info *)&reloc; | |
647 | ||
648 | if (call_vrom_func(vmi_rom, vmi_init) != 0) { | |
649 | printk(KERN_ERR "VMI ROM failed to initialize!"); | |
650 | return 0; | |
651 | } | |
652 | savesegment(cs, kernel_cs); | |
653 | ||
93b1eab3 JF |
654 | pv_info.paravirt_enabled = 1; |
655 | pv_info.kernel_rpl = kernel_cs & SEGMENT_RPL_MASK; | |
656 | pv_info.name = "vmi"; | |
7ce0bcfd | 657 | |
93b1eab3 | 658 | pv_init_ops.patch = vmi_patch; |
7ce0bcfd ZA |
659 | |
660 | /* | |
661 | * Many of these operations are ABI compatible with VMI. | |
662 | * This means we can fill in the paravirt-ops with direct | |
663 | * pointers into the VMI ROM. If the calling convention for | |
664 | * these operations changes, this code needs to be updated. | |
665 | * | |
666 | * Exceptions | |
667 | * CPUID paravirt-op uses pointers, not the native ISA | |
668 | * halt has no VMI equivalent; all VMI halts are "safe" | |
669 | * no MSR support yet - just trap and emulate. VMI uses the | |
670 | * same ABI as the native ISA, but Linux wants exceptions | |
671 | * from bogus MSR read / write handled | |
672 | * rdpmc is not yet used in Linux | |
673 | */ | |
674 | ||
772205f6 | 675 | /* CPUID is special, so very special it gets wrapped like a present */ |
93b1eab3 JF |
676 | para_wrap(pv_cpu_ops.cpuid, vmi_cpuid, cpuid, CPUID); |
677 | ||
678 | para_fill(pv_cpu_ops.clts, CLTS); | |
679 | para_fill(pv_cpu_ops.get_debugreg, GetDR); | |
680 | para_fill(pv_cpu_ops.set_debugreg, SetDR); | |
681 | para_fill(pv_cpu_ops.read_cr0, GetCR0); | |
682 | para_fill(pv_mmu_ops.read_cr2, GetCR2); | |
683 | para_fill(pv_mmu_ops.read_cr3, GetCR3); | |
684 | para_fill(pv_cpu_ops.read_cr4, GetCR4); | |
685 | para_fill(pv_cpu_ops.write_cr0, SetCR0); | |
686 | para_fill(pv_mmu_ops.write_cr2, SetCR2); | |
687 | para_fill(pv_mmu_ops.write_cr3, SetCR3); | |
688 | para_fill(pv_cpu_ops.write_cr4, SetCR4); | |
664c7954 JF |
689 | |
690 | para_fill(pv_irq_ops.save_fl.func, GetInterruptMask); | |
691 | para_fill(pv_irq_ops.restore_fl.func, SetInterruptMask); | |
692 | para_fill(pv_irq_ops.irq_disable.func, DisableInterrupts); | |
693 | para_fill(pv_irq_ops.irq_enable.func, EnableInterrupts); | |
93b1eab3 JF |
694 | |
695 | para_fill(pv_cpu_ops.wbinvd, WBINVD); | |
696 | para_fill(pv_cpu_ops.read_tsc, RDTSC); | |
772205f6 ZA |
697 | |
698 | /* The following we emulate with trap and emulate for now */ | |
7ce0bcfd ZA |
699 | /* paravirt_ops.read_msr = vmi_rdmsr */ |
700 | /* paravirt_ops.write_msr = vmi_wrmsr */ | |
7ce0bcfd ZA |
701 | /* paravirt_ops.rdpmc = vmi_rdpmc */ |
702 | ||
772205f6 | 703 | /* TR interface doesn't pass TR value, wrap */ |
93b1eab3 | 704 | para_wrap(pv_cpu_ops.load_tr_desc, vmi_set_tr, set_tr, SetTR); |
7ce0bcfd ZA |
705 | |
706 | /* LDT is special, too */ | |
93b1eab3 JF |
707 | para_wrap(pv_cpu_ops.set_ldt, vmi_set_ldt, _set_ldt, SetLDT); |
708 | ||
709 | para_fill(pv_cpu_ops.load_gdt, SetGDT); | |
710 | para_fill(pv_cpu_ops.load_idt, SetIDT); | |
711 | para_fill(pv_cpu_ops.store_gdt, GetGDT); | |
712 | para_fill(pv_cpu_ops.store_idt, GetIDT); | |
713 | para_fill(pv_cpu_ops.store_tr, GetTR); | |
714 | pv_cpu_ops.load_tls = vmi_load_tls; | |
75b8bb3e GOC |
715 | para_wrap(pv_cpu_ops.write_ldt_entry, vmi_write_ldt_entry, |
716 | write_ldt_entry, WriteLDTEntry); | |
014b15be GOC |
717 | para_wrap(pv_cpu_ops.write_gdt_entry, vmi_write_gdt_entry, |
718 | write_gdt_entry, WriteGDTEntry); | |
8d947344 GOC |
719 | para_wrap(pv_cpu_ops.write_idt_entry, vmi_write_idt_entry, |
720 | write_idt_entry, WriteIDTEntry); | |
faca6227 | 721 | para_wrap(pv_cpu_ops.load_sp0, vmi_load_sp0, set_kernel_stack, UpdateKernelStack); |
93b1eab3 JF |
722 | para_fill(pv_cpu_ops.set_iopl_mask, SetIOPLMask); |
723 | para_fill(pv_cpu_ops.io_delay, IODelay); | |
8965c1c0 | 724 | |
224101ed | 725 | para_wrap(pv_cpu_ops.start_context_switch, vmi_start_context_switch, |
8965c1c0 | 726 | set_lazy_mode, SetLazyMode); |
224101ed | 727 | para_wrap(pv_cpu_ops.end_context_switch, vmi_end_context_switch, |
8965c1c0 JF |
728 | set_lazy_mode, SetLazyMode); |
729 | ||
730 | para_wrap(pv_mmu_ops.lazy_mode.enter, vmi_enter_lazy_mmu, | |
731 | set_lazy_mode, SetLazyMode); | |
b407fc57 | 732 | para_wrap(pv_mmu_ops.lazy_mode.leave, vmi_leave_lazy_mmu, |
8965c1c0 | 733 | set_lazy_mode, SetLazyMode); |
7ce0bcfd | 734 | |
772205f6 | 735 | /* user and kernel flush are just handled with different flags to FlushTLB */ |
93b1eab3 JF |
736 | para_wrap(pv_mmu_ops.flush_tlb_user, vmi_flush_tlb_user, _flush_tlb, FlushTLB); |
737 | para_wrap(pv_mmu_ops.flush_tlb_kernel, vmi_flush_tlb_kernel, _flush_tlb, FlushTLB); | |
738 | para_fill(pv_mmu_ops.flush_tlb_single, InvalPage); | |
7ce0bcfd ZA |
739 | |
740 | /* | |
741 | * Until a standard flag format can be agreed on, we need to | |
742 | * implement these as wrappers in Linux. Get the VMI ROM | |
743 | * function pointers for the two backend calls. | |
744 | */ | |
745 | #ifdef CONFIG_X86_PAE | |
746 | vmi_ops.set_pte = vmi_get_function(VMI_CALL_SetPxELong); | |
747 | vmi_ops.update_pte = vmi_get_function(VMI_CALL_UpdatePxELong); | |
748 | #else | |
749 | vmi_ops.set_pte = vmi_get_function(VMI_CALL_SetPxE); | |
750 | vmi_ops.update_pte = vmi_get_function(VMI_CALL_UpdatePxE); | |
751 | #endif | |
7ce0bcfd | 752 | |
772205f6 | 753 | if (vmi_ops.set_pte) { |
93b1eab3 JF |
754 | pv_mmu_ops.set_pte = vmi_set_pte; |
755 | pv_mmu_ops.set_pte_at = vmi_set_pte_at; | |
756 | pv_mmu_ops.set_pmd = vmi_set_pmd; | |
7ce0bcfd | 757 | #ifdef CONFIG_X86_PAE |
93b1eab3 JF |
758 | pv_mmu_ops.set_pte_atomic = vmi_set_pte_atomic; |
759 | pv_mmu_ops.set_pte_present = vmi_set_pte_present; | |
760 | pv_mmu_ops.set_pud = vmi_set_pud; | |
761 | pv_mmu_ops.pte_clear = vmi_pte_clear; | |
762 | pv_mmu_ops.pmd_clear = vmi_pmd_clear; | |
7ce0bcfd | 763 | #endif |
772205f6 ZA |
764 | } |
765 | ||
766 | if (vmi_ops.update_pte) { | |
93b1eab3 JF |
767 | pv_mmu_ops.pte_update = vmi_update_pte; |
768 | pv_mmu_ops.pte_update_defer = vmi_update_pte_defer; | |
772205f6 ZA |
769 | } |
770 | ||
771 | vmi_ops.allocate_page = vmi_get_function(VMI_CALL_AllocatePage); | |
772 | if (vmi_ops.allocate_page) { | |
6944a9c8 JF |
773 | pv_mmu_ops.alloc_pte = vmi_allocate_pte; |
774 | pv_mmu_ops.alloc_pmd = vmi_allocate_pmd; | |
775 | pv_mmu_ops.alloc_pmd_clone = vmi_allocate_pmd_clone; | |
772205f6 ZA |
776 | } |
777 | ||
778 | vmi_ops.release_page = vmi_get_function(VMI_CALL_ReleasePage); | |
779 | if (vmi_ops.release_page) { | |
6944a9c8 JF |
780 | pv_mmu_ops.release_pte = vmi_release_pte; |
781 | pv_mmu_ops.release_pmd = vmi_release_pmd; | |
55a8ba4b | 782 | pv_mmu_ops.pgd_free = vmi_pgd_free; |
772205f6 | 783 | } |
eeef9c68 ZA |
784 | |
785 | /* Set linear is needed in all cases */ | |
786 | vmi_ops.set_linear_mapping = vmi_get_function(VMI_CALL_SetLinearMapping); | |
787 | #ifdef CONFIG_HIGHPTE | |
788 | if (vmi_ops.set_linear_mapping) | |
93b1eab3 | 789 | pv_mmu_ops.kmap_atomic_pte = vmi_kmap_atomic_pte; |
a27fe809 | 790 | #endif |
772205f6 | 791 | |
7ce0bcfd ZA |
792 | /* |
793 | * These MUST always be patched. Don't support indirect jumps | |
794 | * through these operations, as the VMI interface may use either | |
795 | * a jump or a call to get to these operations, depending on | |
796 | * the backend. They are performance critical anyway, so requiring | |
797 | * a patch is not a big problem. | |
798 | */ | |
d75cd22f | 799 | pv_cpu_ops.irq_enable_sysexit = (void *)0xfeedbab0; |
93b1eab3 | 800 | pv_cpu_ops.iret = (void *)0xbadbab0; |
7ce0bcfd ZA |
801 | |
802 | #ifdef CONFIG_SMP | |
93b1eab3 | 803 | para_wrap(pv_apic_ops.startup_ipi_hook, vmi_startup_ipi_hook, set_initial_ap_state, SetInitialAPState); |
7ce0bcfd ZA |
804 | #endif |
805 | ||
806 | #ifdef CONFIG_X86_LOCAL_APIC | |
c1eeb2de YL |
807 | para_fill(apic->read, APICRead); |
808 | para_fill(apic->write, APICWrite); | |
7ce0bcfd ZA |
809 | #endif |
810 | ||
bbab4f3b ZA |
811 | /* |
812 | * Check for VMI timer functionality by probing for a cycle frequency method | |
813 | */ | |
814 | reloc = call_vrom_long_func(vmi_rom, get_reloc, VMI_CALL_GetCycleFrequency); | |
772205f6 | 815 | if (!disable_vmi_timer && rel->type != VMI_RELOCATION_NONE) { |
bbab4f3b ZA |
816 | vmi_timer_ops.get_cycle_frequency = (void *)rel->eip; |
817 | vmi_timer_ops.get_cycle_counter = | |
818 | vmi_get_function(VMI_CALL_GetCycleCounter); | |
819 | vmi_timer_ops.get_wallclock = | |
820 | vmi_get_function(VMI_CALL_GetWallclockTime); | |
821 | vmi_timer_ops.wallclock_updated = | |
822 | vmi_get_function(VMI_CALL_WallclockUpdated); | |
823 | vmi_timer_ops.set_alarm = vmi_get_function(VMI_CALL_SetAlarm); | |
824 | vmi_timer_ops.cancel_alarm = | |
825 | vmi_get_function(VMI_CALL_CancelAlarm); | |
93b1eab3 JF |
826 | pv_time_ops.time_init = vmi_time_init; |
827 | pv_time_ops.get_wallclock = vmi_get_wallclock; | |
828 | pv_time_ops.set_wallclock = vmi_set_wallclock; | |
bbab4f3b | 829 | #ifdef CONFIG_X86_LOCAL_APIC |
93b1eab3 JF |
830 | pv_apic_ops.setup_boot_clock = vmi_time_bsp_init; |
831 | pv_apic_ops.setup_secondary_clock = vmi_time_ap_init; | |
bbab4f3b | 832 | #endif |
93b1eab3 | 833 | pv_time_ops.sched_clock = vmi_sched_clock; |
e93ef949 | 834 | pv_time_ops.get_tsc_khz = vmi_tsc_khz; |
772205f6 ZA |
835 | |
836 | /* We have true wallclock functions; disable CMOS clock sync */ | |
837 | no_sync_cmos_clock = 1; | |
838 | } else { | |
839 | disable_noidle = 1; | |
840 | disable_vmi_timer = 1; | |
bbab4f3b | 841 | } |
772205f6 | 842 | |
93b1eab3 | 843 | para_fill(pv_irq_ops.safe_halt, Halt); |
bbab4f3b | 844 | |
7ce0bcfd ZA |
845 | /* |
846 | * Alternative instruction rewriting doesn't happen soon enough | |
847 | * to convert VMI_IRET to a call instead of a jump; so we have | |
848 | * to do this before IRQs get reenabled. Fortunately, it is | |
849 | * idempotent. | |
850 | */ | |
441d40dc | 851 | apply_paravirt(__parainstructions, __parainstructions_end); |
7ce0bcfd ZA |
852 | |
853 | vmi_bringup(); | |
854 | ||
855 | return 1; | |
856 | } | |
857 | ||
858 | #undef para_fill | |
859 | ||
860 | void __init vmi_init(void) | |
861 | { | |
7ce0bcfd ZA |
862 | if (!vmi_rom) |
863 | probe_vmi_rom(); | |
864 | else | |
865 | check_vmi_rom(vmi_rom); | |
866 | ||
867 | /* In case probing for or validating the ROM failed, basil */ | |
868 | if (!vmi_rom) | |
869 | return; | |
870 | ||
871 | reserve_top_address(-vmi_rom->virtual_top); | |
872 | ||
7507ba34 | 873 | #ifdef CONFIG_X86_IO_APIC |
772205f6 | 874 | /* This is virtual hardware; timer routing is wired correctly */ |
7ce0bcfd ZA |
875 | no_timer_check = 1; |
876 | #endif | |
ae8d04e2 ZA |
877 | } |
878 | ||
659d2618 | 879 | void __init vmi_activate(void) |
ae8d04e2 ZA |
880 | { |
881 | unsigned long flags; | |
882 | ||
883 | if (!vmi_rom) | |
884 | return; | |
885 | ||
886 | local_irq_save(flags); | |
887 | activate_vmi(); | |
7ce0bcfd ZA |
888 | local_irq_restore(flags & X86_EFLAGS_IF); |
889 | } | |
890 | ||
891 | static int __init parse_vmi(char *arg) | |
892 | { | |
893 | if (!arg) | |
894 | return -EINVAL; | |
895 | ||
eda08b1b | 896 | if (!strcmp(arg, "disable_pge")) { |
53756d37 | 897 | clear_cpu_cap(&boot_cpu_data, X86_FEATURE_PGE); |
7ce0bcfd ZA |
898 | disable_pge = 1; |
899 | } else if (!strcmp(arg, "disable_pse")) { | |
53756d37 | 900 | clear_cpu_cap(&boot_cpu_data, X86_FEATURE_PSE); |
7ce0bcfd ZA |
901 | disable_pse = 1; |
902 | } else if (!strcmp(arg, "disable_sep")) { | |
53756d37 | 903 | clear_cpu_cap(&boot_cpu_data, X86_FEATURE_SEP); |
7ce0bcfd ZA |
904 | disable_sep = 1; |
905 | } else if (!strcmp(arg, "disable_tsc")) { | |
53756d37 | 906 | clear_cpu_cap(&boot_cpu_data, X86_FEATURE_TSC); |
7ce0bcfd ZA |
907 | disable_tsc = 1; |
908 | } else if (!strcmp(arg, "disable_mtrr")) { | |
53756d37 | 909 | clear_cpu_cap(&boot_cpu_data, X86_FEATURE_MTRR); |
7ce0bcfd | 910 | disable_mtrr = 1; |
772205f6 ZA |
911 | } else if (!strcmp(arg, "disable_timer")) { |
912 | disable_vmi_timer = 1; | |
913 | disable_noidle = 1; | |
7507ba34 ZA |
914 | } else if (!strcmp(arg, "disable_noidle")) |
915 | disable_noidle = 1; | |
7ce0bcfd ZA |
916 | return 0; |
917 | } | |
918 | ||
919 | early_param("vmi", parse_vmi); |