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e0bb8643 ZA |
1 | /* |
2 | * VMI paravirtual timer support routines. | |
3 | * | |
4 | * Copyright (C) 2007, VMware, Inc. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, but | |
12 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or | |
14 | * NON INFRINGEMENT. See the GNU General Public License for more | |
15 | * details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
20 | * | |
21 | */ | |
22 | ||
23 | #include <linux/smp.h> | |
24 | #include <linux/interrupt.h> | |
25 | #include <linux/cpumask.h> | |
26 | #include <linux/clocksource.h> | |
27 | #include <linux/clockchips.h> | |
28 | ||
29 | #include <asm/vmi.h> | |
30 | #include <asm/vmi_time.h> | |
31 | #include <asm/arch_hooks.h> | |
32 | #include <asm/apicdef.h> | |
33 | #include <asm/apic.h> | |
34 | #include <asm/timer.h> | |
a2900975 | 35 | #include <asm/i8253.h> |
e0bb8643 ZA |
36 | |
37 | #include <irq_vectors.h> | |
e0bb8643 ZA |
38 | |
39 | #define VMI_ONESHOT (VMI_ALARM_IS_ONESHOT | VMI_CYCLES_REAL | vmi_get_alarm_wiring()) | |
40 | #define VMI_PERIODIC (VMI_ALARM_IS_PERIODIC | VMI_CYCLES_REAL | vmi_get_alarm_wiring()) | |
41 | ||
42 | static DEFINE_PER_CPU(struct clock_event_device, local_events); | |
43 | ||
44 | static inline u32 vmi_counter(u32 flags) | |
45 | { | |
46 | /* Given VMI_ONESHOT or VMI_PERIODIC, return the corresponding | |
47 | * cycle counter. */ | |
48 | return flags & VMI_ALARM_COUNTER_MASK; | |
49 | } | |
50 | ||
51 | /* paravirt_ops.get_wallclock = vmi_get_wallclock */ | |
52 | unsigned long vmi_get_wallclock(void) | |
53 | { | |
54 | unsigned long long wallclock; | |
55 | wallclock = vmi_timer_ops.get_wallclock(); // nsec | |
56 | (void)do_div(wallclock, 1000000000); // sec | |
57 | ||
58 | return wallclock; | |
59 | } | |
60 | ||
61 | /* paravirt_ops.set_wallclock = vmi_set_wallclock */ | |
62 | int vmi_set_wallclock(unsigned long now) | |
63 | { | |
64 | return 0; | |
65 | } | |
66 | ||
688340ea JF |
67 | /* paravirt_ops.sched_clock = vmi_sched_clock */ |
68 | unsigned long long vmi_sched_clock(void) | |
e0bb8643 | 69 | { |
688340ea | 70 | return cycles_2_ns(vmi_timer_ops.get_cycle_counter(VMI_CYCLES_AVAILABLE)); |
e0bb8643 ZA |
71 | } |
72 | ||
73 | /* paravirt_ops.get_cpu_khz = vmi_cpu_khz */ | |
74 | unsigned long vmi_cpu_khz(void) | |
75 | { | |
76 | unsigned long long khz; | |
77 | khz = vmi_timer_ops.get_cycle_frequency(); | |
78 | (void)do_div(khz, 1000); | |
79 | return khz; | |
80 | } | |
81 | ||
82 | static inline unsigned int vmi_get_timer_vector(void) | |
83 | { | |
84 | #ifdef CONFIG_X86_IO_APIC | |
85 | return FIRST_DEVICE_VECTOR; | |
86 | #else | |
87 | return FIRST_EXTERNAL_VECTOR; | |
88 | #endif | |
89 | } | |
90 | ||
91 | /** vmi clockchip */ | |
92 | #ifdef CONFIG_X86_LOCAL_APIC | |
93 | static unsigned int startup_timer_irq(unsigned int irq) | |
94 | { | |
95 | unsigned long val = apic_read(APIC_LVTT); | |
96 | apic_write(APIC_LVTT, vmi_get_timer_vector()); | |
97 | ||
98 | return (val & APIC_SEND_PENDING); | |
99 | } | |
100 | ||
101 | static void mask_timer_irq(unsigned int irq) | |
102 | { | |
103 | unsigned long val = apic_read(APIC_LVTT); | |
104 | apic_write(APIC_LVTT, val | APIC_LVT_MASKED); | |
105 | } | |
106 | ||
107 | static void unmask_timer_irq(unsigned int irq) | |
108 | { | |
109 | unsigned long val = apic_read(APIC_LVTT); | |
110 | apic_write(APIC_LVTT, val & ~APIC_LVT_MASKED); | |
111 | } | |
112 | ||
113 | static void ack_timer_irq(unsigned int irq) | |
114 | { | |
115 | ack_APIC_irq(); | |
116 | } | |
117 | ||
118 | static struct irq_chip vmi_chip __read_mostly = { | |
119 | .name = "VMI-LOCAL", | |
120 | .startup = startup_timer_irq, | |
121 | .mask = mask_timer_irq, | |
122 | .unmask = unmask_timer_irq, | |
123 | .ack = ack_timer_irq | |
124 | }; | |
125 | #endif | |
126 | ||
127 | /** vmi clockevent */ | |
128 | #define VMI_ALARM_WIRED_IRQ0 0x00000000 | |
129 | #define VMI_ALARM_WIRED_LVTT 0x00010000 | |
130 | static int vmi_wiring = VMI_ALARM_WIRED_IRQ0; | |
131 | ||
132 | static inline int vmi_get_alarm_wiring(void) | |
133 | { | |
134 | return vmi_wiring; | |
135 | } | |
136 | ||
137 | static void vmi_timer_set_mode(enum clock_event_mode mode, | |
138 | struct clock_event_device *evt) | |
139 | { | |
140 | cycle_t now, cycles_per_hz; | |
141 | BUG_ON(!irqs_disabled()); | |
142 | ||
143 | switch (mode) { | |
144 | case CLOCK_EVT_MODE_ONESHOT: | |
18de5bc4 | 145 | case CLOCK_EVT_MODE_RESUME: |
e0bb8643 ZA |
146 | break; |
147 | case CLOCK_EVT_MODE_PERIODIC: | |
148 | cycles_per_hz = vmi_timer_ops.get_cycle_frequency(); | |
149 | (void)do_div(cycles_per_hz, HZ); | |
150 | now = vmi_timer_ops.get_cycle_counter(vmi_counter(VMI_PERIODIC)); | |
151 | vmi_timer_ops.set_alarm(VMI_PERIODIC, now, cycles_per_hz); | |
152 | break; | |
153 | case CLOCK_EVT_MODE_UNUSED: | |
154 | case CLOCK_EVT_MODE_SHUTDOWN: | |
155 | switch (evt->mode) { | |
156 | case CLOCK_EVT_MODE_ONESHOT: | |
157 | vmi_timer_ops.cancel_alarm(VMI_ONESHOT); | |
158 | break; | |
159 | case CLOCK_EVT_MODE_PERIODIC: | |
160 | vmi_timer_ops.cancel_alarm(VMI_PERIODIC); | |
161 | break; | |
162 | default: | |
163 | break; | |
164 | } | |
165 | break; | |
166 | default: | |
167 | break; | |
168 | } | |
169 | } | |
170 | ||
171 | static int vmi_timer_next_event(unsigned long delta, | |
172 | struct clock_event_device *evt) | |
173 | { | |
174 | /* Unfortunately, set_next_event interface only passes relative | |
175 | * expiry, but we want absolute expiry. It'd be better if were | |
176 | * were passed an aboslute expiry, since a bunch of time may | |
177 | * have been stolen between the time the delta is computed and | |
178 | * when we set the alarm below. */ | |
179 | cycle_t now = vmi_timer_ops.get_cycle_counter(vmi_counter(VMI_ONESHOT)); | |
180 | ||
181 | BUG_ON(evt->mode != CLOCK_EVT_MODE_ONESHOT); | |
182 | vmi_timer_ops.set_alarm(VMI_ONESHOT, now + delta, 0); | |
183 | return 0; | |
184 | } | |
185 | ||
186 | static struct clock_event_device vmi_clockevent = { | |
187 | .name = "vmi-timer", | |
188 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, | |
189 | .shift = 22, | |
190 | .set_mode = vmi_timer_set_mode, | |
191 | .set_next_event = vmi_timer_next_event, | |
192 | .rating = 1000, | |
193 | .irq = 0, | |
194 | }; | |
195 | ||
196 | static irqreturn_t vmi_timer_interrupt(int irq, void *dev_id) | |
197 | { | |
198 | struct clock_event_device *evt = &__get_cpu_var(local_events); | |
199 | evt->event_handler(evt); | |
200 | return IRQ_HANDLED; | |
201 | } | |
202 | ||
203 | static struct irqaction vmi_clock_action = { | |
204 | .name = "vmi-timer", | |
205 | .handler = vmi_timer_interrupt, | |
206 | .flags = IRQF_DISABLED | IRQF_NOBALANCING, | |
207 | .mask = CPU_MASK_ALL, | |
208 | }; | |
209 | ||
210 | static void __devinit vmi_time_init_clockevent(void) | |
211 | { | |
212 | cycle_t cycles_per_msec; | |
213 | struct clock_event_device *evt; | |
214 | ||
215 | int cpu = smp_processor_id(); | |
216 | evt = &__get_cpu_var(local_events); | |
217 | ||
218 | /* Use cycles_per_msec since div_sc params are 32-bits. */ | |
219 | cycles_per_msec = vmi_timer_ops.get_cycle_frequency(); | |
220 | (void)do_div(cycles_per_msec, 1000); | |
221 | ||
222 | memcpy(evt, &vmi_clockevent, sizeof(*evt)); | |
223 | /* Must pick .shift such that .mult fits in 32-bits. Choosing | |
224 | * .shift to be 22 allows 2^(32-22) cycles per nano-seconds | |
225 | * before overflow. */ | |
226 | evt->mult = div_sc(cycles_per_msec, NSEC_PER_MSEC, evt->shift); | |
227 | /* Upper bound is clockevent's use of ulong for cycle deltas. */ | |
228 | evt->max_delta_ns = clockevent_delta2ns(ULONG_MAX, evt); | |
229 | evt->min_delta_ns = clockevent_delta2ns(1, evt); | |
230 | evt->cpumask = cpumask_of_cpu(cpu); | |
231 | ||
232 | printk(KERN_WARNING "vmi: registering clock event %s. mult=%lu shift=%u\n", | |
233 | evt->name, evt->mult, evt->shift); | |
234 | clockevents_register_device(evt); | |
235 | } | |
236 | ||
237 | void __init vmi_time_init(void) | |
238 | { | |
239 | /* Disable PIT: BIOSes start PIT CH0 with 18.2hz peridic. */ | |
466eed22 | 240 | outb_pit(0x3a, PIT_MODE); /* binary, mode 5, LSB/MSB, ch 0 */ |
e0bb8643 ZA |
241 | |
242 | vmi_time_init_clockevent(); | |
243 | setup_irq(0, &vmi_clock_action); | |
244 | } | |
245 | ||
246 | #ifdef CONFIG_X86_LOCAL_APIC | |
247 | void __devinit vmi_time_bsp_init(void) | |
248 | { | |
249 | /* | |
250 | * On APIC systems, we want local timers to fire on each cpu. We do | |
251 | * this by programming LVTT to deliver timer events to the IRQ handler | |
252 | * for IRQ-0, since we can't re-use the APIC local timer handler | |
253 | * without interfering with that code. | |
254 | */ | |
255 | clockevents_notify(CLOCK_EVT_NOTIFY_SUSPEND, NULL); | |
256 | local_irq_disable(); | |
257 | #ifdef CONFIG_X86_SMP | |
258 | /* | |
259 | * XXX handle_percpu_irq only defined for SMP; we need to switch over | |
260 | * to using it, since this is a local interrupt, which each CPU must | |
261 | * handle individually without locking out or dropping simultaneous | |
262 | * local timers on other CPUs. We also don't want to trigger the | |
263 | * quirk workaround code for interrupts which gets invoked from | |
264 | * handle_percpu_irq via eoi, so we use our own IRQ chip. | |
265 | */ | |
266 | set_irq_chip_and_handler_name(0, &vmi_chip, handle_percpu_irq, "lvtt"); | |
267 | #else | |
268 | set_irq_chip_and_handler_name(0, &vmi_chip, handle_edge_irq, "lvtt"); | |
269 | #endif | |
270 | vmi_wiring = VMI_ALARM_WIRED_LVTT; | |
271 | apic_write(APIC_LVTT, vmi_get_timer_vector()); | |
272 | local_irq_enable(); | |
273 | clockevents_notify(CLOCK_EVT_NOTIFY_RESUME, NULL); | |
274 | } | |
275 | ||
276 | void __devinit vmi_time_ap_init(void) | |
277 | { | |
278 | vmi_time_init_clockevent(); | |
279 | apic_write(APIC_LVTT, vmi_get_timer_vector()); | |
280 | } | |
281 | #endif | |
282 | ||
283 | /** vmi clocksource */ | |
284 | ||
285 | static cycle_t read_real_cycles(void) | |
286 | { | |
287 | return vmi_timer_ops.get_cycle_counter(VMI_CYCLES_REAL); | |
288 | } | |
289 | ||
290 | static struct clocksource clocksource_vmi = { | |
291 | .name = "vmi-timer", | |
292 | .rating = 450, | |
293 | .read = read_real_cycles, | |
294 | .mask = CLOCKSOURCE_MASK(64), | |
295 | .mult = 0, /* to be set */ | |
296 | .shift = 22, | |
297 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | |
298 | }; | |
299 | ||
300 | static int __init init_vmi_clocksource(void) | |
301 | { | |
302 | cycle_t cycles_per_msec; | |
303 | ||
304 | if (!vmi_timer_ops.get_cycle_frequency) | |
305 | return 0; | |
306 | /* Use khz2mult rather than hz2mult since hz arg is only 32-bits. */ | |
307 | cycles_per_msec = vmi_timer_ops.get_cycle_frequency(); | |
308 | (void)do_div(cycles_per_msec, 1000); | |
309 | ||
310 | /* Note that clocksource.{mult, shift} converts in the opposite direction | |
311 | * as clockevents. */ | |
312 | clocksource_vmi.mult = clocksource_khz2mult(cycles_per_msec, | |
313 | clocksource_vmi.shift); | |
314 | ||
315 | printk(KERN_WARNING "vmi: registering clock source khz=%lld\n", cycles_per_msec); | |
316 | return clocksource_register(&clocksource_vmi); | |
317 | ||
318 | } | |
319 | module_init(init_vmi_clocksource); |