Commit | Line | Data |
---|---|---|
57844a8f TG |
1 | /* |
2 | * Copyright (C) 2009 Thomas Gleixner <tglx@linutronix.de> | |
3 | * | |
4 | * For licencing details see kernel-base/COPYING | |
5 | */ | |
6 | #include <linux/init.h> | |
9325a28c | 7 | #include <linux/ioport.h> |
72550b3a | 8 | #include <linux/module.h> |
294ee6f8 | 9 | #include <linux/pci.h> |
57844a8f | 10 | |
816c25e7 | 11 | #include <asm/bios_ebda.h> |
6f30c1ac | 12 | #include <asm/paravirt.h> |
b72d0db9 | 13 | #include <asm/pci_x86.h> |
294ee6f8 | 14 | #include <asm/pci.h> |
fd6c6661 | 15 | #include <asm/mpspec.h> |
8fee697d | 16 | #include <asm/setup.h> |
736decac | 17 | #include <asm/apic.h> |
6b18ae3e | 18 | #include <asm/e820.h> |
845b3944 | 19 | #include <asm/time.h> |
d9112f43 | 20 | #include <asm/irq.h> |
4a8e2a31 | 21 | #include <asm/io_apic.h> |
fd12a0d6 | 22 | #include <asm/pat.h> |
2d826404 | 23 | #include <asm/tsc.h> |
338bac52 | 24 | #include <asm/iommu.h> |
064a59b6 | 25 | #include <asm/mach_traps.h> |
57844a8f TG |
26 | |
27 | void __cpuinit x86_init_noop(void) { } | |
f4848472 | 28 | void __init x86_init_uint_noop(unsigned int unused) { } |
73090f89 AR |
29 | void __init x86_init_pgd_start_noop(void) { } |
30 | void __init x86_init_pgd_done_noop(pgd_t *unused) { } | |
d07c1be0 | 31 | int __init iommu_init_noop(void) { return 0; } |
62ad33f6 | 32 | void iommu_shutdown_noop(void) { } |
57844a8f TG |
33 | |
34 | /* | |
35 | * The platform setup functions are preset with the default functions | |
36 | * for standard PC hardware. | |
37 | */ | |
54e2603f | 38 | struct x86_init_ops x86_init __initdata = { |
f7cf5a5b TG |
39 | |
40 | .resources = { | |
5d94e81f | 41 | .probe_roms = probe_roms, |
8fee697d | 42 | .reserve_resources = reserve_standard_io_resources, |
6b18ae3e | 43 | .memory_setup = default_machine_specific_memory_setup, |
f7cf5a5b | 44 | }, |
f4848472 TG |
45 | |
46 | .mpparse = { | |
47 | .mpc_record = x86_init_uint_noop, | |
de934103 | 48 | .setup_ioapic_ids = x86_init_noop, |
fd6c6661 | 49 | .mpc_apic_id = default_mpc_apic_id, |
72302142 | 50 | .smp_read_mpc_oem = default_smp_read_mpc_oem, |
90e1c696 | 51 | .mpc_oem_bus_info = default_mpc_oem_bus_info, |
b3f1b617 TG |
52 | .find_smp_config = default_find_smp_config, |
53 | .get_smp_config = default_get_smp_config, | |
f4848472 | 54 | }, |
d9112f43 TG |
55 | |
56 | .irqs = { | |
57 | .pre_vector_init = init_ISA_irqs, | |
66bcaf0b | 58 | .intr_init = native_init_IRQ, |
428cf902 | 59 | .trap_init = x86_init_noop, |
d9112f43 | 60 | }, |
42bbdb43 TG |
61 | |
62 | .oem = { | |
63 | .arch_setup = x86_init_noop, | |
6f30c1ac | 64 | .banner = default_banner, |
42bbdb43 | 65 | }, |
030cb6c0 | 66 | |
279b706b SS |
67 | .mapping = { |
68 | .pagetable_reserve = native_pagetable_reserve, | |
69 | }, | |
70 | ||
030cb6c0 TG |
71 | .paging = { |
72 | .pagetable_setup_start = native_pagetable_setup_start, | |
73 | .pagetable_setup_done = native_pagetable_setup_done, | |
74 | }, | |
736decac TG |
75 | |
76 | .timers = { | |
77 | .setup_percpu_clockev = setup_boot_APIC_clock, | |
845b3944 TG |
78 | .tsc_pre_init = x86_init_noop, |
79 | .timer_init = hpet_time_init, | |
6b617e22 | 80 | .wallclock_init = x86_init_noop, |
736decac | 81 | }, |
d07c1be0 FT |
82 | |
83 | .iommu = { | |
84 | .iommu_init = iommu_init_noop, | |
85 | }, | |
b72d0db9 TG |
86 | |
87 | .pci = { | |
88 | .init = x86_default_pci_init, | |
ab3b3793 | 89 | .init_irq = x86_default_pci_init_irq, |
9325a28c | 90 | .fixup_irqs = x86_default_pci_fixup_irqs, |
b72d0db9 | 91 | }, |
736decac TG |
92 | }; |
93 | ||
54e2603f | 94 | struct x86_cpuinit_ops x86_cpuinit __cpuinitdata = { |
df156f90 | 95 | .early_percpu_clock_init = x86_init_noop, |
736decac | 96 | .setup_percpu_clockev = setup_secondary_APIC_clock, |
57844a8f | 97 | }; |
2d826404 | 98 | |
78c06176 | 99 | static void default_nmi_init(void) { }; |
c516ac58 | 100 | static int default_i8042_detect(void) { return 1; }; |
78c06176 | 101 | |
2d826404 TG |
102 | struct x86_platform_ops x86_platform = { |
103 | .calibrate_tsc = native_calibrate_tsc, | |
7bd867df FT |
104 | .get_wallclock = mach_get_cmos_time, |
105 | .set_wallclock = mach_set_rtc_mmss, | |
338bac52 | 106 | .iommu_shutdown = iommu_shutdown_noop, |
eb41c8be | 107 | .is_untracked_pat_range = is_ISA_range, |
c516ac58 | 108 | .nmi_init = default_nmi_init, |
064a59b6 | 109 | .get_nmi_reason = default_get_nmi_reason, |
b74f05d6 MT |
110 | .i8042_detect = default_i8042_detect, |
111 | .save_sched_clock_state = tsc_save_sched_clock_state, | |
112 | .restore_sched_clock_state = tsc_restore_sched_clock_state, | |
2d826404 | 113 | }; |
72550b3a PA |
114 | |
115 | EXPORT_SYMBOL_GPL(x86_platform); | |
294ee6f8 SS |
116 | struct x86_msi_ops x86_msi = { |
117 | .setup_msi_irqs = native_setup_msi_irqs, | |
118 | .teardown_msi_irq = native_teardown_msi_irq, | |
119 | .teardown_msi_irqs = default_teardown_msi_irqs, | |
76ccc297 | 120 | .restore_msi_irqs = default_restore_msi_irqs, |
294ee6f8 | 121 | }; |
4a8e2a31 KRW |
122 | |
123 | struct x86_io_apic_ops x86_io_apic_ops = { | |
124 | .init = native_io_apic_init_mappings, | |
125 | .read = native_io_apic_read, | |
126 | .write = native_io_apic_write, | |
127 | .modify = native_io_apic_modify, | |
128 | }; |