KVM: Move cpuid code to new file
[deliverable/linux.git] / arch / x86 / kvm / i8254.c
CommitLineData
7837699f
SY
1/*
2 * 8253/8254 interval timer emulation
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 * Copyright (c) 2006 Intel Corporation
6 * Copyright (c) 2007 Keir Fraser, XenSource Inc
7 * Copyright (c) 2008 Intel Corporation
9611c187 8 * Copyright 2009 Red Hat, Inc. and/or its affiliates.
7837699f
SY
9 *
10 * Permission is hereby granted, free of charge, to any person obtaining a copy
11 * of this software and associated documentation files (the "Software"), to deal
12 * in the Software without restriction, including without limitation the rights
13 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
14 * copies of the Software, and to permit persons to whom the Software is
15 * furnished to do so, subject to the following conditions:
16 *
17 * The above copyright notice and this permission notice shall be included in
18 * all copies or substantial portions of the Software.
19 *
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
23 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
24 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
25 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 * THE SOFTWARE.
27 *
28 * Authors:
29 * Sheng Yang <sheng.yang@intel.com>
30 * Based on QEMU and Xen.
31 */
32
a78d9626
JP
33#define pr_fmt(fmt) "pit: " fmt
34
7837699f 35#include <linux/kvm_host.h>
5a0e3ad6 36#include <linux/slab.h>
33572ac0 37#include <linux/workqueue.h>
7837699f
SY
38
39#include "irq.h"
40#include "i8254.h"
41
42#ifndef CONFIG_X86_64
6f6d6a1a 43#define mod_64(x, y) ((x) - (y) * div64_u64(x, y))
7837699f
SY
44#else
45#define mod_64(x, y) ((x) % (y))
46#endif
47
48#define RW_STATE_LSB 1
49#define RW_STATE_MSB 2
50#define RW_STATE_WORD0 3
51#define RW_STATE_WORD1 4
52
53/* Compute with 96 bit intermediate result: (a*b)/c */
54static u64 muldiv64(u64 a, u32 b, u32 c)
55{
56 union {
57 u64 ll;
58 struct {
59 u32 low, high;
60 } l;
61 } u, res;
62 u64 rl, rh;
63
64 u.ll = a;
65 rl = (u64)u.l.low * (u64)b;
66 rh = (u64)u.l.high * (u64)b;
67 rh += (rl >> 32);
6f6d6a1a
RZ
68 res.l.high = div64_u64(rh, c);
69 res.l.low = div64_u64(((mod_64(rh, c) << 32) + (rl & 0xffffffff)), c);
7837699f
SY
70 return res.ll;
71}
72
73static void pit_set_gate(struct kvm *kvm, int channel, u32 val)
74{
75 struct kvm_kpit_channel_state *c =
76 &kvm->arch.vpit->pit_state.channels[channel];
77
78 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
79
80 switch (c->mode) {
81 default:
82 case 0:
83 case 4:
84 /* XXX: just disable/enable counting */
85 break;
86 case 1:
87 case 2:
88 case 3:
89 case 5:
90 /* Restart counting on rising edge. */
91 if (c->gate < val)
92 c->count_load_time = ktime_get();
93 break;
94 }
95
96 c->gate = val;
97}
98
8b2cf73c 99static int pit_get_gate(struct kvm *kvm, int channel)
7837699f
SY
100{
101 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
102
103 return kvm->arch.vpit->pit_state.channels[channel].gate;
104}
105
fd668423
MT
106static s64 __kpit_elapsed(struct kvm *kvm)
107{
108 s64 elapsed;
109 ktime_t remaining;
110 struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state;
111
0ff77873
MT
112 if (!ps->pit_timer.period)
113 return 0;
114
ede2ccc5
MT
115 /*
116 * The Counter does not stop when it reaches zero. In
117 * Modes 0, 1, 4, and 5 the Counter ``wraps around'' to
118 * the highest count, either FFFF hex for binary counting
119 * or 9999 for BCD counting, and continues counting.
120 * Modes 2 and 3 are periodic; the Counter reloads
121 * itself with the initial count and continues counting
122 * from there.
123 */
ace15464 124 remaining = hrtimer_get_remaining(&ps->pit_timer.timer);
ede2ccc5
MT
125 elapsed = ps->pit_timer.period - ktime_to_ns(remaining);
126 elapsed = mod_64(elapsed, ps->pit_timer.period);
fd668423
MT
127
128 return elapsed;
129}
130
131static s64 kpit_elapsed(struct kvm *kvm, struct kvm_kpit_channel_state *c,
132 int channel)
133{
134 if (channel == 0)
135 return __kpit_elapsed(kvm);
136
137 return ktime_to_ns(ktime_sub(ktime_get(), c->count_load_time));
138}
139
7837699f
SY
140static int pit_get_count(struct kvm *kvm, int channel)
141{
142 struct kvm_kpit_channel_state *c =
143 &kvm->arch.vpit->pit_state.channels[channel];
144 s64 d, t;
145 int counter;
146
147 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
148
fd668423 149 t = kpit_elapsed(kvm, c, channel);
7837699f
SY
150 d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC);
151
152 switch (c->mode) {
153 case 0:
154 case 1:
155 case 4:
156 case 5:
157 counter = (c->count - d) & 0xffff;
158 break;
159 case 3:
160 /* XXX: may be incorrect for odd counts */
161 counter = c->count - (mod_64((2 * d), c->count));
162 break;
163 default:
164 counter = c->count - mod_64(d, c->count);
165 break;
166 }
167 return counter;
168}
169
170static int pit_get_out(struct kvm *kvm, int channel)
171{
172 struct kvm_kpit_channel_state *c =
173 &kvm->arch.vpit->pit_state.channels[channel];
174 s64 d, t;
175 int out;
176
177 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
178
fd668423 179 t = kpit_elapsed(kvm, c, channel);
7837699f
SY
180 d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC);
181
182 switch (c->mode) {
183 default:
184 case 0:
185 out = (d >= c->count);
186 break;
187 case 1:
188 out = (d < c->count);
189 break;
190 case 2:
191 out = ((mod_64(d, c->count) == 0) && (d != 0));
192 break;
193 case 3:
194 out = (mod_64(d, c->count) < ((c->count + 1) >> 1));
195 break;
196 case 4:
197 case 5:
198 out = (d == c->count);
199 break;
200 }
201
202 return out;
203}
204
205static void pit_latch_count(struct kvm *kvm, int channel)
206{
207 struct kvm_kpit_channel_state *c =
208 &kvm->arch.vpit->pit_state.channels[channel];
209
210 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
211
212 if (!c->count_latched) {
213 c->latched_count = pit_get_count(kvm, channel);
214 c->count_latched = c->rw_mode;
215 }
216}
217
218static void pit_latch_status(struct kvm *kvm, int channel)
219{
220 struct kvm_kpit_channel_state *c =
221 &kvm->arch.vpit->pit_state.channels[channel];
222
223 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
224
225 if (!c->status_latched) {
226 /* TODO: Return NULL COUNT (bit 6). */
227 c->status = ((pit_get_out(kvm, channel) << 7) |
228 (c->rw_mode << 4) |
229 (c->mode << 1) |
230 c->bcd);
231 c->status_latched = 1;
232 }
233}
234
ee032c99 235static void kvm_pit_ack_irq(struct kvm_irq_ack_notifier *kian)
3cf57fed
MT
236{
237 struct kvm_kpit_state *ps = container_of(kian, struct kvm_kpit_state,
238 irq_ack_notifier);
33572ac0
CL
239 int value;
240
241 spin_lock(&ps->inject_lock);
242 value = atomic_dec_return(&ps->pit_timer.pending);
243 if (value < 0)
244 /* spurious acks can be generated if, for example, the
245 * PIC is being reset. Handle it gracefully here
246 */
dc7404ce 247 atomic_inc(&ps->pit_timer.pending);
33572ac0
CL
248 else if (value > 0)
249 /* in this case, we had multiple outstanding pit interrupts
250 * that we needed to inject. Reinject
251 */
252 queue_work(ps->pit->wq, &ps->pit->expired);
3cf57fed 253 ps->irq_ack = 1;
33572ac0 254 spin_unlock(&ps->inject_lock);
3cf57fed
MT
255}
256
2f599714
MT
257void __kvm_migrate_pit_timer(struct kvm_vcpu *vcpu)
258{
259 struct kvm_pit *pit = vcpu->kvm->arch.vpit;
260 struct hrtimer *timer;
261
c5af89b6 262 if (!kvm_vcpu_is_bsp(vcpu) || !pit)
2f599714
MT
263 return;
264
265 timer = &pit->pit_state.pit_timer.timer;
266 if (hrtimer_cancel(timer))
beb20d52 267 hrtimer_start_expires(timer, HRTIMER_MODE_ABS);
2f599714
MT
268}
269
33572ac0 270static void destroy_pit_timer(struct kvm_pit *pit)
7837699f 271{
33572ac0
CL
272 hrtimer_cancel(&pit->pit_state.pit_timer.timer);
273 cancel_work_sync(&pit->expired);
7837699f
SY
274}
275
d3c7b77d
MT
276static bool kpit_is_periodic(struct kvm_timer *ktimer)
277{
278 struct kvm_kpit_state *ps = container_of(ktimer, struct kvm_kpit_state,
279 pit_timer);
280 return ps->is_periodic;
281}
282
386eb6e8 283static struct kvm_timer_ops kpit_ops = {
d3c7b77d
MT
284 .is_periodic = kpit_is_periodic,
285};
286
33572ac0
CL
287static void pit_do_work(struct work_struct *work)
288{
289 struct kvm_pit *pit = container_of(work, struct kvm_pit, expired);
290 struct kvm *kvm = pit->kvm;
291 struct kvm_vcpu *vcpu;
292 int i;
293 struct kvm_kpit_state *ps = &pit->pit_state;
294 int inject = 0;
295
296 /* Try to inject pending interrupts when
297 * last one has been acked.
298 */
299 spin_lock(&ps->inject_lock);
300 if (ps->irq_ack) {
301 ps->irq_ack = 0;
302 inject = 1;
303 }
304 spin_unlock(&ps->inject_lock);
305 if (inject) {
306 kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 1);
307 kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 0);
308
309 /*
310 * Provides NMI watchdog support via Virtual Wire mode.
311 * The route is: PIT -> PIC -> LVT0 in NMI mode.
312 *
313 * Note: Our Virtual Wire implementation is simplified, only
314 * propagating PIT interrupts to all VCPUs when they have set
315 * LVT0 to NMI delivery. Other PIC interrupts are just sent to
316 * VCPU0, and only if its LVT0 is in EXTINT mode.
317 */
318 if (kvm->arch.vapics_in_nmi_mode > 0)
319 kvm_for_each_vcpu(i, vcpu, kvm)
320 kvm_apic_nmi_wd_deliver(vcpu);
321 }
322}
323
324static enum hrtimer_restart pit_timer_fn(struct hrtimer *data)
325{
326 struct kvm_timer *ktimer = container_of(data, struct kvm_timer, timer);
327 struct kvm_pit *pt = ktimer->kvm->arch.vpit;
328
329 if (ktimer->reinject || !atomic_read(&ktimer->pending)) {
330 atomic_inc(&ktimer->pending);
331 queue_work(pt->wq, &pt->expired);
332 }
333
334 if (ktimer->t_ops->is_periodic(ktimer)) {
335 hrtimer_add_expires_ns(&ktimer->timer, ktimer->period);
336 return HRTIMER_RESTART;
337 } else
338 return HRTIMER_NORESTART;
339}
340
0924ab2c 341static void create_pit_timer(struct kvm *kvm, u32 val, int is_period)
7837699f 342{
0924ab2c 343 struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state;
d3c7b77d 344 struct kvm_timer *pt = &ps->pit_timer;
7837699f
SY
345 s64 interval;
346
0924ab2c
JK
347 if (!irqchip_in_kernel(kvm))
348 return;
349
7837699f
SY
350 interval = muldiv64(val, NSEC_PER_SEC, KVM_PIT_FREQ);
351
a78d9626 352 pr_debug("create pit timer, interval is %llu nsec\n", interval);
7837699f
SY
353
354 /* TODO The new value only affected after the retriggered */
355 hrtimer_cancel(&pt->timer);
33572ac0 356 cancel_work_sync(&ps->pit->expired);
ede2ccc5 357 pt->period = interval;
d3c7b77d
MT
358 ps->is_periodic = is_period;
359
33572ac0 360 pt->timer.function = pit_timer_fn;
d3c7b77d
MT
361 pt->t_ops = &kpit_ops;
362 pt->kvm = ps->pit->kvm;
d3c7b77d 363
7837699f 364 atomic_set(&pt->pending, 0);
3cf57fed 365 ps->irq_ack = 1;
7837699f
SY
366
367 hrtimer_start(&pt->timer, ktime_add_ns(ktime_get(), interval),
368 HRTIMER_MODE_ABS);
369}
370
371static void pit_load_count(struct kvm *kvm, int channel, u32 val)
372{
373 struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state;
374
375 WARN_ON(!mutex_is_locked(&ps->lock));
376
a78d9626 377 pr_debug("load_count val is %d, channel is %d\n", val, channel);
7837699f
SY
378
379 /*
ede2ccc5
MT
380 * The largest possible initial count is 0; this is equivalent
381 * to 216 for binary counting and 104 for BCD counting.
7837699f
SY
382 */
383 if (val == 0)
384 val = 0x10000;
385
7837699f
SY
386 ps->channels[channel].count = val;
387
fd668423
MT
388 if (channel != 0) {
389 ps->channels[channel].count_load_time = ktime_get();
7837699f 390 return;
fd668423 391 }
7837699f
SY
392
393 /* Two types of timer
394 * mode 1 is one shot, mode 2 is period, otherwise del timer */
395 switch (ps->channels[0].mode) {
ede2ccc5 396 case 0:
7837699f 397 case 1:
ece15bab
MT
398 /* FIXME: enhance mode 4 precision */
399 case 4:
e9f42757 400 if (!(ps->flags & KVM_PIT_FLAGS_HPET_LEGACY)) {
0924ab2c 401 create_pit_timer(kvm, val, 0);
e9f42757 402 }
7837699f
SY
403 break;
404 case 2:
f6975545 405 case 3:
e9f42757 406 if (!(ps->flags & KVM_PIT_FLAGS_HPET_LEGACY)){
0924ab2c 407 create_pit_timer(kvm, val, 1);
e9f42757 408 }
7837699f
SY
409 break;
410 default:
33572ac0 411 destroy_pit_timer(kvm->arch.vpit);
7837699f
SY
412 }
413}
414
e9f42757 415void kvm_pit_load_count(struct kvm *kvm, int channel, u32 val, int hpet_legacy_start)
e0f63cb9 416{
e9f42757
BK
417 u8 saved_mode;
418 if (hpet_legacy_start) {
419 /* save existing mode for later reenablement */
420 saved_mode = kvm->arch.vpit->pit_state.channels[0].mode;
421 kvm->arch.vpit->pit_state.channels[0].mode = 0xff; /* disable timer */
422 pit_load_count(kvm, channel, val);
423 kvm->arch.vpit->pit_state.channels[0].mode = saved_mode;
424 } else {
425 pit_load_count(kvm, channel, val);
426 }
e0f63cb9
SY
427}
428
d76685c4
GH
429static inline struct kvm_pit *dev_to_pit(struct kvm_io_device *dev)
430{
431 return container_of(dev, struct kvm_pit, dev);
432}
433
434static inline struct kvm_pit *speaker_to_pit(struct kvm_io_device *dev)
435{
436 return container_of(dev, struct kvm_pit, speaker_dev);
437}
438
bda9020e
MT
439static inline int pit_in_range(gpa_t addr)
440{
441 return ((addr >= KVM_PIT_BASE_ADDRESS) &&
442 (addr < KVM_PIT_BASE_ADDRESS + KVM_PIT_MEM_LENGTH));
443}
444
445static int pit_ioport_write(struct kvm_io_device *this,
446 gpa_t addr, int len, const void *data)
7837699f 447{
d76685c4 448 struct kvm_pit *pit = dev_to_pit(this);
7837699f
SY
449 struct kvm_kpit_state *pit_state = &pit->pit_state;
450 struct kvm *kvm = pit->kvm;
451 int channel, access;
452 struct kvm_kpit_channel_state *s;
453 u32 val = *(u32 *) data;
bda9020e
MT
454 if (!pit_in_range(addr))
455 return -EOPNOTSUPP;
7837699f
SY
456
457 val &= 0xff;
458 addr &= KVM_PIT_CHANNEL_MASK;
459
460 mutex_lock(&pit_state->lock);
461
462 if (val != 0)
a78d9626
JP
463 pr_debug("write addr is 0x%x, len is %d, val is 0x%x\n",
464 (unsigned int)addr, len, val);
7837699f
SY
465
466 if (addr == 3) {
467 channel = val >> 6;
468 if (channel == 3) {
469 /* Read-Back Command. */
470 for (channel = 0; channel < 3; channel++) {
471 s = &pit_state->channels[channel];
472 if (val & (2 << channel)) {
473 if (!(val & 0x20))
474 pit_latch_count(kvm, channel);
475 if (!(val & 0x10))
476 pit_latch_status(kvm, channel);
477 }
478 }
479 } else {
480 /* Select Counter <channel>. */
481 s = &pit_state->channels[channel];
482 access = (val >> 4) & KVM_PIT_CHANNEL_MASK;
483 if (access == 0) {
484 pit_latch_count(kvm, channel);
485 } else {
486 s->rw_mode = access;
487 s->read_state = access;
488 s->write_state = access;
489 s->mode = (val >> 1) & 7;
490 if (s->mode > 5)
491 s->mode -= 4;
492 s->bcd = val & 1;
493 }
494 }
495 } else {
496 /* Write Count. */
497 s = &pit_state->channels[addr];
498 switch (s->write_state) {
499 default:
500 case RW_STATE_LSB:
501 pit_load_count(kvm, addr, val);
502 break;
503 case RW_STATE_MSB:
504 pit_load_count(kvm, addr, val << 8);
505 break;
506 case RW_STATE_WORD0:
507 s->write_latch = val;
508 s->write_state = RW_STATE_WORD1;
509 break;
510 case RW_STATE_WORD1:
511 pit_load_count(kvm, addr, s->write_latch | (val << 8));
512 s->write_state = RW_STATE_WORD0;
513 break;
514 }
515 }
516
517 mutex_unlock(&pit_state->lock);
bda9020e 518 return 0;
7837699f
SY
519}
520
bda9020e
MT
521static int pit_ioport_read(struct kvm_io_device *this,
522 gpa_t addr, int len, void *data)
7837699f 523{
d76685c4 524 struct kvm_pit *pit = dev_to_pit(this);
7837699f
SY
525 struct kvm_kpit_state *pit_state = &pit->pit_state;
526 struct kvm *kvm = pit->kvm;
527 int ret, count;
528 struct kvm_kpit_channel_state *s;
bda9020e
MT
529 if (!pit_in_range(addr))
530 return -EOPNOTSUPP;
7837699f
SY
531
532 addr &= KVM_PIT_CHANNEL_MASK;
ee73f656
MT
533 if (addr == 3)
534 return 0;
535
7837699f
SY
536 s = &pit_state->channels[addr];
537
538 mutex_lock(&pit_state->lock);
539
540 if (s->status_latched) {
541 s->status_latched = 0;
542 ret = s->status;
543 } else if (s->count_latched) {
544 switch (s->count_latched) {
545 default:
546 case RW_STATE_LSB:
547 ret = s->latched_count & 0xff;
548 s->count_latched = 0;
549 break;
550 case RW_STATE_MSB:
551 ret = s->latched_count >> 8;
552 s->count_latched = 0;
553 break;
554 case RW_STATE_WORD0:
555 ret = s->latched_count & 0xff;
556 s->count_latched = RW_STATE_MSB;
557 break;
558 }
559 } else {
560 switch (s->read_state) {
561 default:
562 case RW_STATE_LSB:
563 count = pit_get_count(kvm, addr);
564 ret = count & 0xff;
565 break;
566 case RW_STATE_MSB:
567 count = pit_get_count(kvm, addr);
568 ret = (count >> 8) & 0xff;
569 break;
570 case RW_STATE_WORD0:
571 count = pit_get_count(kvm, addr);
572 ret = count & 0xff;
573 s->read_state = RW_STATE_WORD1;
574 break;
575 case RW_STATE_WORD1:
576 count = pit_get_count(kvm, addr);
577 ret = (count >> 8) & 0xff;
578 s->read_state = RW_STATE_WORD0;
579 break;
580 }
581 }
582
583 if (len > sizeof(ret))
584 len = sizeof(ret);
585 memcpy(data, (char *)&ret, len);
586
587 mutex_unlock(&pit_state->lock);
bda9020e 588 return 0;
7837699f
SY
589}
590
bda9020e
MT
591static int speaker_ioport_write(struct kvm_io_device *this,
592 gpa_t addr, int len, const void *data)
7837699f 593{
d76685c4 594 struct kvm_pit *pit = speaker_to_pit(this);
7837699f
SY
595 struct kvm_kpit_state *pit_state = &pit->pit_state;
596 struct kvm *kvm = pit->kvm;
597 u32 val = *(u32 *) data;
bda9020e
MT
598 if (addr != KVM_SPEAKER_BASE_ADDRESS)
599 return -EOPNOTSUPP;
7837699f
SY
600
601 mutex_lock(&pit_state->lock);
602 pit_state->speaker_data_on = (val >> 1) & 1;
603 pit_set_gate(kvm, 2, val & 1);
604 mutex_unlock(&pit_state->lock);
bda9020e 605 return 0;
7837699f
SY
606}
607
bda9020e
MT
608static int speaker_ioport_read(struct kvm_io_device *this,
609 gpa_t addr, int len, void *data)
7837699f 610{
d76685c4 611 struct kvm_pit *pit = speaker_to_pit(this);
7837699f
SY
612 struct kvm_kpit_state *pit_state = &pit->pit_state;
613 struct kvm *kvm = pit->kvm;
614 unsigned int refresh_clock;
615 int ret;
bda9020e
MT
616 if (addr != KVM_SPEAKER_BASE_ADDRESS)
617 return -EOPNOTSUPP;
7837699f
SY
618
619 /* Refresh clock toggles at about 15us. We approximate as 2^14ns. */
620 refresh_clock = ((unsigned int)ktime_to_ns(ktime_get()) >> 14) & 1;
621
622 mutex_lock(&pit_state->lock);
623 ret = ((pit_state->speaker_data_on << 1) | pit_get_gate(kvm, 2) |
624 (pit_get_out(kvm, 2) << 5) | (refresh_clock << 4));
625 if (len > sizeof(ret))
626 len = sizeof(ret);
627 memcpy(data, (char *)&ret, len);
628 mutex_unlock(&pit_state->lock);
bda9020e 629 return 0;
7837699f
SY
630}
631
308b0f23 632void kvm_pit_reset(struct kvm_pit *pit)
7837699f
SY
633{
634 int i;
308b0f23
SY
635 struct kvm_kpit_channel_state *c;
636
637 mutex_lock(&pit->pit_state.lock);
e9f42757 638 pit->pit_state.flags = 0;
308b0f23
SY
639 for (i = 0; i < 3; i++) {
640 c = &pit->pit_state.channels[i];
641 c->mode = 0xff;
642 c->gate = (i != 2);
643 pit_load_count(pit->kvm, i, 0);
644 }
645 mutex_unlock(&pit->pit_state.lock);
646
647 atomic_set(&pit->pit_state.pit_timer.pending, 0);
3cf57fed 648 pit->pit_state.irq_ack = 1;
308b0f23
SY
649}
650
4780c659
AK
651static void pit_mask_notifer(struct kvm_irq_mask_notifier *kimn, bool mask)
652{
653 struct kvm_pit *pit = container_of(kimn, struct kvm_pit, mask_notifier);
654
655 if (!mask) {
656 atomic_set(&pit->pit_state.pit_timer.pending, 0);
657 pit->pit_state.irq_ack = 1;
658 }
659}
660
d76685c4
GH
661static const struct kvm_io_device_ops pit_dev_ops = {
662 .read = pit_ioport_read,
663 .write = pit_ioport_write,
d76685c4
GH
664};
665
666static const struct kvm_io_device_ops speaker_dev_ops = {
667 .read = speaker_ioport_read,
668 .write = speaker_ioport_write,
d76685c4
GH
669};
670
79fac95e 671/* Caller must hold slots_lock */
c5ff41ce 672struct kvm_pit *kvm_create_pit(struct kvm *kvm, u32 flags)
308b0f23 673{
7837699f
SY
674 struct kvm_pit *pit;
675 struct kvm_kpit_state *pit_state;
090b7aff 676 int ret;
7837699f
SY
677
678 pit = kzalloc(sizeof(struct kvm_pit), GFP_KERNEL);
679 if (!pit)
680 return NULL;
681
5550af4d 682 pit->irq_source_id = kvm_request_irq_source_id(kvm);
e17d1dc0
AK
683 if (pit->irq_source_id < 0) {
684 kfree(pit);
5550af4d 685 return NULL;
e17d1dc0 686 }
5550af4d 687
7837699f
SY
688 mutex_init(&pit->pit_state.lock);
689 mutex_lock(&pit->pit_state.lock);
33572ac0
CL
690 spin_lock_init(&pit->pit_state.inject_lock);
691
692 pit->wq = create_singlethread_workqueue("kvm-pit-wq");
693 if (!pit->wq) {
673813e8 694 mutex_unlock(&pit->pit_state.lock);
6b5d7a9f 695 kvm_free_irq_source_id(kvm, pit->irq_source_id);
33572ac0
CL
696 kfree(pit);
697 return NULL;
698 }
699 INIT_WORK(&pit->expired, pit_do_work);
7837699f 700
7837699f
SY
701 kvm->arch.vpit = pit;
702 pit->kvm = kvm;
703
704 pit_state = &pit->pit_state;
705 pit_state->pit = pit;
706 hrtimer_init(&pit_state->pit_timer.timer,
707 CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
3cf57fed
MT
708 pit_state->irq_ack_notifier.gsi = 0;
709 pit_state->irq_ack_notifier.irq_acked = kvm_pit_ack_irq;
710 kvm_register_irq_ack_notifier(kvm, &pit_state->irq_ack_notifier);
52d939a0 711 pit_state->pit_timer.reinject = true;
7837699f
SY
712 mutex_unlock(&pit->pit_state.lock);
713
308b0f23 714 kvm_pit_reset(pit);
7837699f 715
4780c659
AK
716 pit->mask_notifier.func = pit_mask_notifer;
717 kvm_register_irq_mask_notifier(kvm, 0, &pit->mask_notifier);
718
6b66ac1a 719 kvm_iodevice_init(&pit->dev, &pit_dev_ops);
743eeb0b
SL
720 ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, KVM_PIT_BASE_ADDRESS,
721 KVM_PIT_MEM_LENGTH, &pit->dev);
090b7aff
GH
722 if (ret < 0)
723 goto fail;
6b66ac1a
GH
724
725 if (flags & KVM_PIT_SPEAKER_DUMMY) {
726 kvm_iodevice_init(&pit->speaker_dev, &speaker_dev_ops);
e93f8a0f 727 ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS,
743eeb0b
SL
728 KVM_SPEAKER_BASE_ADDRESS, 4,
729 &pit->speaker_dev);
090b7aff
GH
730 if (ret < 0)
731 goto fail_unregister;
6b66ac1a
GH
732 }
733
7837699f 734 return pit;
090b7aff
GH
735
736fail_unregister:
e93f8a0f 737 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &pit->dev);
090b7aff
GH
738
739fail:
d225f53b
WY
740 kvm_unregister_irq_mask_notifier(kvm, 0, &pit->mask_notifier);
741 kvm_unregister_irq_ack_notifier(kvm, &pit_state->irq_ack_notifier);
742 kvm_free_irq_source_id(kvm, pit->irq_source_id);
3185bf8c 743 destroy_workqueue(pit->wq);
090b7aff
GH
744 kfree(pit);
745 return NULL;
7837699f
SY
746}
747
748void kvm_free_pit(struct kvm *kvm)
749{
750 struct hrtimer *timer;
751
752 if (kvm->arch.vpit) {
aea924f6
XG
753 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &kvm->arch.vpit->dev);
754 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
755 &kvm->arch.vpit->speaker_dev);
4780c659
AK
756 kvm_unregister_irq_mask_notifier(kvm, 0,
757 &kvm->arch.vpit->mask_notifier);
84fde248
GN
758 kvm_unregister_irq_ack_notifier(kvm,
759 &kvm->arch.vpit->pit_state.irq_ack_notifier);
7837699f
SY
760 mutex_lock(&kvm->arch.vpit->pit_state.lock);
761 timer = &kvm->arch.vpit->pit_state.pit_timer.timer;
762 hrtimer_cancel(timer);
33572ac0 763 cancel_work_sync(&kvm->arch.vpit->expired);
5550af4d 764 kvm_free_irq_source_id(kvm, kvm->arch.vpit->irq_source_id);
7837699f 765 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
33572ac0 766 destroy_workqueue(kvm->arch.vpit->wq);
7837699f
SY
767 kfree(kvm->arch.vpit);
768 }
769}
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