KVM: Simplify kvm_pit_timer
[deliverable/linux.git] / arch / x86 / kvm / i8254.c
CommitLineData
7837699f
SY
1/*
2 * 8253/8254 interval timer emulation
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 * Copyright (c) 2006 Intel Corporation
6 * Copyright (c) 2007 Keir Fraser, XenSource Inc
7 * Copyright (c) 2008 Intel Corporation
9611c187 8 * Copyright 2009 Red Hat, Inc. and/or its affiliates.
7837699f
SY
9 *
10 * Permission is hereby granted, free of charge, to any person obtaining a copy
11 * of this software and associated documentation files (the "Software"), to deal
12 * in the Software without restriction, including without limitation the rights
13 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
14 * copies of the Software, and to permit persons to whom the Software is
15 * furnished to do so, subject to the following conditions:
16 *
17 * The above copyright notice and this permission notice shall be included in
18 * all copies or substantial portions of the Software.
19 *
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
23 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
24 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
25 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 * THE SOFTWARE.
27 *
28 * Authors:
29 * Sheng Yang <sheng.yang@intel.com>
30 * Based on QEMU and Xen.
31 */
32
a78d9626
JP
33#define pr_fmt(fmt) "pit: " fmt
34
7837699f 35#include <linux/kvm_host.h>
5a0e3ad6 36#include <linux/slab.h>
7837699f
SY
37
38#include "irq.h"
39#include "i8254.h"
40
41#ifndef CONFIG_X86_64
6f6d6a1a 42#define mod_64(x, y) ((x) - (y) * div64_u64(x, y))
7837699f
SY
43#else
44#define mod_64(x, y) ((x) % (y))
45#endif
46
47#define RW_STATE_LSB 1
48#define RW_STATE_MSB 2
49#define RW_STATE_WORD0 3
50#define RW_STATE_WORD1 4
51
52/* Compute with 96 bit intermediate result: (a*b)/c */
53static u64 muldiv64(u64 a, u32 b, u32 c)
54{
55 union {
56 u64 ll;
57 struct {
58 u32 low, high;
59 } l;
60 } u, res;
61 u64 rl, rh;
62
63 u.ll = a;
64 rl = (u64)u.l.low * (u64)b;
65 rh = (u64)u.l.high * (u64)b;
66 rh += (rl >> 32);
6f6d6a1a
RZ
67 res.l.high = div64_u64(rh, c);
68 res.l.low = div64_u64(((mod_64(rh, c) << 32) + (rl & 0xffffffff)), c);
7837699f
SY
69 return res.ll;
70}
71
72static void pit_set_gate(struct kvm *kvm, int channel, u32 val)
73{
74 struct kvm_kpit_channel_state *c =
75 &kvm->arch.vpit->pit_state.channels[channel];
76
77 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
78
79 switch (c->mode) {
80 default:
81 case 0:
82 case 4:
83 /* XXX: just disable/enable counting */
84 break;
85 case 1:
86 case 2:
87 case 3:
88 case 5:
89 /* Restart counting on rising edge. */
90 if (c->gate < val)
91 c->count_load_time = ktime_get();
92 break;
93 }
94
95 c->gate = val;
96}
97
8b2cf73c 98static int pit_get_gate(struct kvm *kvm, int channel)
7837699f
SY
99{
100 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
101
102 return kvm->arch.vpit->pit_state.channels[channel].gate;
103}
104
fd668423
MT
105static s64 __kpit_elapsed(struct kvm *kvm)
106{
107 s64 elapsed;
108 ktime_t remaining;
109 struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state;
110
0ff77873
MT
111 if (!ps->pit_timer.period)
112 return 0;
113
ede2ccc5
MT
114 /*
115 * The Counter does not stop when it reaches zero. In
116 * Modes 0, 1, 4, and 5 the Counter ``wraps around'' to
117 * the highest count, either FFFF hex for binary counting
118 * or 9999 for BCD counting, and continues counting.
119 * Modes 2 and 3 are periodic; the Counter reloads
120 * itself with the initial count and continues counting
121 * from there.
122 */
ace15464 123 remaining = hrtimer_get_remaining(&ps->pit_timer.timer);
ede2ccc5
MT
124 elapsed = ps->pit_timer.period - ktime_to_ns(remaining);
125 elapsed = mod_64(elapsed, ps->pit_timer.period);
fd668423
MT
126
127 return elapsed;
128}
129
130static s64 kpit_elapsed(struct kvm *kvm, struct kvm_kpit_channel_state *c,
131 int channel)
132{
133 if (channel == 0)
134 return __kpit_elapsed(kvm);
135
136 return ktime_to_ns(ktime_sub(ktime_get(), c->count_load_time));
137}
138
7837699f
SY
139static int pit_get_count(struct kvm *kvm, int channel)
140{
141 struct kvm_kpit_channel_state *c =
142 &kvm->arch.vpit->pit_state.channels[channel];
143 s64 d, t;
144 int counter;
145
146 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
147
fd668423 148 t = kpit_elapsed(kvm, c, channel);
7837699f
SY
149 d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC);
150
151 switch (c->mode) {
152 case 0:
153 case 1:
154 case 4:
155 case 5:
156 counter = (c->count - d) & 0xffff;
157 break;
158 case 3:
159 /* XXX: may be incorrect for odd counts */
160 counter = c->count - (mod_64((2 * d), c->count));
161 break;
162 default:
163 counter = c->count - mod_64(d, c->count);
164 break;
165 }
166 return counter;
167}
168
169static int pit_get_out(struct kvm *kvm, int channel)
170{
171 struct kvm_kpit_channel_state *c =
172 &kvm->arch.vpit->pit_state.channels[channel];
173 s64 d, t;
174 int out;
175
176 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
177
fd668423 178 t = kpit_elapsed(kvm, c, channel);
7837699f
SY
179 d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC);
180
181 switch (c->mode) {
182 default:
183 case 0:
184 out = (d >= c->count);
185 break;
186 case 1:
187 out = (d < c->count);
188 break;
189 case 2:
190 out = ((mod_64(d, c->count) == 0) && (d != 0));
191 break;
192 case 3:
193 out = (mod_64(d, c->count) < ((c->count + 1) >> 1));
194 break;
195 case 4:
196 case 5:
197 out = (d == c->count);
198 break;
199 }
200
201 return out;
202}
203
204static void pit_latch_count(struct kvm *kvm, int channel)
205{
206 struct kvm_kpit_channel_state *c =
207 &kvm->arch.vpit->pit_state.channels[channel];
208
209 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
210
211 if (!c->count_latched) {
212 c->latched_count = pit_get_count(kvm, channel);
213 c->count_latched = c->rw_mode;
214 }
215}
216
217static void pit_latch_status(struct kvm *kvm, int channel)
218{
219 struct kvm_kpit_channel_state *c =
220 &kvm->arch.vpit->pit_state.channels[channel];
221
222 WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
223
224 if (!c->status_latched) {
225 /* TODO: Return NULL COUNT (bit 6). */
226 c->status = ((pit_get_out(kvm, channel) << 7) |
227 (c->rw_mode << 4) |
228 (c->mode << 1) |
229 c->bcd);
230 c->status_latched = 1;
231 }
232}
233
ee032c99 234static void kvm_pit_ack_irq(struct kvm_irq_ack_notifier *kian)
3cf57fed
MT
235{
236 struct kvm_kpit_state *ps = container_of(kian, struct kvm_kpit_state,
237 irq_ack_notifier);
33572ac0
CL
238 int value;
239
240 spin_lock(&ps->inject_lock);
241 value = atomic_dec_return(&ps->pit_timer.pending);
242 if (value < 0)
243 /* spurious acks can be generated if, for example, the
244 * PIC is being reset. Handle it gracefully here
245 */
dc7404ce 246 atomic_inc(&ps->pit_timer.pending);
33572ac0
CL
247 else if (value > 0)
248 /* in this case, we had multiple outstanding pit interrupts
249 * that we needed to inject. Reinject
250 */
b6ddf05f 251 queue_kthread_work(&ps->pit->worker, &ps->pit->expired);
3cf57fed 252 ps->irq_ack = 1;
33572ac0 253 spin_unlock(&ps->inject_lock);
3cf57fed
MT
254}
255
2f599714
MT
256void __kvm_migrate_pit_timer(struct kvm_vcpu *vcpu)
257{
258 struct kvm_pit *pit = vcpu->kvm->arch.vpit;
259 struct hrtimer *timer;
260
c5af89b6 261 if (!kvm_vcpu_is_bsp(vcpu) || !pit)
2f599714
MT
262 return;
263
264 timer = &pit->pit_state.pit_timer.timer;
265 if (hrtimer_cancel(timer))
beb20d52 266 hrtimer_start_expires(timer, HRTIMER_MODE_ABS);
2f599714
MT
267}
268
33572ac0 269static void destroy_pit_timer(struct kvm_pit *pit)
7837699f 270{
33572ac0 271 hrtimer_cancel(&pit->pit_state.pit_timer.timer);
b6ddf05f 272 flush_kthread_work(&pit->expired);
7837699f
SY
273}
274
b6ddf05f 275static void pit_do_work(struct kthread_work *work)
33572ac0
CL
276{
277 struct kvm_pit *pit = container_of(work, struct kvm_pit, expired);
278 struct kvm *kvm = pit->kvm;
279 struct kvm_vcpu *vcpu;
280 int i;
281 struct kvm_kpit_state *ps = &pit->pit_state;
282 int inject = 0;
283
284 /* Try to inject pending interrupts when
285 * last one has been acked.
286 */
287 spin_lock(&ps->inject_lock);
288 if (ps->irq_ack) {
289 ps->irq_ack = 0;
290 inject = 1;
291 }
292 spin_unlock(&ps->inject_lock);
293 if (inject) {
294 kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 1);
295 kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 0);
296
297 /*
298 * Provides NMI watchdog support via Virtual Wire mode.
299 * The route is: PIT -> PIC -> LVT0 in NMI mode.
300 *
301 * Note: Our Virtual Wire implementation is simplified, only
302 * propagating PIT interrupts to all VCPUs when they have set
303 * LVT0 to NMI delivery. Other PIC interrupts are just sent to
304 * VCPU0, and only if its LVT0 is in EXTINT mode.
305 */
306 if (kvm->arch.vapics_in_nmi_mode > 0)
307 kvm_for_each_vcpu(i, vcpu, kvm)
308 kvm_apic_nmi_wd_deliver(vcpu);
309 }
310}
311
312static enum hrtimer_restart pit_timer_fn(struct hrtimer *data)
313{
e9d90d47 314 struct kvm_pit_timer *ktimer = container_of(data, struct kvm_pit_timer, timer);
33572ac0
CL
315 struct kvm_pit *pt = ktimer->kvm->arch.vpit;
316
317 if (ktimer->reinject || !atomic_read(&ktimer->pending)) {
318 atomic_inc(&ktimer->pending);
b6ddf05f 319 queue_kthread_work(&pt->worker, &pt->expired);
33572ac0
CL
320 }
321
9d9d2239 322 if (pt->pit_state.is_periodic) {
33572ac0
CL
323 hrtimer_add_expires_ns(&ktimer->timer, ktimer->period);
324 return HRTIMER_RESTART;
325 } else
326 return HRTIMER_NORESTART;
327}
328
0924ab2c 329static void create_pit_timer(struct kvm *kvm, u32 val, int is_period)
7837699f 330{
0924ab2c 331 struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state;
e9d90d47 332 struct kvm_pit_timer *pt = &ps->pit_timer;
7837699f
SY
333 s64 interval;
334
a647795e 335 if (!irqchip_in_kernel(kvm) || ps->flags & KVM_PIT_FLAGS_HPET_LEGACY)
0924ab2c
JK
336 return;
337
7837699f
SY
338 interval = muldiv64(val, NSEC_PER_SEC, KVM_PIT_FREQ);
339
a78d9626 340 pr_debug("create pit timer, interval is %llu nsec\n", interval);
7837699f
SY
341
342 /* TODO The new value only affected after the retriggered */
343 hrtimer_cancel(&pt->timer);
b6ddf05f 344 flush_kthread_work(&ps->pit->expired);
ede2ccc5 345 pt->period = interval;
d3c7b77d
MT
346 ps->is_periodic = is_period;
347
33572ac0 348 pt->timer.function = pit_timer_fn;
d3c7b77d 349 pt->kvm = ps->pit->kvm;
d3c7b77d 350
7837699f 351 atomic_set(&pt->pending, 0);
3cf57fed 352 ps->irq_ack = 1;
7837699f
SY
353
354 hrtimer_start(&pt->timer, ktime_add_ns(ktime_get(), interval),
355 HRTIMER_MODE_ABS);
356}
357
358static void pit_load_count(struct kvm *kvm, int channel, u32 val)
359{
360 struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state;
361
362 WARN_ON(!mutex_is_locked(&ps->lock));
363
a78d9626 364 pr_debug("load_count val is %d, channel is %d\n", val, channel);
7837699f
SY
365
366 /*
ede2ccc5
MT
367 * The largest possible initial count is 0; this is equivalent
368 * to 216 for binary counting and 104 for BCD counting.
7837699f
SY
369 */
370 if (val == 0)
371 val = 0x10000;
372
7837699f
SY
373 ps->channels[channel].count = val;
374
fd668423
MT
375 if (channel != 0) {
376 ps->channels[channel].count_load_time = ktime_get();
7837699f 377 return;
fd668423 378 }
7837699f
SY
379
380 /* Two types of timer
381 * mode 1 is one shot, mode 2 is period, otherwise del timer */
382 switch (ps->channels[0].mode) {
ede2ccc5 383 case 0:
7837699f 384 case 1:
ece15bab
MT
385 /* FIXME: enhance mode 4 precision */
386 case 4:
a647795e 387 create_pit_timer(kvm, val, 0);
7837699f
SY
388 break;
389 case 2:
f6975545 390 case 3:
a647795e 391 create_pit_timer(kvm, val, 1);
7837699f
SY
392 break;
393 default:
33572ac0 394 destroy_pit_timer(kvm->arch.vpit);
7837699f
SY
395 }
396}
397
e9f42757 398void kvm_pit_load_count(struct kvm *kvm, int channel, u32 val, int hpet_legacy_start)
e0f63cb9 399{
e9f42757
BK
400 u8 saved_mode;
401 if (hpet_legacy_start) {
402 /* save existing mode for later reenablement */
403 saved_mode = kvm->arch.vpit->pit_state.channels[0].mode;
404 kvm->arch.vpit->pit_state.channels[0].mode = 0xff; /* disable timer */
405 pit_load_count(kvm, channel, val);
406 kvm->arch.vpit->pit_state.channels[0].mode = saved_mode;
407 } else {
408 pit_load_count(kvm, channel, val);
409 }
e0f63cb9
SY
410}
411
d76685c4
GH
412static inline struct kvm_pit *dev_to_pit(struct kvm_io_device *dev)
413{
414 return container_of(dev, struct kvm_pit, dev);
415}
416
417static inline struct kvm_pit *speaker_to_pit(struct kvm_io_device *dev)
418{
419 return container_of(dev, struct kvm_pit, speaker_dev);
420}
421
bda9020e
MT
422static inline int pit_in_range(gpa_t addr)
423{
424 return ((addr >= KVM_PIT_BASE_ADDRESS) &&
425 (addr < KVM_PIT_BASE_ADDRESS + KVM_PIT_MEM_LENGTH));
426}
427
428static int pit_ioport_write(struct kvm_io_device *this,
429 gpa_t addr, int len, const void *data)
7837699f 430{
d76685c4 431 struct kvm_pit *pit = dev_to_pit(this);
7837699f
SY
432 struct kvm_kpit_state *pit_state = &pit->pit_state;
433 struct kvm *kvm = pit->kvm;
434 int channel, access;
435 struct kvm_kpit_channel_state *s;
436 u32 val = *(u32 *) data;
bda9020e
MT
437 if (!pit_in_range(addr))
438 return -EOPNOTSUPP;
7837699f
SY
439
440 val &= 0xff;
441 addr &= KVM_PIT_CHANNEL_MASK;
442
443 mutex_lock(&pit_state->lock);
444
445 if (val != 0)
a78d9626
JP
446 pr_debug("write addr is 0x%x, len is %d, val is 0x%x\n",
447 (unsigned int)addr, len, val);
7837699f
SY
448
449 if (addr == 3) {
450 channel = val >> 6;
451 if (channel == 3) {
452 /* Read-Back Command. */
453 for (channel = 0; channel < 3; channel++) {
454 s = &pit_state->channels[channel];
455 if (val & (2 << channel)) {
456 if (!(val & 0x20))
457 pit_latch_count(kvm, channel);
458 if (!(val & 0x10))
459 pit_latch_status(kvm, channel);
460 }
461 }
462 } else {
463 /* Select Counter <channel>. */
464 s = &pit_state->channels[channel];
465 access = (val >> 4) & KVM_PIT_CHANNEL_MASK;
466 if (access == 0) {
467 pit_latch_count(kvm, channel);
468 } else {
469 s->rw_mode = access;
470 s->read_state = access;
471 s->write_state = access;
472 s->mode = (val >> 1) & 7;
473 if (s->mode > 5)
474 s->mode -= 4;
475 s->bcd = val & 1;
476 }
477 }
478 } else {
479 /* Write Count. */
480 s = &pit_state->channels[addr];
481 switch (s->write_state) {
482 default:
483 case RW_STATE_LSB:
484 pit_load_count(kvm, addr, val);
485 break;
486 case RW_STATE_MSB:
487 pit_load_count(kvm, addr, val << 8);
488 break;
489 case RW_STATE_WORD0:
490 s->write_latch = val;
491 s->write_state = RW_STATE_WORD1;
492 break;
493 case RW_STATE_WORD1:
494 pit_load_count(kvm, addr, s->write_latch | (val << 8));
495 s->write_state = RW_STATE_WORD0;
496 break;
497 }
498 }
499
500 mutex_unlock(&pit_state->lock);
bda9020e 501 return 0;
7837699f
SY
502}
503
bda9020e
MT
504static int pit_ioport_read(struct kvm_io_device *this,
505 gpa_t addr, int len, void *data)
7837699f 506{
d76685c4 507 struct kvm_pit *pit = dev_to_pit(this);
7837699f
SY
508 struct kvm_kpit_state *pit_state = &pit->pit_state;
509 struct kvm *kvm = pit->kvm;
510 int ret, count;
511 struct kvm_kpit_channel_state *s;
bda9020e
MT
512 if (!pit_in_range(addr))
513 return -EOPNOTSUPP;
7837699f
SY
514
515 addr &= KVM_PIT_CHANNEL_MASK;
ee73f656
MT
516 if (addr == 3)
517 return 0;
518
7837699f
SY
519 s = &pit_state->channels[addr];
520
521 mutex_lock(&pit_state->lock);
522
523 if (s->status_latched) {
524 s->status_latched = 0;
525 ret = s->status;
526 } else if (s->count_latched) {
527 switch (s->count_latched) {
528 default:
529 case RW_STATE_LSB:
530 ret = s->latched_count & 0xff;
531 s->count_latched = 0;
532 break;
533 case RW_STATE_MSB:
534 ret = s->latched_count >> 8;
535 s->count_latched = 0;
536 break;
537 case RW_STATE_WORD0:
538 ret = s->latched_count & 0xff;
539 s->count_latched = RW_STATE_MSB;
540 break;
541 }
542 } else {
543 switch (s->read_state) {
544 default:
545 case RW_STATE_LSB:
546 count = pit_get_count(kvm, addr);
547 ret = count & 0xff;
548 break;
549 case RW_STATE_MSB:
550 count = pit_get_count(kvm, addr);
551 ret = (count >> 8) & 0xff;
552 break;
553 case RW_STATE_WORD0:
554 count = pit_get_count(kvm, addr);
555 ret = count & 0xff;
556 s->read_state = RW_STATE_WORD1;
557 break;
558 case RW_STATE_WORD1:
559 count = pit_get_count(kvm, addr);
560 ret = (count >> 8) & 0xff;
561 s->read_state = RW_STATE_WORD0;
562 break;
563 }
564 }
565
566 if (len > sizeof(ret))
567 len = sizeof(ret);
568 memcpy(data, (char *)&ret, len);
569
570 mutex_unlock(&pit_state->lock);
bda9020e 571 return 0;
7837699f
SY
572}
573
bda9020e
MT
574static int speaker_ioport_write(struct kvm_io_device *this,
575 gpa_t addr, int len, const void *data)
7837699f 576{
d76685c4 577 struct kvm_pit *pit = speaker_to_pit(this);
7837699f
SY
578 struct kvm_kpit_state *pit_state = &pit->pit_state;
579 struct kvm *kvm = pit->kvm;
580 u32 val = *(u32 *) data;
bda9020e
MT
581 if (addr != KVM_SPEAKER_BASE_ADDRESS)
582 return -EOPNOTSUPP;
7837699f
SY
583
584 mutex_lock(&pit_state->lock);
585 pit_state->speaker_data_on = (val >> 1) & 1;
586 pit_set_gate(kvm, 2, val & 1);
587 mutex_unlock(&pit_state->lock);
bda9020e 588 return 0;
7837699f
SY
589}
590
bda9020e
MT
591static int speaker_ioport_read(struct kvm_io_device *this,
592 gpa_t addr, int len, void *data)
7837699f 593{
d76685c4 594 struct kvm_pit *pit = speaker_to_pit(this);
7837699f
SY
595 struct kvm_kpit_state *pit_state = &pit->pit_state;
596 struct kvm *kvm = pit->kvm;
597 unsigned int refresh_clock;
598 int ret;
bda9020e
MT
599 if (addr != KVM_SPEAKER_BASE_ADDRESS)
600 return -EOPNOTSUPP;
7837699f
SY
601
602 /* Refresh clock toggles at about 15us. We approximate as 2^14ns. */
603 refresh_clock = ((unsigned int)ktime_to_ns(ktime_get()) >> 14) & 1;
604
605 mutex_lock(&pit_state->lock);
606 ret = ((pit_state->speaker_data_on << 1) | pit_get_gate(kvm, 2) |
607 (pit_get_out(kvm, 2) << 5) | (refresh_clock << 4));
608 if (len > sizeof(ret))
609 len = sizeof(ret);
610 memcpy(data, (char *)&ret, len);
611 mutex_unlock(&pit_state->lock);
bda9020e 612 return 0;
7837699f
SY
613}
614
308b0f23 615void kvm_pit_reset(struct kvm_pit *pit)
7837699f
SY
616{
617 int i;
308b0f23
SY
618 struct kvm_kpit_channel_state *c;
619
620 mutex_lock(&pit->pit_state.lock);
e9f42757 621 pit->pit_state.flags = 0;
308b0f23
SY
622 for (i = 0; i < 3; i++) {
623 c = &pit->pit_state.channels[i];
624 c->mode = 0xff;
625 c->gate = (i != 2);
626 pit_load_count(pit->kvm, i, 0);
627 }
628 mutex_unlock(&pit->pit_state.lock);
629
630 atomic_set(&pit->pit_state.pit_timer.pending, 0);
3cf57fed 631 pit->pit_state.irq_ack = 1;
308b0f23
SY
632}
633
4780c659
AK
634static void pit_mask_notifer(struct kvm_irq_mask_notifier *kimn, bool mask)
635{
636 struct kvm_pit *pit = container_of(kimn, struct kvm_pit, mask_notifier);
637
638 if (!mask) {
639 atomic_set(&pit->pit_state.pit_timer.pending, 0);
640 pit->pit_state.irq_ack = 1;
641 }
642}
643
d76685c4
GH
644static const struct kvm_io_device_ops pit_dev_ops = {
645 .read = pit_ioport_read,
646 .write = pit_ioport_write,
d76685c4
GH
647};
648
649static const struct kvm_io_device_ops speaker_dev_ops = {
650 .read = speaker_ioport_read,
651 .write = speaker_ioport_write,
d76685c4
GH
652};
653
79fac95e 654/* Caller must hold slots_lock */
c5ff41ce 655struct kvm_pit *kvm_create_pit(struct kvm *kvm, u32 flags)
308b0f23 656{
7837699f
SY
657 struct kvm_pit *pit;
658 struct kvm_kpit_state *pit_state;
b6ddf05f
JK
659 struct pid *pid;
660 pid_t pid_nr;
090b7aff 661 int ret;
7837699f
SY
662
663 pit = kzalloc(sizeof(struct kvm_pit), GFP_KERNEL);
664 if (!pit)
665 return NULL;
666
5550af4d 667 pit->irq_source_id = kvm_request_irq_source_id(kvm);
e17d1dc0
AK
668 if (pit->irq_source_id < 0) {
669 kfree(pit);
5550af4d 670 return NULL;
e17d1dc0 671 }
5550af4d 672
7837699f
SY
673 mutex_init(&pit->pit_state.lock);
674 mutex_lock(&pit->pit_state.lock);
33572ac0
CL
675 spin_lock_init(&pit->pit_state.inject_lock);
676
b6ddf05f
JK
677 pid = get_pid(task_tgid(current));
678 pid_nr = pid_vnr(pid);
679 put_pid(pid);
680
681 init_kthread_worker(&pit->worker);
682 pit->worker_task = kthread_run(kthread_worker_fn, &pit->worker,
683 "kvm-pit/%d", pid_nr);
684 if (IS_ERR(pit->worker_task)) {
673813e8 685 mutex_unlock(&pit->pit_state.lock);
6b5d7a9f 686 kvm_free_irq_source_id(kvm, pit->irq_source_id);
33572ac0
CL
687 kfree(pit);
688 return NULL;
689 }
b6ddf05f 690 init_kthread_work(&pit->expired, pit_do_work);
7837699f 691
7837699f
SY
692 kvm->arch.vpit = pit;
693 pit->kvm = kvm;
694
695 pit_state = &pit->pit_state;
696 pit_state->pit = pit;
697 hrtimer_init(&pit_state->pit_timer.timer,
698 CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
3cf57fed
MT
699 pit_state->irq_ack_notifier.gsi = 0;
700 pit_state->irq_ack_notifier.irq_acked = kvm_pit_ack_irq;
701 kvm_register_irq_ack_notifier(kvm, &pit_state->irq_ack_notifier);
52d939a0 702 pit_state->pit_timer.reinject = true;
7837699f
SY
703 mutex_unlock(&pit->pit_state.lock);
704
308b0f23 705 kvm_pit_reset(pit);
7837699f 706
4780c659
AK
707 pit->mask_notifier.func = pit_mask_notifer;
708 kvm_register_irq_mask_notifier(kvm, 0, &pit->mask_notifier);
709
6b66ac1a 710 kvm_iodevice_init(&pit->dev, &pit_dev_ops);
743eeb0b
SL
711 ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, KVM_PIT_BASE_ADDRESS,
712 KVM_PIT_MEM_LENGTH, &pit->dev);
090b7aff
GH
713 if (ret < 0)
714 goto fail;
6b66ac1a
GH
715
716 if (flags & KVM_PIT_SPEAKER_DUMMY) {
717 kvm_iodevice_init(&pit->speaker_dev, &speaker_dev_ops);
e93f8a0f 718 ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS,
743eeb0b
SL
719 KVM_SPEAKER_BASE_ADDRESS, 4,
720 &pit->speaker_dev);
090b7aff
GH
721 if (ret < 0)
722 goto fail_unregister;
6b66ac1a
GH
723 }
724
7837699f 725 return pit;
090b7aff
GH
726
727fail_unregister:
e93f8a0f 728 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &pit->dev);
090b7aff
GH
729
730fail:
d225f53b
WY
731 kvm_unregister_irq_mask_notifier(kvm, 0, &pit->mask_notifier);
732 kvm_unregister_irq_ack_notifier(kvm, &pit_state->irq_ack_notifier);
733 kvm_free_irq_source_id(kvm, pit->irq_source_id);
b6ddf05f 734 kthread_stop(pit->worker_task);
090b7aff
GH
735 kfree(pit);
736 return NULL;
7837699f
SY
737}
738
739void kvm_free_pit(struct kvm *kvm)
740{
741 struct hrtimer *timer;
742
743 if (kvm->arch.vpit) {
aea924f6
XG
744 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &kvm->arch.vpit->dev);
745 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
746 &kvm->arch.vpit->speaker_dev);
4780c659
AK
747 kvm_unregister_irq_mask_notifier(kvm, 0,
748 &kvm->arch.vpit->mask_notifier);
84fde248
GN
749 kvm_unregister_irq_ack_notifier(kvm,
750 &kvm->arch.vpit->pit_state.irq_ack_notifier);
7837699f
SY
751 mutex_lock(&kvm->arch.vpit->pit_state.lock);
752 timer = &kvm->arch.vpit->pit_state.pit_timer.timer;
753 hrtimer_cancel(timer);
b6ddf05f
JK
754 flush_kthread_work(&kvm->arch.vpit->expired);
755 kthread_stop(kvm->arch.vpit->worker_task);
5550af4d 756 kvm_free_irq_source_id(kvm, kvm->arch.vpit->irq_source_id);
7837699f
SY
757 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
758 kfree(kvm->arch.vpit);
759 }
760}
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