Commit | Line | Data |
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7837699f SY |
1 | /* |
2 | * 8253/8254 interval timer emulation | |
3 | * | |
4 | * Copyright (c) 2003-2004 Fabrice Bellard | |
5 | * Copyright (c) 2006 Intel Corporation | |
6 | * Copyright (c) 2007 Keir Fraser, XenSource Inc | |
7 | * Copyright (c) 2008 Intel Corporation | |
8 | * | |
9 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
10 | * of this software and associated documentation files (the "Software"), to deal | |
11 | * in the Software without restriction, including without limitation the rights | |
12 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
13 | * copies of the Software, and to permit persons to whom the Software is | |
14 | * furnished to do so, subject to the following conditions: | |
15 | * | |
16 | * The above copyright notice and this permission notice shall be included in | |
17 | * all copies or substantial portions of the Software. | |
18 | * | |
19 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
20 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
21 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
22 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
23 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
24 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
25 | * THE SOFTWARE. | |
26 | * | |
27 | * Authors: | |
28 | * Sheng Yang <sheng.yang@intel.com> | |
29 | * Based on QEMU and Xen. | |
30 | */ | |
31 | ||
32 | #include <linux/kvm_host.h> | |
33 | ||
34 | #include "irq.h" | |
35 | #include "i8254.h" | |
36 | ||
37 | #ifndef CONFIG_X86_64 | |
6f6d6a1a | 38 | #define mod_64(x, y) ((x) - (y) * div64_u64(x, y)) |
7837699f SY |
39 | #else |
40 | #define mod_64(x, y) ((x) % (y)) | |
41 | #endif | |
42 | ||
43 | #define RW_STATE_LSB 1 | |
44 | #define RW_STATE_MSB 2 | |
45 | #define RW_STATE_WORD0 3 | |
46 | #define RW_STATE_WORD1 4 | |
47 | ||
48 | /* Compute with 96 bit intermediate result: (a*b)/c */ | |
49 | static u64 muldiv64(u64 a, u32 b, u32 c) | |
50 | { | |
51 | union { | |
52 | u64 ll; | |
53 | struct { | |
54 | u32 low, high; | |
55 | } l; | |
56 | } u, res; | |
57 | u64 rl, rh; | |
58 | ||
59 | u.ll = a; | |
60 | rl = (u64)u.l.low * (u64)b; | |
61 | rh = (u64)u.l.high * (u64)b; | |
62 | rh += (rl >> 32); | |
6f6d6a1a RZ |
63 | res.l.high = div64_u64(rh, c); |
64 | res.l.low = div64_u64(((mod_64(rh, c) << 32) + (rl & 0xffffffff)), c); | |
7837699f SY |
65 | return res.ll; |
66 | } | |
67 | ||
68 | static void pit_set_gate(struct kvm *kvm, int channel, u32 val) | |
69 | { | |
70 | struct kvm_kpit_channel_state *c = | |
71 | &kvm->arch.vpit->pit_state.channels[channel]; | |
72 | ||
73 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
74 | ||
75 | switch (c->mode) { | |
76 | default: | |
77 | case 0: | |
78 | case 4: | |
79 | /* XXX: just disable/enable counting */ | |
80 | break; | |
81 | case 1: | |
82 | case 2: | |
83 | case 3: | |
84 | case 5: | |
85 | /* Restart counting on rising edge. */ | |
86 | if (c->gate < val) | |
87 | c->count_load_time = ktime_get(); | |
88 | break; | |
89 | } | |
90 | ||
91 | c->gate = val; | |
92 | } | |
93 | ||
8b2cf73c | 94 | static int pit_get_gate(struct kvm *kvm, int channel) |
7837699f SY |
95 | { |
96 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
97 | ||
98 | return kvm->arch.vpit->pit_state.channels[channel].gate; | |
99 | } | |
100 | ||
fd668423 MT |
101 | static s64 __kpit_elapsed(struct kvm *kvm) |
102 | { | |
103 | s64 elapsed; | |
104 | ktime_t remaining; | |
105 | struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state; | |
106 | ||
107 | remaining = hrtimer_expires_remaining(&ps->pit_timer.timer); | |
108 | if (ktime_to_ns(remaining) < 0) | |
109 | remaining = ktime_set(0, 0); | |
110 | ||
111 | elapsed = ps->pit_timer.period; | |
112 | if (ktime_to_ns(remaining) <= ps->pit_timer.period) | |
113 | elapsed = ps->pit_timer.period - ktime_to_ns(remaining); | |
114 | ||
115 | return elapsed; | |
116 | } | |
117 | ||
118 | static s64 kpit_elapsed(struct kvm *kvm, struct kvm_kpit_channel_state *c, | |
119 | int channel) | |
120 | { | |
121 | if (channel == 0) | |
122 | return __kpit_elapsed(kvm); | |
123 | ||
124 | return ktime_to_ns(ktime_sub(ktime_get(), c->count_load_time)); | |
125 | } | |
126 | ||
7837699f SY |
127 | static int pit_get_count(struct kvm *kvm, int channel) |
128 | { | |
129 | struct kvm_kpit_channel_state *c = | |
130 | &kvm->arch.vpit->pit_state.channels[channel]; | |
131 | s64 d, t; | |
132 | int counter; | |
133 | ||
134 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
135 | ||
fd668423 | 136 | t = kpit_elapsed(kvm, c, channel); |
7837699f SY |
137 | d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC); |
138 | ||
139 | switch (c->mode) { | |
140 | case 0: | |
141 | case 1: | |
142 | case 4: | |
143 | case 5: | |
144 | counter = (c->count - d) & 0xffff; | |
145 | break; | |
146 | case 3: | |
147 | /* XXX: may be incorrect for odd counts */ | |
148 | counter = c->count - (mod_64((2 * d), c->count)); | |
149 | break; | |
150 | default: | |
151 | counter = c->count - mod_64(d, c->count); | |
152 | break; | |
153 | } | |
154 | return counter; | |
155 | } | |
156 | ||
157 | static int pit_get_out(struct kvm *kvm, int channel) | |
158 | { | |
159 | struct kvm_kpit_channel_state *c = | |
160 | &kvm->arch.vpit->pit_state.channels[channel]; | |
161 | s64 d, t; | |
162 | int out; | |
163 | ||
164 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
165 | ||
fd668423 | 166 | t = kpit_elapsed(kvm, c, channel); |
7837699f SY |
167 | d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC); |
168 | ||
169 | switch (c->mode) { | |
170 | default: | |
171 | case 0: | |
172 | out = (d >= c->count); | |
173 | break; | |
174 | case 1: | |
175 | out = (d < c->count); | |
176 | break; | |
177 | case 2: | |
178 | out = ((mod_64(d, c->count) == 0) && (d != 0)); | |
179 | break; | |
180 | case 3: | |
181 | out = (mod_64(d, c->count) < ((c->count + 1) >> 1)); | |
182 | break; | |
183 | case 4: | |
184 | case 5: | |
185 | out = (d == c->count); | |
186 | break; | |
187 | } | |
188 | ||
189 | return out; | |
190 | } | |
191 | ||
192 | static void pit_latch_count(struct kvm *kvm, int channel) | |
193 | { | |
194 | struct kvm_kpit_channel_state *c = | |
195 | &kvm->arch.vpit->pit_state.channels[channel]; | |
196 | ||
197 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
198 | ||
199 | if (!c->count_latched) { | |
200 | c->latched_count = pit_get_count(kvm, channel); | |
201 | c->count_latched = c->rw_mode; | |
202 | } | |
203 | } | |
204 | ||
205 | static void pit_latch_status(struct kvm *kvm, int channel) | |
206 | { | |
207 | struct kvm_kpit_channel_state *c = | |
208 | &kvm->arch.vpit->pit_state.channels[channel]; | |
209 | ||
210 | WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock)); | |
211 | ||
212 | if (!c->status_latched) { | |
213 | /* TODO: Return NULL COUNT (bit 6). */ | |
214 | c->status = ((pit_get_out(kvm, channel) << 7) | | |
215 | (c->rw_mode << 4) | | |
216 | (c->mode << 1) | | |
217 | c->bcd); | |
218 | c->status_latched = 1; | |
219 | } | |
220 | } | |
221 | ||
8b2cf73c | 222 | static int __pit_timer_fn(struct kvm_kpit_state *ps) |
7837699f SY |
223 | { |
224 | struct kvm_vcpu *vcpu0 = ps->pit->kvm->vcpus[0]; | |
225 | struct kvm_kpit_timer *pt = &ps->pit_timer; | |
226 | ||
622395a9 | 227 | if (!atomic_inc_and_test(&pt->pending)) |
06e05645 | 228 | set_bit(KVM_REQ_PENDING_TIMER, &vcpu0->requests); |
d7690175 | 229 | |
52d939a0 MT |
230 | if (!pt->reinject) |
231 | atomic_set(&pt->pending, 1); | |
232 | ||
d7690175 | 233 | if (vcpu0 && waitqueue_active(&vcpu0->wq)) |
622395a9 | 234 | wake_up_interruptible(&vcpu0->wq); |
7837699f | 235 | |
beb20d52 | 236 | hrtimer_add_expires_ns(&pt->timer, pt->period); |
7837699f SY |
237 | |
238 | return (pt->period == 0 ? 0 : 1); | |
239 | } | |
240 | ||
3d80840d MT |
241 | int pit_has_pending_timer(struct kvm_vcpu *vcpu) |
242 | { | |
243 | struct kvm_pit *pit = vcpu->kvm->arch.vpit; | |
244 | ||
3cf57fed | 245 | if (pit && vcpu->vcpu_id == 0 && pit->pit_state.irq_ack) |
3d80840d | 246 | return atomic_read(&pit->pit_state.pit_timer.pending); |
3d80840d MT |
247 | return 0; |
248 | } | |
249 | ||
ee032c99 | 250 | static void kvm_pit_ack_irq(struct kvm_irq_ack_notifier *kian) |
3cf57fed MT |
251 | { |
252 | struct kvm_kpit_state *ps = container_of(kian, struct kvm_kpit_state, | |
253 | irq_ack_notifier); | |
254 | spin_lock(&ps->inject_lock); | |
255 | if (atomic_dec_return(&ps->pit_timer.pending) < 0) | |
dc7404ce | 256 | atomic_inc(&ps->pit_timer.pending); |
3cf57fed MT |
257 | ps->irq_ack = 1; |
258 | spin_unlock(&ps->inject_lock); | |
259 | } | |
260 | ||
7837699f SY |
261 | static enum hrtimer_restart pit_timer_fn(struct hrtimer *data) |
262 | { | |
263 | struct kvm_kpit_state *ps; | |
264 | int restart_timer = 0; | |
265 | ||
266 | ps = container_of(data, struct kvm_kpit_state, pit_timer.timer); | |
267 | ||
268 | restart_timer = __pit_timer_fn(ps); | |
269 | ||
270 | if (restart_timer) | |
271 | return HRTIMER_RESTART; | |
272 | else | |
273 | return HRTIMER_NORESTART; | |
274 | } | |
275 | ||
2f599714 MT |
276 | void __kvm_migrate_pit_timer(struct kvm_vcpu *vcpu) |
277 | { | |
278 | struct kvm_pit *pit = vcpu->kvm->arch.vpit; | |
279 | struct hrtimer *timer; | |
280 | ||
281 | if (vcpu->vcpu_id != 0 || !pit) | |
282 | return; | |
283 | ||
284 | timer = &pit->pit_state.pit_timer.timer; | |
285 | if (hrtimer_cancel(timer)) | |
beb20d52 | 286 | hrtimer_start_expires(timer, HRTIMER_MODE_ABS); |
2f599714 MT |
287 | } |
288 | ||
7837699f SY |
289 | static void destroy_pit_timer(struct kvm_kpit_timer *pt) |
290 | { | |
291 | pr_debug("pit: execute del timer!\n"); | |
292 | hrtimer_cancel(&pt->timer); | |
293 | } | |
294 | ||
3cf57fed | 295 | static void create_pit_timer(struct kvm_kpit_state *ps, u32 val, int is_period) |
7837699f | 296 | { |
3cf57fed | 297 | struct kvm_kpit_timer *pt = &ps->pit_timer; |
7837699f SY |
298 | s64 interval; |
299 | ||
300 | interval = muldiv64(val, NSEC_PER_SEC, KVM_PIT_FREQ); | |
301 | ||
302 | pr_debug("pit: create pit timer, interval is %llu nsec\n", interval); | |
303 | ||
304 | /* TODO The new value only affected after the retriggered */ | |
305 | hrtimer_cancel(&pt->timer); | |
306 | pt->period = (is_period == 0) ? 0 : interval; | |
307 | pt->timer.function = pit_timer_fn; | |
308 | atomic_set(&pt->pending, 0); | |
3cf57fed | 309 | ps->irq_ack = 1; |
7837699f SY |
310 | |
311 | hrtimer_start(&pt->timer, ktime_add_ns(ktime_get(), interval), | |
312 | HRTIMER_MODE_ABS); | |
313 | } | |
314 | ||
315 | static void pit_load_count(struct kvm *kvm, int channel, u32 val) | |
316 | { | |
317 | struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state; | |
318 | ||
319 | WARN_ON(!mutex_is_locked(&ps->lock)); | |
320 | ||
321 | pr_debug("pit: load_count val is %d, channel is %d\n", val, channel); | |
322 | ||
323 | /* | |
324 | * Though spec said the state of 8254 is undefined after power-up, | |
325 | * seems some tricky OS like Windows XP depends on IRQ0 interrupt | |
326 | * when booting up. | |
327 | * So here setting initialize rate for it, and not a specific number | |
328 | */ | |
329 | if (val == 0) | |
330 | val = 0x10000; | |
331 | ||
7837699f SY |
332 | ps->channels[channel].count = val; |
333 | ||
fd668423 MT |
334 | if (channel != 0) { |
335 | ps->channels[channel].count_load_time = ktime_get(); | |
7837699f | 336 | return; |
fd668423 | 337 | } |
7837699f SY |
338 | |
339 | /* Two types of timer | |
340 | * mode 1 is one shot, mode 2 is period, otherwise del timer */ | |
341 | switch (ps->channels[0].mode) { | |
342 | case 1: | |
ece15bab MT |
343 | /* FIXME: enhance mode 4 precision */ |
344 | case 4: | |
3cf57fed | 345 | create_pit_timer(ps, val, 0); |
7837699f SY |
346 | break; |
347 | case 2: | |
f6975545 | 348 | case 3: |
3cf57fed | 349 | create_pit_timer(ps, val, 1); |
7837699f SY |
350 | break; |
351 | default: | |
352 | destroy_pit_timer(&ps->pit_timer); | |
353 | } | |
354 | } | |
355 | ||
e0f63cb9 SY |
356 | void kvm_pit_load_count(struct kvm *kvm, int channel, u32 val) |
357 | { | |
358 | mutex_lock(&kvm->arch.vpit->pit_state.lock); | |
359 | pit_load_count(kvm, channel, val); | |
360 | mutex_unlock(&kvm->arch.vpit->pit_state.lock); | |
361 | } | |
362 | ||
7837699f SY |
363 | static void pit_ioport_write(struct kvm_io_device *this, |
364 | gpa_t addr, int len, const void *data) | |
365 | { | |
366 | struct kvm_pit *pit = (struct kvm_pit *)this->private; | |
367 | struct kvm_kpit_state *pit_state = &pit->pit_state; | |
368 | struct kvm *kvm = pit->kvm; | |
369 | int channel, access; | |
370 | struct kvm_kpit_channel_state *s; | |
371 | u32 val = *(u32 *) data; | |
372 | ||
373 | val &= 0xff; | |
374 | addr &= KVM_PIT_CHANNEL_MASK; | |
375 | ||
376 | mutex_lock(&pit_state->lock); | |
377 | ||
378 | if (val != 0) | |
379 | pr_debug("pit: write addr is 0x%x, len is %d, val is 0x%x\n", | |
380 | (unsigned int)addr, len, val); | |
381 | ||
382 | if (addr == 3) { | |
383 | channel = val >> 6; | |
384 | if (channel == 3) { | |
385 | /* Read-Back Command. */ | |
386 | for (channel = 0; channel < 3; channel++) { | |
387 | s = &pit_state->channels[channel]; | |
388 | if (val & (2 << channel)) { | |
389 | if (!(val & 0x20)) | |
390 | pit_latch_count(kvm, channel); | |
391 | if (!(val & 0x10)) | |
392 | pit_latch_status(kvm, channel); | |
393 | } | |
394 | } | |
395 | } else { | |
396 | /* Select Counter <channel>. */ | |
397 | s = &pit_state->channels[channel]; | |
398 | access = (val >> 4) & KVM_PIT_CHANNEL_MASK; | |
399 | if (access == 0) { | |
400 | pit_latch_count(kvm, channel); | |
401 | } else { | |
402 | s->rw_mode = access; | |
403 | s->read_state = access; | |
404 | s->write_state = access; | |
405 | s->mode = (val >> 1) & 7; | |
406 | if (s->mode > 5) | |
407 | s->mode -= 4; | |
408 | s->bcd = val & 1; | |
409 | } | |
410 | } | |
411 | } else { | |
412 | /* Write Count. */ | |
413 | s = &pit_state->channels[addr]; | |
414 | switch (s->write_state) { | |
415 | default: | |
416 | case RW_STATE_LSB: | |
417 | pit_load_count(kvm, addr, val); | |
418 | break; | |
419 | case RW_STATE_MSB: | |
420 | pit_load_count(kvm, addr, val << 8); | |
421 | break; | |
422 | case RW_STATE_WORD0: | |
423 | s->write_latch = val; | |
424 | s->write_state = RW_STATE_WORD1; | |
425 | break; | |
426 | case RW_STATE_WORD1: | |
427 | pit_load_count(kvm, addr, s->write_latch | (val << 8)); | |
428 | s->write_state = RW_STATE_WORD0; | |
429 | break; | |
430 | } | |
431 | } | |
432 | ||
433 | mutex_unlock(&pit_state->lock); | |
434 | } | |
435 | ||
436 | static void pit_ioport_read(struct kvm_io_device *this, | |
437 | gpa_t addr, int len, void *data) | |
438 | { | |
439 | struct kvm_pit *pit = (struct kvm_pit *)this->private; | |
440 | struct kvm_kpit_state *pit_state = &pit->pit_state; | |
441 | struct kvm *kvm = pit->kvm; | |
442 | int ret, count; | |
443 | struct kvm_kpit_channel_state *s; | |
444 | ||
445 | addr &= KVM_PIT_CHANNEL_MASK; | |
446 | s = &pit_state->channels[addr]; | |
447 | ||
448 | mutex_lock(&pit_state->lock); | |
449 | ||
450 | if (s->status_latched) { | |
451 | s->status_latched = 0; | |
452 | ret = s->status; | |
453 | } else if (s->count_latched) { | |
454 | switch (s->count_latched) { | |
455 | default: | |
456 | case RW_STATE_LSB: | |
457 | ret = s->latched_count & 0xff; | |
458 | s->count_latched = 0; | |
459 | break; | |
460 | case RW_STATE_MSB: | |
461 | ret = s->latched_count >> 8; | |
462 | s->count_latched = 0; | |
463 | break; | |
464 | case RW_STATE_WORD0: | |
465 | ret = s->latched_count & 0xff; | |
466 | s->count_latched = RW_STATE_MSB; | |
467 | break; | |
468 | } | |
469 | } else { | |
470 | switch (s->read_state) { | |
471 | default: | |
472 | case RW_STATE_LSB: | |
473 | count = pit_get_count(kvm, addr); | |
474 | ret = count & 0xff; | |
475 | break; | |
476 | case RW_STATE_MSB: | |
477 | count = pit_get_count(kvm, addr); | |
478 | ret = (count >> 8) & 0xff; | |
479 | break; | |
480 | case RW_STATE_WORD0: | |
481 | count = pit_get_count(kvm, addr); | |
482 | ret = count & 0xff; | |
483 | s->read_state = RW_STATE_WORD1; | |
484 | break; | |
485 | case RW_STATE_WORD1: | |
486 | count = pit_get_count(kvm, addr); | |
487 | ret = (count >> 8) & 0xff; | |
488 | s->read_state = RW_STATE_WORD0; | |
489 | break; | |
490 | } | |
491 | } | |
492 | ||
493 | if (len > sizeof(ret)) | |
494 | len = sizeof(ret); | |
495 | memcpy(data, (char *)&ret, len); | |
496 | ||
497 | mutex_unlock(&pit_state->lock); | |
498 | } | |
499 | ||
92760499 LV |
500 | static int pit_in_range(struct kvm_io_device *this, gpa_t addr, |
501 | int len, int is_write) | |
7837699f SY |
502 | { |
503 | return ((addr >= KVM_PIT_BASE_ADDRESS) && | |
504 | (addr < KVM_PIT_BASE_ADDRESS + KVM_PIT_MEM_LENGTH)); | |
505 | } | |
506 | ||
507 | static void speaker_ioport_write(struct kvm_io_device *this, | |
508 | gpa_t addr, int len, const void *data) | |
509 | { | |
510 | struct kvm_pit *pit = (struct kvm_pit *)this->private; | |
511 | struct kvm_kpit_state *pit_state = &pit->pit_state; | |
512 | struct kvm *kvm = pit->kvm; | |
513 | u32 val = *(u32 *) data; | |
514 | ||
515 | mutex_lock(&pit_state->lock); | |
516 | pit_state->speaker_data_on = (val >> 1) & 1; | |
517 | pit_set_gate(kvm, 2, val & 1); | |
518 | mutex_unlock(&pit_state->lock); | |
519 | } | |
520 | ||
521 | static void speaker_ioport_read(struct kvm_io_device *this, | |
522 | gpa_t addr, int len, void *data) | |
523 | { | |
524 | struct kvm_pit *pit = (struct kvm_pit *)this->private; | |
525 | struct kvm_kpit_state *pit_state = &pit->pit_state; | |
526 | struct kvm *kvm = pit->kvm; | |
527 | unsigned int refresh_clock; | |
528 | int ret; | |
529 | ||
530 | /* Refresh clock toggles at about 15us. We approximate as 2^14ns. */ | |
531 | refresh_clock = ((unsigned int)ktime_to_ns(ktime_get()) >> 14) & 1; | |
532 | ||
533 | mutex_lock(&pit_state->lock); | |
534 | ret = ((pit_state->speaker_data_on << 1) | pit_get_gate(kvm, 2) | | |
535 | (pit_get_out(kvm, 2) << 5) | (refresh_clock << 4)); | |
536 | if (len > sizeof(ret)) | |
537 | len = sizeof(ret); | |
538 | memcpy(data, (char *)&ret, len); | |
539 | mutex_unlock(&pit_state->lock); | |
540 | } | |
541 | ||
92760499 LV |
542 | static int speaker_in_range(struct kvm_io_device *this, gpa_t addr, |
543 | int len, int is_write) | |
7837699f SY |
544 | { |
545 | return (addr == KVM_SPEAKER_BASE_ADDRESS); | |
546 | } | |
547 | ||
308b0f23 | 548 | void kvm_pit_reset(struct kvm_pit *pit) |
7837699f SY |
549 | { |
550 | int i; | |
308b0f23 SY |
551 | struct kvm_kpit_channel_state *c; |
552 | ||
553 | mutex_lock(&pit->pit_state.lock); | |
554 | for (i = 0; i < 3; i++) { | |
555 | c = &pit->pit_state.channels[i]; | |
556 | c->mode = 0xff; | |
557 | c->gate = (i != 2); | |
558 | pit_load_count(pit->kvm, i, 0); | |
559 | } | |
560 | mutex_unlock(&pit->pit_state.lock); | |
561 | ||
562 | atomic_set(&pit->pit_state.pit_timer.pending, 0); | |
3cf57fed | 563 | pit->pit_state.irq_ack = 1; |
308b0f23 SY |
564 | } |
565 | ||
4780c659 AK |
566 | static void pit_mask_notifer(struct kvm_irq_mask_notifier *kimn, bool mask) |
567 | { | |
568 | struct kvm_pit *pit = container_of(kimn, struct kvm_pit, mask_notifier); | |
569 | ||
570 | if (!mask) { | |
571 | atomic_set(&pit->pit_state.pit_timer.pending, 0); | |
572 | pit->pit_state.irq_ack = 1; | |
573 | } | |
574 | } | |
575 | ||
308b0f23 SY |
576 | struct kvm_pit *kvm_create_pit(struct kvm *kvm) |
577 | { | |
7837699f SY |
578 | struct kvm_pit *pit; |
579 | struct kvm_kpit_state *pit_state; | |
7837699f SY |
580 | |
581 | pit = kzalloc(sizeof(struct kvm_pit), GFP_KERNEL); | |
582 | if (!pit) | |
583 | return NULL; | |
584 | ||
5550af4d | 585 | pit->irq_source_id = kvm_request_irq_source_id(kvm); |
e17d1dc0 AK |
586 | if (pit->irq_source_id < 0) { |
587 | kfree(pit); | |
5550af4d | 588 | return NULL; |
e17d1dc0 | 589 | } |
5550af4d | 590 | |
7837699f SY |
591 | mutex_init(&pit->pit_state.lock); |
592 | mutex_lock(&pit->pit_state.lock); | |
3cf57fed | 593 | spin_lock_init(&pit->pit_state.inject_lock); |
7837699f SY |
594 | |
595 | /* Initialize PIO device */ | |
596 | pit->dev.read = pit_ioport_read; | |
597 | pit->dev.write = pit_ioport_write; | |
598 | pit->dev.in_range = pit_in_range; | |
599 | pit->dev.private = pit; | |
600 | kvm_io_bus_register_dev(&kvm->pio_bus, &pit->dev); | |
601 | ||
602 | pit->speaker_dev.read = speaker_ioport_read; | |
603 | pit->speaker_dev.write = speaker_ioport_write; | |
604 | pit->speaker_dev.in_range = speaker_in_range; | |
605 | pit->speaker_dev.private = pit; | |
606 | kvm_io_bus_register_dev(&kvm->pio_bus, &pit->speaker_dev); | |
607 | ||
608 | kvm->arch.vpit = pit; | |
609 | pit->kvm = kvm; | |
610 | ||
611 | pit_state = &pit->pit_state; | |
612 | pit_state->pit = pit; | |
613 | hrtimer_init(&pit_state->pit_timer.timer, | |
614 | CLOCK_MONOTONIC, HRTIMER_MODE_ABS); | |
3cf57fed MT |
615 | pit_state->irq_ack_notifier.gsi = 0; |
616 | pit_state->irq_ack_notifier.irq_acked = kvm_pit_ack_irq; | |
617 | kvm_register_irq_ack_notifier(kvm, &pit_state->irq_ack_notifier); | |
52d939a0 | 618 | pit_state->pit_timer.reinject = true; |
7837699f SY |
619 | mutex_unlock(&pit->pit_state.lock); |
620 | ||
308b0f23 | 621 | kvm_pit_reset(pit); |
7837699f | 622 | |
4780c659 AK |
623 | pit->mask_notifier.func = pit_mask_notifer; |
624 | kvm_register_irq_mask_notifier(kvm, 0, &pit->mask_notifier); | |
625 | ||
7837699f SY |
626 | return pit; |
627 | } | |
628 | ||
629 | void kvm_free_pit(struct kvm *kvm) | |
630 | { | |
631 | struct hrtimer *timer; | |
632 | ||
633 | if (kvm->arch.vpit) { | |
4780c659 AK |
634 | kvm_unregister_irq_mask_notifier(kvm, 0, |
635 | &kvm->arch.vpit->mask_notifier); | |
7837699f SY |
636 | mutex_lock(&kvm->arch.vpit->pit_state.lock); |
637 | timer = &kvm->arch.vpit->pit_state.pit_timer.timer; | |
638 | hrtimer_cancel(timer); | |
5550af4d | 639 | kvm_free_irq_source_id(kvm, kvm->arch.vpit->irq_source_id); |
7837699f SY |
640 | mutex_unlock(&kvm->arch.vpit->pit_state.lock); |
641 | kfree(kvm->arch.vpit); | |
642 | } | |
643 | } | |
644 | ||
8b2cf73c | 645 | static void __inject_pit_timer_intr(struct kvm *kvm) |
7837699f | 646 | { |
23930f95 JK |
647 | struct kvm_vcpu *vcpu; |
648 | int i; | |
649 | ||
7837699f | 650 | mutex_lock(&kvm->lock); |
5550af4d SY |
651 | kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 1); |
652 | kvm_set_irq(kvm, kvm->arch.vpit->irq_source_id, 0, 0); | |
7837699f | 653 | mutex_unlock(&kvm->lock); |
23930f95 JK |
654 | |
655 | /* | |
8fdb2351 JK |
656 | * Provides NMI watchdog support via Virtual Wire mode. |
657 | * The route is: PIT -> PIC -> LVT0 in NMI mode. | |
658 | * | |
659 | * Note: Our Virtual Wire implementation is simplified, only | |
660 | * propagating PIT interrupts to all VCPUs when they have set | |
661 | * LVT0 to NMI delivery. Other PIC interrupts are just sent to | |
662 | * VCPU0, and only if its LVT0 is in EXTINT mode. | |
23930f95 | 663 | */ |
cc6e462c JK |
664 | if (kvm->arch.vapics_in_nmi_mode > 0) |
665 | for (i = 0; i < KVM_MAX_VCPUS; ++i) { | |
666 | vcpu = kvm->vcpus[i]; | |
667 | if (vcpu) | |
668 | kvm_apic_nmi_wd_deliver(vcpu); | |
669 | } | |
7837699f SY |
670 | } |
671 | ||
672 | void kvm_inject_pit_timer_irqs(struct kvm_vcpu *vcpu) | |
673 | { | |
674 | struct kvm_pit *pit = vcpu->kvm->arch.vpit; | |
675 | struct kvm *kvm = vcpu->kvm; | |
676 | struct kvm_kpit_state *ps; | |
677 | ||
678 | if (vcpu && pit) { | |
3cf57fed | 679 | int inject = 0; |
7837699f SY |
680 | ps = &pit->pit_state; |
681 | ||
3cf57fed MT |
682 | /* Try to inject pending interrupts when |
683 | * last one has been acked. | |
684 | */ | |
685 | spin_lock(&ps->inject_lock); | |
686 | if (atomic_read(&ps->pit_timer.pending) && ps->irq_ack) { | |
687 | ps->irq_ack = 0; | |
688 | inject = 1; | |
7837699f | 689 | } |
3cf57fed MT |
690 | spin_unlock(&ps->inject_lock); |
691 | if (inject) | |
692 | __inject_pit_timer_intr(kvm); | |
7837699f SY |
693 | } |
694 | } |