Commit | Line | Data |
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82470196 ZX |
1 | #ifndef __KVM_IO_APIC_H |
2 | #define __KVM_IO_APIC_H | |
3 | ||
4 | #include <linux/kvm_host.h> | |
5 | ||
af669ac6 | 6 | #include <kvm/iodev.h> |
82470196 ZX |
7 | |
8 | struct kvm; | |
9 | struct kvm_vcpu; | |
10 | ||
11 | #define IOAPIC_NUM_PINS KVM_IOAPIC_NUM_PINS | |
b053b2ae | 12 | #define MAX_NR_RESERVED_IOAPIC_PINS KVM_MAX_IRQ_ROUTES |
82470196 ZX |
13 | #define IOAPIC_VERSION_ID 0x11 /* IOAPIC version */ |
14 | #define IOAPIC_EDGE_TRIG 0 | |
15 | #define IOAPIC_LEVEL_TRIG 1 | |
16 | ||
17 | #define IOAPIC_DEFAULT_BASE_ADDRESS 0xfec00000 | |
18 | #define IOAPIC_MEM_LENGTH 0x100 | |
19 | ||
20 | /* Direct registers. */ | |
21 | #define IOAPIC_REG_SELECT 0x00 | |
22 | #define IOAPIC_REG_WINDOW 0x10 | |
82470196 ZX |
23 | |
24 | /* Indirect registers. */ | |
25 | #define IOAPIC_REG_APIC_ID 0x00 /* x86 IOAPIC only */ | |
26 | #define IOAPIC_REG_VERSION 0x01 | |
27 | #define IOAPIC_REG_ARB_ID 0x02 /* x86 IOAPIC only */ | |
28 | ||
29 | /*ioapic delivery mode*/ | |
30 | #define IOAPIC_FIXED 0x0 | |
31 | #define IOAPIC_LOWEST_PRIORITY 0x1 | |
32 | #define IOAPIC_PMI 0x2 | |
33 | #define IOAPIC_NMI 0x4 | |
34 | #define IOAPIC_INIT 0x5 | |
35 | #define IOAPIC_EXTINT 0x7 | |
36 | ||
8dc6aade YZ |
37 | #ifdef CONFIG_X86 |
38 | #define RTC_GSI 8 | |
39 | #else | |
40 | #define RTC_GSI -1U | |
41 | #endif | |
42 | ||
9e4aabe2 | 43 | struct dest_map { |
9daa5007 | 44 | /* vcpu bitmap where IRQ has been sent */ |
9e4aabe2 | 45 | DECLARE_BITMAP(map, KVM_MAX_VCPUS); |
9daa5007 JR |
46 | |
47 | /* | |
48 | * Vector sent to a given vcpu, only valid when | |
49 | * the vcpu's bit in map is set | |
50 | */ | |
51 | u8 vectors[KVM_MAX_VCPUS]; | |
9e4aabe2 JR |
52 | }; |
53 | ||
54 | ||
8dc6aade YZ |
55 | struct rtc_status { |
56 | int pending_eoi; | |
9e4aabe2 | 57 | struct dest_map dest_map; |
8dc6aade YZ |
58 | }; |
59 | ||
cb5281a5 PB |
60 | union kvm_ioapic_redirect_entry { |
61 | u64 bits; | |
62 | struct { | |
63 | u8 vector; | |
64 | u8 delivery_mode:3; | |
65 | u8 dest_mode:1; | |
66 | u8 delivery_status:1; | |
67 | u8 polarity:1; | |
68 | u8 remote_irr:1; | |
69 | u8 trig_mode:1; | |
70 | u8 mask:1; | |
71 | u8 reserve:7; | |
72 | u8 reserved[4]; | |
73 | u8 dest_id; | |
74 | } fields; | |
75 | }; | |
76 | ||
82470196 ZX |
77 | struct kvm_ioapic { |
78 | u64 base_address; | |
79 | u32 ioregsel; | |
80 | u32 id; | |
81 | u32 irr; | |
82 | u32 pad; | |
cf9e4e15 | 83 | union kvm_ioapic_redirect_entry redirtbl[IOAPIC_NUM_PINS]; |
1a6e4a8c | 84 | unsigned long irq_states[IOAPIC_NUM_PINS]; |
82470196 ZX |
85 | struct kvm_io_device dev; |
86 | struct kvm *kvm; | |
f5244726 | 87 | void (*ack_notifier)(void *opaque, int irq); |
46a47b1e | 88 | spinlock_t lock; |
8dc6aade | 89 | struct rtc_status rtc_status; |
184564ef ZH |
90 | struct delayed_work eoi_inject; |
91 | u32 irq_eoi[IOAPIC_NUM_PINS]; | |
5bda6eed | 92 | u32 irr_delivered; |
82470196 ZX |
93 | }; |
94 | ||
95 | #ifdef DEBUG | |
96 | #define ASSERT(x) \ | |
97 | do { \ | |
98 | if (!(x)) { \ | |
99 | printk(KERN_EMERG "assertion failed %s: %d: %s\n", \ | |
100 | __FILE__, __LINE__, #x); \ | |
101 | BUG(); \ | |
102 | } \ | |
103 | } while (0) | |
104 | #else | |
105 | #define ASSERT(x) do { } while (0) | |
106 | #endif | |
107 | ||
108 | static inline struct kvm_ioapic *ioapic_irqchip(struct kvm *kvm) | |
109 | { | |
110 | return kvm->arch.vioapic; | |
111 | } | |
112 | ||
49df6397 SR |
113 | static inline int ioapic_in_kernel(struct kvm *kvm) |
114 | { | |
115 | int ret; | |
116 | ||
117 | ret = (ioapic_irqchip(kvm) != NULL); | |
118 | return ret; | |
119 | } | |
120 | ||
10606919 | 121 | void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu *vcpu); |
52c233a4 | 122 | bool kvm_apic_match_dest(struct kvm_vcpu *vcpu, struct kvm_lapic *source, |
394457a9 | 123 | int short_hand, unsigned int dest, int dest_mode); |
e1035715 | 124 | int kvm_apic_compare_prio(struct kvm_vcpu *vcpu1, struct kvm_vcpu *vcpu2); |
1fcc7890 YZ |
125 | void kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu, int vector, |
126 | int trigger_mode); | |
82470196 | 127 | int kvm_ioapic_init(struct kvm *kvm); |
72bb2fcd | 128 | void kvm_ioapic_destroy(struct kvm *kvm); |
1a577b72 | 129 | int kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int irq_source_id, |
aa2fbe6d | 130 | int level, bool line_status); |
1a577b72 | 131 | void kvm_ioapic_clear_all(struct kvm_ioapic *ioapic, int irq_source_id); |
58c2dde1 | 132 | int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src, |
9e4aabe2 JR |
133 | struct kvm_lapic_irq *irq, |
134 | struct dest_map *dest_map); | |
eba0226b GN |
135 | int kvm_get_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state); |
136 | int kvm_set_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state); | |
6308630b AS |
137 | void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu, |
138 | ulong *ioapic_handled_vectors); | |
139 | void kvm_scan_ioapic_routes(struct kvm_vcpu *vcpu, | |
140 | ulong *ioapic_handled_vectors); | |
82470196 | 141 | #endif |