[deliverable/linux.git] / arch / x86 / kvm / irq_comm.c

/*
 * irq_comm.c: Common API for in kernel interrupt controller
 * Copyright (c) 2007, Intel Corporation.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU General Public License,
 * version 2, as published by the Free Software Foundation.
 *
 * This program is distributed in the hope it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along with
 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
 * Place - Suite 330, Boston, MA 02111-1307 USA.
 * Authors:
 *   Yaozu (Eddie) Dong <Eddie.dong@intel.com>
 *
 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
 */

#include <linux/kvm_host.h>
#include <linux/slab.h>
#include <linux/export.h>
#include <trace/events/kvm.h>

#include <asm/msidef.h>

#include "irq.h"

#include "ioapic.h"

static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e,
			   struct kvm *kvm, int irq_source_id, int level,
			   bool line_status)
{
	struct kvm_pic *pic = pic_irqchip(kvm);
	return kvm_pic_set_irq(pic, e->irqchip.pin, irq_source_id, level);
}

static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e,
			      struct kvm *kvm, int irq_source_id, int level,
			      bool line_status)
{
	struct kvm_ioapic *ioapic = kvm->arch.vioapic;
	return kvm_ioapic_set_irq(ioapic, e->irqchip.pin, irq_source_id, level,
				line_status);
}

inline static bool kvm_is_dm_lowest_prio(struct kvm_lapic_irq *irq)
{
	return irq->delivery_mode == APIC_DM_LOWEST;
}

int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
		struct kvm_lapic_irq *irq, unsigned long *dest_map)
{
	int i, r = -1;
	struct kvm_vcpu *vcpu, *lowest = NULL;

	if (irq->dest_mode == 0 && irq->dest_id == 0xff &&
			kvm_is_dm_lowest_prio(irq)) {
		printk(KERN_INFO "kvm: apic: phys broadcast and lowest prio\n");
		irq->delivery_mode = APIC_DM_FIXED;
	}

	if (kvm_irq_delivery_to_apic_fast(kvm, src, irq, &r, dest_map))
		return r;

	kvm_for_each_vcpu(i, vcpu, kvm) {
		if (!kvm_apic_present(vcpu))
			continue;

		if (!kvm_apic_match_dest(vcpu, src, irq->shorthand,
					irq->dest_id, irq->dest_mode))
			continue;

		if (!kvm_is_dm_lowest_prio(irq)) {
			if (r < 0)
				r = 0;
			r += kvm_apic_set_irq(vcpu, irq, dest_map);
		} else if (kvm_lapic_enabled(vcpu)) {
			if (!lowest)
				lowest = vcpu;
			else if (kvm_apic_compare_prio(vcpu, lowest) < 0)
				lowest = vcpu;
		}
	}

	if (lowest)
		r = kvm_apic_set_irq(lowest, irq, dest_map);

	return r;
}

static inline void kvm_set_msi_irq(struct kvm_kernel_irq_routing_entry *e,
				   struct kvm_lapic_irq *irq)
{
	trace_kvm_msi_set_irq(e->msi.address_lo, e->msi.data);

	irq->dest_id = (e->msi.address_lo &
			MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT;
	irq->vector = (e->msi.data &
			MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT;
	irq->dest_mode = (1 << MSI_ADDR_DEST_MODE_SHIFT) & e->msi.address_lo;
	irq->trig_mode = (1 << MSI_DATA_TRIGGER_SHIFT) & e->msi.data;
	irq->delivery_mode = e->msi.data & 0x700;
	irq->msi_redir_hint = ((e->msi.address_lo
		& MSI_ADDR_REDIRECTION_LOWPRI) > 0);
	irq->level = 1;
	irq->shorthand = 0;
}

int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
		struct kvm *kvm, int irq_source_id, int level, bool line_status)
{
	struct kvm_lapic_irq irq;

	if (!level)
		return -1;

	kvm_set_msi_irq(e, &irq);

	return kvm_irq_delivery_to_apic(kvm, NULL, &irq, NULL);
}


static int kvm_set_msi_inatomic(struct kvm_kernel_irq_routing_entry *e,
			 struct kvm *kvm)
{
	struct kvm_lapic_irq irq;
	int r;

	kvm_set_msi_irq(e, &irq);

	if (kvm_irq_delivery_to_apic_fast(kvm, NULL, &irq, &r, NULL))
		return r;
	else
		return -EWOULDBLOCK;
}

/*
 * Deliver an IRQ in an atomic context if we can, or return a failure,
 * user can retry in a process context.
 * Return value:
 *  -EWOULDBLOCK - Can't deliver in atomic context: retry in a process context.
 *  Other values - No need to retry.
 */
int kvm_set_irq_inatomic(struct kvm *kvm, int irq_source_id, u32 irq, int level)
{
	struct kvm_kernel_irq_routing_entry entries[KVM_NR_IRQCHIPS];
	struct kvm_kernel_irq_routing_entry *e;
	int ret = -EINVAL;
	int idx;

	trace_kvm_set_irq(irq, level, irq_source_id);

	/*
	 * Injection into either PIC or IOAPIC might need to scan all CPUs,
	 * which would need to be retried from thread context;  when same GSI
	 * is connected to both PIC and IOAPIC, we'd have to report a
	 * partial failure here.
	 * Since there's no easy way to do this, we only support injecting MSI
	 * which is limited to 1:1 GSI mapping.
	 */
	idx = srcu_read_lock(&kvm->irq_srcu);
	if (kvm_irq_map_gsi(kvm, entries, irq) > 0) {
		e = &entries[0];
		if (likely(e->type == KVM_IRQ_ROUTING_MSI))
			ret = kvm_set_msi_inatomic(e, kvm);
		else
			ret = -EWOULDBLOCK;
	}
	srcu_read_unlock(&kvm->irq_srcu, idx);
	return ret;
}

int kvm_request_irq_source_id(struct kvm *kvm)
{
	unsigned long *bitmap = &kvm->arch.irq_sources_bitmap;
	int irq_source_id;

	mutex_lock(&kvm->irq_lock);
	irq_source_id = find_first_zero_bit(bitmap, BITS_PER_LONG);

	if (irq_source_id >= BITS_PER_LONG) {
		printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n");
		irq_source_id = -EFAULT;
		goto unlock;
	}

	ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
	ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID);
	set_bit(irq_source_id, bitmap);
unlock:
	mutex_unlock(&kvm->irq_lock);

	return irq_source_id;
}

void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id)
{
	ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
	ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID);

	mutex_lock(&kvm->irq_lock);
	if (irq_source_id < 0 ||
	    irq_source_id >= BITS_PER_LONG) {
		printk(KERN_ERR "kvm: IRQ source ID out of range!\n");
		goto unlock;
	}
	clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap);
	if (!irqchip_in_kernel(kvm))
		goto unlock;

	kvm_ioapic_clear_all(kvm->arch.vioapic, irq_source_id);
	kvm_pic_clear_all(pic_irqchip(kvm), irq_source_id);
unlock:
	mutex_unlock(&kvm->irq_lock);
}

void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
				    struct kvm_irq_mask_notifier *kimn)
{
	mutex_lock(&kvm->irq_lock);
	kimn->irq = irq;
	hlist_add_head_rcu(&kimn->link, &kvm->arch.mask_notifier_list);
	mutex_unlock(&kvm->irq_lock);
}

void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
				      struct kvm_irq_mask_notifier *kimn)
{
	mutex_lock(&kvm->irq_lock);
	hlist_del_rcu(&kimn->link);
	mutex_unlock(&kvm->irq_lock);
	synchronize_srcu(&kvm->irq_srcu);
}

void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
			     bool mask)
{
	struct kvm_irq_mask_notifier *kimn;
	int idx, gsi;

	idx = srcu_read_lock(&kvm->irq_srcu);
	gsi = kvm_irq_map_chip_pin(kvm, irqchip, pin);
	if (gsi != -1)
		hlist_for_each_entry_rcu(kimn, &kvm->arch.mask_notifier_list, link)
			if (kimn->irq == gsi)
				kimn->func(kimn, mask);
	srcu_read_unlock(&kvm->irq_srcu, idx);
}

int kvm_set_routing_entry(struct kvm_kernel_irq_routing_entry *e,
			  const struct kvm_irq_routing_entry *ue)
{
	int r = -EINVAL;
	int delta;
	unsigned max_pin;

	switch (ue->type) {
	case KVM_IRQ_ROUTING_IRQCHIP:
		delta = 0;
		switch (ue->u.irqchip.irqchip) {
		case KVM_IRQCHIP_PIC_MASTER:
			e->set = kvm_set_pic_irq;
			max_pin = PIC_NUM_PINS;
			break;
		case KVM_IRQCHIP_PIC_SLAVE:
			e->set = kvm_set_pic_irq;
			max_pin = PIC_NUM_PINS;
			delta = 8;
			break;
		case KVM_IRQCHIP_IOAPIC:
			max_pin = KVM_IOAPIC_NUM_PINS;
			e->set = kvm_set_ioapic_irq;
			break;
		default:
			goto out;
		}
		e->irqchip.irqchip = ue->u.irqchip.irqchip;
		e->irqchip.pin = ue->u.irqchip.pin + delta;
		if (e->irqchip.pin >= max_pin)
			goto out;
		break;
	case KVM_IRQ_ROUTING_MSI:
		e->set = kvm_set_msi;
		e->msi.address_lo = ue->u.msi.address_lo;
		e->msi.address_hi = ue->u.msi.address_hi;
		e->msi.data = ue->u.msi.data;
		break;
	default:
		goto out;
	}

	r = 0;
out:
	return r;
}

#define IOAPIC_ROUTING_ENTRY(irq) \
	{ .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP,	\
	  .u.irqchip = { .irqchip = KVM_IRQCHIP_IOAPIC, .pin = (irq) } }
#define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq)

#define PIC_ROUTING_ENTRY(irq) \
	{ .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP,	\
	  .u.irqchip = { .irqchip = SELECT_PIC(irq), .pin = (irq) % 8 } }
#define ROUTING_ENTRY2(irq) \
	IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq)

static const struct kvm_irq_routing_entry default_routing[] = {
	ROUTING_ENTRY2(0), ROUTING_ENTRY2(1),
	ROUTING_ENTRY2(2), ROUTING_ENTRY2(3),
	ROUTING_ENTRY2(4), ROUTING_ENTRY2(5),
	ROUTING_ENTRY2(6), ROUTING_ENTRY2(7),
	ROUTING_ENTRY2(8), ROUTING_ENTRY2(9),
	ROUTING_ENTRY2(10), ROUTING_ENTRY2(11),
	ROUTING_ENTRY2(12), ROUTING_ENTRY2(13),
	ROUTING_ENTRY2(14), ROUTING_ENTRY2(15),
	ROUTING_ENTRY1(16), ROUTING_ENTRY1(17),
	ROUTING_ENTRY1(18), ROUTING_ENTRY1(19),
	ROUTING_ENTRY1(20), ROUTING_ENTRY1(21),
	ROUTING_ENTRY1(22), ROUTING_ENTRY1(23),
};

int kvm_setup_default_irq_routing(struct kvm *kvm)
{
	return kvm_set_irq_routing(kvm, default_routing,
				   ARRAY_SIZE(default_routing), 0);
}
Commit	Line	Data
3de42dc0 XZ	1	/*
	2	* irq_comm.c: Common API for in kernel interrupt controller
	3	* Copyright (c) 2007, Intel Corporation.
	4	*
	5	* This program is free software; you can redistribute it and/or modify it
	6	* under the terms and conditions of the GNU General Public License,
	7	* version 2, as published by the Free Software Foundation.
	8	*
	9	* This program is distributed in the hope it will be useful, but WITHOUT
	10	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	11	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	12	* more details.
	13	*
	14	* You should have received a copy of the GNU General Public License along with
	15	* this program; if not, write to the Free Software Foundation, Inc., 59 Temple
	16	* Place - Suite 330, Boston, MA 02111-1307 USA.
	17	* Authors:
	18	* Yaozu (Eddie) Dong <Eddie.dong@intel.com>
	19	*
9611c187	20	* Copyright 2010 Red Hat, Inc. and/or its affiliates.
3de42dc0 XZ	21	*/
	22
	23	#include <linux/kvm_host.h>
5a0e3ad6	24	#include <linux/slab.h>
c7c9c56c	25	#include <linux/export.h>
229456fc	26	#include <trace/events/kvm.h>
79950e10	27
79950e10	28	#include <asm/msidef.h>
79950e10	29
3de42dc0 XZ	30	#include "irq.h"
	31
	32	#include "ioapic.h"
	33
4925663a	34	static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e,
aa2fbe6d YZ	35	struct kvm *kvm, int irq_source_id, int level,
aa2fbe6d YZ	36	bool line_status)
399ec807	37	{
1a6e4a8c	38	struct kvm_pic *pic = pic_irqchip(kvm);
1a577b72	39	return kvm_pic_set_irq(pic, e->irqchip.pin, irq_source_id, level);
399ec807 AK	40	}
399ec807 AK	41
4925663a	42	static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e,
aa2fbe6d YZ	43	struct kvm *kvm, int irq_source_id, int level,
aa2fbe6d YZ	44	bool line_status)
399ec807	45	{
1a6e4a8c	46	struct kvm_ioapic *ioapic = kvm->arch.vioapic;
aa2fbe6d YZ	47	return kvm_ioapic_set_irq(ioapic, e->irqchip.pin, irq_source_id, level,
aa2fbe6d YZ	48	line_status);
399ec807 AK	49	}
399ec807 AK	50
58c2dde1	51	inline static bool kvm_is_dm_lowest_prio(struct kvm_lapic_irq *irq)
116191b6	52	{
58c2dde1	53	return irq->delivery_mode == APIC_DM_LOWEST;
58c2dde1	54	}
116191b6	55
58c2dde1	56	int kvm_irq_delivery_to_apic(struct kvm kvm, struct kvm_lapic src,
b4f2225c	57	struct kvm_lapic_irq irq, unsigned long dest_map)
58c2dde1 GN	58	{
	59	int i, r = -1;
	60	struct kvm_vcpu vcpu, lowest = NULL;
	61
	62	if (irq->dest_mode == 0 && irq->dest_id == 0xff &&
1e08ec4a	63	kvm_is_dm_lowest_prio(irq)) {
343f94fe	64	printk(KERN_INFO "kvm: apic: phys broadcast and lowest prio\n");
1e08ec4a GN	65	irq->delivery_mode = APIC_DM_FIXED;
	66	}
	67
b4f2225c	68	if (kvm_irq_delivery_to_apic_fast(kvm, src, irq, &r, dest_map))
1e08ec4a	69	return r;
343f94fe	70
988a2cae GN	71	kvm_for_each_vcpu(i, vcpu, kvm) {
988a2cae GN	72	if (!kvm_apic_present(vcpu))
343f94fe GN	73	continue;
343f94fe GN	74
58c2dde1 GN	75	if (!kvm_apic_match_dest(vcpu, src, irq->shorthand,
58c2dde1 GN	76	irq->dest_id, irq->dest_mode))
343f94fe GN	77	continue;
343f94fe GN	78
58c2dde1 GN	79	if (!kvm_is_dm_lowest_prio(irq)) {
	80	if (r < 0)
	81	r = 0;
b4f2225c	82	r += kvm_apic_set_irq(vcpu, irq, dest_map);
aefd18f0	83	} else if (kvm_lapic_enabled(vcpu)) {
58c2dde1 GN	84	if (!lowest)
	85	lowest = vcpu;
	86	else if (kvm_apic_compare_prio(vcpu, lowest) < 0)
	87	lowest = vcpu;
e1035715	88	}
343f94fe GN	89	}
343f94fe GN	90
58c2dde1	91	if (lowest)
b4f2225c	92	r = kvm_apic_set_irq(lowest, irq, dest_map);
58c2dde1 GN	93
58c2dde1 GN	94	return r;
116191b6 SY	95	}
116191b6 SY	96
01f21880 MT	97	static inline void kvm_set_msi_irq(struct kvm_kernel_irq_routing_entry *e,
	98	struct kvm_lapic_irq *irq)
	99	{
	100	trace_kvm_msi_set_irq(e->msi.address_lo, e->msi.data);
	101
	102	irq->dest_id = (e->msi.address_lo &
	103	MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT;
	104	irq->vector = (e->msi.data &
	105	MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT;
	106	irq->dest_mode = (1 << MSI_ADDR_DEST_MODE_SHIFT) & e->msi.address_lo;
	107	irq->trig_mode = (1 << MSI_DATA_TRIGGER_SHIFT) & e->msi.data;
	108	irq->delivery_mode = e->msi.data & 0x700;
93bbf0b8 JS	109	irq->msi_redir_hint = ((e->msi.address_lo
93bbf0b8 JS	110	& MSI_ADDR_REDIRECTION_LOWPRI) > 0);
01f21880 MT	111	irq->level = 1;
01f21880 MT	112	irq->shorthand = 0;
01f21880 MT	113	}
01f21880 MT	114
bd2b53b2	115	int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
aa2fbe6d	116	struct kvm *kvm, int irq_source_id, int level, bool line_status)
79950e10	117	{
58c2dde1	118	struct kvm_lapic_irq irq;
79950e10	119
1a6e4a8c GN	120	if (!level)
	121	return -1;
	122
01f21880	123	kvm_set_msi_irq(e, &irq);
116191b6	124
b4f2225c	125	return kvm_irq_delivery_to_apic(kvm, NULL, &irq, NULL);
79950e10 SY	126	}
79950e10 SY	127
01f21880 MT	128
	129	static int kvm_set_msi_inatomic(struct kvm_kernel_irq_routing_entry *e,
	130	struct kvm *kvm)
	131	{
	132	struct kvm_lapic_irq irq;
	133	int r;
	134
	135	kvm_set_msi_irq(e, &irq);
	136
b4f2225c	137	if (kvm_irq_delivery_to_apic_fast(kvm, NULL, &irq, &r, NULL))
01f21880 MT	138	return r;
	139	else
	140	return -EWOULDBLOCK;
	141	}
	142
01f21880 MT	143	/*
	144	* Deliver an IRQ in an atomic context if we can, or return a failure,
	145	* user can retry in a process context.
	146	* Return value:
	147	* -EWOULDBLOCK - Can't deliver in atomic context: retry in a process context.
	148	* Other values - No need to retry.
	149	*/
	150	int kvm_set_irq_inatomic(struct kvm *kvm, int irq_source_id, u32 irq, int level)
	151	{
8ba918d4	152	struct kvm_kernel_irq_routing_entry entries[KVM_NR_IRQCHIPS];
01f21880 MT	153	struct kvm_kernel_irq_routing_entry *e;
01f21880 MT	154	int ret = -EINVAL;
719d93cd	155	int idx;
01f21880 MT	156
	157	trace_kvm_set_irq(irq, level, irq_source_id);
	158
	159	/*
	160	* Injection into either PIC or IOAPIC might need to scan all CPUs,
	161	* which would need to be retried from thread context; when same GSI
	162	* is connected to both PIC and IOAPIC, we'd have to report a
	163	* partial failure here.
	164	* Since there's no easy way to do this, we only support injecting MSI
	165	* which is limited to 1:1 GSI mapping.
	166	*/
719d93cd	167	idx = srcu_read_lock(&kvm->irq_srcu);
9957c86d	168	if (kvm_irq_map_gsi(kvm, entries, irq) > 0) {
8ba918d4 PM	169	e = &entries[0];
	170	if (likely(e->type == KVM_IRQ_ROUTING_MSI))
	171	ret = kvm_set_msi_inatomic(e, kvm);
	172	else
	173	ret = -EWOULDBLOCK;
	174	}
719d93cd	175	srcu_read_unlock(&kvm->irq_srcu, idx);
01f21880 MT	176	return ret;
	177	}
	178
5550af4d SY	179	int kvm_request_irq_source_id(struct kvm *kvm)
	180	{
	181	unsigned long *bitmap = &kvm->arch.irq_sources_bitmap;
fa40a821 MT	182	int irq_source_id;
	183
	184	mutex_lock(&kvm->irq_lock);
cd5a2685	185	irq_source_id = find_first_zero_bit(bitmap, BITS_PER_LONG);
61552367	186
cd5a2685	187	if (irq_source_id >= BITS_PER_LONG) {
5550af4d	188	printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n");
0c6ddceb JS	189	irq_source_id = -EFAULT;
0c6ddceb JS	190	goto unlock;
61552367 MM	191	}
	192
	193	ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
7a84428a	194	ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID);
61552367	195	set_bit(irq_source_id, bitmap);
0c6ddceb	196	unlock:
fa40a821	197	mutex_unlock(&kvm->irq_lock);
61552367	198
5550af4d SY	199	return irq_source_id;
	200	}
	201
	202	void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id)
	203	{
61552367	204	ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
7a84428a	205	ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID);
61552367	206
fa40a821	207	mutex_lock(&kvm->irq_lock);
61552367	208	if (irq_source_id < 0 \|\|
cd5a2685	209	irq_source_id >= BITS_PER_LONG) {
5550af4d	210	printk(KERN_ERR "kvm: IRQ source ID out of range!\n");
0c6ddceb	211	goto unlock;
5550af4d	212	}
e50212bb MT	213	clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap);
	214	if (!irqchip_in_kernel(kvm))
	215	goto unlock;
	216
1a577b72	217	kvm_ioapic_clear_all(kvm->arch.vioapic, irq_source_id);
1a577b72	218	kvm_pic_clear_all(pic_irqchip(kvm), irq_source_id);
0c6ddceb	219	unlock:
fa40a821	220	mutex_unlock(&kvm->irq_lock);
5550af4d	221	}
75858a84 AK	222
	223	void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
	224	struct kvm_irq_mask_notifier *kimn)
	225	{
fa40a821	226	mutex_lock(&kvm->irq_lock);
75858a84	227	kimn->irq = irq;
6ef768fa	228	hlist_add_head_rcu(&kimn->link, &kvm->arch.mask_notifier_list);
fa40a821	229	mutex_unlock(&kvm->irq_lock);
75858a84 AK	230	}
	231
	232	void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
	233	struct kvm_irq_mask_notifier *kimn)
	234	{
fa40a821	235	mutex_lock(&kvm->irq_lock);
280aa177	236	hlist_del_rcu(&kimn->link);
fa40a821	237	mutex_unlock(&kvm->irq_lock);
719d93cd	238	synchronize_srcu(&kvm->irq_srcu);
75858a84 AK	239	}
75858a84 AK	240
4a994358 GN	241	void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
4a994358 GN	242	bool mask)
75858a84 AK	243	{
75858a84 AK	244	struct kvm_irq_mask_notifier *kimn;
719d93cd	245	int idx, gsi;
75858a84	246
719d93cd	247	idx = srcu_read_lock(&kvm->irq_srcu);
9957c86d	248	gsi = kvm_irq_map_chip_pin(kvm, irqchip, pin);
4a994358	249	if (gsi != -1)
6ef768fa	250	hlist_for_each_entry_rcu(kimn, &kvm->arch.mask_notifier_list, link)
4a994358 GN	251	if (kimn->irq == gsi)
4a994358 GN	252	kimn->func(kimn, mask);
719d93cd	253	srcu_read_unlock(&kvm->irq_srcu, idx);
75858a84 AK	254	}
75858a84 AK	255
8ba918d4	256	int kvm_set_routing_entry(struct kvm_kernel_irq_routing_entry *e,
e8cde093	257	const struct kvm_irq_routing_entry *ue)
399ec807 AK	258	{
	259	int r = -EINVAL;
	260	int delta;
d72118ce	261	unsigned max_pin;
46e624b9	262
399ec807 AK	263	switch (ue->type) {
	264	case KVM_IRQ_ROUTING_IRQCHIP:
	265	delta = 0;
	266	switch (ue->u.irqchip.irqchip) {
	267	case KVM_IRQCHIP_PIC_MASTER:
	268	e->set = kvm_set_pic_irq;
93b6547e	269	max_pin = PIC_NUM_PINS;
399ec807 AK	270	break;
399ec807 AK	271	case KVM_IRQCHIP_PIC_SLAVE:
4925663a	272	e->set = kvm_set_pic_irq;
93b6547e	273	max_pin = PIC_NUM_PINS;
399ec807 AK	274	delta = 8;
	275	break;
	276	case KVM_IRQCHIP_IOAPIC:
d72118ce	277	max_pin = KVM_IOAPIC_NUM_PINS;
efbc100c	278	e->set = kvm_set_ioapic_irq;
399ec807 AK	279	break;
	280	default:
	281	goto out;
	282	}
	283	e->irqchip.irqchip = ue->u.irqchip.irqchip;
	284	e->irqchip.pin = ue->u.irqchip.pin + delta;
d72118ce	285	if (e->irqchip.pin >= max_pin)
3e71f88b	286	goto out;
399ec807	287	break;
79950e10 SY	288	case KVM_IRQ_ROUTING_MSI:
	289	e->set = kvm_set_msi;
	290	e->msi.address_lo = ue->u.msi.address_lo;
	291	e->msi.address_hi = ue->u.msi.address_hi;
	292	e->msi.data = ue->u.msi.data;
	293	break;
399ec807 AK	294	default:
	295	goto out;
	296	}
46e624b9	297
399ec807 AK	298	r = 0;
	299	out:
	300	return r;
	301	}
	302
399ec807 AK	303	#define IOAPIC_ROUTING_ENTRY(irq) \
399ec807 AK	304	{ .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
25f97ff4	305	.u.irqchip = { .irqchip = KVM_IRQCHIP_IOAPIC, .pin = (irq) } }
399ec807 AK	306	#define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq)
399ec807 AK	307
3bf58e9a	308	#define PIC_ROUTING_ENTRY(irq) \
399ec807	309	{ .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
25f97ff4	310	.u.irqchip = { .irqchip = SELECT_PIC(irq), .pin = (irq) % 8 } }
3bf58e9a	311	#define ROUTING_ENTRY2(irq) \
399ec807	312	IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq)
399ec807 AK	313
	314	static const struct kvm_irq_routing_entry default_routing[] = {
	315	ROUTING_ENTRY2(0), ROUTING_ENTRY2(1),
	316	ROUTING_ENTRY2(2), ROUTING_ENTRY2(3),
	317	ROUTING_ENTRY2(4), ROUTING_ENTRY2(5),
	318	ROUTING_ENTRY2(6), ROUTING_ENTRY2(7),
	319	ROUTING_ENTRY2(8), ROUTING_ENTRY2(9),
	320	ROUTING_ENTRY2(10), ROUTING_ENTRY2(11),
	321	ROUTING_ENTRY2(12), ROUTING_ENTRY2(13),
	322	ROUTING_ENTRY2(14), ROUTING_ENTRY2(15),
	323	ROUTING_ENTRY1(16), ROUTING_ENTRY1(17),
	324	ROUTING_ENTRY1(18), ROUTING_ENTRY1(19),
	325	ROUTING_ENTRY1(20), ROUTING_ENTRY1(21),
	326	ROUTING_ENTRY1(22), ROUTING_ENTRY1(23),
399ec807 AK	327	};
	328
	329	int kvm_setup_default_irq_routing(struct kvm *kvm)
	330	{
	331	return kvm_set_irq_routing(kvm, default_routing,
	332	ARRAY_SIZE(default_routing), 0);
	333	}