KVM: Add locking to virtual i8259 interrupt controller
[deliverable/linux.git] / arch / x86 / kvm / mmu.c
CommitLineData
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1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
e495606d 19
1d737c8a 20#include "mmu.h"
e495606d 21
edf88417 22#include <linux/kvm_host.h>
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23#include <linux/types.h>
24#include <linux/string.h>
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25#include <linux/mm.h>
26#include <linux/highmem.h>
27#include <linux/module.h>
448353ca 28#include <linux/swap.h>
05da4558 29#include <linux/hugetlb.h>
2f333bcb 30#include <linux/compiler.h>
6aa8b732 31
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32#include <asm/page.h>
33#include <asm/cmpxchg.h>
4e542370 34#include <asm/io.h>
13673a90 35#include <asm/vmx.h>
6aa8b732 36
18552672
JR
37/*
38 * When setting this variable to true it enables Two-Dimensional-Paging
39 * where the hardware walks 2 page tables:
40 * 1. the guest-virtual to guest-physical
41 * 2. while doing 1. it walks guest-physical to host-physical
42 * If the hardware supports that we don't need to do shadow paging.
43 */
2f333bcb 44bool tdp_enabled = false;
18552672 45
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46#undef MMU_DEBUG
47
48#undef AUDIT
49
50#ifdef AUDIT
51static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
52#else
53static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
54#endif
55
56#ifdef MMU_DEBUG
57
58#define pgprintk(x...) do { if (dbg) printk(x); } while (0)
59#define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
60
61#else
62
63#define pgprintk(x...) do { } while (0)
64#define rmap_printk(x...) do { } while (0)
65
66#endif
67
68#if defined(MMU_DEBUG) || defined(AUDIT)
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69static int dbg = 0;
70module_param(dbg, bool, 0644);
37a7d8b0 71#endif
6aa8b732 72
582801a9
MT
73static int oos_shadow = 1;
74module_param(oos_shadow, bool, 0644);
75
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76#ifndef MMU_DEBUG
77#define ASSERT(x) do { } while (0)
78#else
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79#define ASSERT(x) \
80 if (!(x)) { \
81 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
82 __FILE__, __LINE__, #x); \
83 }
d6c69ee9 84#endif
6aa8b732 85
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86#define PT_FIRST_AVAIL_BITS_SHIFT 9
87#define PT64_SECOND_AVAIL_BITS_SHIFT 52
88
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89#define VALID_PAGE(x) ((x) != INVALID_PAGE)
90
91#define PT64_LEVEL_BITS 9
92
93#define PT64_LEVEL_SHIFT(level) \
d77c26fc 94 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
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95
96#define PT64_LEVEL_MASK(level) \
97 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
98
99#define PT64_INDEX(address, level)\
100 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
101
102
103#define PT32_LEVEL_BITS 10
104
105#define PT32_LEVEL_SHIFT(level) \
d77c26fc 106 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
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107
108#define PT32_LEVEL_MASK(level) \
109 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
110
111#define PT32_INDEX(address, level)\
112 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
113
114
27aba766 115#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
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116#define PT64_DIR_BASE_ADDR_MASK \
117 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
118
119#define PT32_BASE_ADDR_MASK PAGE_MASK
120#define PT32_DIR_BASE_ADDR_MASK \
121 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
122
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123#define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
124 | PT64_NX_MASK)
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125
126#define PFERR_PRESENT_MASK (1U << 0)
127#define PFERR_WRITE_MASK (1U << 1)
128#define PFERR_USER_MASK (1U << 2)
73b1087e 129#define PFERR_FETCH_MASK (1U << 4)
6aa8b732 130
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131#define PT_DIRECTORY_LEVEL 2
132#define PT_PAGE_TABLE_LEVEL 1
133
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134#define RMAP_EXT 4
135
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136#define ACC_EXEC_MASK 1
137#define ACC_WRITE_MASK PT_WRITABLE_MASK
138#define ACC_USER_MASK PT_USER_MASK
139#define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
140
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141#define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
142
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143struct kvm_rmap_desc {
144 u64 *shadow_ptes[RMAP_EXT];
145 struct kvm_rmap_desc *more;
146};
147
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148struct kvm_shadow_walk {
149 int (*entry)(struct kvm_shadow_walk *walk, struct kvm_vcpu *vcpu,
d40a1ee4 150 u64 addr, u64 *spte, int level);
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151};
152
4731d4c7
MT
153struct kvm_unsync_walk {
154 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
155};
156
ad8cfbe3
MT
157typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
158
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159static struct kmem_cache *pte_chain_cache;
160static struct kmem_cache *rmap_desc_cache;
d3d25b04 161static struct kmem_cache *mmu_page_header_cache;
b5a33a75 162
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163static u64 __read_mostly shadow_trap_nonpresent_pte;
164static u64 __read_mostly shadow_notrap_nonpresent_pte;
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SY
165static u64 __read_mostly shadow_base_present_pte;
166static u64 __read_mostly shadow_nx_mask;
167static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
168static u64 __read_mostly shadow_user_mask;
169static u64 __read_mostly shadow_accessed_mask;
170static u64 __read_mostly shadow_dirty_mask;
64d4d521 171static u64 __read_mostly shadow_mt_mask;
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172
173void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
174{
175 shadow_trap_nonpresent_pte = trap_pte;
176 shadow_notrap_nonpresent_pte = notrap_pte;
177}
178EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
179
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SY
180void kvm_mmu_set_base_ptes(u64 base_pte)
181{
182 shadow_base_present_pte = base_pte;
183}
184EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
185
186void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
64d4d521 187 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 mt_mask)
7b52345e
SY
188{
189 shadow_user_mask = user_mask;
190 shadow_accessed_mask = accessed_mask;
191 shadow_dirty_mask = dirty_mask;
192 shadow_nx_mask = nx_mask;
193 shadow_x_mask = x_mask;
64d4d521 194 shadow_mt_mask = mt_mask;
7b52345e
SY
195}
196EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
197
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198static int is_write_protection(struct kvm_vcpu *vcpu)
199{
ad312c7c 200 return vcpu->arch.cr0 & X86_CR0_WP;
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201}
202
203static int is_cpuid_PSE36(void)
204{
205 return 1;
206}
207
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208static int is_nx(struct kvm_vcpu *vcpu)
209{
ad312c7c 210 return vcpu->arch.shadow_efer & EFER_NX;
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211}
212
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213static int is_present_pte(unsigned long pte)
214{
215 return pte & PT_PRESENT_MASK;
216}
217
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218static int is_shadow_present_pte(u64 pte)
219{
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220 return pte != shadow_trap_nonpresent_pte
221 && pte != shadow_notrap_nonpresent_pte;
222}
223
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224static int is_large_pte(u64 pte)
225{
226 return pte & PT_PAGE_SIZE_MASK;
227}
228
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229static int is_writeble_pte(unsigned long pte)
230{
231 return pte & PT_WRITABLE_MASK;
232}
233
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234static int is_dirty_pte(unsigned long pte)
235{
7b52345e 236 return pte & shadow_dirty_mask;
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237}
238
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239static int is_rmap_pte(u64 pte)
240{
4b1a80fa 241 return is_shadow_present_pte(pte);
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242}
243
35149e21 244static pfn_t spte_to_pfn(u64 pte)
0b49ea86 245{
35149e21 246 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
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247}
248
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249static gfn_t pse36_gfn_delta(u32 gpte)
250{
251 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
252
253 return (gpte & PT32_DIR_PSE36_MASK) << shift;
254}
255
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256static void set_shadow_pte(u64 *sptep, u64 spte)
257{
258#ifdef CONFIG_X86_64
259 set_64bit((unsigned long *)sptep, spte);
260#else
261 set_64bit((unsigned long long *)sptep, spte);
262#endif
263}
264
e2dec939 265static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
2e3e5882 266 struct kmem_cache *base_cache, int min)
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267{
268 void *obj;
269
270 if (cache->nobjs >= min)
e2dec939 271 return 0;
714b93da 272 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 273 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
714b93da 274 if (!obj)
e2dec939 275 return -ENOMEM;
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276 cache->objects[cache->nobjs++] = obj;
277 }
e2dec939 278 return 0;
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279}
280
281static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
282{
283 while (mc->nobjs)
284 kfree(mc->objects[--mc->nobjs]);
285}
286
c1158e63 287static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
2e3e5882 288 int min)
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289{
290 struct page *page;
291
292 if (cache->nobjs >= min)
293 return 0;
294 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 295 page = alloc_page(GFP_KERNEL);
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296 if (!page)
297 return -ENOMEM;
298 set_page_private(page, 0);
299 cache->objects[cache->nobjs++] = page_address(page);
300 }
301 return 0;
302}
303
304static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
305{
306 while (mc->nobjs)
c4d198d5 307 free_page((unsigned long)mc->objects[--mc->nobjs]);
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308}
309
2e3e5882 310static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
714b93da 311{
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312 int r;
313
ad312c7c 314 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
2e3e5882 315 pte_chain_cache, 4);
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316 if (r)
317 goto out;
ad312c7c 318 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
c41ef344 319 rmap_desc_cache, 4);
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320 if (r)
321 goto out;
ad312c7c 322 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
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323 if (r)
324 goto out;
ad312c7c 325 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
2e3e5882 326 mmu_page_header_cache, 4);
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327out:
328 return r;
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329}
330
331static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
332{
ad312c7c
ZX
333 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
334 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
335 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
336 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
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337}
338
339static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
340 size_t size)
341{
342 void *p;
343
344 BUG_ON(!mc->nobjs);
345 p = mc->objects[--mc->nobjs];
346 memset(p, 0, size);
347 return p;
348}
349
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350static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
351{
ad312c7c 352 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
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353 sizeof(struct kvm_pte_chain));
354}
355
90cb0529 356static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
714b93da 357{
90cb0529 358 kfree(pc);
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359}
360
361static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
362{
ad312c7c 363 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
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364 sizeof(struct kvm_rmap_desc));
365}
366
90cb0529 367static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
714b93da 368{
90cb0529 369 kfree(rd);
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370}
371
05da4558
MT
372/*
373 * Return the pointer to the largepage write count for a given
374 * gfn, handling slots that are not large page aligned.
375 */
376static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
377{
378 unsigned long idx;
379
380 idx = (gfn / KVM_PAGES_PER_HPAGE) -
381 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
382 return &slot->lpage_info[idx].write_count;
383}
384
385static void account_shadowed(struct kvm *kvm, gfn_t gfn)
386{
387 int *write_count;
388
2843099f
IE
389 gfn = unalias_gfn(kvm, gfn);
390 write_count = slot_largepage_idx(gfn,
391 gfn_to_memslot_unaliased(kvm, gfn));
05da4558 392 *write_count += 1;
05da4558
MT
393}
394
395static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
396{
397 int *write_count;
398
2843099f
IE
399 gfn = unalias_gfn(kvm, gfn);
400 write_count = slot_largepage_idx(gfn,
401 gfn_to_memslot_unaliased(kvm, gfn));
05da4558
MT
402 *write_count -= 1;
403 WARN_ON(*write_count < 0);
404}
405
406static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
407{
2843099f 408 struct kvm_memory_slot *slot;
05da4558
MT
409 int *largepage_idx;
410
2843099f
IE
411 gfn = unalias_gfn(kvm, gfn);
412 slot = gfn_to_memslot_unaliased(kvm, gfn);
05da4558
MT
413 if (slot) {
414 largepage_idx = slot_largepage_idx(gfn, slot);
415 return *largepage_idx;
416 }
417
418 return 1;
419}
420
421static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
422{
423 struct vm_area_struct *vma;
424 unsigned long addr;
4c2155ce 425 int ret = 0;
05da4558
MT
426
427 addr = gfn_to_hva(kvm, gfn);
428 if (kvm_is_error_hva(addr))
4c2155ce 429 return ret;
05da4558 430
4c2155ce 431 down_read(&current->mm->mmap_sem);
05da4558
MT
432 vma = find_vma(current->mm, addr);
433 if (vma && is_vm_hugetlb_page(vma))
4c2155ce
MT
434 ret = 1;
435 up_read(&current->mm->mmap_sem);
05da4558 436
4c2155ce 437 return ret;
05da4558
MT
438}
439
440static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
441{
442 struct kvm_memory_slot *slot;
443
444 if (has_wrprotected_page(vcpu->kvm, large_gfn))
445 return 0;
446
447 if (!host_largepage_backed(vcpu->kvm, large_gfn))
448 return 0;
449
450 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
451 if (slot && slot->dirty_bitmap)
452 return 0;
453
454 return 1;
455}
456
290fc38d
IE
457/*
458 * Take gfn and return the reverse mapping to it.
459 * Note: gfn must be unaliased before this function get called
460 */
461
05da4558 462static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
290fc38d
IE
463{
464 struct kvm_memory_slot *slot;
05da4558 465 unsigned long idx;
290fc38d
IE
466
467 slot = gfn_to_memslot(kvm, gfn);
05da4558
MT
468 if (!lpage)
469 return &slot->rmap[gfn - slot->base_gfn];
470
471 idx = (gfn / KVM_PAGES_PER_HPAGE) -
472 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
473
474 return &slot->lpage_info[idx].rmap_pde;
290fc38d
IE
475}
476
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477/*
478 * Reverse mapping data structures:
479 *
290fc38d
IE
480 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
481 * that points to page_address(page).
cd4a4e53 482 *
290fc38d
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483 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
484 * containing more mappings.
cd4a4e53 485 */
05da4558 486static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
cd4a4e53 487{
4db35314 488 struct kvm_mmu_page *sp;
cd4a4e53 489 struct kvm_rmap_desc *desc;
290fc38d 490 unsigned long *rmapp;
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491 int i;
492
493 if (!is_rmap_pte(*spte))
494 return;
290fc38d 495 gfn = unalias_gfn(vcpu->kvm, gfn);
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496 sp = page_header(__pa(spte));
497 sp->gfns[spte - sp->spt] = gfn;
05da4558 498 rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
290fc38d 499 if (!*rmapp) {
cd4a4e53 500 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
290fc38d
IE
501 *rmapp = (unsigned long)spte;
502 } else if (!(*rmapp & 1)) {
cd4a4e53 503 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
714b93da 504 desc = mmu_alloc_rmap_desc(vcpu);
290fc38d 505 desc->shadow_ptes[0] = (u64 *)*rmapp;
cd4a4e53 506 desc->shadow_ptes[1] = spte;
290fc38d 507 *rmapp = (unsigned long)desc | 1;
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508 } else {
509 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
290fc38d 510 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
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511 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
512 desc = desc->more;
513 if (desc->shadow_ptes[RMAP_EXT-1]) {
714b93da 514 desc->more = mmu_alloc_rmap_desc(vcpu);
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515 desc = desc->more;
516 }
517 for (i = 0; desc->shadow_ptes[i]; ++i)
518 ;
519 desc->shadow_ptes[i] = spte;
520 }
521}
522
290fc38d 523static void rmap_desc_remove_entry(unsigned long *rmapp,
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524 struct kvm_rmap_desc *desc,
525 int i,
526 struct kvm_rmap_desc *prev_desc)
527{
528 int j;
529
530 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
531 ;
532 desc->shadow_ptes[i] = desc->shadow_ptes[j];
11718b4d 533 desc->shadow_ptes[j] = NULL;
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534 if (j != 0)
535 return;
536 if (!prev_desc && !desc->more)
290fc38d 537 *rmapp = (unsigned long)desc->shadow_ptes[0];
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538 else
539 if (prev_desc)
540 prev_desc->more = desc->more;
541 else
290fc38d 542 *rmapp = (unsigned long)desc->more | 1;
90cb0529 543 mmu_free_rmap_desc(desc);
cd4a4e53
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544}
545
290fc38d 546static void rmap_remove(struct kvm *kvm, u64 *spte)
cd4a4e53 547{
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548 struct kvm_rmap_desc *desc;
549 struct kvm_rmap_desc *prev_desc;
4db35314 550 struct kvm_mmu_page *sp;
35149e21 551 pfn_t pfn;
290fc38d 552 unsigned long *rmapp;
cd4a4e53
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553 int i;
554
555 if (!is_rmap_pte(*spte))
556 return;
4db35314 557 sp = page_header(__pa(spte));
35149e21 558 pfn = spte_to_pfn(*spte);
7b52345e 559 if (*spte & shadow_accessed_mask)
35149e21 560 kvm_set_pfn_accessed(pfn);
b4231d61 561 if (is_writeble_pte(*spte))
35149e21 562 kvm_release_pfn_dirty(pfn);
b4231d61 563 else
35149e21 564 kvm_release_pfn_clean(pfn);
05da4558 565 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
290fc38d 566 if (!*rmapp) {
cd4a4e53
AK
567 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
568 BUG();
290fc38d 569 } else if (!(*rmapp & 1)) {
cd4a4e53 570 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
290fc38d 571 if ((u64 *)*rmapp != spte) {
cd4a4e53
AK
572 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
573 spte, *spte);
574 BUG();
575 }
290fc38d 576 *rmapp = 0;
cd4a4e53
AK
577 } else {
578 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
290fc38d 579 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
cd4a4e53
AK
580 prev_desc = NULL;
581 while (desc) {
582 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
583 if (desc->shadow_ptes[i] == spte) {
290fc38d 584 rmap_desc_remove_entry(rmapp,
714b93da 585 desc, i,
cd4a4e53
AK
586 prev_desc);
587 return;
588 }
589 prev_desc = desc;
590 desc = desc->more;
591 }
592 BUG();
593 }
594}
595
98348e95 596static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
374cbac0 597{
374cbac0 598 struct kvm_rmap_desc *desc;
98348e95
IE
599 struct kvm_rmap_desc *prev_desc;
600 u64 *prev_spte;
601 int i;
602
603 if (!*rmapp)
604 return NULL;
605 else if (!(*rmapp & 1)) {
606 if (!spte)
607 return (u64 *)*rmapp;
608 return NULL;
609 }
610 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
611 prev_desc = NULL;
612 prev_spte = NULL;
613 while (desc) {
614 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
615 if (prev_spte == spte)
616 return desc->shadow_ptes[i];
617 prev_spte = desc->shadow_ptes[i];
618 }
619 desc = desc->more;
620 }
621 return NULL;
622}
623
b1a36821 624static int rmap_write_protect(struct kvm *kvm, u64 gfn)
98348e95 625{
290fc38d 626 unsigned long *rmapp;
374cbac0 627 u64 *spte;
caa5b8a5 628 int write_protected = 0;
374cbac0 629
4a4c9924 630 gfn = unalias_gfn(kvm, gfn);
05da4558 631 rmapp = gfn_to_rmap(kvm, gfn, 0);
374cbac0 632
98348e95
IE
633 spte = rmap_next(kvm, rmapp, NULL);
634 while (spte) {
374cbac0 635 BUG_ON(!spte);
374cbac0 636 BUG_ON(!(*spte & PT_PRESENT_MASK));
374cbac0 637 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
caa5b8a5 638 if (is_writeble_pte(*spte)) {
9647c14c 639 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
caa5b8a5
ED
640 write_protected = 1;
641 }
9647c14c 642 spte = rmap_next(kvm, rmapp, spte);
374cbac0 643 }
855149aa 644 if (write_protected) {
35149e21 645 pfn_t pfn;
855149aa
IE
646
647 spte = rmap_next(kvm, rmapp, NULL);
35149e21
AL
648 pfn = spte_to_pfn(*spte);
649 kvm_set_pfn_dirty(pfn);
855149aa
IE
650 }
651
05da4558
MT
652 /* check for huge page mappings */
653 rmapp = gfn_to_rmap(kvm, gfn, 1);
654 spte = rmap_next(kvm, rmapp, NULL);
655 while (spte) {
656 BUG_ON(!spte);
657 BUG_ON(!(*spte & PT_PRESENT_MASK));
658 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
659 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
660 if (is_writeble_pte(*spte)) {
661 rmap_remove(kvm, spte);
662 --kvm->stat.lpages;
663 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
6597ca09 664 spte = NULL;
05da4558
MT
665 write_protected = 1;
666 }
667 spte = rmap_next(kvm, rmapp, spte);
668 }
669
b1a36821 670 return write_protected;
374cbac0
AK
671}
672
e930bffe
AA
673static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
674{
675 u64 *spte;
676 int need_tlb_flush = 0;
677
678 while ((spte = rmap_next(kvm, rmapp, NULL))) {
679 BUG_ON(!(*spte & PT_PRESENT_MASK));
680 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
681 rmap_remove(kvm, spte);
682 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
683 need_tlb_flush = 1;
684 }
685 return need_tlb_flush;
686}
687
688static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
689 int (*handler)(struct kvm *kvm, unsigned long *rmapp))
690{
691 int i;
692 int retval = 0;
693
694 /*
695 * If mmap_sem isn't taken, we can look the memslots with only
696 * the mmu_lock by skipping over the slots with userspace_addr == 0.
697 */
698 for (i = 0; i < kvm->nmemslots; i++) {
699 struct kvm_memory_slot *memslot = &kvm->memslots[i];
700 unsigned long start = memslot->userspace_addr;
701 unsigned long end;
702
703 /* mmu_lock protects userspace_addr */
704 if (!start)
705 continue;
706
707 end = start + (memslot->npages << PAGE_SHIFT);
708 if (hva >= start && hva < end) {
709 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
710 retval |= handler(kvm, &memslot->rmap[gfn_offset]);
711 retval |= handler(kvm,
712 &memslot->lpage_info[
713 gfn_offset /
714 KVM_PAGES_PER_HPAGE].rmap_pde);
715 }
716 }
717
718 return retval;
719}
720
721int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
722{
723 return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
724}
725
726static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
727{
728 u64 *spte;
729 int young = 0;
730
534e38b4
SY
731 /* always return old for EPT */
732 if (!shadow_accessed_mask)
733 return 0;
734
e930bffe
AA
735 spte = rmap_next(kvm, rmapp, NULL);
736 while (spte) {
737 int _young;
738 u64 _spte = *spte;
739 BUG_ON(!(_spte & PT_PRESENT_MASK));
740 _young = _spte & PT_ACCESSED_MASK;
741 if (_young) {
742 young = 1;
743 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
744 }
745 spte = rmap_next(kvm, rmapp, spte);
746 }
747 return young;
748}
749
750int kvm_age_hva(struct kvm *kvm, unsigned long hva)
751{
752 return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
753}
754
d6c69ee9 755#ifdef MMU_DEBUG
47ad8e68 756static int is_empty_shadow_page(u64 *spt)
6aa8b732 757{
139bdb2d
AK
758 u64 *pos;
759 u64 *end;
760
47ad8e68 761 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
3c915510 762 if (is_shadow_present_pte(*pos)) {
b8688d51 763 printk(KERN_ERR "%s: %p %llx\n", __func__,
139bdb2d 764 pos, *pos);
6aa8b732 765 return 0;
139bdb2d 766 }
6aa8b732
AK
767 return 1;
768}
d6c69ee9 769#endif
6aa8b732 770
4db35314 771static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
260746c0 772{
4db35314
AK
773 ASSERT(is_empty_shadow_page(sp->spt));
774 list_del(&sp->link);
775 __free_page(virt_to_page(sp->spt));
776 __free_page(virt_to_page(sp->gfns));
777 kfree(sp);
f05e70ac 778 ++kvm->arch.n_free_mmu_pages;
260746c0
AK
779}
780
cea0f0e7
AK
781static unsigned kvm_page_table_hashfn(gfn_t gfn)
782{
1ae0a13d 783 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
cea0f0e7
AK
784}
785
25c0de2c
AK
786static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
787 u64 *parent_pte)
6aa8b732 788{
4db35314 789 struct kvm_mmu_page *sp;
6aa8b732 790
ad312c7c
ZX
791 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
792 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
793 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
4db35314 794 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
f05e70ac 795 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
6cffe8ca 796 INIT_LIST_HEAD(&sp->oos_link);
4db35314 797 ASSERT(is_empty_shadow_page(sp->spt));
291f26bc 798 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
4db35314 799 sp->multimapped = 0;
6cffe8ca 800 sp->global = 1;
4db35314 801 sp->parent_pte = parent_pte;
f05e70ac 802 --vcpu->kvm->arch.n_free_mmu_pages;
4db35314 803 return sp;
6aa8b732
AK
804}
805
714b93da 806static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
4db35314 807 struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7
AK
808{
809 struct kvm_pte_chain *pte_chain;
810 struct hlist_node *node;
811 int i;
812
813 if (!parent_pte)
814 return;
4db35314
AK
815 if (!sp->multimapped) {
816 u64 *old = sp->parent_pte;
cea0f0e7
AK
817
818 if (!old) {
4db35314 819 sp->parent_pte = parent_pte;
cea0f0e7
AK
820 return;
821 }
4db35314 822 sp->multimapped = 1;
714b93da 823 pte_chain = mmu_alloc_pte_chain(vcpu);
4db35314
AK
824 INIT_HLIST_HEAD(&sp->parent_ptes);
825 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
826 pte_chain->parent_ptes[0] = old;
827 }
4db35314 828 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
cea0f0e7
AK
829 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
830 continue;
831 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
832 if (!pte_chain->parent_ptes[i]) {
833 pte_chain->parent_ptes[i] = parent_pte;
834 return;
835 }
836 }
714b93da 837 pte_chain = mmu_alloc_pte_chain(vcpu);
cea0f0e7 838 BUG_ON(!pte_chain);
4db35314 839 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
840 pte_chain->parent_ptes[0] = parent_pte;
841}
842
4db35314 843static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
cea0f0e7
AK
844 u64 *parent_pte)
845{
846 struct kvm_pte_chain *pte_chain;
847 struct hlist_node *node;
848 int i;
849
4db35314
AK
850 if (!sp->multimapped) {
851 BUG_ON(sp->parent_pte != parent_pte);
852 sp->parent_pte = NULL;
cea0f0e7
AK
853 return;
854 }
4db35314 855 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
cea0f0e7
AK
856 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
857 if (!pte_chain->parent_ptes[i])
858 break;
859 if (pte_chain->parent_ptes[i] != parent_pte)
860 continue;
697fe2e2
AK
861 while (i + 1 < NR_PTE_CHAIN_ENTRIES
862 && pte_chain->parent_ptes[i + 1]) {
cea0f0e7
AK
863 pte_chain->parent_ptes[i]
864 = pte_chain->parent_ptes[i + 1];
865 ++i;
866 }
867 pte_chain->parent_ptes[i] = NULL;
697fe2e2
AK
868 if (i == 0) {
869 hlist_del(&pte_chain->link);
90cb0529 870 mmu_free_pte_chain(pte_chain);
4db35314
AK
871 if (hlist_empty(&sp->parent_ptes)) {
872 sp->multimapped = 0;
873 sp->parent_pte = NULL;
697fe2e2
AK
874 }
875 }
cea0f0e7
AK
876 return;
877 }
878 BUG();
879}
880
ad8cfbe3
MT
881
882static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
883 mmu_parent_walk_fn fn)
884{
885 struct kvm_pte_chain *pte_chain;
886 struct hlist_node *node;
887 struct kvm_mmu_page *parent_sp;
888 int i;
889
890 if (!sp->multimapped && sp->parent_pte) {
891 parent_sp = page_header(__pa(sp->parent_pte));
892 fn(vcpu, parent_sp);
893 mmu_parent_walk(vcpu, parent_sp, fn);
894 return;
895 }
896 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
897 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
898 if (!pte_chain->parent_ptes[i])
899 break;
900 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
901 fn(vcpu, parent_sp);
902 mmu_parent_walk(vcpu, parent_sp, fn);
903 }
904}
905
0074ff63
MT
906static void kvm_mmu_update_unsync_bitmap(u64 *spte)
907{
908 unsigned int index;
909 struct kvm_mmu_page *sp = page_header(__pa(spte));
910
911 index = spte - sp->spt;
60c8aec6
MT
912 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
913 sp->unsync_children++;
914 WARN_ON(!sp->unsync_children);
0074ff63
MT
915}
916
917static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
918{
919 struct kvm_pte_chain *pte_chain;
920 struct hlist_node *node;
921 int i;
922
923 if (!sp->parent_pte)
924 return;
925
926 if (!sp->multimapped) {
927 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
928 return;
929 }
930
931 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
932 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
933 if (!pte_chain->parent_ptes[i])
934 break;
935 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
936 }
937}
938
939static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
940{
0074ff63
MT
941 kvm_mmu_update_parents_unsync(sp);
942 return 1;
943}
944
945static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
946 struct kvm_mmu_page *sp)
947{
948 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
949 kvm_mmu_update_parents_unsync(sp);
950}
951
d761a501
AK
952static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
953 struct kvm_mmu_page *sp)
954{
955 int i;
956
957 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
958 sp->spt[i] = shadow_trap_nonpresent_pte;
959}
960
e8bc217a
MT
961static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
962 struct kvm_mmu_page *sp)
963{
964 return 1;
965}
966
a7052897
MT
967static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
968{
969}
970
60c8aec6
MT
971#define KVM_PAGE_ARRAY_NR 16
972
973struct kvm_mmu_pages {
974 struct mmu_page_and_offset {
975 struct kvm_mmu_page *sp;
976 unsigned int idx;
977 } page[KVM_PAGE_ARRAY_NR];
978 unsigned int nr;
979};
980
0074ff63
MT
981#define for_each_unsync_children(bitmap, idx) \
982 for (idx = find_first_bit(bitmap, 512); \
983 idx < 512; \
984 idx = find_next_bit(bitmap, 512, idx+1))
985
60c8aec6
MT
986int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
987 int idx)
4731d4c7 988{
60c8aec6 989 int i;
4731d4c7 990
60c8aec6
MT
991 if (sp->unsync)
992 for (i=0; i < pvec->nr; i++)
993 if (pvec->page[i].sp == sp)
994 return 0;
995
996 pvec->page[pvec->nr].sp = sp;
997 pvec->page[pvec->nr].idx = idx;
998 pvec->nr++;
999 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1000}
1001
1002static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1003 struct kvm_mmu_pages *pvec)
1004{
1005 int i, ret, nr_unsync_leaf = 0;
4731d4c7 1006
0074ff63 1007 for_each_unsync_children(sp->unsync_child_bitmap, i) {
4731d4c7
MT
1008 u64 ent = sp->spt[i];
1009
1010 if (is_shadow_present_pte(ent)) {
1011 struct kvm_mmu_page *child;
1012 child = page_header(ent & PT64_BASE_ADDR_MASK);
1013
1014 if (child->unsync_children) {
60c8aec6
MT
1015 if (mmu_pages_add(pvec, child, i))
1016 return -ENOSPC;
1017
1018 ret = __mmu_unsync_walk(child, pvec);
1019 if (!ret)
1020 __clear_bit(i, sp->unsync_child_bitmap);
1021 else if (ret > 0)
1022 nr_unsync_leaf += ret;
1023 else
4731d4c7
MT
1024 return ret;
1025 }
1026
1027 if (child->unsync) {
60c8aec6
MT
1028 nr_unsync_leaf++;
1029 if (mmu_pages_add(pvec, child, i))
1030 return -ENOSPC;
4731d4c7
MT
1031 }
1032 }
1033 }
1034
0074ff63 1035 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
4731d4c7
MT
1036 sp->unsync_children = 0;
1037
60c8aec6
MT
1038 return nr_unsync_leaf;
1039}
1040
1041static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1042 struct kvm_mmu_pages *pvec)
1043{
1044 if (!sp->unsync_children)
1045 return 0;
1046
1047 mmu_pages_add(pvec, sp, 0);
1048 return __mmu_unsync_walk(sp, pvec);
4731d4c7
MT
1049}
1050
4db35314 1051static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
cea0f0e7
AK
1052{
1053 unsigned index;
1054 struct hlist_head *bucket;
4db35314 1055 struct kvm_mmu_page *sp;
cea0f0e7
AK
1056 struct hlist_node *node;
1057
b8688d51 1058 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1ae0a13d 1059 index = kvm_page_table_hashfn(gfn);
f05e70ac 1060 bucket = &kvm->arch.mmu_page_hash[index];
4db35314 1061 hlist_for_each_entry(sp, node, bucket, hash_link)
2e53d63a
MT
1062 if (sp->gfn == gfn && !sp->role.metaphysical
1063 && !sp->role.invalid) {
cea0f0e7 1064 pgprintk("%s: found role %x\n",
b8688d51 1065 __func__, sp->role.word);
4db35314 1066 return sp;
cea0f0e7
AK
1067 }
1068 return NULL;
1069}
1070
6cffe8ca
MT
1071static void kvm_unlink_unsync_global(struct kvm *kvm, struct kvm_mmu_page *sp)
1072{
1073 list_del(&sp->oos_link);
1074 --kvm->stat.mmu_unsync_global;
1075}
1076
4731d4c7
MT
1077static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1078{
1079 WARN_ON(!sp->unsync);
1080 sp->unsync = 0;
6cffe8ca
MT
1081 if (sp->global)
1082 kvm_unlink_unsync_global(kvm, sp);
4731d4c7
MT
1083 --kvm->stat.mmu_unsync;
1084}
1085
1086static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1087
1088static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1089{
1090 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1091 kvm_mmu_zap_page(vcpu->kvm, sp);
1092 return 1;
1093 }
1094
b1a36821
MT
1095 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1096 kvm_flush_remote_tlbs(vcpu->kvm);
0c0f40bd 1097 kvm_unlink_unsync_page(vcpu->kvm, sp);
4731d4c7
MT
1098 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1099 kvm_mmu_zap_page(vcpu->kvm, sp);
1100 return 1;
1101 }
1102
1103 kvm_mmu_flush_tlb(vcpu);
4731d4c7
MT
1104 return 0;
1105}
1106
60c8aec6
MT
1107struct mmu_page_path {
1108 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1109 unsigned int idx[PT64_ROOT_LEVEL-1];
4731d4c7
MT
1110};
1111
60c8aec6
MT
1112#define for_each_sp(pvec, sp, parents, i) \
1113 for (i = mmu_pages_next(&pvec, &parents, -1), \
1114 sp = pvec.page[i].sp; \
1115 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1116 i = mmu_pages_next(&pvec, &parents, i))
1117
1118int mmu_pages_next(struct kvm_mmu_pages *pvec, struct mmu_page_path *parents,
1119 int i)
1120{
1121 int n;
1122
1123 for (n = i+1; n < pvec->nr; n++) {
1124 struct kvm_mmu_page *sp = pvec->page[n].sp;
1125
1126 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1127 parents->idx[0] = pvec->page[n].idx;
1128 return n;
1129 }
1130
1131 parents->parent[sp->role.level-2] = sp;
1132 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1133 }
1134
1135 return n;
1136}
1137
1138void mmu_pages_clear_parents(struct mmu_page_path *parents)
4731d4c7 1139{
60c8aec6
MT
1140 struct kvm_mmu_page *sp;
1141 unsigned int level = 0;
1142
1143 do {
1144 unsigned int idx = parents->idx[level];
4731d4c7 1145
60c8aec6
MT
1146 sp = parents->parent[level];
1147 if (!sp)
1148 return;
1149
1150 --sp->unsync_children;
1151 WARN_ON((int)sp->unsync_children < 0);
1152 __clear_bit(idx, sp->unsync_child_bitmap);
1153 level++;
1154 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
4731d4c7
MT
1155}
1156
60c8aec6
MT
1157static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1158 struct mmu_page_path *parents,
1159 struct kvm_mmu_pages *pvec)
4731d4c7 1160{
60c8aec6
MT
1161 parents->parent[parent->role.level-1] = NULL;
1162 pvec->nr = 0;
1163}
4731d4c7 1164
60c8aec6
MT
1165static void mmu_sync_children(struct kvm_vcpu *vcpu,
1166 struct kvm_mmu_page *parent)
1167{
1168 int i;
1169 struct kvm_mmu_page *sp;
1170 struct mmu_page_path parents;
1171 struct kvm_mmu_pages pages;
1172
1173 kvm_mmu_pages_init(parent, &parents, &pages);
1174 while (mmu_unsync_walk(parent, &pages)) {
b1a36821
MT
1175 int protected = 0;
1176
1177 for_each_sp(pages, sp, parents, i)
1178 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1179
1180 if (protected)
1181 kvm_flush_remote_tlbs(vcpu->kvm);
1182
60c8aec6
MT
1183 for_each_sp(pages, sp, parents, i) {
1184 kvm_sync_page(vcpu, sp);
1185 mmu_pages_clear_parents(&parents);
1186 }
4731d4c7 1187 cond_resched_lock(&vcpu->kvm->mmu_lock);
60c8aec6
MT
1188 kvm_mmu_pages_init(parent, &parents, &pages);
1189 }
4731d4c7
MT
1190}
1191
cea0f0e7
AK
1192static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1193 gfn_t gfn,
1194 gva_t gaddr,
1195 unsigned level,
1196 int metaphysical,
41074d07 1197 unsigned access,
f7d9c7b7 1198 u64 *parent_pte)
cea0f0e7
AK
1199{
1200 union kvm_mmu_page_role role;
1201 unsigned index;
1202 unsigned quadrant;
1203 struct hlist_head *bucket;
4db35314 1204 struct kvm_mmu_page *sp;
4731d4c7 1205 struct hlist_node *node, *tmp;
cea0f0e7
AK
1206
1207 role.word = 0;
ad312c7c 1208 role.glevels = vcpu->arch.mmu.root_level;
cea0f0e7
AK
1209 role.level = level;
1210 role.metaphysical = metaphysical;
41074d07 1211 role.access = access;
ad312c7c 1212 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
cea0f0e7
AK
1213 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1214 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1215 role.quadrant = quadrant;
1216 }
b8688d51 1217 pgprintk("%s: looking gfn %lx role %x\n", __func__,
cea0f0e7 1218 gfn, role.word);
1ae0a13d 1219 index = kvm_page_table_hashfn(gfn);
f05e70ac 1220 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4731d4c7
MT
1221 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1222 if (sp->gfn == gfn) {
1223 if (sp->unsync)
1224 if (kvm_sync_page(vcpu, sp))
1225 continue;
1226
1227 if (sp->role.word != role.word)
1228 continue;
1229
4db35314 1230 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
0074ff63
MT
1231 if (sp->unsync_children) {
1232 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1233 kvm_mmu_mark_parents_unsync(vcpu, sp);
1234 }
b8688d51 1235 pgprintk("%s: found\n", __func__);
4db35314 1236 return sp;
cea0f0e7 1237 }
dfc5aa00 1238 ++vcpu->kvm->stat.mmu_cache_miss;
4db35314
AK
1239 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1240 if (!sp)
1241 return sp;
b8688d51 1242 pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
4db35314
AK
1243 sp->gfn = gfn;
1244 sp->role = role;
1245 hlist_add_head(&sp->hash_link, bucket);
4731d4c7 1246 if (!metaphysical) {
b1a36821
MT
1247 if (rmap_write_protect(vcpu->kvm, gfn))
1248 kvm_flush_remote_tlbs(vcpu->kvm);
4731d4c7
MT
1249 account_shadowed(vcpu->kvm, gfn);
1250 }
131d8279
AK
1251 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1252 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1253 else
1254 nonpaging_prefetch_page(vcpu, sp);
4db35314 1255 return sp;
cea0f0e7
AK
1256}
1257
3d000db5 1258static int walk_shadow(struct kvm_shadow_walk *walker,
d40a1ee4 1259 struct kvm_vcpu *vcpu, u64 addr)
3d000db5
AK
1260{
1261 hpa_t shadow_addr;
1262 int level;
1263 int r;
1264 u64 *sptep;
1265 unsigned index;
1266
1267 shadow_addr = vcpu->arch.mmu.root_hpa;
1268 level = vcpu->arch.mmu.shadow_root_level;
1269 if (level == PT32E_ROOT_LEVEL) {
1270 shadow_addr = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1271 shadow_addr &= PT64_BASE_ADDR_MASK;
eb64f1e8
MT
1272 if (!shadow_addr)
1273 return 1;
3d000db5
AK
1274 --level;
1275 }
1276
1277 while (level >= PT_PAGE_TABLE_LEVEL) {
1278 index = SHADOW_PT_INDEX(addr, level);
1279 sptep = ((u64 *)__va(shadow_addr)) + index;
1280 r = walker->entry(walker, vcpu, addr, sptep, level);
1281 if (r)
1282 return r;
1283 shadow_addr = *sptep & PT64_BASE_ADDR_MASK;
1284 --level;
1285 }
1286 return 0;
1287}
1288
90cb0529 1289static void kvm_mmu_page_unlink_children(struct kvm *kvm,
4db35314 1290 struct kvm_mmu_page *sp)
a436036b 1291{
697fe2e2
AK
1292 unsigned i;
1293 u64 *pt;
1294 u64 ent;
1295
4db35314 1296 pt = sp->spt;
697fe2e2 1297
4db35314 1298 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
697fe2e2 1299 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
c7addb90 1300 if (is_shadow_present_pte(pt[i]))
290fc38d 1301 rmap_remove(kvm, &pt[i]);
c7addb90 1302 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2
AK
1303 }
1304 return;
1305 }
1306
1307 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1308 ent = pt[i];
1309
05da4558
MT
1310 if (is_shadow_present_pte(ent)) {
1311 if (!is_large_pte(ent)) {
1312 ent &= PT64_BASE_ADDR_MASK;
1313 mmu_page_remove_parent_pte(page_header(ent),
1314 &pt[i]);
1315 } else {
1316 --kvm->stat.lpages;
1317 rmap_remove(kvm, &pt[i]);
1318 }
1319 }
c7addb90 1320 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2 1321 }
a436036b
AK
1322}
1323
4db35314 1324static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7 1325{
4db35314 1326 mmu_page_remove_parent_pte(sp, parent_pte);
a436036b
AK
1327}
1328
12b7d28f
AK
1329static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1330{
1331 int i;
1332
1333 for (i = 0; i < KVM_MAX_VCPUS; ++i)
1334 if (kvm->vcpus[i])
ad312c7c 1335 kvm->vcpus[i]->arch.last_pte_updated = NULL;
12b7d28f
AK
1336}
1337
31aa2b44 1338static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
a436036b
AK
1339{
1340 u64 *parent_pte;
1341
4db35314
AK
1342 while (sp->multimapped || sp->parent_pte) {
1343 if (!sp->multimapped)
1344 parent_pte = sp->parent_pte;
a436036b
AK
1345 else {
1346 struct kvm_pte_chain *chain;
1347
4db35314 1348 chain = container_of(sp->parent_ptes.first,
a436036b
AK
1349 struct kvm_pte_chain, link);
1350 parent_pte = chain->parent_ptes[0];
1351 }
697fe2e2 1352 BUG_ON(!parent_pte);
4db35314 1353 kvm_mmu_put_page(sp, parent_pte);
c7addb90 1354 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
a436036b 1355 }
31aa2b44
AK
1356}
1357
60c8aec6
MT
1358static int mmu_zap_unsync_children(struct kvm *kvm,
1359 struct kvm_mmu_page *parent)
4731d4c7 1360{
60c8aec6
MT
1361 int i, zapped = 0;
1362 struct mmu_page_path parents;
1363 struct kvm_mmu_pages pages;
4731d4c7 1364
60c8aec6 1365 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
4731d4c7 1366 return 0;
60c8aec6
MT
1367
1368 kvm_mmu_pages_init(parent, &parents, &pages);
1369 while (mmu_unsync_walk(parent, &pages)) {
1370 struct kvm_mmu_page *sp;
1371
1372 for_each_sp(pages, sp, parents, i) {
1373 kvm_mmu_zap_page(kvm, sp);
1374 mmu_pages_clear_parents(&parents);
1375 }
1376 zapped += pages.nr;
1377 kvm_mmu_pages_init(parent, &parents, &pages);
1378 }
1379
1380 return zapped;
4731d4c7
MT
1381}
1382
07385413 1383static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
31aa2b44 1384{
4731d4c7 1385 int ret;
31aa2b44 1386 ++kvm->stat.mmu_shadow_zapped;
4731d4c7 1387 ret = mmu_zap_unsync_children(kvm, sp);
4db35314 1388 kvm_mmu_page_unlink_children(kvm, sp);
31aa2b44 1389 kvm_mmu_unlink_parents(kvm, sp);
5b5c6a5a
AK
1390 kvm_flush_remote_tlbs(kvm);
1391 if (!sp->role.invalid && !sp->role.metaphysical)
1392 unaccount_shadowed(kvm, sp->gfn);
4731d4c7
MT
1393 if (sp->unsync)
1394 kvm_unlink_unsync_page(kvm, sp);
4db35314
AK
1395 if (!sp->root_count) {
1396 hlist_del(&sp->hash_link);
1397 kvm_mmu_free_page(kvm, sp);
2e53d63a 1398 } else {
2e53d63a 1399 sp->role.invalid = 1;
5b5c6a5a 1400 list_move(&sp->link, &kvm->arch.active_mmu_pages);
2e53d63a
MT
1401 kvm_reload_remote_mmus(kvm);
1402 }
12b7d28f 1403 kvm_mmu_reset_last_pte_updated(kvm);
4731d4c7 1404 return ret;
a436036b
AK
1405}
1406
82ce2c96
IE
1407/*
1408 * Changing the number of mmu pages allocated to the vm
1409 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1410 */
1411void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1412{
1413 /*
1414 * If we set the number of mmu pages to be smaller be than the
1415 * number of actived pages , we must to free some mmu pages before we
1416 * change the value
1417 */
1418
f05e70ac 1419 if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
82ce2c96 1420 kvm_nr_mmu_pages) {
f05e70ac
ZX
1421 int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
1422 - kvm->arch.n_free_mmu_pages;
82ce2c96
IE
1423
1424 while (n_used_mmu_pages > kvm_nr_mmu_pages) {
1425 struct kvm_mmu_page *page;
1426
f05e70ac 1427 page = container_of(kvm->arch.active_mmu_pages.prev,
82ce2c96
IE
1428 struct kvm_mmu_page, link);
1429 kvm_mmu_zap_page(kvm, page);
1430 n_used_mmu_pages--;
1431 }
f05e70ac 1432 kvm->arch.n_free_mmu_pages = 0;
82ce2c96
IE
1433 }
1434 else
f05e70ac
ZX
1435 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1436 - kvm->arch.n_alloc_mmu_pages;
82ce2c96 1437
f05e70ac 1438 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
82ce2c96
IE
1439}
1440
f67a46f4 1441static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
a436036b
AK
1442{
1443 unsigned index;
1444 struct hlist_head *bucket;
4db35314 1445 struct kvm_mmu_page *sp;
a436036b
AK
1446 struct hlist_node *node, *n;
1447 int r;
1448
b8688d51 1449 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
a436036b 1450 r = 0;
1ae0a13d 1451 index = kvm_page_table_hashfn(gfn);
f05e70ac 1452 bucket = &kvm->arch.mmu_page_hash[index];
4db35314
AK
1453 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1454 if (sp->gfn == gfn && !sp->role.metaphysical) {
b8688d51 1455 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
4db35314 1456 sp->role.word);
a436036b 1457 r = 1;
07385413
MT
1458 if (kvm_mmu_zap_page(kvm, sp))
1459 n = bucket->first;
a436036b
AK
1460 }
1461 return r;
cea0f0e7
AK
1462}
1463
f67a46f4 1464static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
97a0a01e 1465{
4db35314 1466 struct kvm_mmu_page *sp;
97a0a01e 1467
4db35314 1468 while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
b8688d51 1469 pgprintk("%s: zap %lx %x\n", __func__, gfn, sp->role.word);
4db35314 1470 kvm_mmu_zap_page(kvm, sp);
97a0a01e
AK
1471 }
1472}
1473
38c335f1 1474static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
6aa8b732 1475{
38c335f1 1476 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
4db35314 1477 struct kvm_mmu_page *sp = page_header(__pa(pte));
6aa8b732 1478
291f26bc 1479 __set_bit(slot, sp->slot_bitmap);
6aa8b732
AK
1480}
1481
6844dec6
MT
1482static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1483{
1484 int i;
1485 u64 *pt = sp->spt;
1486
1487 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1488 return;
1489
1490 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1491 if (pt[i] == shadow_notrap_nonpresent_pte)
1492 set_shadow_pte(&pt[i], shadow_trap_nonpresent_pte);
1493 }
1494}
1495
039576c0
AK
1496struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1497{
72dc67a6
IE
1498 struct page *page;
1499
ad312c7c 1500 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
039576c0
AK
1501
1502 if (gpa == UNMAPPED_GVA)
1503 return NULL;
72dc67a6 1504
72dc67a6 1505 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
72dc67a6
IE
1506
1507 return page;
039576c0
AK
1508}
1509
74be52e3
SY
1510/*
1511 * The function is based on mtrr_type_lookup() in
1512 * arch/x86/kernel/cpu/mtrr/generic.c
1513 */
1514static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1515 u64 start, u64 end)
1516{
1517 int i;
1518 u64 base, mask;
1519 u8 prev_match, curr_match;
1520 int num_var_ranges = KVM_NR_VAR_MTRR;
1521
1522 if (!mtrr_state->enabled)
1523 return 0xFF;
1524
1525 /* Make end inclusive end, instead of exclusive */
1526 end--;
1527
1528 /* Look in fixed ranges. Just return the type as per start */
1529 if (mtrr_state->have_fixed && (start < 0x100000)) {
1530 int idx;
1531
1532 if (start < 0x80000) {
1533 idx = 0;
1534 idx += (start >> 16);
1535 return mtrr_state->fixed_ranges[idx];
1536 } else if (start < 0xC0000) {
1537 idx = 1 * 8;
1538 idx += ((start - 0x80000) >> 14);
1539 return mtrr_state->fixed_ranges[idx];
1540 } else if (start < 0x1000000) {
1541 idx = 3 * 8;
1542 idx += ((start - 0xC0000) >> 12);
1543 return mtrr_state->fixed_ranges[idx];
1544 }
1545 }
1546
1547 /*
1548 * Look in variable ranges
1549 * Look of multiple ranges matching this address and pick type
1550 * as per MTRR precedence
1551 */
1552 if (!(mtrr_state->enabled & 2))
1553 return mtrr_state->def_type;
1554
1555 prev_match = 0xFF;
1556 for (i = 0; i < num_var_ranges; ++i) {
1557 unsigned short start_state, end_state;
1558
1559 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1560 continue;
1561
1562 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1563 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1564 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1565 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1566
1567 start_state = ((start & mask) == (base & mask));
1568 end_state = ((end & mask) == (base & mask));
1569 if (start_state != end_state)
1570 return 0xFE;
1571
1572 if ((start & mask) != (base & mask))
1573 continue;
1574
1575 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1576 if (prev_match == 0xFF) {
1577 prev_match = curr_match;
1578 continue;
1579 }
1580
1581 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1582 curr_match == MTRR_TYPE_UNCACHABLE)
1583 return MTRR_TYPE_UNCACHABLE;
1584
1585 if ((prev_match == MTRR_TYPE_WRBACK &&
1586 curr_match == MTRR_TYPE_WRTHROUGH) ||
1587 (prev_match == MTRR_TYPE_WRTHROUGH &&
1588 curr_match == MTRR_TYPE_WRBACK)) {
1589 prev_match = MTRR_TYPE_WRTHROUGH;
1590 curr_match = MTRR_TYPE_WRTHROUGH;
1591 }
1592
1593 if (prev_match != curr_match)
1594 return MTRR_TYPE_UNCACHABLE;
1595 }
1596
1597 if (prev_match != 0xFF)
1598 return prev_match;
1599
1600 return mtrr_state->def_type;
1601}
1602
1603static u8 get_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1604{
1605 u8 mtrr;
1606
1607 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1608 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1609 if (mtrr == 0xfe || mtrr == 0xff)
1610 mtrr = MTRR_TYPE_WRBACK;
1611 return mtrr;
1612}
1613
4731d4c7
MT
1614static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1615{
1616 unsigned index;
1617 struct hlist_head *bucket;
1618 struct kvm_mmu_page *s;
1619 struct hlist_node *node, *n;
1620
1621 index = kvm_page_table_hashfn(sp->gfn);
1622 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1623 /* don't unsync if pagetable is shadowed with multiple roles */
1624 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1625 if (s->gfn != sp->gfn || s->role.metaphysical)
1626 continue;
1627 if (s->role.word != sp->role.word)
1628 return 1;
1629 }
4731d4c7
MT
1630 ++vcpu->kvm->stat.mmu_unsync;
1631 sp->unsync = 1;
6cffe8ca
MT
1632
1633 if (sp->global) {
1634 list_add(&sp->oos_link, &vcpu->kvm->arch.oos_global_pages);
1635 ++vcpu->kvm->stat.mmu_unsync_global;
1636 } else
1637 kvm_mmu_mark_parents_unsync(vcpu, sp);
1638
4731d4c7
MT
1639 mmu_convert_notrap(sp);
1640 return 0;
1641}
1642
1643static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1644 bool can_unsync)
1645{
1646 struct kvm_mmu_page *shadow;
1647
1648 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1649 if (shadow) {
1650 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1651 return 1;
1652 if (shadow->unsync)
1653 return 0;
582801a9 1654 if (can_unsync && oos_shadow)
4731d4c7
MT
1655 return kvm_unsync_page(vcpu, shadow);
1656 return 1;
1657 }
1658 return 0;
1659}
1660
1e73f9dd
MT
1661static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1662 unsigned pte_access, int user_fault,
1663 int write_fault, int dirty, int largepage,
6cffe8ca 1664 int global, gfn_t gfn, pfn_t pfn, bool speculative,
4731d4c7 1665 bool can_unsync)
1c4f1fd6
AK
1666{
1667 u64 spte;
1e73f9dd 1668 int ret = 0;
64d4d521 1669 u64 mt_mask = shadow_mt_mask;
6cffe8ca
MT
1670 struct kvm_mmu_page *sp = page_header(__pa(shadow_pte));
1671
25e23432
AK
1672 if (!(vcpu->arch.cr4 & X86_CR4_PGE))
1673 global = 0;
6cffe8ca
MT
1674 if (!global && sp->global) {
1675 sp->global = 0;
1676 if (sp->unsync) {
1677 kvm_unlink_unsync_global(vcpu->kvm, sp);
1678 kvm_mmu_mark_parents_unsync(vcpu, sp);
1679 }
1680 }
64d4d521 1681
1c4f1fd6
AK
1682 /*
1683 * We don't set the accessed bit, since we sometimes want to see
1684 * whether the guest actually used the pte (in order to detect
1685 * demand paging).
1686 */
7b52345e 1687 spte = shadow_base_present_pte | shadow_dirty_mask;
947da538 1688 if (!speculative)
3201b5d9 1689 spte |= shadow_accessed_mask;
1c4f1fd6
AK
1690 if (!dirty)
1691 pte_access &= ~ACC_WRITE_MASK;
7b52345e
SY
1692 if (pte_access & ACC_EXEC_MASK)
1693 spte |= shadow_x_mask;
1694 else
1695 spte |= shadow_nx_mask;
1c4f1fd6 1696 if (pte_access & ACC_USER_MASK)
7b52345e 1697 spte |= shadow_user_mask;
05da4558
MT
1698 if (largepage)
1699 spte |= PT_PAGE_SIZE_MASK;
64d4d521
SY
1700 if (mt_mask) {
1701 mt_mask = get_memory_type(vcpu, gfn) <<
1702 kvm_x86_ops->get_mt_mask_shift();
1703 spte |= mt_mask;
1704 }
1c4f1fd6 1705
35149e21 1706 spte |= (u64)pfn << PAGE_SHIFT;
1c4f1fd6
AK
1707
1708 if ((pte_access & ACC_WRITE_MASK)
1709 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1c4f1fd6 1710
38187c83
MT
1711 if (largepage && has_wrprotected_page(vcpu->kvm, gfn)) {
1712 ret = 1;
1713 spte = shadow_trap_nonpresent_pte;
1714 goto set_pte;
1715 }
1716
1c4f1fd6 1717 spte |= PT_WRITABLE_MASK;
1c4f1fd6 1718
ecc5589f
MT
1719 /*
1720 * Optimization: for pte sync, if spte was writable the hash
1721 * lookup is unnecessary (and expensive). Write protection
1722 * is responsibility of mmu_get_page / kvm_sync_page.
1723 * Same reasoning can be applied to dirty page accounting.
1724 */
1725 if (!can_unsync && is_writeble_pte(*shadow_pte))
1726 goto set_pte;
1727
4731d4c7 1728 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1c4f1fd6 1729 pgprintk("%s: found shadow page for %lx, marking ro\n",
b8688d51 1730 __func__, gfn);
1e73f9dd 1731 ret = 1;
1c4f1fd6 1732 pte_access &= ~ACC_WRITE_MASK;
a378b4e6 1733 if (is_writeble_pte(spte))
1c4f1fd6 1734 spte &= ~PT_WRITABLE_MASK;
1c4f1fd6
AK
1735 }
1736 }
1737
1c4f1fd6
AK
1738 if (pte_access & ACC_WRITE_MASK)
1739 mark_page_dirty(vcpu->kvm, gfn);
1740
38187c83 1741set_pte:
1c4f1fd6 1742 set_shadow_pte(shadow_pte, spte);
1e73f9dd
MT
1743 return ret;
1744}
1745
1e73f9dd
MT
1746static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1747 unsigned pt_access, unsigned pte_access,
1748 int user_fault, int write_fault, int dirty,
6cffe8ca
MT
1749 int *ptwrite, int largepage, int global,
1750 gfn_t gfn, pfn_t pfn, bool speculative)
1e73f9dd
MT
1751{
1752 int was_rmapped = 0;
1753 int was_writeble = is_writeble_pte(*shadow_pte);
1754
1755 pgprintk("%s: spte %llx access %x write_fault %d"
1756 " user_fault %d gfn %lx\n",
1757 __func__, *shadow_pte, pt_access,
1758 write_fault, user_fault, gfn);
1759
1760 if (is_rmap_pte(*shadow_pte)) {
1761 /*
1762 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1763 * the parent of the now unreachable PTE.
1764 */
1765 if (largepage && !is_large_pte(*shadow_pte)) {
1766 struct kvm_mmu_page *child;
1767 u64 pte = *shadow_pte;
1768
1769 child = page_header(pte & PT64_BASE_ADDR_MASK);
1770 mmu_page_remove_parent_pte(child, shadow_pte);
1771 } else if (pfn != spte_to_pfn(*shadow_pte)) {
1772 pgprintk("hfn old %lx new %lx\n",
1773 spte_to_pfn(*shadow_pte), pfn);
1774 rmap_remove(vcpu->kvm, shadow_pte);
1775 } else {
1776 if (largepage)
1777 was_rmapped = is_large_pte(*shadow_pte);
1778 else
1779 was_rmapped = 1;
1780 }
1781 }
1782 if (set_spte(vcpu, shadow_pte, pte_access, user_fault, write_fault,
6cffe8ca 1783 dirty, largepage, global, gfn, pfn, speculative, true)) {
1e73f9dd
MT
1784 if (write_fault)
1785 *ptwrite = 1;
a378b4e6
MT
1786 kvm_x86_ops->tlb_flush(vcpu);
1787 }
1e73f9dd
MT
1788
1789 pgprintk("%s: setting spte %llx\n", __func__, *shadow_pte);
1790 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1791 is_large_pte(*shadow_pte)? "2MB" : "4kB",
1792 is_present_pte(*shadow_pte)?"RW":"R", gfn,
1793 *shadow_pte, shadow_pte);
1794 if (!was_rmapped && is_large_pte(*shadow_pte))
05da4558
MT
1795 ++vcpu->kvm->stat.lpages;
1796
1c4f1fd6
AK
1797 page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
1798 if (!was_rmapped) {
05da4558 1799 rmap_add(vcpu, shadow_pte, gfn, largepage);
1c4f1fd6 1800 if (!is_rmap_pte(*shadow_pte))
35149e21 1801 kvm_release_pfn_clean(pfn);
75e68e60
IE
1802 } else {
1803 if (was_writeble)
35149e21 1804 kvm_release_pfn_dirty(pfn);
75e68e60 1805 else
35149e21 1806 kvm_release_pfn_clean(pfn);
1c4f1fd6 1807 }
1b7fcd32 1808 if (speculative) {
ad312c7c 1809 vcpu->arch.last_pte_updated = shadow_pte;
1b7fcd32
AK
1810 vcpu->arch.last_pte_gfn = gfn;
1811 }
1c4f1fd6
AK
1812}
1813
6aa8b732
AK
1814static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1815{
1816}
1817
140754bc
AK
1818struct direct_shadow_walk {
1819 struct kvm_shadow_walk walker;
1820 pfn_t pfn;
1821 int write;
1822 int largepage;
1823 int pt_write;
1824};
6aa8b732 1825
140754bc
AK
1826static int direct_map_entry(struct kvm_shadow_walk *_walk,
1827 struct kvm_vcpu *vcpu,
d40a1ee4 1828 u64 addr, u64 *sptep, int level)
140754bc
AK
1829{
1830 struct direct_shadow_walk *walk =
1831 container_of(_walk, struct direct_shadow_walk, walker);
1832 struct kvm_mmu_page *sp;
1833 gfn_t pseudo_gfn;
1834 gfn_t gfn = addr >> PAGE_SHIFT;
1835
1836 if (level == PT_PAGE_TABLE_LEVEL
1837 || (walk->largepage && level == PT_DIRECTORY_LEVEL)) {
1838 mmu_set_spte(vcpu, sptep, ACC_ALL, ACC_ALL,
1839 0, walk->write, 1, &walk->pt_write,
6cffe8ca 1840 walk->largepage, 0, gfn, walk->pfn, false);
bc2d4299 1841 ++vcpu->stat.pf_fixed;
140754bc
AK
1842 return 1;
1843 }
6aa8b732 1844
140754bc
AK
1845 if (*sptep == shadow_trap_nonpresent_pte) {
1846 pseudo_gfn = (addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
d40a1ee4 1847 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, (gva_t)addr, level - 1,
140754bc
AK
1848 1, ACC_ALL, sptep);
1849 if (!sp) {
1850 pgprintk("nonpaging_map: ENOMEM\n");
1851 kvm_release_pfn_clean(walk->pfn);
1852 return -ENOMEM;
6aa8b732
AK
1853 }
1854
140754bc
AK
1855 set_shadow_pte(sptep,
1856 __pa(sp->spt)
1857 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1858 | shadow_user_mask | shadow_x_mask);
6aa8b732 1859 }
140754bc
AK
1860 return 0;
1861}
1862
1863static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1864 int largepage, gfn_t gfn, pfn_t pfn)
1865{
1866 int r;
1867 struct direct_shadow_walk walker = {
1868 .walker = { .entry = direct_map_entry, },
1869 .pfn = pfn,
1870 .largepage = largepage,
1871 .write = write,
1872 .pt_write = 0,
1873 };
1874
d40a1ee4 1875 r = walk_shadow(&walker.walker, vcpu, gfn << PAGE_SHIFT);
140754bc
AK
1876 if (r < 0)
1877 return r;
1878 return walker.pt_write;
6aa8b732
AK
1879}
1880
10589a46
MT
1881static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1882{
1883 int r;
05da4558 1884 int largepage = 0;
35149e21 1885 pfn_t pfn;
e930bffe 1886 unsigned long mmu_seq;
aaee2c94 1887
05da4558
MT
1888 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
1889 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1890 largepage = 1;
1891 }
1892
e930bffe 1893 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 1894 smp_rmb();
35149e21 1895 pfn = gfn_to_pfn(vcpu->kvm, gfn);
aaee2c94 1896
d196e343 1897 /* mmio */
35149e21
AL
1898 if (is_error_pfn(pfn)) {
1899 kvm_release_pfn_clean(pfn);
d196e343
AK
1900 return 1;
1901 }
1902
aaee2c94 1903 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA
1904 if (mmu_notifier_retry(vcpu, mmu_seq))
1905 goto out_unlock;
eb787d10 1906 kvm_mmu_free_some_pages(vcpu);
6c41f428 1907 r = __direct_map(vcpu, v, write, largepage, gfn, pfn);
aaee2c94
MT
1908 spin_unlock(&vcpu->kvm->mmu_lock);
1909
aaee2c94 1910
10589a46 1911 return r;
e930bffe
AA
1912
1913out_unlock:
1914 spin_unlock(&vcpu->kvm->mmu_lock);
1915 kvm_release_pfn_clean(pfn);
1916 return 0;
10589a46
MT
1917}
1918
1919
17ac10ad
AK
1920static void mmu_free_roots(struct kvm_vcpu *vcpu)
1921{
1922 int i;
4db35314 1923 struct kvm_mmu_page *sp;
17ac10ad 1924
ad312c7c 1925 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
7b53aa56 1926 return;
aaee2c94 1927 spin_lock(&vcpu->kvm->mmu_lock);
ad312c7c
ZX
1928 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1929 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad 1930
4db35314
AK
1931 sp = page_header(root);
1932 --sp->root_count;
2e53d63a
MT
1933 if (!sp->root_count && sp->role.invalid)
1934 kvm_mmu_zap_page(vcpu->kvm, sp);
ad312c7c 1935 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
aaee2c94 1936 spin_unlock(&vcpu->kvm->mmu_lock);
17ac10ad
AK
1937 return;
1938 }
17ac10ad 1939 for (i = 0; i < 4; ++i) {
ad312c7c 1940 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad 1941
417726a3 1942 if (root) {
417726a3 1943 root &= PT64_BASE_ADDR_MASK;
4db35314
AK
1944 sp = page_header(root);
1945 --sp->root_count;
2e53d63a
MT
1946 if (!sp->root_count && sp->role.invalid)
1947 kvm_mmu_zap_page(vcpu->kvm, sp);
417726a3 1948 }
ad312c7c 1949 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 1950 }
aaee2c94 1951 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 1952 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
17ac10ad
AK
1953}
1954
1955static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
1956{
1957 int i;
cea0f0e7 1958 gfn_t root_gfn;
4db35314 1959 struct kvm_mmu_page *sp;
fb72d167 1960 int metaphysical = 0;
3bb65a22 1961
ad312c7c 1962 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
17ac10ad 1963
ad312c7c
ZX
1964 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1965 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad
AK
1966
1967 ASSERT(!VALID_PAGE(root));
fb72d167
JR
1968 if (tdp_enabled)
1969 metaphysical = 1;
4db35314 1970 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
fb72d167
JR
1971 PT64_ROOT_LEVEL, metaphysical,
1972 ACC_ALL, NULL);
4db35314
AK
1973 root = __pa(sp->spt);
1974 ++sp->root_count;
ad312c7c 1975 vcpu->arch.mmu.root_hpa = root;
17ac10ad
AK
1976 return;
1977 }
fb72d167
JR
1978 metaphysical = !is_paging(vcpu);
1979 if (tdp_enabled)
1980 metaphysical = 1;
17ac10ad 1981 for (i = 0; i < 4; ++i) {
ad312c7c 1982 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad
AK
1983
1984 ASSERT(!VALID_PAGE(root));
ad312c7c
ZX
1985 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
1986 if (!is_present_pte(vcpu->arch.pdptrs[i])) {
1987 vcpu->arch.mmu.pae_root[i] = 0;
417726a3
AK
1988 continue;
1989 }
ad312c7c
ZX
1990 root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
1991 } else if (vcpu->arch.mmu.root_level == 0)
cea0f0e7 1992 root_gfn = 0;
4db35314 1993 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
fb72d167 1994 PT32_ROOT_LEVEL, metaphysical,
f7d9c7b7 1995 ACC_ALL, NULL);
4db35314
AK
1996 root = __pa(sp->spt);
1997 ++sp->root_count;
ad312c7c 1998 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
17ac10ad 1999 }
ad312c7c 2000 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
17ac10ad
AK
2001}
2002
0ba73cda
MT
2003static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2004{
2005 int i;
2006 struct kvm_mmu_page *sp;
2007
2008 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2009 return;
2010 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2011 hpa_t root = vcpu->arch.mmu.root_hpa;
2012 sp = page_header(root);
2013 mmu_sync_children(vcpu, sp);
2014 return;
2015 }
2016 for (i = 0; i < 4; ++i) {
2017 hpa_t root = vcpu->arch.mmu.pae_root[i];
2018
2019 if (root) {
2020 root &= PT64_BASE_ADDR_MASK;
2021 sp = page_header(root);
2022 mmu_sync_children(vcpu, sp);
2023 }
2024 }
2025}
2026
6cffe8ca
MT
2027static void mmu_sync_global(struct kvm_vcpu *vcpu)
2028{
2029 struct kvm *kvm = vcpu->kvm;
2030 struct kvm_mmu_page *sp, *n;
2031
2032 list_for_each_entry_safe(sp, n, &kvm->arch.oos_global_pages, oos_link)
2033 kvm_sync_page(vcpu, sp);
2034}
2035
0ba73cda
MT
2036void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2037{
2038 spin_lock(&vcpu->kvm->mmu_lock);
2039 mmu_sync_roots(vcpu);
6cffe8ca
MT
2040 spin_unlock(&vcpu->kvm->mmu_lock);
2041}
2042
2043void kvm_mmu_sync_global(struct kvm_vcpu *vcpu)
2044{
2045 spin_lock(&vcpu->kvm->mmu_lock);
2046 mmu_sync_global(vcpu);
0ba73cda
MT
2047 spin_unlock(&vcpu->kvm->mmu_lock);
2048}
2049
6aa8b732
AK
2050static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
2051{
2052 return vaddr;
2053}
2054
2055static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
3f3e7124 2056 u32 error_code)
6aa8b732 2057{
e833240f 2058 gfn_t gfn;
e2dec939 2059 int r;
6aa8b732 2060
b8688d51 2061 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
e2dec939
AK
2062 r = mmu_topup_memory_caches(vcpu);
2063 if (r)
2064 return r;
714b93da 2065
6aa8b732 2066 ASSERT(vcpu);
ad312c7c 2067 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 2068
e833240f 2069 gfn = gva >> PAGE_SHIFT;
6aa8b732 2070
e833240f
AK
2071 return nonpaging_map(vcpu, gva & PAGE_MASK,
2072 error_code & PFERR_WRITE_MASK, gfn);
6aa8b732
AK
2073}
2074
fb72d167
JR
2075static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2076 u32 error_code)
2077{
35149e21 2078 pfn_t pfn;
fb72d167 2079 int r;
05da4558
MT
2080 int largepage = 0;
2081 gfn_t gfn = gpa >> PAGE_SHIFT;
e930bffe 2082 unsigned long mmu_seq;
fb72d167
JR
2083
2084 ASSERT(vcpu);
2085 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2086
2087 r = mmu_topup_memory_caches(vcpu);
2088 if (r)
2089 return r;
2090
05da4558
MT
2091 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
2092 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
2093 largepage = 1;
2094 }
e930bffe 2095 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 2096 smp_rmb();
35149e21 2097 pfn = gfn_to_pfn(vcpu->kvm, gfn);
35149e21
AL
2098 if (is_error_pfn(pfn)) {
2099 kvm_release_pfn_clean(pfn);
fb72d167
JR
2100 return 1;
2101 }
2102 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA
2103 if (mmu_notifier_retry(vcpu, mmu_seq))
2104 goto out_unlock;
fb72d167
JR
2105 kvm_mmu_free_some_pages(vcpu);
2106 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
6c41f428 2107 largepage, gfn, pfn);
fb72d167 2108 spin_unlock(&vcpu->kvm->mmu_lock);
fb72d167
JR
2109
2110 return r;
e930bffe
AA
2111
2112out_unlock:
2113 spin_unlock(&vcpu->kvm->mmu_lock);
2114 kvm_release_pfn_clean(pfn);
2115 return 0;
fb72d167
JR
2116}
2117
6aa8b732
AK
2118static void nonpaging_free(struct kvm_vcpu *vcpu)
2119{
17ac10ad 2120 mmu_free_roots(vcpu);
6aa8b732
AK
2121}
2122
2123static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2124{
ad312c7c 2125 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
2126
2127 context->new_cr3 = nonpaging_new_cr3;
2128 context->page_fault = nonpaging_page_fault;
6aa8b732
AK
2129 context->gva_to_gpa = nonpaging_gva_to_gpa;
2130 context->free = nonpaging_free;
c7addb90 2131 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 2132 context->sync_page = nonpaging_sync_page;
a7052897 2133 context->invlpg = nonpaging_invlpg;
cea0f0e7 2134 context->root_level = 0;
6aa8b732 2135 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 2136 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
2137 return 0;
2138}
2139
d835dfec 2140void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
6aa8b732 2141{
1165f5fe 2142 ++vcpu->stat.tlb_flush;
cbdd1bea 2143 kvm_x86_ops->tlb_flush(vcpu);
6aa8b732
AK
2144}
2145
2146static void paging_new_cr3(struct kvm_vcpu *vcpu)
2147{
b8688d51 2148 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
cea0f0e7 2149 mmu_free_roots(vcpu);
6aa8b732
AK
2150}
2151
6aa8b732
AK
2152static void inject_page_fault(struct kvm_vcpu *vcpu,
2153 u64 addr,
2154 u32 err_code)
2155{
c3c91fee 2156 kvm_inject_page_fault(vcpu, addr, err_code);
6aa8b732
AK
2157}
2158
6aa8b732
AK
2159static void paging_free(struct kvm_vcpu *vcpu)
2160{
2161 nonpaging_free(vcpu);
2162}
2163
2164#define PTTYPE 64
2165#include "paging_tmpl.h"
2166#undef PTTYPE
2167
2168#define PTTYPE 32
2169#include "paging_tmpl.h"
2170#undef PTTYPE
2171
17ac10ad 2172static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
6aa8b732 2173{
ad312c7c 2174 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
2175
2176 ASSERT(is_pae(vcpu));
2177 context->new_cr3 = paging_new_cr3;
2178 context->page_fault = paging64_page_fault;
6aa8b732 2179 context->gva_to_gpa = paging64_gva_to_gpa;
c7addb90 2180 context->prefetch_page = paging64_prefetch_page;
e8bc217a 2181 context->sync_page = paging64_sync_page;
a7052897 2182 context->invlpg = paging64_invlpg;
6aa8b732 2183 context->free = paging_free;
17ac10ad
AK
2184 context->root_level = level;
2185 context->shadow_root_level = level;
17c3ba9d 2186 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
2187 return 0;
2188}
2189
17ac10ad
AK
2190static int paging64_init_context(struct kvm_vcpu *vcpu)
2191{
2192 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2193}
2194
6aa8b732
AK
2195static int paging32_init_context(struct kvm_vcpu *vcpu)
2196{
ad312c7c 2197 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
2198
2199 context->new_cr3 = paging_new_cr3;
2200 context->page_fault = paging32_page_fault;
6aa8b732
AK
2201 context->gva_to_gpa = paging32_gva_to_gpa;
2202 context->free = paging_free;
c7addb90 2203 context->prefetch_page = paging32_prefetch_page;
e8bc217a 2204 context->sync_page = paging32_sync_page;
a7052897 2205 context->invlpg = paging32_invlpg;
6aa8b732
AK
2206 context->root_level = PT32_ROOT_LEVEL;
2207 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 2208 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
2209 return 0;
2210}
2211
2212static int paging32E_init_context(struct kvm_vcpu *vcpu)
2213{
17ac10ad 2214 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
6aa8b732
AK
2215}
2216
fb72d167
JR
2217static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2218{
2219 struct kvm_mmu *context = &vcpu->arch.mmu;
2220
2221 context->new_cr3 = nonpaging_new_cr3;
2222 context->page_fault = tdp_page_fault;
2223 context->free = nonpaging_free;
2224 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 2225 context->sync_page = nonpaging_sync_page;
a7052897 2226 context->invlpg = nonpaging_invlpg;
67253af5 2227 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
fb72d167
JR
2228 context->root_hpa = INVALID_PAGE;
2229
2230 if (!is_paging(vcpu)) {
2231 context->gva_to_gpa = nonpaging_gva_to_gpa;
2232 context->root_level = 0;
2233 } else if (is_long_mode(vcpu)) {
2234 context->gva_to_gpa = paging64_gva_to_gpa;
2235 context->root_level = PT64_ROOT_LEVEL;
2236 } else if (is_pae(vcpu)) {
2237 context->gva_to_gpa = paging64_gva_to_gpa;
2238 context->root_level = PT32E_ROOT_LEVEL;
2239 } else {
2240 context->gva_to_gpa = paging32_gva_to_gpa;
2241 context->root_level = PT32_ROOT_LEVEL;
2242 }
2243
2244 return 0;
2245}
2246
2247static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
6aa8b732
AK
2248{
2249 ASSERT(vcpu);
ad312c7c 2250 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732
AK
2251
2252 if (!is_paging(vcpu))
2253 return nonpaging_init_context(vcpu);
a9058ecd 2254 else if (is_long_mode(vcpu))
6aa8b732
AK
2255 return paging64_init_context(vcpu);
2256 else if (is_pae(vcpu))
2257 return paging32E_init_context(vcpu);
2258 else
2259 return paging32_init_context(vcpu);
2260}
2261
fb72d167
JR
2262static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2263{
35149e21
AL
2264 vcpu->arch.update_pte.pfn = bad_pfn;
2265
fb72d167
JR
2266 if (tdp_enabled)
2267 return init_kvm_tdp_mmu(vcpu);
2268 else
2269 return init_kvm_softmmu(vcpu);
2270}
2271
6aa8b732
AK
2272static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2273{
2274 ASSERT(vcpu);
ad312c7c
ZX
2275 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2276 vcpu->arch.mmu.free(vcpu);
2277 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6aa8b732
AK
2278 }
2279}
2280
2281int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
17c3ba9d
AK
2282{
2283 destroy_kvm_mmu(vcpu);
2284 return init_kvm_mmu(vcpu);
2285}
8668a3c4 2286EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
17c3ba9d
AK
2287
2288int kvm_mmu_load(struct kvm_vcpu *vcpu)
6aa8b732 2289{
714b93da
AK
2290 int r;
2291
e2dec939 2292 r = mmu_topup_memory_caches(vcpu);
17c3ba9d
AK
2293 if (r)
2294 goto out;
aaee2c94 2295 spin_lock(&vcpu->kvm->mmu_lock);
eb787d10 2296 kvm_mmu_free_some_pages(vcpu);
17c3ba9d 2297 mmu_alloc_roots(vcpu);
0ba73cda 2298 mmu_sync_roots(vcpu);
aaee2c94 2299 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 2300 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
17c3ba9d 2301 kvm_mmu_flush_tlb(vcpu);
714b93da
AK
2302out:
2303 return r;
6aa8b732 2304}
17c3ba9d
AK
2305EXPORT_SYMBOL_GPL(kvm_mmu_load);
2306
2307void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2308{
2309 mmu_free_roots(vcpu);
2310}
6aa8b732 2311
09072daf 2312static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
4db35314 2313 struct kvm_mmu_page *sp,
ac1b714e
AK
2314 u64 *spte)
2315{
2316 u64 pte;
2317 struct kvm_mmu_page *child;
2318
2319 pte = *spte;
c7addb90 2320 if (is_shadow_present_pte(pte)) {
05da4558
MT
2321 if (sp->role.level == PT_PAGE_TABLE_LEVEL ||
2322 is_large_pte(pte))
290fc38d 2323 rmap_remove(vcpu->kvm, spte);
ac1b714e
AK
2324 else {
2325 child = page_header(pte & PT64_BASE_ADDR_MASK);
90cb0529 2326 mmu_page_remove_parent_pte(child, spte);
ac1b714e
AK
2327 }
2328 }
c7addb90 2329 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
05da4558
MT
2330 if (is_large_pte(pte))
2331 --vcpu->kvm->stat.lpages;
ac1b714e
AK
2332}
2333
0028425f 2334static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
4db35314 2335 struct kvm_mmu_page *sp,
0028425f 2336 u64 *spte,
489f1d65 2337 const void *new)
0028425f 2338{
30945387
MT
2339 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2340 if (!vcpu->arch.update_pte.largepage ||
2341 sp->role.glevels == PT32_ROOT_LEVEL) {
2342 ++vcpu->kvm->stat.mmu_pde_zapped;
2343 return;
2344 }
2345 }
0028425f 2346
4cee5764 2347 ++vcpu->kvm->stat.mmu_pte_updated;
4db35314 2348 if (sp->role.glevels == PT32_ROOT_LEVEL)
489f1d65 2349 paging32_update_pte(vcpu, sp, spte, new);
0028425f 2350 else
489f1d65 2351 paging64_update_pte(vcpu, sp, spte, new);
0028425f
AK
2352}
2353
79539cec
AK
2354static bool need_remote_flush(u64 old, u64 new)
2355{
2356 if (!is_shadow_present_pte(old))
2357 return false;
2358 if (!is_shadow_present_pte(new))
2359 return true;
2360 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2361 return true;
2362 old ^= PT64_NX_MASK;
2363 new ^= PT64_NX_MASK;
2364 return (old & ~new & PT64_PERM_MASK) != 0;
2365}
2366
2367static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2368{
2369 if (need_remote_flush(old, new))
2370 kvm_flush_remote_tlbs(vcpu->kvm);
2371 else
2372 kvm_mmu_flush_tlb(vcpu);
2373}
2374
12b7d28f
AK
2375static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2376{
ad312c7c 2377 u64 *spte = vcpu->arch.last_pte_updated;
12b7d28f 2378
7b52345e 2379 return !!(spte && (*spte & shadow_accessed_mask));
12b7d28f
AK
2380}
2381
d7824fff
AK
2382static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2383 const u8 *new, int bytes)
2384{
2385 gfn_t gfn;
2386 int r;
2387 u64 gpte = 0;
35149e21 2388 pfn_t pfn;
d7824fff 2389
05da4558
MT
2390 vcpu->arch.update_pte.largepage = 0;
2391
d7824fff
AK
2392 if (bytes != 4 && bytes != 8)
2393 return;
2394
2395 /*
2396 * Assume that the pte write on a page table of the same type
2397 * as the current vcpu paging mode. This is nearly always true
2398 * (might be false while changing modes). Note it is verified later
2399 * by update_pte().
2400 */
2401 if (is_pae(vcpu)) {
2402 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2403 if ((bytes == 4) && (gpa % 4 == 0)) {
2404 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2405 if (r)
2406 return;
2407 memcpy((void *)&gpte + (gpa % 8), new, 4);
2408 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2409 memcpy((void *)&gpte, new, 8);
2410 }
2411 } else {
2412 if ((bytes == 4) && (gpa % 4 == 0))
2413 memcpy((void *)&gpte, new, 4);
2414 }
2415 if (!is_present_pte(gpte))
2416 return;
2417 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
72dc67a6 2418
05da4558
MT
2419 if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
2420 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
2421 vcpu->arch.update_pte.largepage = 1;
2422 }
e930bffe 2423 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 2424 smp_rmb();
35149e21 2425 pfn = gfn_to_pfn(vcpu->kvm, gfn);
72dc67a6 2426
35149e21
AL
2427 if (is_error_pfn(pfn)) {
2428 kvm_release_pfn_clean(pfn);
d196e343
AK
2429 return;
2430 }
d7824fff 2431 vcpu->arch.update_pte.gfn = gfn;
35149e21 2432 vcpu->arch.update_pte.pfn = pfn;
d7824fff
AK
2433}
2434
1b7fcd32
AK
2435static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2436{
2437 u64 *spte = vcpu->arch.last_pte_updated;
2438
2439 if (spte
2440 && vcpu->arch.last_pte_gfn == gfn
2441 && shadow_accessed_mask
2442 && !(*spte & shadow_accessed_mask)
2443 && is_shadow_present_pte(*spte))
2444 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2445}
2446
09072daf 2447void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
ad218f85
MT
2448 const u8 *new, int bytes,
2449 bool guest_initiated)
da4a00f0 2450{
9b7a0325 2451 gfn_t gfn = gpa >> PAGE_SHIFT;
4db35314 2452 struct kvm_mmu_page *sp;
0e7bc4b9 2453 struct hlist_node *node, *n;
9b7a0325
AK
2454 struct hlist_head *bucket;
2455 unsigned index;
489f1d65 2456 u64 entry, gentry;
9b7a0325 2457 u64 *spte;
9b7a0325 2458 unsigned offset = offset_in_page(gpa);
0e7bc4b9 2459 unsigned pte_size;
9b7a0325 2460 unsigned page_offset;
0e7bc4b9 2461 unsigned misaligned;
fce0657f 2462 unsigned quadrant;
9b7a0325 2463 int level;
86a5ba02 2464 int flooded = 0;
ac1b714e 2465 int npte;
489f1d65 2466 int r;
9b7a0325 2467
b8688d51 2468 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
d7824fff 2469 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
aaee2c94 2470 spin_lock(&vcpu->kvm->mmu_lock);
1b7fcd32 2471 kvm_mmu_access_page(vcpu, gfn);
eb787d10 2472 kvm_mmu_free_some_pages(vcpu);
4cee5764 2473 ++vcpu->kvm->stat.mmu_pte_write;
c7addb90 2474 kvm_mmu_audit(vcpu, "pre pte write");
ad218f85
MT
2475 if (guest_initiated) {
2476 if (gfn == vcpu->arch.last_pt_write_gfn
2477 && !last_updated_pte_accessed(vcpu)) {
2478 ++vcpu->arch.last_pt_write_count;
2479 if (vcpu->arch.last_pt_write_count >= 3)
2480 flooded = 1;
2481 } else {
2482 vcpu->arch.last_pt_write_gfn = gfn;
2483 vcpu->arch.last_pt_write_count = 1;
2484 vcpu->arch.last_pte_updated = NULL;
2485 }
86a5ba02 2486 }
1ae0a13d 2487 index = kvm_page_table_hashfn(gfn);
f05e70ac 2488 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4db35314 2489 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
5b5c6a5a 2490 if (sp->gfn != gfn || sp->role.metaphysical || sp->role.invalid)
9b7a0325 2491 continue;
4db35314 2492 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
0e7bc4b9 2493 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
e925c5ba 2494 misaligned |= bytes < 4;
86a5ba02 2495 if (misaligned || flooded) {
0e7bc4b9
AK
2496 /*
2497 * Misaligned accesses are too much trouble to fix
2498 * up; also, they usually indicate a page is not used
2499 * as a page table.
86a5ba02
AK
2500 *
2501 * If we're seeing too many writes to a page,
2502 * it may no longer be a page table, or we may be
2503 * forking, in which case it is better to unmap the
2504 * page.
0e7bc4b9
AK
2505 */
2506 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
4db35314 2507 gpa, bytes, sp->role.word);
07385413
MT
2508 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2509 n = bucket->first;
4cee5764 2510 ++vcpu->kvm->stat.mmu_flooded;
0e7bc4b9
AK
2511 continue;
2512 }
9b7a0325 2513 page_offset = offset;
4db35314 2514 level = sp->role.level;
ac1b714e 2515 npte = 1;
4db35314 2516 if (sp->role.glevels == PT32_ROOT_LEVEL) {
ac1b714e
AK
2517 page_offset <<= 1; /* 32->64 */
2518 /*
2519 * A 32-bit pde maps 4MB while the shadow pdes map
2520 * only 2MB. So we need to double the offset again
2521 * and zap two pdes instead of one.
2522 */
2523 if (level == PT32_ROOT_LEVEL) {
6b8d0f9b 2524 page_offset &= ~7; /* kill rounding error */
ac1b714e
AK
2525 page_offset <<= 1;
2526 npte = 2;
2527 }
fce0657f 2528 quadrant = page_offset >> PAGE_SHIFT;
9b7a0325 2529 page_offset &= ~PAGE_MASK;
4db35314 2530 if (quadrant != sp->role.quadrant)
fce0657f 2531 continue;
9b7a0325 2532 }
4db35314 2533 spte = &sp->spt[page_offset / sizeof(*spte)];
489f1d65
DE
2534 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2535 gentry = 0;
2536 r = kvm_read_guest_atomic(vcpu->kvm,
2537 gpa & ~(u64)(pte_size - 1),
2538 &gentry, pte_size);
2539 new = (const void *)&gentry;
2540 if (r < 0)
2541 new = NULL;
2542 }
ac1b714e 2543 while (npte--) {
79539cec 2544 entry = *spte;
4db35314 2545 mmu_pte_write_zap_pte(vcpu, sp, spte);
489f1d65
DE
2546 if (new)
2547 mmu_pte_write_new_pte(vcpu, sp, spte, new);
79539cec 2548 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
ac1b714e 2549 ++spte;
9b7a0325 2550 }
9b7a0325 2551 }
c7addb90 2552 kvm_mmu_audit(vcpu, "post pte write");
aaee2c94 2553 spin_unlock(&vcpu->kvm->mmu_lock);
35149e21
AL
2554 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2555 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2556 vcpu->arch.update_pte.pfn = bad_pfn;
d7824fff 2557 }
da4a00f0
AK
2558}
2559
a436036b
AK
2560int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2561{
10589a46
MT
2562 gpa_t gpa;
2563 int r;
a436036b 2564
10589a46 2565 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
10589a46 2566
aaee2c94 2567 spin_lock(&vcpu->kvm->mmu_lock);
10589a46 2568 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
aaee2c94 2569 spin_unlock(&vcpu->kvm->mmu_lock);
10589a46 2570 return r;
a436036b 2571}
577bdc49 2572EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
a436036b 2573
22d95b12 2574void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
ebeace86 2575{
f05e70ac 2576 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
4db35314 2577 struct kvm_mmu_page *sp;
ebeace86 2578
f05e70ac 2579 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
4db35314
AK
2580 struct kvm_mmu_page, link);
2581 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 2582 ++vcpu->kvm->stat.mmu_recycled;
ebeace86
AK
2583 }
2584}
ebeace86 2585
3067714c
AK
2586int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2587{
2588 int r;
2589 enum emulation_result er;
2590
ad312c7c 2591 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
3067714c
AK
2592 if (r < 0)
2593 goto out;
2594
2595 if (!r) {
2596 r = 1;
2597 goto out;
2598 }
2599
b733bfb5
AK
2600 r = mmu_topup_memory_caches(vcpu);
2601 if (r)
2602 goto out;
2603
3067714c 2604 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
3067714c
AK
2605
2606 switch (er) {
2607 case EMULATE_DONE:
2608 return 1;
2609 case EMULATE_DO_MMIO:
2610 ++vcpu->stat.mmio_exits;
2611 return 0;
2612 case EMULATE_FAIL:
2613 kvm_report_emulation_failure(vcpu, "pagetable");
2614 return 1;
2615 default:
2616 BUG();
2617 }
2618out:
3067714c
AK
2619 return r;
2620}
2621EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2622
a7052897
MT
2623void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2624{
a7052897 2625 vcpu->arch.mmu.invlpg(vcpu, gva);
a7052897
MT
2626 kvm_mmu_flush_tlb(vcpu);
2627 ++vcpu->stat.invlpg;
2628}
2629EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2630
18552672
JR
2631void kvm_enable_tdp(void)
2632{
2633 tdp_enabled = true;
2634}
2635EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2636
5f4cb662
JR
2637void kvm_disable_tdp(void)
2638{
2639 tdp_enabled = false;
2640}
2641EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2642
6aa8b732
AK
2643static void free_mmu_pages(struct kvm_vcpu *vcpu)
2644{
4db35314 2645 struct kvm_mmu_page *sp;
6aa8b732 2646
f05e70ac
ZX
2647 while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2648 sp = container_of(vcpu->kvm->arch.active_mmu_pages.next,
4db35314
AK
2649 struct kvm_mmu_page, link);
2650 kvm_mmu_zap_page(vcpu->kvm, sp);
8d2d73b9 2651 cond_resched();
f51234c2 2652 }
ad312c7c 2653 free_page((unsigned long)vcpu->arch.mmu.pae_root);
6aa8b732
AK
2654}
2655
2656static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2657{
17ac10ad 2658 struct page *page;
6aa8b732
AK
2659 int i;
2660
2661 ASSERT(vcpu);
2662
f05e70ac
ZX
2663 if (vcpu->kvm->arch.n_requested_mmu_pages)
2664 vcpu->kvm->arch.n_free_mmu_pages =
2665 vcpu->kvm->arch.n_requested_mmu_pages;
82ce2c96 2666 else
f05e70ac
ZX
2667 vcpu->kvm->arch.n_free_mmu_pages =
2668 vcpu->kvm->arch.n_alloc_mmu_pages;
17ac10ad
AK
2669 /*
2670 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2671 * Therefore we need to allocate shadow page tables in the first
2672 * 4GB of memory, which happens to fit the DMA32 zone.
2673 */
2674 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2675 if (!page)
2676 goto error_1;
ad312c7c 2677 vcpu->arch.mmu.pae_root = page_address(page);
17ac10ad 2678 for (i = 0; i < 4; ++i)
ad312c7c 2679 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 2680
6aa8b732
AK
2681 return 0;
2682
2683error_1:
2684 free_mmu_pages(vcpu);
2685 return -ENOMEM;
2686}
2687
8018c27b 2688int kvm_mmu_create(struct kvm_vcpu *vcpu)
6aa8b732 2689{
6aa8b732 2690 ASSERT(vcpu);
ad312c7c 2691 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 2692
8018c27b
IM
2693 return alloc_mmu_pages(vcpu);
2694}
6aa8b732 2695
8018c27b
IM
2696int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2697{
2698 ASSERT(vcpu);
ad312c7c 2699 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2c264957 2700
8018c27b 2701 return init_kvm_mmu(vcpu);
6aa8b732
AK
2702}
2703
2704void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2705{
2706 ASSERT(vcpu);
2707
2708 destroy_kvm_mmu(vcpu);
2709 free_mmu_pages(vcpu);
714b93da 2710 mmu_free_memory_caches(vcpu);
6aa8b732
AK
2711}
2712
90cb0529 2713void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
6aa8b732 2714{
4db35314 2715 struct kvm_mmu_page *sp;
6aa8b732 2716
2245a28f 2717 spin_lock(&kvm->mmu_lock);
f05e70ac 2718 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
6aa8b732
AK
2719 int i;
2720 u64 *pt;
2721
291f26bc 2722 if (!test_bit(slot, sp->slot_bitmap))
6aa8b732
AK
2723 continue;
2724
4db35314 2725 pt = sp->spt;
6aa8b732
AK
2726 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2727 /* avoid RMW */
9647c14c 2728 if (pt[i] & PT_WRITABLE_MASK)
6aa8b732 2729 pt[i] &= ~PT_WRITABLE_MASK;
6aa8b732 2730 }
171d595d 2731 kvm_flush_remote_tlbs(kvm);
2245a28f 2732 spin_unlock(&kvm->mmu_lock);
6aa8b732 2733}
37a7d8b0 2734
90cb0529 2735void kvm_mmu_zap_all(struct kvm *kvm)
e0fa826f 2736{
4db35314 2737 struct kvm_mmu_page *sp, *node;
e0fa826f 2738
aaee2c94 2739 spin_lock(&kvm->mmu_lock);
f05e70ac 2740 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
07385413
MT
2741 if (kvm_mmu_zap_page(kvm, sp))
2742 node = container_of(kvm->arch.active_mmu_pages.next,
2743 struct kvm_mmu_page, link);
aaee2c94 2744 spin_unlock(&kvm->mmu_lock);
e0fa826f 2745
90cb0529 2746 kvm_flush_remote_tlbs(kvm);
e0fa826f
DL
2747}
2748
8b2cf73c 2749static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
3ee16c81
IE
2750{
2751 struct kvm_mmu_page *page;
2752
2753 page = container_of(kvm->arch.active_mmu_pages.prev,
2754 struct kvm_mmu_page, link);
2755 kvm_mmu_zap_page(kvm, page);
2756}
2757
2758static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2759{
2760 struct kvm *kvm;
2761 struct kvm *kvm_freed = NULL;
2762 int cache_count = 0;
2763
2764 spin_lock(&kvm_lock);
2765
2766 list_for_each_entry(kvm, &vm_list, vm_list) {
2767 int npages;
2768
5a4c9288
MT
2769 if (!down_read_trylock(&kvm->slots_lock))
2770 continue;
3ee16c81
IE
2771 spin_lock(&kvm->mmu_lock);
2772 npages = kvm->arch.n_alloc_mmu_pages -
2773 kvm->arch.n_free_mmu_pages;
2774 cache_count += npages;
2775 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2776 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2777 cache_count--;
2778 kvm_freed = kvm;
2779 }
2780 nr_to_scan--;
2781
2782 spin_unlock(&kvm->mmu_lock);
5a4c9288 2783 up_read(&kvm->slots_lock);
3ee16c81
IE
2784 }
2785 if (kvm_freed)
2786 list_move_tail(&kvm_freed->vm_list, &vm_list);
2787
2788 spin_unlock(&kvm_lock);
2789
2790 return cache_count;
2791}
2792
2793static struct shrinker mmu_shrinker = {
2794 .shrink = mmu_shrink,
2795 .seeks = DEFAULT_SEEKS * 10,
2796};
2797
2ddfd20e 2798static void mmu_destroy_caches(void)
b5a33a75
AK
2799{
2800 if (pte_chain_cache)
2801 kmem_cache_destroy(pte_chain_cache);
2802 if (rmap_desc_cache)
2803 kmem_cache_destroy(rmap_desc_cache);
d3d25b04
AK
2804 if (mmu_page_header_cache)
2805 kmem_cache_destroy(mmu_page_header_cache);
b5a33a75
AK
2806}
2807
3ee16c81
IE
2808void kvm_mmu_module_exit(void)
2809{
2810 mmu_destroy_caches();
2811 unregister_shrinker(&mmu_shrinker);
2812}
2813
b5a33a75
AK
2814int kvm_mmu_module_init(void)
2815{
2816 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2817 sizeof(struct kvm_pte_chain),
20c2df83 2818 0, 0, NULL);
b5a33a75
AK
2819 if (!pte_chain_cache)
2820 goto nomem;
2821 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2822 sizeof(struct kvm_rmap_desc),
20c2df83 2823 0, 0, NULL);
b5a33a75
AK
2824 if (!rmap_desc_cache)
2825 goto nomem;
2826
d3d25b04
AK
2827 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2828 sizeof(struct kvm_mmu_page),
20c2df83 2829 0, 0, NULL);
d3d25b04
AK
2830 if (!mmu_page_header_cache)
2831 goto nomem;
2832
3ee16c81
IE
2833 register_shrinker(&mmu_shrinker);
2834
b5a33a75
AK
2835 return 0;
2836
2837nomem:
3ee16c81 2838 mmu_destroy_caches();
b5a33a75
AK
2839 return -ENOMEM;
2840}
2841
3ad82a7e
ZX
2842/*
2843 * Caculate mmu pages needed for kvm.
2844 */
2845unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
2846{
2847 int i;
2848 unsigned int nr_mmu_pages;
2849 unsigned int nr_pages = 0;
2850
2851 for (i = 0; i < kvm->nmemslots; i++)
2852 nr_pages += kvm->memslots[i].npages;
2853
2854 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
2855 nr_mmu_pages = max(nr_mmu_pages,
2856 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
2857
2858 return nr_mmu_pages;
2859}
2860
2f333bcb
MT
2861static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2862 unsigned len)
2863{
2864 if (len > buffer->len)
2865 return NULL;
2866 return buffer->ptr;
2867}
2868
2869static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2870 unsigned len)
2871{
2872 void *ret;
2873
2874 ret = pv_mmu_peek_buffer(buffer, len);
2875 if (!ret)
2876 return ret;
2877 buffer->ptr += len;
2878 buffer->len -= len;
2879 buffer->processed += len;
2880 return ret;
2881}
2882
2883static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
2884 gpa_t addr, gpa_t value)
2885{
2886 int bytes = 8;
2887 int r;
2888
2889 if (!is_long_mode(vcpu) && !is_pae(vcpu))
2890 bytes = 4;
2891
2892 r = mmu_topup_memory_caches(vcpu);
2893 if (r)
2894 return r;
2895
3200f405 2896 if (!emulator_write_phys(vcpu, addr, &value, bytes))
2f333bcb
MT
2897 return -EFAULT;
2898
2899 return 1;
2900}
2901
2902static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2903{
2904 kvm_x86_ops->tlb_flush(vcpu);
6ad9f15c 2905 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
2f333bcb
MT
2906 return 1;
2907}
2908
2909static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
2910{
2911 spin_lock(&vcpu->kvm->mmu_lock);
2912 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
2913 spin_unlock(&vcpu->kvm->mmu_lock);
2914 return 1;
2915}
2916
2917static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
2918 struct kvm_pv_mmu_op_buffer *buffer)
2919{
2920 struct kvm_mmu_op_header *header;
2921
2922 header = pv_mmu_peek_buffer(buffer, sizeof *header);
2923 if (!header)
2924 return 0;
2925 switch (header->op) {
2926 case KVM_MMU_OP_WRITE_PTE: {
2927 struct kvm_mmu_op_write_pte *wpte;
2928
2929 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
2930 if (!wpte)
2931 return 0;
2932 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
2933 wpte->pte_val);
2934 }
2935 case KVM_MMU_OP_FLUSH_TLB: {
2936 struct kvm_mmu_op_flush_tlb *ftlb;
2937
2938 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
2939 if (!ftlb)
2940 return 0;
2941 return kvm_pv_mmu_flush_tlb(vcpu);
2942 }
2943 case KVM_MMU_OP_RELEASE_PT: {
2944 struct kvm_mmu_op_release_pt *rpt;
2945
2946 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
2947 if (!rpt)
2948 return 0;
2949 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
2950 }
2951 default: return 0;
2952 }
2953}
2954
2955int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
2956 gpa_t addr, unsigned long *ret)
2957{
2958 int r;
6ad18fba 2959 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
2f333bcb 2960
6ad18fba
DH
2961 buffer->ptr = buffer->buf;
2962 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
2963 buffer->processed = 0;
2f333bcb 2964
6ad18fba 2965 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
2f333bcb
MT
2966 if (r)
2967 goto out;
2968
6ad18fba
DH
2969 while (buffer->len) {
2970 r = kvm_pv_mmu_op_one(vcpu, buffer);
2f333bcb
MT
2971 if (r < 0)
2972 goto out;
2973 if (r == 0)
2974 break;
2975 }
2976
2977 r = 1;
2978out:
6ad18fba 2979 *ret = buffer->processed;
2f333bcb
MT
2980 return r;
2981}
2982
37a7d8b0
AK
2983#ifdef AUDIT
2984
2985static const char *audit_msg;
2986
2987static gva_t canonicalize(gva_t gva)
2988{
2989#ifdef CONFIG_X86_64
2990 gva = (long long)(gva << 16) >> 16;
2991#endif
2992 return gva;
2993}
2994
2995static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
2996 gva_t va, int level)
2997{
2998 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
2999 int i;
3000 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3001
3002 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3003 u64 ent = pt[i];
3004
c7addb90 3005 if (ent == shadow_trap_nonpresent_pte)
37a7d8b0
AK
3006 continue;
3007
3008 va = canonicalize(va);
c7addb90
AK
3009 if (level > 1) {
3010 if (ent == shadow_notrap_nonpresent_pte)
3011 printk(KERN_ERR "audit: (%s) nontrapping pte"
3012 " in nonleaf level: levels %d gva %lx"
3013 " level %d pte %llx\n", audit_msg,
ad312c7c 3014 vcpu->arch.mmu.root_level, va, level, ent);
c7addb90 3015
37a7d8b0 3016 audit_mappings_page(vcpu, ent, va, level - 1);
c7addb90 3017 } else {
ad312c7c 3018 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
35149e21 3019 hpa_t hpa = (hpa_t)gpa_to_pfn(vcpu, gpa) << PAGE_SHIFT;
37a7d8b0 3020
c7addb90 3021 if (is_shadow_present_pte(ent)
37a7d8b0 3022 && (ent & PT64_BASE_ADDR_MASK) != hpa)
c7addb90
AK
3023 printk(KERN_ERR "xx audit error: (%s) levels %d"
3024 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
ad312c7c 3025 audit_msg, vcpu->arch.mmu.root_level,
d77c26fc
MD
3026 va, gpa, hpa, ent,
3027 is_shadow_present_pte(ent));
c7addb90
AK
3028 else if (ent == shadow_notrap_nonpresent_pte
3029 && !is_error_hpa(hpa))
3030 printk(KERN_ERR "audit: (%s) notrap shadow,"
3031 " valid guest gva %lx\n", audit_msg, va);
35149e21 3032 kvm_release_pfn_clean(pfn);
c7addb90 3033
37a7d8b0
AK
3034 }
3035 }
3036}
3037
3038static void audit_mappings(struct kvm_vcpu *vcpu)
3039{
1ea252af 3040 unsigned i;
37a7d8b0 3041
ad312c7c
ZX
3042 if (vcpu->arch.mmu.root_level == 4)
3043 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
37a7d8b0
AK
3044 else
3045 for (i = 0; i < 4; ++i)
ad312c7c 3046 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
37a7d8b0 3047 audit_mappings_page(vcpu,
ad312c7c 3048 vcpu->arch.mmu.pae_root[i],
37a7d8b0
AK
3049 i << 30,
3050 2);
3051}
3052
3053static int count_rmaps(struct kvm_vcpu *vcpu)
3054{
3055 int nmaps = 0;
3056 int i, j, k;
3057
3058 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3059 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
3060 struct kvm_rmap_desc *d;
3061
3062 for (j = 0; j < m->npages; ++j) {
290fc38d 3063 unsigned long *rmapp = &m->rmap[j];
37a7d8b0 3064
290fc38d 3065 if (!*rmapp)
37a7d8b0 3066 continue;
290fc38d 3067 if (!(*rmapp & 1)) {
37a7d8b0
AK
3068 ++nmaps;
3069 continue;
3070 }
290fc38d 3071 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
37a7d8b0
AK
3072 while (d) {
3073 for (k = 0; k < RMAP_EXT; ++k)
3074 if (d->shadow_ptes[k])
3075 ++nmaps;
3076 else
3077 break;
3078 d = d->more;
3079 }
3080 }
3081 }
3082 return nmaps;
3083}
3084
3085static int count_writable_mappings(struct kvm_vcpu *vcpu)
3086{
3087 int nmaps = 0;
4db35314 3088 struct kvm_mmu_page *sp;
37a7d8b0
AK
3089 int i;
3090
f05e70ac 3091 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 3092 u64 *pt = sp->spt;
37a7d8b0 3093
4db35314 3094 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
37a7d8b0
AK
3095 continue;
3096
3097 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3098 u64 ent = pt[i];
3099
3100 if (!(ent & PT_PRESENT_MASK))
3101 continue;
3102 if (!(ent & PT_WRITABLE_MASK))
3103 continue;
3104 ++nmaps;
3105 }
3106 }
3107 return nmaps;
3108}
3109
3110static void audit_rmap(struct kvm_vcpu *vcpu)
3111{
3112 int n_rmap = count_rmaps(vcpu);
3113 int n_actual = count_writable_mappings(vcpu);
3114
3115 if (n_rmap != n_actual)
3116 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
b8688d51 3117 __func__, audit_msg, n_rmap, n_actual);
37a7d8b0
AK
3118}
3119
3120static void audit_write_protection(struct kvm_vcpu *vcpu)
3121{
4db35314 3122 struct kvm_mmu_page *sp;
290fc38d
IE
3123 struct kvm_memory_slot *slot;
3124 unsigned long *rmapp;
3125 gfn_t gfn;
37a7d8b0 3126
f05e70ac 3127 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 3128 if (sp->role.metaphysical)
37a7d8b0
AK
3129 continue;
3130
4db35314 3131 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
2843099f 3132 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
290fc38d
IE
3133 rmapp = &slot->rmap[gfn - slot->base_gfn];
3134 if (*rmapp)
37a7d8b0
AK
3135 printk(KERN_ERR "%s: (%s) shadow page has writable"
3136 " mappings: gfn %lx role %x\n",
b8688d51 3137 __func__, audit_msg, sp->gfn,
4db35314 3138 sp->role.word);
37a7d8b0
AK
3139 }
3140}
3141
3142static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3143{
3144 int olddbg = dbg;
3145
3146 dbg = 0;
3147 audit_msg = msg;
3148 audit_rmap(vcpu);
3149 audit_write_protection(vcpu);
3150 audit_mappings(vcpu);
3151 dbg = olddbg;
3152}
3153
3154#endif
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