Commit | Line | Data |
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6aa8b732 AK |
1 | /* |
2 | * Kernel-based Virtual Machine driver for Linux | |
3 | * | |
4 | * This module enables machines with Intel VT-x extensions to run virtual | |
5 | * machines without emulation or binary translation. | |
6 | * | |
7 | * MMU support | |
8 | * | |
9 | * Copyright (C) 2006 Qumranet, Inc. | |
10 | * | |
11 | * Authors: | |
12 | * Yaniv Kamay <yaniv@qumranet.com> | |
13 | * Avi Kivity <avi@qumranet.com> | |
14 | * | |
15 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
16 | * the COPYING file in the top-level directory. | |
17 | * | |
18 | */ | |
e495606d AK |
19 | |
20 | #include "vmx.h" | |
1d737c8a | 21 | #include "mmu.h" |
e495606d | 22 | |
edf88417 | 23 | #include <linux/kvm_host.h> |
6aa8b732 AK |
24 | #include <linux/types.h> |
25 | #include <linux/string.h> | |
6aa8b732 AK |
26 | #include <linux/mm.h> |
27 | #include <linux/highmem.h> | |
28 | #include <linux/module.h> | |
448353ca | 29 | #include <linux/swap.h> |
05da4558 | 30 | #include <linux/hugetlb.h> |
2f333bcb | 31 | #include <linux/compiler.h> |
6aa8b732 | 32 | |
e495606d AK |
33 | #include <asm/page.h> |
34 | #include <asm/cmpxchg.h> | |
4e542370 | 35 | #include <asm/io.h> |
6aa8b732 | 36 | |
18552672 JR |
37 | /* |
38 | * When setting this variable to true it enables Two-Dimensional-Paging | |
39 | * where the hardware walks 2 page tables: | |
40 | * 1. the guest-virtual to guest-physical | |
41 | * 2. while doing 1. it walks guest-physical to host-physical | |
42 | * If the hardware supports that we don't need to do shadow paging. | |
43 | */ | |
2f333bcb | 44 | bool tdp_enabled = false; |
18552672 | 45 | |
37a7d8b0 AK |
46 | #undef MMU_DEBUG |
47 | ||
48 | #undef AUDIT | |
49 | ||
50 | #ifdef AUDIT | |
51 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg); | |
52 | #else | |
53 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {} | |
54 | #endif | |
55 | ||
56 | #ifdef MMU_DEBUG | |
57 | ||
58 | #define pgprintk(x...) do { if (dbg) printk(x); } while (0) | |
59 | #define rmap_printk(x...) do { if (dbg) printk(x); } while (0) | |
60 | ||
61 | #else | |
62 | ||
63 | #define pgprintk(x...) do { } while (0) | |
64 | #define rmap_printk(x...) do { } while (0) | |
65 | ||
66 | #endif | |
67 | ||
68 | #if defined(MMU_DEBUG) || defined(AUDIT) | |
6ada8cca AK |
69 | static int dbg = 0; |
70 | module_param(dbg, bool, 0644); | |
37a7d8b0 | 71 | #endif |
6aa8b732 | 72 | |
d6c69ee9 YD |
73 | #ifndef MMU_DEBUG |
74 | #define ASSERT(x) do { } while (0) | |
75 | #else | |
6aa8b732 AK |
76 | #define ASSERT(x) \ |
77 | if (!(x)) { \ | |
78 | printk(KERN_WARNING "assertion failed %s:%d: %s\n", \ | |
79 | __FILE__, __LINE__, #x); \ | |
80 | } | |
d6c69ee9 | 81 | #endif |
6aa8b732 | 82 | |
6aa8b732 AK |
83 | #define PT_FIRST_AVAIL_BITS_SHIFT 9 |
84 | #define PT64_SECOND_AVAIL_BITS_SHIFT 52 | |
85 | ||
6aa8b732 AK |
86 | #define VALID_PAGE(x) ((x) != INVALID_PAGE) |
87 | ||
88 | #define PT64_LEVEL_BITS 9 | |
89 | ||
90 | #define PT64_LEVEL_SHIFT(level) \ | |
d77c26fc | 91 | (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS) |
6aa8b732 AK |
92 | |
93 | #define PT64_LEVEL_MASK(level) \ | |
94 | (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level)) | |
95 | ||
96 | #define PT64_INDEX(address, level)\ | |
97 | (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1)) | |
98 | ||
99 | ||
100 | #define PT32_LEVEL_BITS 10 | |
101 | ||
102 | #define PT32_LEVEL_SHIFT(level) \ | |
d77c26fc | 103 | (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS) |
6aa8b732 AK |
104 | |
105 | #define PT32_LEVEL_MASK(level) \ | |
106 | (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level)) | |
107 | ||
108 | #define PT32_INDEX(address, level)\ | |
109 | (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1)) | |
110 | ||
111 | ||
27aba766 | 112 | #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1)) |
6aa8b732 AK |
113 | #define PT64_DIR_BASE_ADDR_MASK \ |
114 | (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1)) | |
115 | ||
116 | #define PT32_BASE_ADDR_MASK PAGE_MASK | |
117 | #define PT32_DIR_BASE_ADDR_MASK \ | |
118 | (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1)) | |
119 | ||
79539cec AK |
120 | #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \ |
121 | | PT64_NX_MASK) | |
6aa8b732 AK |
122 | |
123 | #define PFERR_PRESENT_MASK (1U << 0) | |
124 | #define PFERR_WRITE_MASK (1U << 1) | |
125 | #define PFERR_USER_MASK (1U << 2) | |
73b1087e | 126 | #define PFERR_FETCH_MASK (1U << 4) |
6aa8b732 | 127 | |
6aa8b732 AK |
128 | #define PT_DIRECTORY_LEVEL 2 |
129 | #define PT_PAGE_TABLE_LEVEL 1 | |
130 | ||
cd4a4e53 AK |
131 | #define RMAP_EXT 4 |
132 | ||
fe135d2c AK |
133 | #define ACC_EXEC_MASK 1 |
134 | #define ACC_WRITE_MASK PT_WRITABLE_MASK | |
135 | #define ACC_USER_MASK PT_USER_MASK | |
136 | #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK) | |
137 | ||
cd4a4e53 AK |
138 | struct kvm_rmap_desc { |
139 | u64 *shadow_ptes[RMAP_EXT]; | |
140 | struct kvm_rmap_desc *more; | |
141 | }; | |
142 | ||
b5a33a75 AK |
143 | static struct kmem_cache *pte_chain_cache; |
144 | static struct kmem_cache *rmap_desc_cache; | |
d3d25b04 | 145 | static struct kmem_cache *mmu_page_header_cache; |
b5a33a75 | 146 | |
c7addb90 AK |
147 | static u64 __read_mostly shadow_trap_nonpresent_pte; |
148 | static u64 __read_mostly shadow_notrap_nonpresent_pte; | |
7b52345e SY |
149 | static u64 __read_mostly shadow_base_present_pte; |
150 | static u64 __read_mostly shadow_nx_mask; | |
151 | static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */ | |
152 | static u64 __read_mostly shadow_user_mask; | |
153 | static u64 __read_mostly shadow_accessed_mask; | |
154 | static u64 __read_mostly shadow_dirty_mask; | |
c7addb90 AK |
155 | |
156 | void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte) | |
157 | { | |
158 | shadow_trap_nonpresent_pte = trap_pte; | |
159 | shadow_notrap_nonpresent_pte = notrap_pte; | |
160 | } | |
161 | EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes); | |
162 | ||
7b52345e SY |
163 | void kvm_mmu_set_base_ptes(u64 base_pte) |
164 | { | |
165 | shadow_base_present_pte = base_pte; | |
166 | } | |
167 | EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes); | |
168 | ||
169 | void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, | |
170 | u64 dirty_mask, u64 nx_mask, u64 x_mask) | |
171 | { | |
172 | shadow_user_mask = user_mask; | |
173 | shadow_accessed_mask = accessed_mask; | |
174 | shadow_dirty_mask = dirty_mask; | |
175 | shadow_nx_mask = nx_mask; | |
176 | shadow_x_mask = x_mask; | |
177 | } | |
178 | EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes); | |
179 | ||
6aa8b732 AK |
180 | static int is_write_protection(struct kvm_vcpu *vcpu) |
181 | { | |
ad312c7c | 182 | return vcpu->arch.cr0 & X86_CR0_WP; |
6aa8b732 AK |
183 | } |
184 | ||
185 | static int is_cpuid_PSE36(void) | |
186 | { | |
187 | return 1; | |
188 | } | |
189 | ||
73b1087e AK |
190 | static int is_nx(struct kvm_vcpu *vcpu) |
191 | { | |
ad312c7c | 192 | return vcpu->arch.shadow_efer & EFER_NX; |
73b1087e AK |
193 | } |
194 | ||
6aa8b732 AK |
195 | static int is_present_pte(unsigned long pte) |
196 | { | |
197 | return pte & PT_PRESENT_MASK; | |
198 | } | |
199 | ||
c7addb90 AK |
200 | static int is_shadow_present_pte(u64 pte) |
201 | { | |
c7addb90 AK |
202 | return pte != shadow_trap_nonpresent_pte |
203 | && pte != shadow_notrap_nonpresent_pte; | |
204 | } | |
205 | ||
05da4558 MT |
206 | static int is_large_pte(u64 pte) |
207 | { | |
208 | return pte & PT_PAGE_SIZE_MASK; | |
209 | } | |
210 | ||
6aa8b732 AK |
211 | static int is_writeble_pte(unsigned long pte) |
212 | { | |
213 | return pte & PT_WRITABLE_MASK; | |
214 | } | |
215 | ||
e3c5e7ec AK |
216 | static int is_dirty_pte(unsigned long pte) |
217 | { | |
7b52345e | 218 | return pte & shadow_dirty_mask; |
e3c5e7ec AK |
219 | } |
220 | ||
cd4a4e53 AK |
221 | static int is_rmap_pte(u64 pte) |
222 | { | |
4b1a80fa | 223 | return is_shadow_present_pte(pte); |
cd4a4e53 AK |
224 | } |
225 | ||
35149e21 | 226 | static pfn_t spte_to_pfn(u64 pte) |
0b49ea86 | 227 | { |
35149e21 | 228 | return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT; |
0b49ea86 AK |
229 | } |
230 | ||
da928521 AK |
231 | static gfn_t pse36_gfn_delta(u32 gpte) |
232 | { | |
233 | int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT; | |
234 | ||
235 | return (gpte & PT32_DIR_PSE36_MASK) << shift; | |
236 | } | |
237 | ||
e663ee64 AK |
238 | static void set_shadow_pte(u64 *sptep, u64 spte) |
239 | { | |
240 | #ifdef CONFIG_X86_64 | |
241 | set_64bit((unsigned long *)sptep, spte); | |
242 | #else | |
243 | set_64bit((unsigned long long *)sptep, spte); | |
244 | #endif | |
245 | } | |
246 | ||
e2dec939 | 247 | static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache, |
2e3e5882 | 248 | struct kmem_cache *base_cache, int min) |
714b93da AK |
249 | { |
250 | void *obj; | |
251 | ||
252 | if (cache->nobjs >= min) | |
e2dec939 | 253 | return 0; |
714b93da | 254 | while (cache->nobjs < ARRAY_SIZE(cache->objects)) { |
2e3e5882 | 255 | obj = kmem_cache_zalloc(base_cache, GFP_KERNEL); |
714b93da | 256 | if (!obj) |
e2dec939 | 257 | return -ENOMEM; |
714b93da AK |
258 | cache->objects[cache->nobjs++] = obj; |
259 | } | |
e2dec939 | 260 | return 0; |
714b93da AK |
261 | } |
262 | ||
263 | static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc) | |
264 | { | |
265 | while (mc->nobjs) | |
266 | kfree(mc->objects[--mc->nobjs]); | |
267 | } | |
268 | ||
c1158e63 | 269 | static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache, |
2e3e5882 | 270 | int min) |
c1158e63 AK |
271 | { |
272 | struct page *page; | |
273 | ||
274 | if (cache->nobjs >= min) | |
275 | return 0; | |
276 | while (cache->nobjs < ARRAY_SIZE(cache->objects)) { | |
2e3e5882 | 277 | page = alloc_page(GFP_KERNEL); |
c1158e63 AK |
278 | if (!page) |
279 | return -ENOMEM; | |
280 | set_page_private(page, 0); | |
281 | cache->objects[cache->nobjs++] = page_address(page); | |
282 | } | |
283 | return 0; | |
284 | } | |
285 | ||
286 | static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc) | |
287 | { | |
288 | while (mc->nobjs) | |
c4d198d5 | 289 | free_page((unsigned long)mc->objects[--mc->nobjs]); |
c1158e63 AK |
290 | } |
291 | ||
2e3e5882 | 292 | static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu) |
714b93da | 293 | { |
e2dec939 AK |
294 | int r; |
295 | ||
ad312c7c | 296 | r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache, |
2e3e5882 | 297 | pte_chain_cache, 4); |
e2dec939 AK |
298 | if (r) |
299 | goto out; | |
ad312c7c | 300 | r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache, |
2e3e5882 | 301 | rmap_desc_cache, 1); |
d3d25b04 AK |
302 | if (r) |
303 | goto out; | |
ad312c7c | 304 | r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8); |
d3d25b04 AK |
305 | if (r) |
306 | goto out; | |
ad312c7c | 307 | r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache, |
2e3e5882 | 308 | mmu_page_header_cache, 4); |
e2dec939 AK |
309 | out: |
310 | return r; | |
714b93da AK |
311 | } |
312 | ||
313 | static void mmu_free_memory_caches(struct kvm_vcpu *vcpu) | |
314 | { | |
ad312c7c ZX |
315 | mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache); |
316 | mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache); | |
317 | mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache); | |
318 | mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache); | |
714b93da AK |
319 | } |
320 | ||
321 | static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc, | |
322 | size_t size) | |
323 | { | |
324 | void *p; | |
325 | ||
326 | BUG_ON(!mc->nobjs); | |
327 | p = mc->objects[--mc->nobjs]; | |
328 | memset(p, 0, size); | |
329 | return p; | |
330 | } | |
331 | ||
714b93da AK |
332 | static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu) |
333 | { | |
ad312c7c | 334 | return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache, |
714b93da AK |
335 | sizeof(struct kvm_pte_chain)); |
336 | } | |
337 | ||
90cb0529 | 338 | static void mmu_free_pte_chain(struct kvm_pte_chain *pc) |
714b93da | 339 | { |
90cb0529 | 340 | kfree(pc); |
714b93da AK |
341 | } |
342 | ||
343 | static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu) | |
344 | { | |
ad312c7c | 345 | return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache, |
714b93da AK |
346 | sizeof(struct kvm_rmap_desc)); |
347 | } | |
348 | ||
90cb0529 | 349 | static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd) |
714b93da | 350 | { |
90cb0529 | 351 | kfree(rd); |
714b93da AK |
352 | } |
353 | ||
05da4558 MT |
354 | /* |
355 | * Return the pointer to the largepage write count for a given | |
356 | * gfn, handling slots that are not large page aligned. | |
357 | */ | |
358 | static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot) | |
359 | { | |
360 | unsigned long idx; | |
361 | ||
362 | idx = (gfn / KVM_PAGES_PER_HPAGE) - | |
363 | (slot->base_gfn / KVM_PAGES_PER_HPAGE); | |
364 | return &slot->lpage_info[idx].write_count; | |
365 | } | |
366 | ||
367 | static void account_shadowed(struct kvm *kvm, gfn_t gfn) | |
368 | { | |
369 | int *write_count; | |
370 | ||
371 | write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn)); | |
372 | *write_count += 1; | |
05da4558 MT |
373 | } |
374 | ||
375 | static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn) | |
376 | { | |
377 | int *write_count; | |
378 | ||
379 | write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn)); | |
380 | *write_count -= 1; | |
381 | WARN_ON(*write_count < 0); | |
382 | } | |
383 | ||
384 | static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn) | |
385 | { | |
386 | struct kvm_memory_slot *slot = gfn_to_memslot(kvm, gfn); | |
387 | int *largepage_idx; | |
388 | ||
389 | if (slot) { | |
390 | largepage_idx = slot_largepage_idx(gfn, slot); | |
391 | return *largepage_idx; | |
392 | } | |
393 | ||
394 | return 1; | |
395 | } | |
396 | ||
397 | static int host_largepage_backed(struct kvm *kvm, gfn_t gfn) | |
398 | { | |
399 | struct vm_area_struct *vma; | |
400 | unsigned long addr; | |
401 | ||
402 | addr = gfn_to_hva(kvm, gfn); | |
403 | if (kvm_is_error_hva(addr)) | |
404 | return 0; | |
405 | ||
406 | vma = find_vma(current->mm, addr); | |
407 | if (vma && is_vm_hugetlb_page(vma)) | |
408 | return 1; | |
409 | ||
410 | return 0; | |
411 | } | |
412 | ||
413 | static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn) | |
414 | { | |
415 | struct kvm_memory_slot *slot; | |
416 | ||
417 | if (has_wrprotected_page(vcpu->kvm, large_gfn)) | |
418 | return 0; | |
419 | ||
420 | if (!host_largepage_backed(vcpu->kvm, large_gfn)) | |
421 | return 0; | |
422 | ||
423 | slot = gfn_to_memslot(vcpu->kvm, large_gfn); | |
424 | if (slot && slot->dirty_bitmap) | |
425 | return 0; | |
426 | ||
427 | return 1; | |
428 | } | |
429 | ||
290fc38d IE |
430 | /* |
431 | * Take gfn and return the reverse mapping to it. | |
432 | * Note: gfn must be unaliased before this function get called | |
433 | */ | |
434 | ||
05da4558 | 435 | static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage) |
290fc38d IE |
436 | { |
437 | struct kvm_memory_slot *slot; | |
05da4558 | 438 | unsigned long idx; |
290fc38d IE |
439 | |
440 | slot = gfn_to_memslot(kvm, gfn); | |
05da4558 MT |
441 | if (!lpage) |
442 | return &slot->rmap[gfn - slot->base_gfn]; | |
443 | ||
444 | idx = (gfn / KVM_PAGES_PER_HPAGE) - | |
445 | (slot->base_gfn / KVM_PAGES_PER_HPAGE); | |
446 | ||
447 | return &slot->lpage_info[idx].rmap_pde; | |
290fc38d IE |
448 | } |
449 | ||
cd4a4e53 AK |
450 | /* |
451 | * Reverse mapping data structures: | |
452 | * | |
290fc38d IE |
453 | * If rmapp bit zero is zero, then rmapp point to the shadw page table entry |
454 | * that points to page_address(page). | |
cd4a4e53 | 455 | * |
290fc38d IE |
456 | * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc |
457 | * containing more mappings. | |
cd4a4e53 | 458 | */ |
05da4558 | 459 | static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage) |
cd4a4e53 | 460 | { |
4db35314 | 461 | struct kvm_mmu_page *sp; |
cd4a4e53 | 462 | struct kvm_rmap_desc *desc; |
290fc38d | 463 | unsigned long *rmapp; |
cd4a4e53 AK |
464 | int i; |
465 | ||
466 | if (!is_rmap_pte(*spte)) | |
467 | return; | |
290fc38d | 468 | gfn = unalias_gfn(vcpu->kvm, gfn); |
4db35314 AK |
469 | sp = page_header(__pa(spte)); |
470 | sp->gfns[spte - sp->spt] = gfn; | |
05da4558 | 471 | rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage); |
290fc38d | 472 | if (!*rmapp) { |
cd4a4e53 | 473 | rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte); |
290fc38d IE |
474 | *rmapp = (unsigned long)spte; |
475 | } else if (!(*rmapp & 1)) { | |
cd4a4e53 | 476 | rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte); |
714b93da | 477 | desc = mmu_alloc_rmap_desc(vcpu); |
290fc38d | 478 | desc->shadow_ptes[0] = (u64 *)*rmapp; |
cd4a4e53 | 479 | desc->shadow_ptes[1] = spte; |
290fc38d | 480 | *rmapp = (unsigned long)desc | 1; |
cd4a4e53 AK |
481 | } else { |
482 | rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte); | |
290fc38d | 483 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
cd4a4e53 AK |
484 | while (desc->shadow_ptes[RMAP_EXT-1] && desc->more) |
485 | desc = desc->more; | |
486 | if (desc->shadow_ptes[RMAP_EXT-1]) { | |
714b93da | 487 | desc->more = mmu_alloc_rmap_desc(vcpu); |
cd4a4e53 AK |
488 | desc = desc->more; |
489 | } | |
490 | for (i = 0; desc->shadow_ptes[i]; ++i) | |
491 | ; | |
492 | desc->shadow_ptes[i] = spte; | |
493 | } | |
494 | } | |
495 | ||
290fc38d | 496 | static void rmap_desc_remove_entry(unsigned long *rmapp, |
cd4a4e53 AK |
497 | struct kvm_rmap_desc *desc, |
498 | int i, | |
499 | struct kvm_rmap_desc *prev_desc) | |
500 | { | |
501 | int j; | |
502 | ||
503 | for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j) | |
504 | ; | |
505 | desc->shadow_ptes[i] = desc->shadow_ptes[j]; | |
11718b4d | 506 | desc->shadow_ptes[j] = NULL; |
cd4a4e53 AK |
507 | if (j != 0) |
508 | return; | |
509 | if (!prev_desc && !desc->more) | |
290fc38d | 510 | *rmapp = (unsigned long)desc->shadow_ptes[0]; |
cd4a4e53 AK |
511 | else |
512 | if (prev_desc) | |
513 | prev_desc->more = desc->more; | |
514 | else | |
290fc38d | 515 | *rmapp = (unsigned long)desc->more | 1; |
90cb0529 | 516 | mmu_free_rmap_desc(desc); |
cd4a4e53 AK |
517 | } |
518 | ||
290fc38d | 519 | static void rmap_remove(struct kvm *kvm, u64 *spte) |
cd4a4e53 | 520 | { |
cd4a4e53 AK |
521 | struct kvm_rmap_desc *desc; |
522 | struct kvm_rmap_desc *prev_desc; | |
4db35314 | 523 | struct kvm_mmu_page *sp; |
35149e21 | 524 | pfn_t pfn; |
290fc38d | 525 | unsigned long *rmapp; |
cd4a4e53 AK |
526 | int i; |
527 | ||
528 | if (!is_rmap_pte(*spte)) | |
529 | return; | |
4db35314 | 530 | sp = page_header(__pa(spte)); |
35149e21 | 531 | pfn = spte_to_pfn(*spte); |
7b52345e | 532 | if (*spte & shadow_accessed_mask) |
35149e21 | 533 | kvm_set_pfn_accessed(pfn); |
b4231d61 | 534 | if (is_writeble_pte(*spte)) |
35149e21 | 535 | kvm_release_pfn_dirty(pfn); |
b4231d61 | 536 | else |
35149e21 | 537 | kvm_release_pfn_clean(pfn); |
05da4558 | 538 | rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte)); |
290fc38d | 539 | if (!*rmapp) { |
cd4a4e53 AK |
540 | printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte); |
541 | BUG(); | |
290fc38d | 542 | } else if (!(*rmapp & 1)) { |
cd4a4e53 | 543 | rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte); |
290fc38d | 544 | if ((u64 *)*rmapp != spte) { |
cd4a4e53 AK |
545 | printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n", |
546 | spte, *spte); | |
547 | BUG(); | |
548 | } | |
290fc38d | 549 | *rmapp = 0; |
cd4a4e53 AK |
550 | } else { |
551 | rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte); | |
290fc38d | 552 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
cd4a4e53 AK |
553 | prev_desc = NULL; |
554 | while (desc) { | |
555 | for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) | |
556 | if (desc->shadow_ptes[i] == spte) { | |
290fc38d | 557 | rmap_desc_remove_entry(rmapp, |
714b93da | 558 | desc, i, |
cd4a4e53 AK |
559 | prev_desc); |
560 | return; | |
561 | } | |
562 | prev_desc = desc; | |
563 | desc = desc->more; | |
564 | } | |
565 | BUG(); | |
566 | } | |
567 | } | |
568 | ||
98348e95 | 569 | static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte) |
374cbac0 | 570 | { |
374cbac0 | 571 | struct kvm_rmap_desc *desc; |
98348e95 IE |
572 | struct kvm_rmap_desc *prev_desc; |
573 | u64 *prev_spte; | |
574 | int i; | |
575 | ||
576 | if (!*rmapp) | |
577 | return NULL; | |
578 | else if (!(*rmapp & 1)) { | |
579 | if (!spte) | |
580 | return (u64 *)*rmapp; | |
581 | return NULL; | |
582 | } | |
583 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); | |
584 | prev_desc = NULL; | |
585 | prev_spte = NULL; | |
586 | while (desc) { | |
587 | for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) { | |
588 | if (prev_spte == spte) | |
589 | return desc->shadow_ptes[i]; | |
590 | prev_spte = desc->shadow_ptes[i]; | |
591 | } | |
592 | desc = desc->more; | |
593 | } | |
594 | return NULL; | |
595 | } | |
596 | ||
597 | static void rmap_write_protect(struct kvm *kvm, u64 gfn) | |
598 | { | |
290fc38d | 599 | unsigned long *rmapp; |
374cbac0 | 600 | u64 *spte; |
caa5b8a5 | 601 | int write_protected = 0; |
374cbac0 | 602 | |
4a4c9924 | 603 | gfn = unalias_gfn(kvm, gfn); |
05da4558 | 604 | rmapp = gfn_to_rmap(kvm, gfn, 0); |
374cbac0 | 605 | |
98348e95 IE |
606 | spte = rmap_next(kvm, rmapp, NULL); |
607 | while (spte) { | |
374cbac0 | 608 | BUG_ON(!spte); |
374cbac0 | 609 | BUG_ON(!(*spte & PT_PRESENT_MASK)); |
374cbac0 | 610 | rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte); |
caa5b8a5 | 611 | if (is_writeble_pte(*spte)) { |
9647c14c | 612 | set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK); |
caa5b8a5 ED |
613 | write_protected = 1; |
614 | } | |
9647c14c | 615 | spte = rmap_next(kvm, rmapp, spte); |
374cbac0 | 616 | } |
855149aa | 617 | if (write_protected) { |
35149e21 | 618 | pfn_t pfn; |
855149aa IE |
619 | |
620 | spte = rmap_next(kvm, rmapp, NULL); | |
35149e21 AL |
621 | pfn = spte_to_pfn(*spte); |
622 | kvm_set_pfn_dirty(pfn); | |
855149aa IE |
623 | } |
624 | ||
05da4558 MT |
625 | /* check for huge page mappings */ |
626 | rmapp = gfn_to_rmap(kvm, gfn, 1); | |
627 | spte = rmap_next(kvm, rmapp, NULL); | |
628 | while (spte) { | |
629 | BUG_ON(!spte); | |
630 | BUG_ON(!(*spte & PT_PRESENT_MASK)); | |
631 | BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)); | |
632 | pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn); | |
633 | if (is_writeble_pte(*spte)) { | |
634 | rmap_remove(kvm, spte); | |
635 | --kvm->stat.lpages; | |
636 | set_shadow_pte(spte, shadow_trap_nonpresent_pte); | |
6597ca09 | 637 | spte = NULL; |
05da4558 MT |
638 | write_protected = 1; |
639 | } | |
640 | spte = rmap_next(kvm, rmapp, spte); | |
641 | } | |
642 | ||
caa5b8a5 ED |
643 | if (write_protected) |
644 | kvm_flush_remote_tlbs(kvm); | |
05da4558 MT |
645 | |
646 | account_shadowed(kvm, gfn); | |
374cbac0 AK |
647 | } |
648 | ||
e930bffe AA |
649 | static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp) |
650 | { | |
651 | u64 *spte; | |
652 | int need_tlb_flush = 0; | |
653 | ||
654 | while ((spte = rmap_next(kvm, rmapp, NULL))) { | |
655 | BUG_ON(!(*spte & PT_PRESENT_MASK)); | |
656 | rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte); | |
657 | rmap_remove(kvm, spte); | |
658 | set_shadow_pte(spte, shadow_trap_nonpresent_pte); | |
659 | need_tlb_flush = 1; | |
660 | } | |
661 | return need_tlb_flush; | |
662 | } | |
663 | ||
664 | static int kvm_handle_hva(struct kvm *kvm, unsigned long hva, | |
665 | int (*handler)(struct kvm *kvm, unsigned long *rmapp)) | |
666 | { | |
667 | int i; | |
668 | int retval = 0; | |
669 | ||
670 | /* | |
671 | * If mmap_sem isn't taken, we can look the memslots with only | |
672 | * the mmu_lock by skipping over the slots with userspace_addr == 0. | |
673 | */ | |
674 | for (i = 0; i < kvm->nmemslots; i++) { | |
675 | struct kvm_memory_slot *memslot = &kvm->memslots[i]; | |
676 | unsigned long start = memslot->userspace_addr; | |
677 | unsigned long end; | |
678 | ||
679 | /* mmu_lock protects userspace_addr */ | |
680 | if (!start) | |
681 | continue; | |
682 | ||
683 | end = start + (memslot->npages << PAGE_SHIFT); | |
684 | if (hva >= start && hva < end) { | |
685 | gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT; | |
686 | retval |= handler(kvm, &memslot->rmap[gfn_offset]); | |
687 | retval |= handler(kvm, | |
688 | &memslot->lpage_info[ | |
689 | gfn_offset / | |
690 | KVM_PAGES_PER_HPAGE].rmap_pde); | |
691 | } | |
692 | } | |
693 | ||
694 | return retval; | |
695 | } | |
696 | ||
697 | int kvm_unmap_hva(struct kvm *kvm, unsigned long hva) | |
698 | { | |
699 | return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp); | |
700 | } | |
701 | ||
702 | static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp) | |
703 | { | |
704 | u64 *spte; | |
705 | int young = 0; | |
706 | ||
534e38b4 SY |
707 | /* always return old for EPT */ |
708 | if (!shadow_accessed_mask) | |
709 | return 0; | |
710 | ||
e930bffe AA |
711 | spte = rmap_next(kvm, rmapp, NULL); |
712 | while (spte) { | |
713 | int _young; | |
714 | u64 _spte = *spte; | |
715 | BUG_ON(!(_spte & PT_PRESENT_MASK)); | |
716 | _young = _spte & PT_ACCESSED_MASK; | |
717 | if (_young) { | |
718 | young = 1; | |
719 | clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte); | |
720 | } | |
721 | spte = rmap_next(kvm, rmapp, spte); | |
722 | } | |
723 | return young; | |
724 | } | |
725 | ||
726 | int kvm_age_hva(struct kvm *kvm, unsigned long hva) | |
727 | { | |
728 | return kvm_handle_hva(kvm, hva, kvm_age_rmapp); | |
729 | } | |
730 | ||
d6c69ee9 | 731 | #ifdef MMU_DEBUG |
47ad8e68 | 732 | static int is_empty_shadow_page(u64 *spt) |
6aa8b732 | 733 | { |
139bdb2d AK |
734 | u64 *pos; |
735 | u64 *end; | |
736 | ||
47ad8e68 | 737 | for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++) |
3c915510 | 738 | if (is_shadow_present_pte(*pos)) { |
b8688d51 | 739 | printk(KERN_ERR "%s: %p %llx\n", __func__, |
139bdb2d | 740 | pos, *pos); |
6aa8b732 | 741 | return 0; |
139bdb2d | 742 | } |
6aa8b732 AK |
743 | return 1; |
744 | } | |
d6c69ee9 | 745 | #endif |
6aa8b732 | 746 | |
4db35314 | 747 | static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp) |
260746c0 | 748 | { |
4db35314 AK |
749 | ASSERT(is_empty_shadow_page(sp->spt)); |
750 | list_del(&sp->link); | |
751 | __free_page(virt_to_page(sp->spt)); | |
752 | __free_page(virt_to_page(sp->gfns)); | |
753 | kfree(sp); | |
f05e70ac | 754 | ++kvm->arch.n_free_mmu_pages; |
260746c0 AK |
755 | } |
756 | ||
cea0f0e7 AK |
757 | static unsigned kvm_page_table_hashfn(gfn_t gfn) |
758 | { | |
1ae0a13d | 759 | return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1); |
cea0f0e7 AK |
760 | } |
761 | ||
25c0de2c AK |
762 | static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu, |
763 | u64 *parent_pte) | |
6aa8b732 | 764 | { |
4db35314 | 765 | struct kvm_mmu_page *sp; |
6aa8b732 | 766 | |
ad312c7c ZX |
767 | sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp); |
768 | sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE); | |
769 | sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE); | |
4db35314 | 770 | set_page_private(virt_to_page(sp->spt), (unsigned long)sp); |
f05e70ac | 771 | list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages); |
4db35314 AK |
772 | ASSERT(is_empty_shadow_page(sp->spt)); |
773 | sp->slot_bitmap = 0; | |
774 | sp->multimapped = 0; | |
775 | sp->parent_pte = parent_pte; | |
f05e70ac | 776 | --vcpu->kvm->arch.n_free_mmu_pages; |
4db35314 | 777 | return sp; |
6aa8b732 AK |
778 | } |
779 | ||
714b93da | 780 | static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu, |
4db35314 | 781 | struct kvm_mmu_page *sp, u64 *parent_pte) |
cea0f0e7 AK |
782 | { |
783 | struct kvm_pte_chain *pte_chain; | |
784 | struct hlist_node *node; | |
785 | int i; | |
786 | ||
787 | if (!parent_pte) | |
788 | return; | |
4db35314 AK |
789 | if (!sp->multimapped) { |
790 | u64 *old = sp->parent_pte; | |
cea0f0e7 AK |
791 | |
792 | if (!old) { | |
4db35314 | 793 | sp->parent_pte = parent_pte; |
cea0f0e7 AK |
794 | return; |
795 | } | |
4db35314 | 796 | sp->multimapped = 1; |
714b93da | 797 | pte_chain = mmu_alloc_pte_chain(vcpu); |
4db35314 AK |
798 | INIT_HLIST_HEAD(&sp->parent_ptes); |
799 | hlist_add_head(&pte_chain->link, &sp->parent_ptes); | |
cea0f0e7 AK |
800 | pte_chain->parent_ptes[0] = old; |
801 | } | |
4db35314 | 802 | hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) { |
cea0f0e7 AK |
803 | if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1]) |
804 | continue; | |
805 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) | |
806 | if (!pte_chain->parent_ptes[i]) { | |
807 | pte_chain->parent_ptes[i] = parent_pte; | |
808 | return; | |
809 | } | |
810 | } | |
714b93da | 811 | pte_chain = mmu_alloc_pte_chain(vcpu); |
cea0f0e7 | 812 | BUG_ON(!pte_chain); |
4db35314 | 813 | hlist_add_head(&pte_chain->link, &sp->parent_ptes); |
cea0f0e7 AK |
814 | pte_chain->parent_ptes[0] = parent_pte; |
815 | } | |
816 | ||
4db35314 | 817 | static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp, |
cea0f0e7 AK |
818 | u64 *parent_pte) |
819 | { | |
820 | struct kvm_pte_chain *pte_chain; | |
821 | struct hlist_node *node; | |
822 | int i; | |
823 | ||
4db35314 AK |
824 | if (!sp->multimapped) { |
825 | BUG_ON(sp->parent_pte != parent_pte); | |
826 | sp->parent_pte = NULL; | |
cea0f0e7 AK |
827 | return; |
828 | } | |
4db35314 | 829 | hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) |
cea0f0e7 AK |
830 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) { |
831 | if (!pte_chain->parent_ptes[i]) | |
832 | break; | |
833 | if (pte_chain->parent_ptes[i] != parent_pte) | |
834 | continue; | |
697fe2e2 AK |
835 | while (i + 1 < NR_PTE_CHAIN_ENTRIES |
836 | && pte_chain->parent_ptes[i + 1]) { | |
cea0f0e7 AK |
837 | pte_chain->parent_ptes[i] |
838 | = pte_chain->parent_ptes[i + 1]; | |
839 | ++i; | |
840 | } | |
841 | pte_chain->parent_ptes[i] = NULL; | |
697fe2e2 AK |
842 | if (i == 0) { |
843 | hlist_del(&pte_chain->link); | |
90cb0529 | 844 | mmu_free_pte_chain(pte_chain); |
4db35314 AK |
845 | if (hlist_empty(&sp->parent_ptes)) { |
846 | sp->multimapped = 0; | |
847 | sp->parent_pte = NULL; | |
697fe2e2 AK |
848 | } |
849 | } | |
cea0f0e7 AK |
850 | return; |
851 | } | |
852 | BUG(); | |
853 | } | |
854 | ||
d761a501 AK |
855 | static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu, |
856 | struct kvm_mmu_page *sp) | |
857 | { | |
858 | int i; | |
859 | ||
860 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) | |
861 | sp->spt[i] = shadow_trap_nonpresent_pte; | |
862 | } | |
863 | ||
4db35314 | 864 | static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn) |
cea0f0e7 AK |
865 | { |
866 | unsigned index; | |
867 | struct hlist_head *bucket; | |
4db35314 | 868 | struct kvm_mmu_page *sp; |
cea0f0e7 AK |
869 | struct hlist_node *node; |
870 | ||
b8688d51 | 871 | pgprintk("%s: looking for gfn %lx\n", __func__, gfn); |
1ae0a13d | 872 | index = kvm_page_table_hashfn(gfn); |
f05e70ac | 873 | bucket = &kvm->arch.mmu_page_hash[index]; |
4db35314 | 874 | hlist_for_each_entry(sp, node, bucket, hash_link) |
2e53d63a MT |
875 | if (sp->gfn == gfn && !sp->role.metaphysical |
876 | && !sp->role.invalid) { | |
cea0f0e7 | 877 | pgprintk("%s: found role %x\n", |
b8688d51 | 878 | __func__, sp->role.word); |
4db35314 | 879 | return sp; |
cea0f0e7 AK |
880 | } |
881 | return NULL; | |
882 | } | |
883 | ||
884 | static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu, | |
885 | gfn_t gfn, | |
886 | gva_t gaddr, | |
887 | unsigned level, | |
888 | int metaphysical, | |
41074d07 | 889 | unsigned access, |
f7d9c7b7 | 890 | u64 *parent_pte) |
cea0f0e7 AK |
891 | { |
892 | union kvm_mmu_page_role role; | |
893 | unsigned index; | |
894 | unsigned quadrant; | |
895 | struct hlist_head *bucket; | |
4db35314 | 896 | struct kvm_mmu_page *sp; |
cea0f0e7 AK |
897 | struct hlist_node *node; |
898 | ||
899 | role.word = 0; | |
ad312c7c | 900 | role.glevels = vcpu->arch.mmu.root_level; |
cea0f0e7 AK |
901 | role.level = level; |
902 | role.metaphysical = metaphysical; | |
41074d07 | 903 | role.access = access; |
ad312c7c | 904 | if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) { |
cea0f0e7 AK |
905 | quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level)); |
906 | quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1; | |
907 | role.quadrant = quadrant; | |
908 | } | |
b8688d51 | 909 | pgprintk("%s: looking gfn %lx role %x\n", __func__, |
cea0f0e7 | 910 | gfn, role.word); |
1ae0a13d | 911 | index = kvm_page_table_hashfn(gfn); |
f05e70ac | 912 | bucket = &vcpu->kvm->arch.mmu_page_hash[index]; |
4db35314 AK |
913 | hlist_for_each_entry(sp, node, bucket, hash_link) |
914 | if (sp->gfn == gfn && sp->role.word == role.word) { | |
915 | mmu_page_add_parent_pte(vcpu, sp, parent_pte); | |
b8688d51 | 916 | pgprintk("%s: found\n", __func__); |
4db35314 | 917 | return sp; |
cea0f0e7 | 918 | } |
dfc5aa00 | 919 | ++vcpu->kvm->stat.mmu_cache_miss; |
4db35314 AK |
920 | sp = kvm_mmu_alloc_page(vcpu, parent_pte); |
921 | if (!sp) | |
922 | return sp; | |
b8688d51 | 923 | pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word); |
4db35314 AK |
924 | sp->gfn = gfn; |
925 | sp->role = role; | |
926 | hlist_add_head(&sp->hash_link, bucket); | |
374cbac0 | 927 | if (!metaphysical) |
4a4c9924 | 928 | rmap_write_protect(vcpu->kvm, gfn); |
131d8279 AK |
929 | if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte) |
930 | vcpu->arch.mmu.prefetch_page(vcpu, sp); | |
931 | else | |
932 | nonpaging_prefetch_page(vcpu, sp); | |
4db35314 | 933 | return sp; |
cea0f0e7 AK |
934 | } |
935 | ||
90cb0529 | 936 | static void kvm_mmu_page_unlink_children(struct kvm *kvm, |
4db35314 | 937 | struct kvm_mmu_page *sp) |
a436036b | 938 | { |
697fe2e2 AK |
939 | unsigned i; |
940 | u64 *pt; | |
941 | u64 ent; | |
942 | ||
4db35314 | 943 | pt = sp->spt; |
697fe2e2 | 944 | |
4db35314 | 945 | if (sp->role.level == PT_PAGE_TABLE_LEVEL) { |
697fe2e2 | 946 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { |
c7addb90 | 947 | if (is_shadow_present_pte(pt[i])) |
290fc38d | 948 | rmap_remove(kvm, &pt[i]); |
c7addb90 | 949 | pt[i] = shadow_trap_nonpresent_pte; |
697fe2e2 AK |
950 | } |
951 | return; | |
952 | } | |
953 | ||
954 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
955 | ent = pt[i]; | |
956 | ||
05da4558 MT |
957 | if (is_shadow_present_pte(ent)) { |
958 | if (!is_large_pte(ent)) { | |
959 | ent &= PT64_BASE_ADDR_MASK; | |
960 | mmu_page_remove_parent_pte(page_header(ent), | |
961 | &pt[i]); | |
962 | } else { | |
963 | --kvm->stat.lpages; | |
964 | rmap_remove(kvm, &pt[i]); | |
965 | } | |
966 | } | |
c7addb90 | 967 | pt[i] = shadow_trap_nonpresent_pte; |
697fe2e2 | 968 | } |
a436036b AK |
969 | } |
970 | ||
4db35314 | 971 | static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte) |
cea0f0e7 | 972 | { |
4db35314 | 973 | mmu_page_remove_parent_pte(sp, parent_pte); |
a436036b AK |
974 | } |
975 | ||
12b7d28f AK |
976 | static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm) |
977 | { | |
978 | int i; | |
979 | ||
980 | for (i = 0; i < KVM_MAX_VCPUS; ++i) | |
981 | if (kvm->vcpus[i]) | |
ad312c7c | 982 | kvm->vcpus[i]->arch.last_pte_updated = NULL; |
12b7d28f AK |
983 | } |
984 | ||
31aa2b44 | 985 | static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp) |
a436036b AK |
986 | { |
987 | u64 *parent_pte; | |
988 | ||
4db35314 AK |
989 | while (sp->multimapped || sp->parent_pte) { |
990 | if (!sp->multimapped) | |
991 | parent_pte = sp->parent_pte; | |
a436036b AK |
992 | else { |
993 | struct kvm_pte_chain *chain; | |
994 | ||
4db35314 | 995 | chain = container_of(sp->parent_ptes.first, |
a436036b AK |
996 | struct kvm_pte_chain, link); |
997 | parent_pte = chain->parent_ptes[0]; | |
998 | } | |
697fe2e2 | 999 | BUG_ON(!parent_pte); |
4db35314 | 1000 | kvm_mmu_put_page(sp, parent_pte); |
c7addb90 | 1001 | set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte); |
a436036b | 1002 | } |
31aa2b44 AK |
1003 | } |
1004 | ||
1005 | static void kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp) | |
1006 | { | |
1007 | ++kvm->stat.mmu_shadow_zapped; | |
4db35314 | 1008 | kvm_mmu_page_unlink_children(kvm, sp); |
31aa2b44 | 1009 | kvm_mmu_unlink_parents(kvm, sp); |
5b5c6a5a AK |
1010 | kvm_flush_remote_tlbs(kvm); |
1011 | if (!sp->role.invalid && !sp->role.metaphysical) | |
1012 | unaccount_shadowed(kvm, sp->gfn); | |
4db35314 AK |
1013 | if (!sp->root_count) { |
1014 | hlist_del(&sp->hash_link); | |
1015 | kvm_mmu_free_page(kvm, sp); | |
2e53d63a | 1016 | } else { |
2e53d63a | 1017 | sp->role.invalid = 1; |
5b5c6a5a | 1018 | list_move(&sp->link, &kvm->arch.active_mmu_pages); |
2e53d63a MT |
1019 | kvm_reload_remote_mmus(kvm); |
1020 | } | |
12b7d28f | 1021 | kvm_mmu_reset_last_pte_updated(kvm); |
a436036b AK |
1022 | } |
1023 | ||
82ce2c96 IE |
1024 | /* |
1025 | * Changing the number of mmu pages allocated to the vm | |
1026 | * Note: if kvm_nr_mmu_pages is too small, you will get dead lock | |
1027 | */ | |
1028 | void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages) | |
1029 | { | |
1030 | /* | |
1031 | * If we set the number of mmu pages to be smaller be than the | |
1032 | * number of actived pages , we must to free some mmu pages before we | |
1033 | * change the value | |
1034 | */ | |
1035 | ||
f05e70ac | 1036 | if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) > |
82ce2c96 | 1037 | kvm_nr_mmu_pages) { |
f05e70ac ZX |
1038 | int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages |
1039 | - kvm->arch.n_free_mmu_pages; | |
82ce2c96 IE |
1040 | |
1041 | while (n_used_mmu_pages > kvm_nr_mmu_pages) { | |
1042 | struct kvm_mmu_page *page; | |
1043 | ||
f05e70ac | 1044 | page = container_of(kvm->arch.active_mmu_pages.prev, |
82ce2c96 IE |
1045 | struct kvm_mmu_page, link); |
1046 | kvm_mmu_zap_page(kvm, page); | |
1047 | n_used_mmu_pages--; | |
1048 | } | |
f05e70ac | 1049 | kvm->arch.n_free_mmu_pages = 0; |
82ce2c96 IE |
1050 | } |
1051 | else | |
f05e70ac ZX |
1052 | kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages |
1053 | - kvm->arch.n_alloc_mmu_pages; | |
82ce2c96 | 1054 | |
f05e70ac | 1055 | kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages; |
82ce2c96 IE |
1056 | } |
1057 | ||
f67a46f4 | 1058 | static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn) |
a436036b AK |
1059 | { |
1060 | unsigned index; | |
1061 | struct hlist_head *bucket; | |
4db35314 | 1062 | struct kvm_mmu_page *sp; |
a436036b AK |
1063 | struct hlist_node *node, *n; |
1064 | int r; | |
1065 | ||
b8688d51 | 1066 | pgprintk("%s: looking for gfn %lx\n", __func__, gfn); |
a436036b | 1067 | r = 0; |
1ae0a13d | 1068 | index = kvm_page_table_hashfn(gfn); |
f05e70ac | 1069 | bucket = &kvm->arch.mmu_page_hash[index]; |
4db35314 AK |
1070 | hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) |
1071 | if (sp->gfn == gfn && !sp->role.metaphysical) { | |
b8688d51 | 1072 | pgprintk("%s: gfn %lx role %x\n", __func__, gfn, |
4db35314 AK |
1073 | sp->role.word); |
1074 | kvm_mmu_zap_page(kvm, sp); | |
a436036b AK |
1075 | r = 1; |
1076 | } | |
1077 | return r; | |
cea0f0e7 AK |
1078 | } |
1079 | ||
f67a46f4 | 1080 | static void mmu_unshadow(struct kvm *kvm, gfn_t gfn) |
97a0a01e | 1081 | { |
4db35314 | 1082 | struct kvm_mmu_page *sp; |
97a0a01e | 1083 | |
4db35314 | 1084 | while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) { |
b8688d51 | 1085 | pgprintk("%s: zap %lx %x\n", __func__, gfn, sp->role.word); |
4db35314 | 1086 | kvm_mmu_zap_page(kvm, sp); |
97a0a01e AK |
1087 | } |
1088 | } | |
1089 | ||
38c335f1 | 1090 | static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn) |
6aa8b732 | 1091 | { |
38c335f1 | 1092 | int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn)); |
4db35314 | 1093 | struct kvm_mmu_page *sp = page_header(__pa(pte)); |
6aa8b732 | 1094 | |
4db35314 | 1095 | __set_bit(slot, &sp->slot_bitmap); |
6aa8b732 AK |
1096 | } |
1097 | ||
039576c0 AK |
1098 | struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva) |
1099 | { | |
72dc67a6 IE |
1100 | struct page *page; |
1101 | ||
ad312c7c | 1102 | gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva); |
039576c0 AK |
1103 | |
1104 | if (gpa == UNMAPPED_GVA) | |
1105 | return NULL; | |
72dc67a6 IE |
1106 | |
1107 | down_read(¤t->mm->mmap_sem); | |
1108 | page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT); | |
1109 | up_read(¤t->mm->mmap_sem); | |
1110 | ||
1111 | return page; | |
039576c0 AK |
1112 | } |
1113 | ||
1c4f1fd6 AK |
1114 | static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte, |
1115 | unsigned pt_access, unsigned pte_access, | |
1116 | int user_fault, int write_fault, int dirty, | |
05da4558 | 1117 | int *ptwrite, int largepage, gfn_t gfn, |
35149e21 | 1118 | pfn_t pfn, bool speculative) |
1c4f1fd6 AK |
1119 | { |
1120 | u64 spte; | |
15aaa819 | 1121 | int was_rmapped = 0; |
75e68e60 | 1122 | int was_writeble = is_writeble_pte(*shadow_pte); |
1c4f1fd6 | 1123 | |
bc750ba8 | 1124 | pgprintk("%s: spte %llx access %x write_fault %d" |
1c4f1fd6 | 1125 | " user_fault %d gfn %lx\n", |
b8688d51 | 1126 | __func__, *shadow_pte, pt_access, |
1c4f1fd6 AK |
1127 | write_fault, user_fault, gfn); |
1128 | ||
15aaa819 | 1129 | if (is_rmap_pte(*shadow_pte)) { |
05da4558 MT |
1130 | /* |
1131 | * If we overwrite a PTE page pointer with a 2MB PMD, unlink | |
1132 | * the parent of the now unreachable PTE. | |
1133 | */ | |
1134 | if (largepage && !is_large_pte(*shadow_pte)) { | |
1135 | struct kvm_mmu_page *child; | |
1136 | u64 pte = *shadow_pte; | |
1137 | ||
1138 | child = page_header(pte & PT64_BASE_ADDR_MASK); | |
1139 | mmu_page_remove_parent_pte(child, shadow_pte); | |
35149e21 | 1140 | } else if (pfn != spte_to_pfn(*shadow_pte)) { |
15aaa819 | 1141 | pgprintk("hfn old %lx new %lx\n", |
35149e21 | 1142 | spte_to_pfn(*shadow_pte), pfn); |
15aaa819 | 1143 | rmap_remove(vcpu->kvm, shadow_pte); |
05da4558 MT |
1144 | } else { |
1145 | if (largepage) | |
1146 | was_rmapped = is_large_pte(*shadow_pte); | |
1147 | else | |
1148 | was_rmapped = 1; | |
15aaa819 | 1149 | } |
15aaa819 MT |
1150 | } |
1151 | ||
1c4f1fd6 AK |
1152 | /* |
1153 | * We don't set the accessed bit, since we sometimes want to see | |
1154 | * whether the guest actually used the pte (in order to detect | |
1155 | * demand paging). | |
1156 | */ | |
7b52345e | 1157 | spte = shadow_base_present_pte | shadow_dirty_mask; |
947da538 AK |
1158 | if (!speculative) |
1159 | pte_access |= PT_ACCESSED_MASK; | |
1c4f1fd6 AK |
1160 | if (!dirty) |
1161 | pte_access &= ~ACC_WRITE_MASK; | |
7b52345e SY |
1162 | if (pte_access & ACC_EXEC_MASK) |
1163 | spte |= shadow_x_mask; | |
1164 | else | |
1165 | spte |= shadow_nx_mask; | |
1c4f1fd6 | 1166 | if (pte_access & ACC_USER_MASK) |
7b52345e | 1167 | spte |= shadow_user_mask; |
05da4558 MT |
1168 | if (largepage) |
1169 | spte |= PT_PAGE_SIZE_MASK; | |
1c4f1fd6 | 1170 | |
35149e21 | 1171 | spte |= (u64)pfn << PAGE_SHIFT; |
1c4f1fd6 AK |
1172 | |
1173 | if ((pte_access & ACC_WRITE_MASK) | |
1174 | || (write_fault && !is_write_protection(vcpu) && !user_fault)) { | |
1175 | struct kvm_mmu_page *shadow; | |
1176 | ||
1177 | spte |= PT_WRITABLE_MASK; | |
1c4f1fd6 AK |
1178 | |
1179 | shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn); | |
05da4558 MT |
1180 | if (shadow || |
1181 | (largepage && has_wrprotected_page(vcpu->kvm, gfn))) { | |
1c4f1fd6 | 1182 | pgprintk("%s: found shadow page for %lx, marking ro\n", |
b8688d51 | 1183 | __func__, gfn); |
1c4f1fd6 AK |
1184 | pte_access &= ~ACC_WRITE_MASK; |
1185 | if (is_writeble_pte(spte)) { | |
1186 | spte &= ~PT_WRITABLE_MASK; | |
1187 | kvm_x86_ops->tlb_flush(vcpu); | |
1188 | } | |
1189 | if (write_fault) | |
1190 | *ptwrite = 1; | |
1191 | } | |
1192 | } | |
1193 | ||
1c4f1fd6 AK |
1194 | if (pte_access & ACC_WRITE_MASK) |
1195 | mark_page_dirty(vcpu->kvm, gfn); | |
1196 | ||
b8688d51 | 1197 | pgprintk("%s: setting spte %llx\n", __func__, spte); |
db475c39 | 1198 | pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n", |
05da4558 MT |
1199 | (spte&PT_PAGE_SIZE_MASK)? "2MB" : "4kB", |
1200 | (spte&PT_WRITABLE_MASK)?"RW":"R", gfn, spte, shadow_pte); | |
1c4f1fd6 | 1201 | set_shadow_pte(shadow_pte, spte); |
05da4558 MT |
1202 | if (!was_rmapped && (spte & PT_PAGE_SIZE_MASK) |
1203 | && (spte & PT_PRESENT_MASK)) | |
1204 | ++vcpu->kvm->stat.lpages; | |
1205 | ||
1c4f1fd6 AK |
1206 | page_header_update_slot(vcpu->kvm, shadow_pte, gfn); |
1207 | if (!was_rmapped) { | |
05da4558 | 1208 | rmap_add(vcpu, shadow_pte, gfn, largepage); |
1c4f1fd6 | 1209 | if (!is_rmap_pte(*shadow_pte)) |
35149e21 | 1210 | kvm_release_pfn_clean(pfn); |
75e68e60 IE |
1211 | } else { |
1212 | if (was_writeble) | |
35149e21 | 1213 | kvm_release_pfn_dirty(pfn); |
75e68e60 | 1214 | else |
35149e21 | 1215 | kvm_release_pfn_clean(pfn); |
1c4f1fd6 | 1216 | } |
1b7fcd32 | 1217 | if (speculative) { |
ad312c7c | 1218 | vcpu->arch.last_pte_updated = shadow_pte; |
1b7fcd32 AK |
1219 | vcpu->arch.last_pte_gfn = gfn; |
1220 | } | |
1c4f1fd6 AK |
1221 | } |
1222 | ||
6aa8b732 AK |
1223 | static void nonpaging_new_cr3(struct kvm_vcpu *vcpu) |
1224 | { | |
1225 | } | |
1226 | ||
4d9976bb | 1227 | static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write, |
35149e21 | 1228 | int largepage, gfn_t gfn, pfn_t pfn, |
05da4558 | 1229 | int level) |
6aa8b732 | 1230 | { |
ad312c7c | 1231 | hpa_t table_addr = vcpu->arch.mmu.root_hpa; |
e833240f | 1232 | int pt_write = 0; |
6aa8b732 AK |
1233 | |
1234 | for (; ; level--) { | |
1235 | u32 index = PT64_INDEX(v, level); | |
1236 | u64 *table; | |
1237 | ||
1238 | ASSERT(VALID_PAGE(table_addr)); | |
1239 | table = __va(table_addr); | |
1240 | ||
1241 | if (level == 1) { | |
e833240f | 1242 | mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL, |
35149e21 | 1243 | 0, write, 1, &pt_write, 0, gfn, pfn, false); |
05da4558 MT |
1244 | return pt_write; |
1245 | } | |
1246 | ||
1247 | if (largepage && level == 2) { | |
1248 | mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL, | |
35149e21 | 1249 | 0, write, 1, &pt_write, 1, gfn, pfn, false); |
d196e343 | 1250 | return pt_write; |
6aa8b732 AK |
1251 | } |
1252 | ||
c7addb90 | 1253 | if (table[index] == shadow_trap_nonpresent_pte) { |
25c0de2c | 1254 | struct kvm_mmu_page *new_table; |
cea0f0e7 | 1255 | gfn_t pseudo_gfn; |
6aa8b732 | 1256 | |
cea0f0e7 AK |
1257 | pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK) |
1258 | >> PAGE_SHIFT; | |
1259 | new_table = kvm_mmu_get_page(vcpu, pseudo_gfn, | |
1260 | v, level - 1, | |
f7d9c7b7 | 1261 | 1, ACC_ALL, &table[index]); |
25c0de2c | 1262 | if (!new_table) { |
6aa8b732 | 1263 | pgprintk("nonpaging_map: ENOMEM\n"); |
35149e21 | 1264 | kvm_release_pfn_clean(pfn); |
6aa8b732 AK |
1265 | return -ENOMEM; |
1266 | } | |
1267 | ||
722c05f2 AK |
1268 | set_shadow_pte(&table[index], |
1269 | __pa(new_table->spt) | |
1270 | | PT_PRESENT_MASK | PT_WRITABLE_MASK | |
1271 | | shadow_user_mask | shadow_x_mask); | |
6aa8b732 AK |
1272 | } |
1273 | table_addr = table[index] & PT64_BASE_ADDR_MASK; | |
1274 | } | |
1275 | } | |
1276 | ||
10589a46 MT |
1277 | static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn) |
1278 | { | |
1279 | int r; | |
05da4558 | 1280 | int largepage = 0; |
35149e21 | 1281 | pfn_t pfn; |
e930bffe | 1282 | unsigned long mmu_seq; |
aaee2c94 MT |
1283 | |
1284 | down_read(¤t->mm->mmap_sem); | |
05da4558 MT |
1285 | if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) { |
1286 | gfn &= ~(KVM_PAGES_PER_HPAGE-1); | |
1287 | largepage = 1; | |
1288 | } | |
1289 | ||
e930bffe AA |
1290 | mmu_seq = vcpu->kvm->mmu_notifier_seq; |
1291 | /* implicit mb(), we'll read before PT lock is unlocked */ | |
35149e21 | 1292 | pfn = gfn_to_pfn(vcpu->kvm, gfn); |
72dc67a6 | 1293 | up_read(¤t->mm->mmap_sem); |
aaee2c94 | 1294 | |
d196e343 | 1295 | /* mmio */ |
35149e21 AL |
1296 | if (is_error_pfn(pfn)) { |
1297 | kvm_release_pfn_clean(pfn); | |
d196e343 AK |
1298 | return 1; |
1299 | } | |
1300 | ||
aaee2c94 | 1301 | spin_lock(&vcpu->kvm->mmu_lock); |
e930bffe AA |
1302 | if (mmu_notifier_retry(vcpu, mmu_seq)) |
1303 | goto out_unlock; | |
eb787d10 | 1304 | kvm_mmu_free_some_pages(vcpu); |
35149e21 | 1305 | r = __direct_map(vcpu, v, write, largepage, gfn, pfn, |
05da4558 | 1306 | PT32E_ROOT_LEVEL); |
aaee2c94 MT |
1307 | spin_unlock(&vcpu->kvm->mmu_lock); |
1308 | ||
aaee2c94 | 1309 | |
10589a46 | 1310 | return r; |
e930bffe AA |
1311 | |
1312 | out_unlock: | |
1313 | spin_unlock(&vcpu->kvm->mmu_lock); | |
1314 | kvm_release_pfn_clean(pfn); | |
1315 | return 0; | |
10589a46 MT |
1316 | } |
1317 | ||
1318 | ||
17ac10ad AK |
1319 | static void mmu_free_roots(struct kvm_vcpu *vcpu) |
1320 | { | |
1321 | int i; | |
4db35314 | 1322 | struct kvm_mmu_page *sp; |
17ac10ad | 1323 | |
ad312c7c | 1324 | if (!VALID_PAGE(vcpu->arch.mmu.root_hpa)) |
7b53aa56 | 1325 | return; |
aaee2c94 | 1326 | spin_lock(&vcpu->kvm->mmu_lock); |
ad312c7c ZX |
1327 | if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) { |
1328 | hpa_t root = vcpu->arch.mmu.root_hpa; | |
17ac10ad | 1329 | |
4db35314 AK |
1330 | sp = page_header(root); |
1331 | --sp->root_count; | |
2e53d63a MT |
1332 | if (!sp->root_count && sp->role.invalid) |
1333 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
ad312c7c | 1334 | vcpu->arch.mmu.root_hpa = INVALID_PAGE; |
aaee2c94 | 1335 | spin_unlock(&vcpu->kvm->mmu_lock); |
17ac10ad AK |
1336 | return; |
1337 | } | |
17ac10ad | 1338 | for (i = 0; i < 4; ++i) { |
ad312c7c | 1339 | hpa_t root = vcpu->arch.mmu.pae_root[i]; |
17ac10ad | 1340 | |
417726a3 | 1341 | if (root) { |
417726a3 | 1342 | root &= PT64_BASE_ADDR_MASK; |
4db35314 AK |
1343 | sp = page_header(root); |
1344 | --sp->root_count; | |
2e53d63a MT |
1345 | if (!sp->root_count && sp->role.invalid) |
1346 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
417726a3 | 1347 | } |
ad312c7c | 1348 | vcpu->arch.mmu.pae_root[i] = INVALID_PAGE; |
17ac10ad | 1349 | } |
aaee2c94 | 1350 | spin_unlock(&vcpu->kvm->mmu_lock); |
ad312c7c | 1351 | vcpu->arch.mmu.root_hpa = INVALID_PAGE; |
17ac10ad AK |
1352 | } |
1353 | ||
1354 | static void mmu_alloc_roots(struct kvm_vcpu *vcpu) | |
1355 | { | |
1356 | int i; | |
cea0f0e7 | 1357 | gfn_t root_gfn; |
4db35314 | 1358 | struct kvm_mmu_page *sp; |
fb72d167 | 1359 | int metaphysical = 0; |
3bb65a22 | 1360 | |
ad312c7c | 1361 | root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT; |
17ac10ad | 1362 | |
ad312c7c ZX |
1363 | if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) { |
1364 | hpa_t root = vcpu->arch.mmu.root_hpa; | |
17ac10ad AK |
1365 | |
1366 | ASSERT(!VALID_PAGE(root)); | |
fb72d167 JR |
1367 | if (tdp_enabled) |
1368 | metaphysical = 1; | |
4db35314 | 1369 | sp = kvm_mmu_get_page(vcpu, root_gfn, 0, |
fb72d167 JR |
1370 | PT64_ROOT_LEVEL, metaphysical, |
1371 | ACC_ALL, NULL); | |
4db35314 AK |
1372 | root = __pa(sp->spt); |
1373 | ++sp->root_count; | |
ad312c7c | 1374 | vcpu->arch.mmu.root_hpa = root; |
17ac10ad AK |
1375 | return; |
1376 | } | |
fb72d167 JR |
1377 | metaphysical = !is_paging(vcpu); |
1378 | if (tdp_enabled) | |
1379 | metaphysical = 1; | |
17ac10ad | 1380 | for (i = 0; i < 4; ++i) { |
ad312c7c | 1381 | hpa_t root = vcpu->arch.mmu.pae_root[i]; |
17ac10ad AK |
1382 | |
1383 | ASSERT(!VALID_PAGE(root)); | |
ad312c7c ZX |
1384 | if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) { |
1385 | if (!is_present_pte(vcpu->arch.pdptrs[i])) { | |
1386 | vcpu->arch.mmu.pae_root[i] = 0; | |
417726a3 AK |
1387 | continue; |
1388 | } | |
ad312c7c ZX |
1389 | root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT; |
1390 | } else if (vcpu->arch.mmu.root_level == 0) | |
cea0f0e7 | 1391 | root_gfn = 0; |
4db35314 | 1392 | sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30, |
fb72d167 | 1393 | PT32_ROOT_LEVEL, metaphysical, |
f7d9c7b7 | 1394 | ACC_ALL, NULL); |
4db35314 AK |
1395 | root = __pa(sp->spt); |
1396 | ++sp->root_count; | |
ad312c7c | 1397 | vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK; |
17ac10ad | 1398 | } |
ad312c7c | 1399 | vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root); |
17ac10ad AK |
1400 | } |
1401 | ||
6aa8b732 AK |
1402 | static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr) |
1403 | { | |
1404 | return vaddr; | |
1405 | } | |
1406 | ||
1407 | static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva, | |
3f3e7124 | 1408 | u32 error_code) |
6aa8b732 | 1409 | { |
e833240f | 1410 | gfn_t gfn; |
e2dec939 | 1411 | int r; |
6aa8b732 | 1412 | |
b8688d51 | 1413 | pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code); |
e2dec939 AK |
1414 | r = mmu_topup_memory_caches(vcpu); |
1415 | if (r) | |
1416 | return r; | |
714b93da | 1417 | |
6aa8b732 | 1418 | ASSERT(vcpu); |
ad312c7c | 1419 | ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
6aa8b732 | 1420 | |
e833240f | 1421 | gfn = gva >> PAGE_SHIFT; |
6aa8b732 | 1422 | |
e833240f AK |
1423 | return nonpaging_map(vcpu, gva & PAGE_MASK, |
1424 | error_code & PFERR_WRITE_MASK, gfn); | |
6aa8b732 AK |
1425 | } |
1426 | ||
fb72d167 JR |
1427 | static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa, |
1428 | u32 error_code) | |
1429 | { | |
35149e21 | 1430 | pfn_t pfn; |
fb72d167 | 1431 | int r; |
05da4558 MT |
1432 | int largepage = 0; |
1433 | gfn_t gfn = gpa >> PAGE_SHIFT; | |
e930bffe | 1434 | unsigned long mmu_seq; |
fb72d167 JR |
1435 | |
1436 | ASSERT(vcpu); | |
1437 | ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa)); | |
1438 | ||
1439 | r = mmu_topup_memory_caches(vcpu); | |
1440 | if (r) | |
1441 | return r; | |
1442 | ||
1443 | down_read(¤t->mm->mmap_sem); | |
05da4558 MT |
1444 | if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) { |
1445 | gfn &= ~(KVM_PAGES_PER_HPAGE-1); | |
1446 | largepage = 1; | |
1447 | } | |
e930bffe AA |
1448 | mmu_seq = vcpu->kvm->mmu_notifier_seq; |
1449 | /* implicit mb(), we'll read before PT lock is unlocked */ | |
35149e21 | 1450 | pfn = gfn_to_pfn(vcpu->kvm, gfn); |
3200f405 | 1451 | up_read(¤t->mm->mmap_sem); |
35149e21 AL |
1452 | if (is_error_pfn(pfn)) { |
1453 | kvm_release_pfn_clean(pfn); | |
fb72d167 JR |
1454 | return 1; |
1455 | } | |
1456 | spin_lock(&vcpu->kvm->mmu_lock); | |
e930bffe AA |
1457 | if (mmu_notifier_retry(vcpu, mmu_seq)) |
1458 | goto out_unlock; | |
fb72d167 JR |
1459 | kvm_mmu_free_some_pages(vcpu); |
1460 | r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK, | |
67253af5 | 1461 | largepage, gfn, pfn, kvm_x86_ops->get_tdp_level()); |
fb72d167 | 1462 | spin_unlock(&vcpu->kvm->mmu_lock); |
fb72d167 JR |
1463 | |
1464 | return r; | |
e930bffe AA |
1465 | |
1466 | out_unlock: | |
1467 | spin_unlock(&vcpu->kvm->mmu_lock); | |
1468 | kvm_release_pfn_clean(pfn); | |
1469 | return 0; | |
fb72d167 JR |
1470 | } |
1471 | ||
6aa8b732 AK |
1472 | static void nonpaging_free(struct kvm_vcpu *vcpu) |
1473 | { | |
17ac10ad | 1474 | mmu_free_roots(vcpu); |
6aa8b732 AK |
1475 | } |
1476 | ||
1477 | static int nonpaging_init_context(struct kvm_vcpu *vcpu) | |
1478 | { | |
ad312c7c | 1479 | struct kvm_mmu *context = &vcpu->arch.mmu; |
6aa8b732 AK |
1480 | |
1481 | context->new_cr3 = nonpaging_new_cr3; | |
1482 | context->page_fault = nonpaging_page_fault; | |
6aa8b732 AK |
1483 | context->gva_to_gpa = nonpaging_gva_to_gpa; |
1484 | context->free = nonpaging_free; | |
c7addb90 | 1485 | context->prefetch_page = nonpaging_prefetch_page; |
cea0f0e7 | 1486 | context->root_level = 0; |
6aa8b732 | 1487 | context->shadow_root_level = PT32E_ROOT_LEVEL; |
17c3ba9d | 1488 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
1489 | return 0; |
1490 | } | |
1491 | ||
d835dfec | 1492 | void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu) |
6aa8b732 | 1493 | { |
1165f5fe | 1494 | ++vcpu->stat.tlb_flush; |
cbdd1bea | 1495 | kvm_x86_ops->tlb_flush(vcpu); |
6aa8b732 AK |
1496 | } |
1497 | ||
1498 | static void paging_new_cr3(struct kvm_vcpu *vcpu) | |
1499 | { | |
b8688d51 | 1500 | pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3); |
cea0f0e7 | 1501 | mmu_free_roots(vcpu); |
6aa8b732 AK |
1502 | } |
1503 | ||
6aa8b732 AK |
1504 | static void inject_page_fault(struct kvm_vcpu *vcpu, |
1505 | u64 addr, | |
1506 | u32 err_code) | |
1507 | { | |
c3c91fee | 1508 | kvm_inject_page_fault(vcpu, addr, err_code); |
6aa8b732 AK |
1509 | } |
1510 | ||
6aa8b732 AK |
1511 | static void paging_free(struct kvm_vcpu *vcpu) |
1512 | { | |
1513 | nonpaging_free(vcpu); | |
1514 | } | |
1515 | ||
1516 | #define PTTYPE 64 | |
1517 | #include "paging_tmpl.h" | |
1518 | #undef PTTYPE | |
1519 | ||
1520 | #define PTTYPE 32 | |
1521 | #include "paging_tmpl.h" | |
1522 | #undef PTTYPE | |
1523 | ||
17ac10ad | 1524 | static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level) |
6aa8b732 | 1525 | { |
ad312c7c | 1526 | struct kvm_mmu *context = &vcpu->arch.mmu; |
6aa8b732 AK |
1527 | |
1528 | ASSERT(is_pae(vcpu)); | |
1529 | context->new_cr3 = paging_new_cr3; | |
1530 | context->page_fault = paging64_page_fault; | |
6aa8b732 | 1531 | context->gva_to_gpa = paging64_gva_to_gpa; |
c7addb90 | 1532 | context->prefetch_page = paging64_prefetch_page; |
6aa8b732 | 1533 | context->free = paging_free; |
17ac10ad AK |
1534 | context->root_level = level; |
1535 | context->shadow_root_level = level; | |
17c3ba9d | 1536 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
1537 | return 0; |
1538 | } | |
1539 | ||
17ac10ad AK |
1540 | static int paging64_init_context(struct kvm_vcpu *vcpu) |
1541 | { | |
1542 | return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL); | |
1543 | } | |
1544 | ||
6aa8b732 AK |
1545 | static int paging32_init_context(struct kvm_vcpu *vcpu) |
1546 | { | |
ad312c7c | 1547 | struct kvm_mmu *context = &vcpu->arch.mmu; |
6aa8b732 AK |
1548 | |
1549 | context->new_cr3 = paging_new_cr3; | |
1550 | context->page_fault = paging32_page_fault; | |
6aa8b732 AK |
1551 | context->gva_to_gpa = paging32_gva_to_gpa; |
1552 | context->free = paging_free; | |
c7addb90 | 1553 | context->prefetch_page = paging32_prefetch_page; |
6aa8b732 AK |
1554 | context->root_level = PT32_ROOT_LEVEL; |
1555 | context->shadow_root_level = PT32E_ROOT_LEVEL; | |
17c3ba9d | 1556 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
1557 | return 0; |
1558 | } | |
1559 | ||
1560 | static int paging32E_init_context(struct kvm_vcpu *vcpu) | |
1561 | { | |
17ac10ad | 1562 | return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL); |
6aa8b732 AK |
1563 | } |
1564 | ||
fb72d167 JR |
1565 | static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu) |
1566 | { | |
1567 | struct kvm_mmu *context = &vcpu->arch.mmu; | |
1568 | ||
1569 | context->new_cr3 = nonpaging_new_cr3; | |
1570 | context->page_fault = tdp_page_fault; | |
1571 | context->free = nonpaging_free; | |
1572 | context->prefetch_page = nonpaging_prefetch_page; | |
67253af5 | 1573 | context->shadow_root_level = kvm_x86_ops->get_tdp_level(); |
fb72d167 JR |
1574 | context->root_hpa = INVALID_PAGE; |
1575 | ||
1576 | if (!is_paging(vcpu)) { | |
1577 | context->gva_to_gpa = nonpaging_gva_to_gpa; | |
1578 | context->root_level = 0; | |
1579 | } else if (is_long_mode(vcpu)) { | |
1580 | context->gva_to_gpa = paging64_gva_to_gpa; | |
1581 | context->root_level = PT64_ROOT_LEVEL; | |
1582 | } else if (is_pae(vcpu)) { | |
1583 | context->gva_to_gpa = paging64_gva_to_gpa; | |
1584 | context->root_level = PT32E_ROOT_LEVEL; | |
1585 | } else { | |
1586 | context->gva_to_gpa = paging32_gva_to_gpa; | |
1587 | context->root_level = PT32_ROOT_LEVEL; | |
1588 | } | |
1589 | ||
1590 | return 0; | |
1591 | } | |
1592 | ||
1593 | static int init_kvm_softmmu(struct kvm_vcpu *vcpu) | |
6aa8b732 AK |
1594 | { |
1595 | ASSERT(vcpu); | |
ad312c7c | 1596 | ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
6aa8b732 AK |
1597 | |
1598 | if (!is_paging(vcpu)) | |
1599 | return nonpaging_init_context(vcpu); | |
a9058ecd | 1600 | else if (is_long_mode(vcpu)) |
6aa8b732 AK |
1601 | return paging64_init_context(vcpu); |
1602 | else if (is_pae(vcpu)) | |
1603 | return paging32E_init_context(vcpu); | |
1604 | else | |
1605 | return paging32_init_context(vcpu); | |
1606 | } | |
1607 | ||
fb72d167 JR |
1608 | static int init_kvm_mmu(struct kvm_vcpu *vcpu) |
1609 | { | |
35149e21 AL |
1610 | vcpu->arch.update_pte.pfn = bad_pfn; |
1611 | ||
fb72d167 JR |
1612 | if (tdp_enabled) |
1613 | return init_kvm_tdp_mmu(vcpu); | |
1614 | else | |
1615 | return init_kvm_softmmu(vcpu); | |
1616 | } | |
1617 | ||
6aa8b732 AK |
1618 | static void destroy_kvm_mmu(struct kvm_vcpu *vcpu) |
1619 | { | |
1620 | ASSERT(vcpu); | |
ad312c7c ZX |
1621 | if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) { |
1622 | vcpu->arch.mmu.free(vcpu); | |
1623 | vcpu->arch.mmu.root_hpa = INVALID_PAGE; | |
6aa8b732 AK |
1624 | } |
1625 | } | |
1626 | ||
1627 | int kvm_mmu_reset_context(struct kvm_vcpu *vcpu) | |
17c3ba9d AK |
1628 | { |
1629 | destroy_kvm_mmu(vcpu); | |
1630 | return init_kvm_mmu(vcpu); | |
1631 | } | |
8668a3c4 | 1632 | EXPORT_SYMBOL_GPL(kvm_mmu_reset_context); |
17c3ba9d AK |
1633 | |
1634 | int kvm_mmu_load(struct kvm_vcpu *vcpu) | |
6aa8b732 | 1635 | { |
714b93da AK |
1636 | int r; |
1637 | ||
e2dec939 | 1638 | r = mmu_topup_memory_caches(vcpu); |
17c3ba9d AK |
1639 | if (r) |
1640 | goto out; | |
aaee2c94 | 1641 | spin_lock(&vcpu->kvm->mmu_lock); |
eb787d10 | 1642 | kvm_mmu_free_some_pages(vcpu); |
17c3ba9d | 1643 | mmu_alloc_roots(vcpu); |
aaee2c94 | 1644 | spin_unlock(&vcpu->kvm->mmu_lock); |
ad312c7c | 1645 | kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa); |
17c3ba9d | 1646 | kvm_mmu_flush_tlb(vcpu); |
714b93da AK |
1647 | out: |
1648 | return r; | |
6aa8b732 | 1649 | } |
17c3ba9d AK |
1650 | EXPORT_SYMBOL_GPL(kvm_mmu_load); |
1651 | ||
1652 | void kvm_mmu_unload(struct kvm_vcpu *vcpu) | |
1653 | { | |
1654 | mmu_free_roots(vcpu); | |
1655 | } | |
6aa8b732 | 1656 | |
09072daf | 1657 | static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu, |
4db35314 | 1658 | struct kvm_mmu_page *sp, |
ac1b714e AK |
1659 | u64 *spte) |
1660 | { | |
1661 | u64 pte; | |
1662 | struct kvm_mmu_page *child; | |
1663 | ||
1664 | pte = *spte; | |
c7addb90 | 1665 | if (is_shadow_present_pte(pte)) { |
05da4558 MT |
1666 | if (sp->role.level == PT_PAGE_TABLE_LEVEL || |
1667 | is_large_pte(pte)) | |
290fc38d | 1668 | rmap_remove(vcpu->kvm, spte); |
ac1b714e AK |
1669 | else { |
1670 | child = page_header(pte & PT64_BASE_ADDR_MASK); | |
90cb0529 | 1671 | mmu_page_remove_parent_pte(child, spte); |
ac1b714e AK |
1672 | } |
1673 | } | |
c7addb90 | 1674 | set_shadow_pte(spte, shadow_trap_nonpresent_pte); |
05da4558 MT |
1675 | if (is_large_pte(pte)) |
1676 | --vcpu->kvm->stat.lpages; | |
ac1b714e AK |
1677 | } |
1678 | ||
0028425f | 1679 | static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu, |
4db35314 | 1680 | struct kvm_mmu_page *sp, |
0028425f | 1681 | u64 *spte, |
489f1d65 | 1682 | const void *new) |
0028425f | 1683 | { |
30945387 MT |
1684 | if (sp->role.level != PT_PAGE_TABLE_LEVEL) { |
1685 | if (!vcpu->arch.update_pte.largepage || | |
1686 | sp->role.glevels == PT32_ROOT_LEVEL) { | |
1687 | ++vcpu->kvm->stat.mmu_pde_zapped; | |
1688 | return; | |
1689 | } | |
1690 | } | |
0028425f | 1691 | |
4cee5764 | 1692 | ++vcpu->kvm->stat.mmu_pte_updated; |
4db35314 | 1693 | if (sp->role.glevels == PT32_ROOT_LEVEL) |
489f1d65 | 1694 | paging32_update_pte(vcpu, sp, spte, new); |
0028425f | 1695 | else |
489f1d65 | 1696 | paging64_update_pte(vcpu, sp, spte, new); |
0028425f AK |
1697 | } |
1698 | ||
79539cec AK |
1699 | static bool need_remote_flush(u64 old, u64 new) |
1700 | { | |
1701 | if (!is_shadow_present_pte(old)) | |
1702 | return false; | |
1703 | if (!is_shadow_present_pte(new)) | |
1704 | return true; | |
1705 | if ((old ^ new) & PT64_BASE_ADDR_MASK) | |
1706 | return true; | |
1707 | old ^= PT64_NX_MASK; | |
1708 | new ^= PT64_NX_MASK; | |
1709 | return (old & ~new & PT64_PERM_MASK) != 0; | |
1710 | } | |
1711 | ||
1712 | static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new) | |
1713 | { | |
1714 | if (need_remote_flush(old, new)) | |
1715 | kvm_flush_remote_tlbs(vcpu->kvm); | |
1716 | else | |
1717 | kvm_mmu_flush_tlb(vcpu); | |
1718 | } | |
1719 | ||
12b7d28f AK |
1720 | static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu) |
1721 | { | |
ad312c7c | 1722 | u64 *spte = vcpu->arch.last_pte_updated; |
12b7d28f | 1723 | |
7b52345e | 1724 | return !!(spte && (*spte & shadow_accessed_mask)); |
12b7d28f AK |
1725 | } |
1726 | ||
d7824fff AK |
1727 | static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
1728 | const u8 *new, int bytes) | |
1729 | { | |
1730 | gfn_t gfn; | |
1731 | int r; | |
1732 | u64 gpte = 0; | |
35149e21 | 1733 | pfn_t pfn; |
d7824fff | 1734 | |
05da4558 MT |
1735 | vcpu->arch.update_pte.largepage = 0; |
1736 | ||
d7824fff AK |
1737 | if (bytes != 4 && bytes != 8) |
1738 | return; | |
1739 | ||
1740 | /* | |
1741 | * Assume that the pte write on a page table of the same type | |
1742 | * as the current vcpu paging mode. This is nearly always true | |
1743 | * (might be false while changing modes). Note it is verified later | |
1744 | * by update_pte(). | |
1745 | */ | |
1746 | if (is_pae(vcpu)) { | |
1747 | /* Handle a 32-bit guest writing two halves of a 64-bit gpte */ | |
1748 | if ((bytes == 4) && (gpa % 4 == 0)) { | |
1749 | r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8); | |
1750 | if (r) | |
1751 | return; | |
1752 | memcpy((void *)&gpte + (gpa % 8), new, 4); | |
1753 | } else if ((bytes == 8) && (gpa % 8 == 0)) { | |
1754 | memcpy((void *)&gpte, new, 8); | |
1755 | } | |
1756 | } else { | |
1757 | if ((bytes == 4) && (gpa % 4 == 0)) | |
1758 | memcpy((void *)&gpte, new, 4); | |
1759 | } | |
1760 | if (!is_present_pte(gpte)) | |
1761 | return; | |
1762 | gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT; | |
72dc67a6 | 1763 | |
05da4558 MT |
1764 | down_read(¤t->mm->mmap_sem); |
1765 | if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) { | |
1766 | gfn &= ~(KVM_PAGES_PER_HPAGE-1); | |
1767 | vcpu->arch.update_pte.largepage = 1; | |
1768 | } | |
e930bffe AA |
1769 | vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq; |
1770 | /* implicit mb(), we'll read before PT lock is unlocked */ | |
35149e21 | 1771 | pfn = gfn_to_pfn(vcpu->kvm, gfn); |
05da4558 | 1772 | up_read(¤t->mm->mmap_sem); |
72dc67a6 | 1773 | |
35149e21 AL |
1774 | if (is_error_pfn(pfn)) { |
1775 | kvm_release_pfn_clean(pfn); | |
d196e343 AK |
1776 | return; |
1777 | } | |
d7824fff | 1778 | vcpu->arch.update_pte.gfn = gfn; |
35149e21 | 1779 | vcpu->arch.update_pte.pfn = pfn; |
d7824fff AK |
1780 | } |
1781 | ||
1b7fcd32 AK |
1782 | static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn) |
1783 | { | |
1784 | u64 *spte = vcpu->arch.last_pte_updated; | |
1785 | ||
1786 | if (spte | |
1787 | && vcpu->arch.last_pte_gfn == gfn | |
1788 | && shadow_accessed_mask | |
1789 | && !(*spte & shadow_accessed_mask) | |
1790 | && is_shadow_present_pte(*spte)) | |
1791 | set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte); | |
1792 | } | |
1793 | ||
09072daf | 1794 | void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
fe551881 | 1795 | const u8 *new, int bytes) |
da4a00f0 | 1796 | { |
9b7a0325 | 1797 | gfn_t gfn = gpa >> PAGE_SHIFT; |
4db35314 | 1798 | struct kvm_mmu_page *sp; |
0e7bc4b9 | 1799 | struct hlist_node *node, *n; |
9b7a0325 AK |
1800 | struct hlist_head *bucket; |
1801 | unsigned index; | |
489f1d65 | 1802 | u64 entry, gentry; |
9b7a0325 | 1803 | u64 *spte; |
9b7a0325 | 1804 | unsigned offset = offset_in_page(gpa); |
0e7bc4b9 | 1805 | unsigned pte_size; |
9b7a0325 | 1806 | unsigned page_offset; |
0e7bc4b9 | 1807 | unsigned misaligned; |
fce0657f | 1808 | unsigned quadrant; |
9b7a0325 | 1809 | int level; |
86a5ba02 | 1810 | int flooded = 0; |
ac1b714e | 1811 | int npte; |
489f1d65 | 1812 | int r; |
9b7a0325 | 1813 | |
b8688d51 | 1814 | pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes); |
d7824fff | 1815 | mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes); |
aaee2c94 | 1816 | spin_lock(&vcpu->kvm->mmu_lock); |
1b7fcd32 | 1817 | kvm_mmu_access_page(vcpu, gfn); |
eb787d10 | 1818 | kvm_mmu_free_some_pages(vcpu); |
4cee5764 | 1819 | ++vcpu->kvm->stat.mmu_pte_write; |
c7addb90 | 1820 | kvm_mmu_audit(vcpu, "pre pte write"); |
ad312c7c | 1821 | if (gfn == vcpu->arch.last_pt_write_gfn |
12b7d28f | 1822 | && !last_updated_pte_accessed(vcpu)) { |
ad312c7c ZX |
1823 | ++vcpu->arch.last_pt_write_count; |
1824 | if (vcpu->arch.last_pt_write_count >= 3) | |
86a5ba02 AK |
1825 | flooded = 1; |
1826 | } else { | |
ad312c7c ZX |
1827 | vcpu->arch.last_pt_write_gfn = gfn; |
1828 | vcpu->arch.last_pt_write_count = 1; | |
1829 | vcpu->arch.last_pte_updated = NULL; | |
86a5ba02 | 1830 | } |
1ae0a13d | 1831 | index = kvm_page_table_hashfn(gfn); |
f05e70ac | 1832 | bucket = &vcpu->kvm->arch.mmu_page_hash[index]; |
4db35314 | 1833 | hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) { |
5b5c6a5a | 1834 | if (sp->gfn != gfn || sp->role.metaphysical || sp->role.invalid) |
9b7a0325 | 1835 | continue; |
4db35314 | 1836 | pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8; |
0e7bc4b9 | 1837 | misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1); |
e925c5ba | 1838 | misaligned |= bytes < 4; |
86a5ba02 | 1839 | if (misaligned || flooded) { |
0e7bc4b9 AK |
1840 | /* |
1841 | * Misaligned accesses are too much trouble to fix | |
1842 | * up; also, they usually indicate a page is not used | |
1843 | * as a page table. | |
86a5ba02 AK |
1844 | * |
1845 | * If we're seeing too many writes to a page, | |
1846 | * it may no longer be a page table, or we may be | |
1847 | * forking, in which case it is better to unmap the | |
1848 | * page. | |
0e7bc4b9 AK |
1849 | */ |
1850 | pgprintk("misaligned: gpa %llx bytes %d role %x\n", | |
4db35314 AK |
1851 | gpa, bytes, sp->role.word); |
1852 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
4cee5764 | 1853 | ++vcpu->kvm->stat.mmu_flooded; |
0e7bc4b9 AK |
1854 | continue; |
1855 | } | |
9b7a0325 | 1856 | page_offset = offset; |
4db35314 | 1857 | level = sp->role.level; |
ac1b714e | 1858 | npte = 1; |
4db35314 | 1859 | if (sp->role.glevels == PT32_ROOT_LEVEL) { |
ac1b714e AK |
1860 | page_offset <<= 1; /* 32->64 */ |
1861 | /* | |
1862 | * A 32-bit pde maps 4MB while the shadow pdes map | |
1863 | * only 2MB. So we need to double the offset again | |
1864 | * and zap two pdes instead of one. | |
1865 | */ | |
1866 | if (level == PT32_ROOT_LEVEL) { | |
6b8d0f9b | 1867 | page_offset &= ~7; /* kill rounding error */ |
ac1b714e AK |
1868 | page_offset <<= 1; |
1869 | npte = 2; | |
1870 | } | |
fce0657f | 1871 | quadrant = page_offset >> PAGE_SHIFT; |
9b7a0325 | 1872 | page_offset &= ~PAGE_MASK; |
4db35314 | 1873 | if (quadrant != sp->role.quadrant) |
fce0657f | 1874 | continue; |
9b7a0325 | 1875 | } |
4db35314 | 1876 | spte = &sp->spt[page_offset / sizeof(*spte)]; |
489f1d65 DE |
1877 | if ((gpa & (pte_size - 1)) || (bytes < pte_size)) { |
1878 | gentry = 0; | |
1879 | r = kvm_read_guest_atomic(vcpu->kvm, | |
1880 | gpa & ~(u64)(pte_size - 1), | |
1881 | &gentry, pte_size); | |
1882 | new = (const void *)&gentry; | |
1883 | if (r < 0) | |
1884 | new = NULL; | |
1885 | } | |
ac1b714e | 1886 | while (npte--) { |
79539cec | 1887 | entry = *spte; |
4db35314 | 1888 | mmu_pte_write_zap_pte(vcpu, sp, spte); |
489f1d65 DE |
1889 | if (new) |
1890 | mmu_pte_write_new_pte(vcpu, sp, spte, new); | |
79539cec | 1891 | mmu_pte_write_flush_tlb(vcpu, entry, *spte); |
ac1b714e | 1892 | ++spte; |
9b7a0325 | 1893 | } |
9b7a0325 | 1894 | } |
c7addb90 | 1895 | kvm_mmu_audit(vcpu, "post pte write"); |
aaee2c94 | 1896 | spin_unlock(&vcpu->kvm->mmu_lock); |
35149e21 AL |
1897 | if (!is_error_pfn(vcpu->arch.update_pte.pfn)) { |
1898 | kvm_release_pfn_clean(vcpu->arch.update_pte.pfn); | |
1899 | vcpu->arch.update_pte.pfn = bad_pfn; | |
d7824fff | 1900 | } |
da4a00f0 AK |
1901 | } |
1902 | ||
a436036b AK |
1903 | int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva) |
1904 | { | |
10589a46 MT |
1905 | gpa_t gpa; |
1906 | int r; | |
a436036b | 1907 | |
10589a46 | 1908 | gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva); |
10589a46 | 1909 | |
aaee2c94 | 1910 | spin_lock(&vcpu->kvm->mmu_lock); |
10589a46 | 1911 | r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT); |
aaee2c94 | 1912 | spin_unlock(&vcpu->kvm->mmu_lock); |
10589a46 | 1913 | return r; |
a436036b | 1914 | } |
577bdc49 | 1915 | EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt); |
a436036b | 1916 | |
22d95b12 | 1917 | void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu) |
ebeace86 | 1918 | { |
f05e70ac | 1919 | while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) { |
4db35314 | 1920 | struct kvm_mmu_page *sp; |
ebeace86 | 1921 | |
f05e70ac | 1922 | sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev, |
4db35314 AK |
1923 | struct kvm_mmu_page, link); |
1924 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
4cee5764 | 1925 | ++vcpu->kvm->stat.mmu_recycled; |
ebeace86 AK |
1926 | } |
1927 | } | |
ebeace86 | 1928 | |
3067714c AK |
1929 | int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code) |
1930 | { | |
1931 | int r; | |
1932 | enum emulation_result er; | |
1933 | ||
ad312c7c | 1934 | r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code); |
3067714c AK |
1935 | if (r < 0) |
1936 | goto out; | |
1937 | ||
1938 | if (!r) { | |
1939 | r = 1; | |
1940 | goto out; | |
1941 | } | |
1942 | ||
b733bfb5 AK |
1943 | r = mmu_topup_memory_caches(vcpu); |
1944 | if (r) | |
1945 | goto out; | |
1946 | ||
3067714c | 1947 | er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0); |
3067714c AK |
1948 | |
1949 | switch (er) { | |
1950 | case EMULATE_DONE: | |
1951 | return 1; | |
1952 | case EMULATE_DO_MMIO: | |
1953 | ++vcpu->stat.mmio_exits; | |
1954 | return 0; | |
1955 | case EMULATE_FAIL: | |
1956 | kvm_report_emulation_failure(vcpu, "pagetable"); | |
1957 | return 1; | |
1958 | default: | |
1959 | BUG(); | |
1960 | } | |
1961 | out: | |
3067714c AK |
1962 | return r; |
1963 | } | |
1964 | EXPORT_SYMBOL_GPL(kvm_mmu_page_fault); | |
1965 | ||
18552672 JR |
1966 | void kvm_enable_tdp(void) |
1967 | { | |
1968 | tdp_enabled = true; | |
1969 | } | |
1970 | EXPORT_SYMBOL_GPL(kvm_enable_tdp); | |
1971 | ||
5f4cb662 JR |
1972 | void kvm_disable_tdp(void) |
1973 | { | |
1974 | tdp_enabled = false; | |
1975 | } | |
1976 | EXPORT_SYMBOL_GPL(kvm_disable_tdp); | |
1977 | ||
6aa8b732 AK |
1978 | static void free_mmu_pages(struct kvm_vcpu *vcpu) |
1979 | { | |
4db35314 | 1980 | struct kvm_mmu_page *sp; |
6aa8b732 | 1981 | |
f05e70ac ZX |
1982 | while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) { |
1983 | sp = container_of(vcpu->kvm->arch.active_mmu_pages.next, | |
4db35314 AK |
1984 | struct kvm_mmu_page, link); |
1985 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
8d2d73b9 | 1986 | cond_resched(); |
f51234c2 | 1987 | } |
ad312c7c | 1988 | free_page((unsigned long)vcpu->arch.mmu.pae_root); |
6aa8b732 AK |
1989 | } |
1990 | ||
1991 | static int alloc_mmu_pages(struct kvm_vcpu *vcpu) | |
1992 | { | |
17ac10ad | 1993 | struct page *page; |
6aa8b732 AK |
1994 | int i; |
1995 | ||
1996 | ASSERT(vcpu); | |
1997 | ||
f05e70ac ZX |
1998 | if (vcpu->kvm->arch.n_requested_mmu_pages) |
1999 | vcpu->kvm->arch.n_free_mmu_pages = | |
2000 | vcpu->kvm->arch.n_requested_mmu_pages; | |
82ce2c96 | 2001 | else |
f05e70ac ZX |
2002 | vcpu->kvm->arch.n_free_mmu_pages = |
2003 | vcpu->kvm->arch.n_alloc_mmu_pages; | |
17ac10ad AK |
2004 | /* |
2005 | * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64. | |
2006 | * Therefore we need to allocate shadow page tables in the first | |
2007 | * 4GB of memory, which happens to fit the DMA32 zone. | |
2008 | */ | |
2009 | page = alloc_page(GFP_KERNEL | __GFP_DMA32); | |
2010 | if (!page) | |
2011 | goto error_1; | |
ad312c7c | 2012 | vcpu->arch.mmu.pae_root = page_address(page); |
17ac10ad | 2013 | for (i = 0; i < 4; ++i) |
ad312c7c | 2014 | vcpu->arch.mmu.pae_root[i] = INVALID_PAGE; |
17ac10ad | 2015 | |
6aa8b732 AK |
2016 | return 0; |
2017 | ||
2018 | error_1: | |
2019 | free_mmu_pages(vcpu); | |
2020 | return -ENOMEM; | |
2021 | } | |
2022 | ||
8018c27b | 2023 | int kvm_mmu_create(struct kvm_vcpu *vcpu) |
6aa8b732 | 2024 | { |
6aa8b732 | 2025 | ASSERT(vcpu); |
ad312c7c | 2026 | ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
6aa8b732 | 2027 | |
8018c27b IM |
2028 | return alloc_mmu_pages(vcpu); |
2029 | } | |
6aa8b732 | 2030 | |
8018c27b IM |
2031 | int kvm_mmu_setup(struct kvm_vcpu *vcpu) |
2032 | { | |
2033 | ASSERT(vcpu); | |
ad312c7c | 2034 | ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa)); |
2c264957 | 2035 | |
8018c27b | 2036 | return init_kvm_mmu(vcpu); |
6aa8b732 AK |
2037 | } |
2038 | ||
2039 | void kvm_mmu_destroy(struct kvm_vcpu *vcpu) | |
2040 | { | |
2041 | ASSERT(vcpu); | |
2042 | ||
2043 | destroy_kvm_mmu(vcpu); | |
2044 | free_mmu_pages(vcpu); | |
714b93da | 2045 | mmu_free_memory_caches(vcpu); |
6aa8b732 AK |
2046 | } |
2047 | ||
90cb0529 | 2048 | void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot) |
6aa8b732 | 2049 | { |
4db35314 | 2050 | struct kvm_mmu_page *sp; |
6aa8b732 | 2051 | |
f05e70ac | 2052 | list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) { |
6aa8b732 AK |
2053 | int i; |
2054 | u64 *pt; | |
2055 | ||
4db35314 | 2056 | if (!test_bit(slot, &sp->slot_bitmap)) |
6aa8b732 AK |
2057 | continue; |
2058 | ||
4db35314 | 2059 | pt = sp->spt; |
6aa8b732 AK |
2060 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) |
2061 | /* avoid RMW */ | |
9647c14c | 2062 | if (pt[i] & PT_WRITABLE_MASK) |
6aa8b732 | 2063 | pt[i] &= ~PT_WRITABLE_MASK; |
6aa8b732 AK |
2064 | } |
2065 | } | |
37a7d8b0 | 2066 | |
90cb0529 | 2067 | void kvm_mmu_zap_all(struct kvm *kvm) |
e0fa826f | 2068 | { |
4db35314 | 2069 | struct kvm_mmu_page *sp, *node; |
e0fa826f | 2070 | |
aaee2c94 | 2071 | spin_lock(&kvm->mmu_lock); |
f05e70ac | 2072 | list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link) |
4db35314 | 2073 | kvm_mmu_zap_page(kvm, sp); |
aaee2c94 | 2074 | spin_unlock(&kvm->mmu_lock); |
e0fa826f | 2075 | |
90cb0529 | 2076 | kvm_flush_remote_tlbs(kvm); |
e0fa826f DL |
2077 | } |
2078 | ||
8b2cf73c | 2079 | static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm) |
3ee16c81 IE |
2080 | { |
2081 | struct kvm_mmu_page *page; | |
2082 | ||
2083 | page = container_of(kvm->arch.active_mmu_pages.prev, | |
2084 | struct kvm_mmu_page, link); | |
2085 | kvm_mmu_zap_page(kvm, page); | |
2086 | } | |
2087 | ||
2088 | static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask) | |
2089 | { | |
2090 | struct kvm *kvm; | |
2091 | struct kvm *kvm_freed = NULL; | |
2092 | int cache_count = 0; | |
2093 | ||
2094 | spin_lock(&kvm_lock); | |
2095 | ||
2096 | list_for_each_entry(kvm, &vm_list, vm_list) { | |
2097 | int npages; | |
2098 | ||
5a4c9288 MT |
2099 | if (!down_read_trylock(&kvm->slots_lock)) |
2100 | continue; | |
3ee16c81 IE |
2101 | spin_lock(&kvm->mmu_lock); |
2102 | npages = kvm->arch.n_alloc_mmu_pages - | |
2103 | kvm->arch.n_free_mmu_pages; | |
2104 | cache_count += npages; | |
2105 | if (!kvm_freed && nr_to_scan > 0 && npages > 0) { | |
2106 | kvm_mmu_remove_one_alloc_mmu_page(kvm); | |
2107 | cache_count--; | |
2108 | kvm_freed = kvm; | |
2109 | } | |
2110 | nr_to_scan--; | |
2111 | ||
2112 | spin_unlock(&kvm->mmu_lock); | |
5a4c9288 | 2113 | up_read(&kvm->slots_lock); |
3ee16c81 IE |
2114 | } |
2115 | if (kvm_freed) | |
2116 | list_move_tail(&kvm_freed->vm_list, &vm_list); | |
2117 | ||
2118 | spin_unlock(&kvm_lock); | |
2119 | ||
2120 | return cache_count; | |
2121 | } | |
2122 | ||
2123 | static struct shrinker mmu_shrinker = { | |
2124 | .shrink = mmu_shrink, | |
2125 | .seeks = DEFAULT_SEEKS * 10, | |
2126 | }; | |
2127 | ||
2ddfd20e | 2128 | static void mmu_destroy_caches(void) |
b5a33a75 AK |
2129 | { |
2130 | if (pte_chain_cache) | |
2131 | kmem_cache_destroy(pte_chain_cache); | |
2132 | if (rmap_desc_cache) | |
2133 | kmem_cache_destroy(rmap_desc_cache); | |
d3d25b04 AK |
2134 | if (mmu_page_header_cache) |
2135 | kmem_cache_destroy(mmu_page_header_cache); | |
b5a33a75 AK |
2136 | } |
2137 | ||
3ee16c81 IE |
2138 | void kvm_mmu_module_exit(void) |
2139 | { | |
2140 | mmu_destroy_caches(); | |
2141 | unregister_shrinker(&mmu_shrinker); | |
2142 | } | |
2143 | ||
b5a33a75 AK |
2144 | int kvm_mmu_module_init(void) |
2145 | { | |
2146 | pte_chain_cache = kmem_cache_create("kvm_pte_chain", | |
2147 | sizeof(struct kvm_pte_chain), | |
20c2df83 | 2148 | 0, 0, NULL); |
b5a33a75 AK |
2149 | if (!pte_chain_cache) |
2150 | goto nomem; | |
2151 | rmap_desc_cache = kmem_cache_create("kvm_rmap_desc", | |
2152 | sizeof(struct kvm_rmap_desc), | |
20c2df83 | 2153 | 0, 0, NULL); |
b5a33a75 AK |
2154 | if (!rmap_desc_cache) |
2155 | goto nomem; | |
2156 | ||
d3d25b04 AK |
2157 | mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header", |
2158 | sizeof(struct kvm_mmu_page), | |
20c2df83 | 2159 | 0, 0, NULL); |
d3d25b04 AK |
2160 | if (!mmu_page_header_cache) |
2161 | goto nomem; | |
2162 | ||
3ee16c81 IE |
2163 | register_shrinker(&mmu_shrinker); |
2164 | ||
b5a33a75 AK |
2165 | return 0; |
2166 | ||
2167 | nomem: | |
3ee16c81 | 2168 | mmu_destroy_caches(); |
b5a33a75 AK |
2169 | return -ENOMEM; |
2170 | } | |
2171 | ||
3ad82a7e ZX |
2172 | /* |
2173 | * Caculate mmu pages needed for kvm. | |
2174 | */ | |
2175 | unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm) | |
2176 | { | |
2177 | int i; | |
2178 | unsigned int nr_mmu_pages; | |
2179 | unsigned int nr_pages = 0; | |
2180 | ||
2181 | for (i = 0; i < kvm->nmemslots; i++) | |
2182 | nr_pages += kvm->memslots[i].npages; | |
2183 | ||
2184 | nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000; | |
2185 | nr_mmu_pages = max(nr_mmu_pages, | |
2186 | (unsigned int) KVM_MIN_ALLOC_MMU_PAGES); | |
2187 | ||
2188 | return nr_mmu_pages; | |
2189 | } | |
2190 | ||
2f333bcb MT |
2191 | static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer, |
2192 | unsigned len) | |
2193 | { | |
2194 | if (len > buffer->len) | |
2195 | return NULL; | |
2196 | return buffer->ptr; | |
2197 | } | |
2198 | ||
2199 | static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer, | |
2200 | unsigned len) | |
2201 | { | |
2202 | void *ret; | |
2203 | ||
2204 | ret = pv_mmu_peek_buffer(buffer, len); | |
2205 | if (!ret) | |
2206 | return ret; | |
2207 | buffer->ptr += len; | |
2208 | buffer->len -= len; | |
2209 | buffer->processed += len; | |
2210 | return ret; | |
2211 | } | |
2212 | ||
2213 | static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu, | |
2214 | gpa_t addr, gpa_t value) | |
2215 | { | |
2216 | int bytes = 8; | |
2217 | int r; | |
2218 | ||
2219 | if (!is_long_mode(vcpu) && !is_pae(vcpu)) | |
2220 | bytes = 4; | |
2221 | ||
2222 | r = mmu_topup_memory_caches(vcpu); | |
2223 | if (r) | |
2224 | return r; | |
2225 | ||
3200f405 | 2226 | if (!emulator_write_phys(vcpu, addr, &value, bytes)) |
2f333bcb MT |
2227 | return -EFAULT; |
2228 | ||
2229 | return 1; | |
2230 | } | |
2231 | ||
2232 | static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu) | |
2233 | { | |
2234 | kvm_x86_ops->tlb_flush(vcpu); | |
2235 | return 1; | |
2236 | } | |
2237 | ||
2238 | static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr) | |
2239 | { | |
2240 | spin_lock(&vcpu->kvm->mmu_lock); | |
2241 | mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT); | |
2242 | spin_unlock(&vcpu->kvm->mmu_lock); | |
2243 | return 1; | |
2244 | } | |
2245 | ||
2246 | static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu, | |
2247 | struct kvm_pv_mmu_op_buffer *buffer) | |
2248 | { | |
2249 | struct kvm_mmu_op_header *header; | |
2250 | ||
2251 | header = pv_mmu_peek_buffer(buffer, sizeof *header); | |
2252 | if (!header) | |
2253 | return 0; | |
2254 | switch (header->op) { | |
2255 | case KVM_MMU_OP_WRITE_PTE: { | |
2256 | struct kvm_mmu_op_write_pte *wpte; | |
2257 | ||
2258 | wpte = pv_mmu_read_buffer(buffer, sizeof *wpte); | |
2259 | if (!wpte) | |
2260 | return 0; | |
2261 | return kvm_pv_mmu_write(vcpu, wpte->pte_phys, | |
2262 | wpte->pte_val); | |
2263 | } | |
2264 | case KVM_MMU_OP_FLUSH_TLB: { | |
2265 | struct kvm_mmu_op_flush_tlb *ftlb; | |
2266 | ||
2267 | ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb); | |
2268 | if (!ftlb) | |
2269 | return 0; | |
2270 | return kvm_pv_mmu_flush_tlb(vcpu); | |
2271 | } | |
2272 | case KVM_MMU_OP_RELEASE_PT: { | |
2273 | struct kvm_mmu_op_release_pt *rpt; | |
2274 | ||
2275 | rpt = pv_mmu_read_buffer(buffer, sizeof *rpt); | |
2276 | if (!rpt) | |
2277 | return 0; | |
2278 | return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys); | |
2279 | } | |
2280 | default: return 0; | |
2281 | } | |
2282 | } | |
2283 | ||
2284 | int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes, | |
2285 | gpa_t addr, unsigned long *ret) | |
2286 | { | |
2287 | int r; | |
6ad18fba | 2288 | struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer; |
2f333bcb | 2289 | |
6ad18fba DH |
2290 | buffer->ptr = buffer->buf; |
2291 | buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf); | |
2292 | buffer->processed = 0; | |
2f333bcb | 2293 | |
6ad18fba | 2294 | r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len); |
2f333bcb MT |
2295 | if (r) |
2296 | goto out; | |
2297 | ||
6ad18fba DH |
2298 | while (buffer->len) { |
2299 | r = kvm_pv_mmu_op_one(vcpu, buffer); | |
2f333bcb MT |
2300 | if (r < 0) |
2301 | goto out; | |
2302 | if (r == 0) | |
2303 | break; | |
2304 | } | |
2305 | ||
2306 | r = 1; | |
2307 | out: | |
6ad18fba | 2308 | *ret = buffer->processed; |
2f333bcb MT |
2309 | return r; |
2310 | } | |
2311 | ||
37a7d8b0 AK |
2312 | #ifdef AUDIT |
2313 | ||
2314 | static const char *audit_msg; | |
2315 | ||
2316 | static gva_t canonicalize(gva_t gva) | |
2317 | { | |
2318 | #ifdef CONFIG_X86_64 | |
2319 | gva = (long long)(gva << 16) >> 16; | |
2320 | #endif | |
2321 | return gva; | |
2322 | } | |
2323 | ||
2324 | static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte, | |
2325 | gva_t va, int level) | |
2326 | { | |
2327 | u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK); | |
2328 | int i; | |
2329 | gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1)); | |
2330 | ||
2331 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) { | |
2332 | u64 ent = pt[i]; | |
2333 | ||
c7addb90 | 2334 | if (ent == shadow_trap_nonpresent_pte) |
37a7d8b0 AK |
2335 | continue; |
2336 | ||
2337 | va = canonicalize(va); | |
c7addb90 AK |
2338 | if (level > 1) { |
2339 | if (ent == shadow_notrap_nonpresent_pte) | |
2340 | printk(KERN_ERR "audit: (%s) nontrapping pte" | |
2341 | " in nonleaf level: levels %d gva %lx" | |
2342 | " level %d pte %llx\n", audit_msg, | |
ad312c7c | 2343 | vcpu->arch.mmu.root_level, va, level, ent); |
c7addb90 | 2344 | |
37a7d8b0 | 2345 | audit_mappings_page(vcpu, ent, va, level - 1); |
c7addb90 | 2346 | } else { |
ad312c7c | 2347 | gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va); |
35149e21 | 2348 | hpa_t hpa = (hpa_t)gpa_to_pfn(vcpu, gpa) << PAGE_SHIFT; |
37a7d8b0 | 2349 | |
c7addb90 | 2350 | if (is_shadow_present_pte(ent) |
37a7d8b0 | 2351 | && (ent & PT64_BASE_ADDR_MASK) != hpa) |
c7addb90 AK |
2352 | printk(KERN_ERR "xx audit error: (%s) levels %d" |
2353 | " gva %lx gpa %llx hpa %llx ent %llx %d\n", | |
ad312c7c | 2354 | audit_msg, vcpu->arch.mmu.root_level, |
d77c26fc MD |
2355 | va, gpa, hpa, ent, |
2356 | is_shadow_present_pte(ent)); | |
c7addb90 AK |
2357 | else if (ent == shadow_notrap_nonpresent_pte |
2358 | && !is_error_hpa(hpa)) | |
2359 | printk(KERN_ERR "audit: (%s) notrap shadow," | |
2360 | " valid guest gva %lx\n", audit_msg, va); | |
35149e21 | 2361 | kvm_release_pfn_clean(pfn); |
c7addb90 | 2362 | |
37a7d8b0 AK |
2363 | } |
2364 | } | |
2365 | } | |
2366 | ||
2367 | static void audit_mappings(struct kvm_vcpu *vcpu) | |
2368 | { | |
1ea252af | 2369 | unsigned i; |
37a7d8b0 | 2370 | |
ad312c7c ZX |
2371 | if (vcpu->arch.mmu.root_level == 4) |
2372 | audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4); | |
37a7d8b0 AK |
2373 | else |
2374 | for (i = 0; i < 4; ++i) | |
ad312c7c | 2375 | if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK) |
37a7d8b0 | 2376 | audit_mappings_page(vcpu, |
ad312c7c | 2377 | vcpu->arch.mmu.pae_root[i], |
37a7d8b0 AK |
2378 | i << 30, |
2379 | 2); | |
2380 | } | |
2381 | ||
2382 | static int count_rmaps(struct kvm_vcpu *vcpu) | |
2383 | { | |
2384 | int nmaps = 0; | |
2385 | int i, j, k; | |
2386 | ||
2387 | for (i = 0; i < KVM_MEMORY_SLOTS; ++i) { | |
2388 | struct kvm_memory_slot *m = &vcpu->kvm->memslots[i]; | |
2389 | struct kvm_rmap_desc *d; | |
2390 | ||
2391 | for (j = 0; j < m->npages; ++j) { | |
290fc38d | 2392 | unsigned long *rmapp = &m->rmap[j]; |
37a7d8b0 | 2393 | |
290fc38d | 2394 | if (!*rmapp) |
37a7d8b0 | 2395 | continue; |
290fc38d | 2396 | if (!(*rmapp & 1)) { |
37a7d8b0 AK |
2397 | ++nmaps; |
2398 | continue; | |
2399 | } | |
290fc38d | 2400 | d = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
37a7d8b0 AK |
2401 | while (d) { |
2402 | for (k = 0; k < RMAP_EXT; ++k) | |
2403 | if (d->shadow_ptes[k]) | |
2404 | ++nmaps; | |
2405 | else | |
2406 | break; | |
2407 | d = d->more; | |
2408 | } | |
2409 | } | |
2410 | } | |
2411 | return nmaps; | |
2412 | } | |
2413 | ||
2414 | static int count_writable_mappings(struct kvm_vcpu *vcpu) | |
2415 | { | |
2416 | int nmaps = 0; | |
4db35314 | 2417 | struct kvm_mmu_page *sp; |
37a7d8b0 AK |
2418 | int i; |
2419 | ||
f05e70ac | 2420 | list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) { |
4db35314 | 2421 | u64 *pt = sp->spt; |
37a7d8b0 | 2422 | |
4db35314 | 2423 | if (sp->role.level != PT_PAGE_TABLE_LEVEL) |
37a7d8b0 AK |
2424 | continue; |
2425 | ||
2426 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
2427 | u64 ent = pt[i]; | |
2428 | ||
2429 | if (!(ent & PT_PRESENT_MASK)) | |
2430 | continue; | |
2431 | if (!(ent & PT_WRITABLE_MASK)) | |
2432 | continue; | |
2433 | ++nmaps; | |
2434 | } | |
2435 | } | |
2436 | return nmaps; | |
2437 | } | |
2438 | ||
2439 | static void audit_rmap(struct kvm_vcpu *vcpu) | |
2440 | { | |
2441 | int n_rmap = count_rmaps(vcpu); | |
2442 | int n_actual = count_writable_mappings(vcpu); | |
2443 | ||
2444 | if (n_rmap != n_actual) | |
2445 | printk(KERN_ERR "%s: (%s) rmap %d actual %d\n", | |
b8688d51 | 2446 | __func__, audit_msg, n_rmap, n_actual); |
37a7d8b0 AK |
2447 | } |
2448 | ||
2449 | static void audit_write_protection(struct kvm_vcpu *vcpu) | |
2450 | { | |
4db35314 | 2451 | struct kvm_mmu_page *sp; |
290fc38d IE |
2452 | struct kvm_memory_slot *slot; |
2453 | unsigned long *rmapp; | |
2454 | gfn_t gfn; | |
37a7d8b0 | 2455 | |
f05e70ac | 2456 | list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) { |
4db35314 | 2457 | if (sp->role.metaphysical) |
37a7d8b0 AK |
2458 | continue; |
2459 | ||
4db35314 AK |
2460 | slot = gfn_to_memslot(vcpu->kvm, sp->gfn); |
2461 | gfn = unalias_gfn(vcpu->kvm, sp->gfn); | |
290fc38d IE |
2462 | rmapp = &slot->rmap[gfn - slot->base_gfn]; |
2463 | if (*rmapp) | |
37a7d8b0 AK |
2464 | printk(KERN_ERR "%s: (%s) shadow page has writable" |
2465 | " mappings: gfn %lx role %x\n", | |
b8688d51 | 2466 | __func__, audit_msg, sp->gfn, |
4db35314 | 2467 | sp->role.word); |
37a7d8b0 AK |
2468 | } |
2469 | } | |
2470 | ||
2471 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) | |
2472 | { | |
2473 | int olddbg = dbg; | |
2474 | ||
2475 | dbg = 0; | |
2476 | audit_msg = msg; | |
2477 | audit_rmap(vcpu); | |
2478 | audit_write_protection(vcpu); | |
2479 | audit_mappings(vcpu); | |
2480 | dbg = olddbg; | |
2481 | } | |
2482 | ||
2483 | #endif |