KVM: MMU: mmu_parent_walk
[deliverable/linux.git] / arch / x86 / kvm / mmu.c
CommitLineData
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1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
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19
20#include "vmx.h"
1d737c8a 21#include "mmu.h"
e495606d 22
edf88417 23#include <linux/kvm_host.h>
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24#include <linux/types.h>
25#include <linux/string.h>
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26#include <linux/mm.h>
27#include <linux/highmem.h>
28#include <linux/module.h>
448353ca 29#include <linux/swap.h>
05da4558 30#include <linux/hugetlb.h>
2f333bcb 31#include <linux/compiler.h>
6aa8b732 32
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33#include <asm/page.h>
34#include <asm/cmpxchg.h>
4e542370 35#include <asm/io.h>
6aa8b732 36
18552672
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37/*
38 * When setting this variable to true it enables Two-Dimensional-Paging
39 * where the hardware walks 2 page tables:
40 * 1. the guest-virtual to guest-physical
41 * 2. while doing 1. it walks guest-physical to host-physical
42 * If the hardware supports that we don't need to do shadow paging.
43 */
2f333bcb 44bool tdp_enabled = false;
18552672 45
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46#undef MMU_DEBUG
47
48#undef AUDIT
49
50#ifdef AUDIT
51static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
52#else
53static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
54#endif
55
56#ifdef MMU_DEBUG
57
58#define pgprintk(x...) do { if (dbg) printk(x); } while (0)
59#define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
60
61#else
62
63#define pgprintk(x...) do { } while (0)
64#define rmap_printk(x...) do { } while (0)
65
66#endif
67
68#if defined(MMU_DEBUG) || defined(AUDIT)
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69static int dbg = 0;
70module_param(dbg, bool, 0644);
37a7d8b0 71#endif
6aa8b732 72
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73#ifndef MMU_DEBUG
74#define ASSERT(x) do { } while (0)
75#else
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76#define ASSERT(x) \
77 if (!(x)) { \
78 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
79 __FILE__, __LINE__, #x); \
80 }
d6c69ee9 81#endif
6aa8b732 82
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83#define PT_FIRST_AVAIL_BITS_SHIFT 9
84#define PT64_SECOND_AVAIL_BITS_SHIFT 52
85
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86#define VALID_PAGE(x) ((x) != INVALID_PAGE)
87
88#define PT64_LEVEL_BITS 9
89
90#define PT64_LEVEL_SHIFT(level) \
d77c26fc 91 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
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92
93#define PT64_LEVEL_MASK(level) \
94 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
95
96#define PT64_INDEX(address, level)\
97 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
98
99
100#define PT32_LEVEL_BITS 10
101
102#define PT32_LEVEL_SHIFT(level) \
d77c26fc 103 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
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104
105#define PT32_LEVEL_MASK(level) \
106 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
107
108#define PT32_INDEX(address, level)\
109 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
110
111
27aba766 112#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
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113#define PT64_DIR_BASE_ADDR_MASK \
114 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
115
116#define PT32_BASE_ADDR_MASK PAGE_MASK
117#define PT32_DIR_BASE_ADDR_MASK \
118 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
119
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120#define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
121 | PT64_NX_MASK)
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122
123#define PFERR_PRESENT_MASK (1U << 0)
124#define PFERR_WRITE_MASK (1U << 1)
125#define PFERR_USER_MASK (1U << 2)
73b1087e 126#define PFERR_FETCH_MASK (1U << 4)
6aa8b732 127
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128#define PT_DIRECTORY_LEVEL 2
129#define PT_PAGE_TABLE_LEVEL 1
130
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131#define RMAP_EXT 4
132
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133#define ACC_EXEC_MASK 1
134#define ACC_WRITE_MASK PT_WRITABLE_MASK
135#define ACC_USER_MASK PT_USER_MASK
136#define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
137
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138#define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
139
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140struct kvm_rmap_desc {
141 u64 *shadow_ptes[RMAP_EXT];
142 struct kvm_rmap_desc *more;
143};
144
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145struct kvm_shadow_walk {
146 int (*entry)(struct kvm_shadow_walk *walk, struct kvm_vcpu *vcpu,
d40a1ee4 147 u64 addr, u64 *spte, int level);
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148};
149
ad8cfbe3
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150typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
151
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152static struct kmem_cache *pte_chain_cache;
153static struct kmem_cache *rmap_desc_cache;
d3d25b04 154static struct kmem_cache *mmu_page_header_cache;
b5a33a75 155
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156static u64 __read_mostly shadow_trap_nonpresent_pte;
157static u64 __read_mostly shadow_notrap_nonpresent_pte;
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158static u64 __read_mostly shadow_base_present_pte;
159static u64 __read_mostly shadow_nx_mask;
160static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
161static u64 __read_mostly shadow_user_mask;
162static u64 __read_mostly shadow_accessed_mask;
163static u64 __read_mostly shadow_dirty_mask;
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164
165void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
166{
167 shadow_trap_nonpresent_pte = trap_pte;
168 shadow_notrap_nonpresent_pte = notrap_pte;
169}
170EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
171
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172void kvm_mmu_set_base_ptes(u64 base_pte)
173{
174 shadow_base_present_pte = base_pte;
175}
176EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
177
178void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
179 u64 dirty_mask, u64 nx_mask, u64 x_mask)
180{
181 shadow_user_mask = user_mask;
182 shadow_accessed_mask = accessed_mask;
183 shadow_dirty_mask = dirty_mask;
184 shadow_nx_mask = nx_mask;
185 shadow_x_mask = x_mask;
186}
187EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
188
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189static int is_write_protection(struct kvm_vcpu *vcpu)
190{
ad312c7c 191 return vcpu->arch.cr0 & X86_CR0_WP;
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192}
193
194static int is_cpuid_PSE36(void)
195{
196 return 1;
197}
198
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199static int is_nx(struct kvm_vcpu *vcpu)
200{
ad312c7c 201 return vcpu->arch.shadow_efer & EFER_NX;
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202}
203
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204static int is_present_pte(unsigned long pte)
205{
206 return pte & PT_PRESENT_MASK;
207}
208
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209static int is_shadow_present_pte(u64 pte)
210{
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211 return pte != shadow_trap_nonpresent_pte
212 && pte != shadow_notrap_nonpresent_pte;
213}
214
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215static int is_large_pte(u64 pte)
216{
217 return pte & PT_PAGE_SIZE_MASK;
218}
219
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220static int is_writeble_pte(unsigned long pte)
221{
222 return pte & PT_WRITABLE_MASK;
223}
224
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225static int is_dirty_pte(unsigned long pte)
226{
7b52345e 227 return pte & shadow_dirty_mask;
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228}
229
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230static int is_rmap_pte(u64 pte)
231{
4b1a80fa 232 return is_shadow_present_pte(pte);
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233}
234
35149e21 235static pfn_t spte_to_pfn(u64 pte)
0b49ea86 236{
35149e21 237 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
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238}
239
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240static gfn_t pse36_gfn_delta(u32 gpte)
241{
242 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
243
244 return (gpte & PT32_DIR_PSE36_MASK) << shift;
245}
246
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247static void set_shadow_pte(u64 *sptep, u64 spte)
248{
249#ifdef CONFIG_X86_64
250 set_64bit((unsigned long *)sptep, spte);
251#else
252 set_64bit((unsigned long long *)sptep, spte);
253#endif
254}
255
e2dec939 256static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
2e3e5882 257 struct kmem_cache *base_cache, int min)
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258{
259 void *obj;
260
261 if (cache->nobjs >= min)
e2dec939 262 return 0;
714b93da 263 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 264 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
714b93da 265 if (!obj)
e2dec939 266 return -ENOMEM;
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267 cache->objects[cache->nobjs++] = obj;
268 }
e2dec939 269 return 0;
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270}
271
272static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
273{
274 while (mc->nobjs)
275 kfree(mc->objects[--mc->nobjs]);
276}
277
c1158e63 278static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
2e3e5882 279 int min)
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280{
281 struct page *page;
282
283 if (cache->nobjs >= min)
284 return 0;
285 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 286 page = alloc_page(GFP_KERNEL);
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287 if (!page)
288 return -ENOMEM;
289 set_page_private(page, 0);
290 cache->objects[cache->nobjs++] = page_address(page);
291 }
292 return 0;
293}
294
295static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
296{
297 while (mc->nobjs)
c4d198d5 298 free_page((unsigned long)mc->objects[--mc->nobjs]);
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299}
300
2e3e5882 301static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
714b93da 302{
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303 int r;
304
ad312c7c 305 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
2e3e5882 306 pte_chain_cache, 4);
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307 if (r)
308 goto out;
ad312c7c 309 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
2e3e5882 310 rmap_desc_cache, 1);
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311 if (r)
312 goto out;
ad312c7c 313 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
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314 if (r)
315 goto out;
ad312c7c 316 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
2e3e5882 317 mmu_page_header_cache, 4);
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318out:
319 return r;
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320}
321
322static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
323{
ad312c7c
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324 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
325 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
326 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
327 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
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328}
329
330static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
331 size_t size)
332{
333 void *p;
334
335 BUG_ON(!mc->nobjs);
336 p = mc->objects[--mc->nobjs];
337 memset(p, 0, size);
338 return p;
339}
340
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341static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
342{
ad312c7c 343 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
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344 sizeof(struct kvm_pte_chain));
345}
346
90cb0529 347static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
714b93da 348{
90cb0529 349 kfree(pc);
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350}
351
352static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
353{
ad312c7c 354 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
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355 sizeof(struct kvm_rmap_desc));
356}
357
90cb0529 358static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
714b93da 359{
90cb0529 360 kfree(rd);
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361}
362
05da4558
MT
363/*
364 * Return the pointer to the largepage write count for a given
365 * gfn, handling slots that are not large page aligned.
366 */
367static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
368{
369 unsigned long idx;
370
371 idx = (gfn / KVM_PAGES_PER_HPAGE) -
372 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
373 return &slot->lpage_info[idx].write_count;
374}
375
376static void account_shadowed(struct kvm *kvm, gfn_t gfn)
377{
378 int *write_count;
379
380 write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn));
381 *write_count += 1;
05da4558
MT
382}
383
384static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
385{
386 int *write_count;
387
388 write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn));
389 *write_count -= 1;
390 WARN_ON(*write_count < 0);
391}
392
393static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
394{
395 struct kvm_memory_slot *slot = gfn_to_memslot(kvm, gfn);
396 int *largepage_idx;
397
398 if (slot) {
399 largepage_idx = slot_largepage_idx(gfn, slot);
400 return *largepage_idx;
401 }
402
403 return 1;
404}
405
406static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
407{
408 struct vm_area_struct *vma;
409 unsigned long addr;
4c2155ce 410 int ret = 0;
05da4558
MT
411
412 addr = gfn_to_hva(kvm, gfn);
413 if (kvm_is_error_hva(addr))
4c2155ce 414 return ret;
05da4558 415
4c2155ce 416 down_read(&current->mm->mmap_sem);
05da4558
MT
417 vma = find_vma(current->mm, addr);
418 if (vma && is_vm_hugetlb_page(vma))
4c2155ce
MT
419 ret = 1;
420 up_read(&current->mm->mmap_sem);
05da4558 421
4c2155ce 422 return ret;
05da4558
MT
423}
424
425static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
426{
427 struct kvm_memory_slot *slot;
428
429 if (has_wrprotected_page(vcpu->kvm, large_gfn))
430 return 0;
431
432 if (!host_largepage_backed(vcpu->kvm, large_gfn))
433 return 0;
434
435 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
436 if (slot && slot->dirty_bitmap)
437 return 0;
438
439 return 1;
440}
441
290fc38d
IE
442/*
443 * Take gfn and return the reverse mapping to it.
444 * Note: gfn must be unaliased before this function get called
445 */
446
05da4558 447static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
290fc38d
IE
448{
449 struct kvm_memory_slot *slot;
05da4558 450 unsigned long idx;
290fc38d
IE
451
452 slot = gfn_to_memslot(kvm, gfn);
05da4558
MT
453 if (!lpage)
454 return &slot->rmap[gfn - slot->base_gfn];
455
456 idx = (gfn / KVM_PAGES_PER_HPAGE) -
457 (slot->base_gfn / KVM_PAGES_PER_HPAGE);
458
459 return &slot->lpage_info[idx].rmap_pde;
290fc38d
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460}
461
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462/*
463 * Reverse mapping data structures:
464 *
290fc38d
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465 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
466 * that points to page_address(page).
cd4a4e53 467 *
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468 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
469 * containing more mappings.
cd4a4e53 470 */
05da4558 471static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
cd4a4e53 472{
4db35314 473 struct kvm_mmu_page *sp;
cd4a4e53 474 struct kvm_rmap_desc *desc;
290fc38d 475 unsigned long *rmapp;
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476 int i;
477
478 if (!is_rmap_pte(*spte))
479 return;
290fc38d 480 gfn = unalias_gfn(vcpu->kvm, gfn);
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481 sp = page_header(__pa(spte));
482 sp->gfns[spte - sp->spt] = gfn;
05da4558 483 rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
290fc38d 484 if (!*rmapp) {
cd4a4e53 485 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
290fc38d
IE
486 *rmapp = (unsigned long)spte;
487 } else if (!(*rmapp & 1)) {
cd4a4e53 488 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
714b93da 489 desc = mmu_alloc_rmap_desc(vcpu);
290fc38d 490 desc->shadow_ptes[0] = (u64 *)*rmapp;
cd4a4e53 491 desc->shadow_ptes[1] = spte;
290fc38d 492 *rmapp = (unsigned long)desc | 1;
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493 } else {
494 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
290fc38d 495 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
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496 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
497 desc = desc->more;
498 if (desc->shadow_ptes[RMAP_EXT-1]) {
714b93da 499 desc->more = mmu_alloc_rmap_desc(vcpu);
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500 desc = desc->more;
501 }
502 for (i = 0; desc->shadow_ptes[i]; ++i)
503 ;
504 desc->shadow_ptes[i] = spte;
505 }
506}
507
290fc38d 508static void rmap_desc_remove_entry(unsigned long *rmapp,
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509 struct kvm_rmap_desc *desc,
510 int i,
511 struct kvm_rmap_desc *prev_desc)
512{
513 int j;
514
515 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
516 ;
517 desc->shadow_ptes[i] = desc->shadow_ptes[j];
11718b4d 518 desc->shadow_ptes[j] = NULL;
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519 if (j != 0)
520 return;
521 if (!prev_desc && !desc->more)
290fc38d 522 *rmapp = (unsigned long)desc->shadow_ptes[0];
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523 else
524 if (prev_desc)
525 prev_desc->more = desc->more;
526 else
290fc38d 527 *rmapp = (unsigned long)desc->more | 1;
90cb0529 528 mmu_free_rmap_desc(desc);
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529}
530
290fc38d 531static void rmap_remove(struct kvm *kvm, u64 *spte)
cd4a4e53 532{
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533 struct kvm_rmap_desc *desc;
534 struct kvm_rmap_desc *prev_desc;
4db35314 535 struct kvm_mmu_page *sp;
35149e21 536 pfn_t pfn;
290fc38d 537 unsigned long *rmapp;
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538 int i;
539
540 if (!is_rmap_pte(*spte))
541 return;
4db35314 542 sp = page_header(__pa(spte));
35149e21 543 pfn = spte_to_pfn(*spte);
7b52345e 544 if (*spte & shadow_accessed_mask)
35149e21 545 kvm_set_pfn_accessed(pfn);
b4231d61 546 if (is_writeble_pte(*spte))
35149e21 547 kvm_release_pfn_dirty(pfn);
b4231d61 548 else
35149e21 549 kvm_release_pfn_clean(pfn);
05da4558 550 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
290fc38d 551 if (!*rmapp) {
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552 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
553 BUG();
290fc38d 554 } else if (!(*rmapp & 1)) {
cd4a4e53 555 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
290fc38d 556 if ((u64 *)*rmapp != spte) {
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557 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
558 spte, *spte);
559 BUG();
560 }
290fc38d 561 *rmapp = 0;
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562 } else {
563 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
290fc38d 564 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
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565 prev_desc = NULL;
566 while (desc) {
567 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
568 if (desc->shadow_ptes[i] == spte) {
290fc38d 569 rmap_desc_remove_entry(rmapp,
714b93da 570 desc, i,
cd4a4e53
AK
571 prev_desc);
572 return;
573 }
574 prev_desc = desc;
575 desc = desc->more;
576 }
577 BUG();
578 }
579}
580
98348e95 581static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
374cbac0 582{
374cbac0 583 struct kvm_rmap_desc *desc;
98348e95
IE
584 struct kvm_rmap_desc *prev_desc;
585 u64 *prev_spte;
586 int i;
587
588 if (!*rmapp)
589 return NULL;
590 else if (!(*rmapp & 1)) {
591 if (!spte)
592 return (u64 *)*rmapp;
593 return NULL;
594 }
595 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
596 prev_desc = NULL;
597 prev_spte = NULL;
598 while (desc) {
599 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
600 if (prev_spte == spte)
601 return desc->shadow_ptes[i];
602 prev_spte = desc->shadow_ptes[i];
603 }
604 desc = desc->more;
605 }
606 return NULL;
607}
608
609static void rmap_write_protect(struct kvm *kvm, u64 gfn)
610{
290fc38d 611 unsigned long *rmapp;
374cbac0 612 u64 *spte;
caa5b8a5 613 int write_protected = 0;
374cbac0 614
4a4c9924 615 gfn = unalias_gfn(kvm, gfn);
05da4558 616 rmapp = gfn_to_rmap(kvm, gfn, 0);
374cbac0 617
98348e95
IE
618 spte = rmap_next(kvm, rmapp, NULL);
619 while (spte) {
374cbac0 620 BUG_ON(!spte);
374cbac0 621 BUG_ON(!(*spte & PT_PRESENT_MASK));
374cbac0 622 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
caa5b8a5 623 if (is_writeble_pte(*spte)) {
9647c14c 624 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
caa5b8a5
ED
625 write_protected = 1;
626 }
9647c14c 627 spte = rmap_next(kvm, rmapp, spte);
374cbac0 628 }
855149aa 629 if (write_protected) {
35149e21 630 pfn_t pfn;
855149aa
IE
631
632 spte = rmap_next(kvm, rmapp, NULL);
35149e21
AL
633 pfn = spte_to_pfn(*spte);
634 kvm_set_pfn_dirty(pfn);
855149aa
IE
635 }
636
05da4558
MT
637 /* check for huge page mappings */
638 rmapp = gfn_to_rmap(kvm, gfn, 1);
639 spte = rmap_next(kvm, rmapp, NULL);
640 while (spte) {
641 BUG_ON(!spte);
642 BUG_ON(!(*spte & PT_PRESENT_MASK));
643 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
644 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
645 if (is_writeble_pte(*spte)) {
646 rmap_remove(kvm, spte);
647 --kvm->stat.lpages;
648 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
6597ca09 649 spte = NULL;
05da4558
MT
650 write_protected = 1;
651 }
652 spte = rmap_next(kvm, rmapp, spte);
653 }
654
caa5b8a5
ED
655 if (write_protected)
656 kvm_flush_remote_tlbs(kvm);
05da4558
MT
657
658 account_shadowed(kvm, gfn);
374cbac0
AK
659}
660
e930bffe
AA
661static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
662{
663 u64 *spte;
664 int need_tlb_flush = 0;
665
666 while ((spte = rmap_next(kvm, rmapp, NULL))) {
667 BUG_ON(!(*spte & PT_PRESENT_MASK));
668 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
669 rmap_remove(kvm, spte);
670 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
671 need_tlb_flush = 1;
672 }
673 return need_tlb_flush;
674}
675
676static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
677 int (*handler)(struct kvm *kvm, unsigned long *rmapp))
678{
679 int i;
680 int retval = 0;
681
682 /*
683 * If mmap_sem isn't taken, we can look the memslots with only
684 * the mmu_lock by skipping over the slots with userspace_addr == 0.
685 */
686 for (i = 0; i < kvm->nmemslots; i++) {
687 struct kvm_memory_slot *memslot = &kvm->memslots[i];
688 unsigned long start = memslot->userspace_addr;
689 unsigned long end;
690
691 /* mmu_lock protects userspace_addr */
692 if (!start)
693 continue;
694
695 end = start + (memslot->npages << PAGE_SHIFT);
696 if (hva >= start && hva < end) {
697 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
698 retval |= handler(kvm, &memslot->rmap[gfn_offset]);
699 retval |= handler(kvm,
700 &memslot->lpage_info[
701 gfn_offset /
702 KVM_PAGES_PER_HPAGE].rmap_pde);
703 }
704 }
705
706 return retval;
707}
708
709int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
710{
711 return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
712}
713
714static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
715{
716 u64 *spte;
717 int young = 0;
718
534e38b4
SY
719 /* always return old for EPT */
720 if (!shadow_accessed_mask)
721 return 0;
722
e930bffe
AA
723 spte = rmap_next(kvm, rmapp, NULL);
724 while (spte) {
725 int _young;
726 u64 _spte = *spte;
727 BUG_ON(!(_spte & PT_PRESENT_MASK));
728 _young = _spte & PT_ACCESSED_MASK;
729 if (_young) {
730 young = 1;
731 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
732 }
733 spte = rmap_next(kvm, rmapp, spte);
734 }
735 return young;
736}
737
738int kvm_age_hva(struct kvm *kvm, unsigned long hva)
739{
740 return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
741}
742
d6c69ee9 743#ifdef MMU_DEBUG
47ad8e68 744static int is_empty_shadow_page(u64 *spt)
6aa8b732 745{
139bdb2d
AK
746 u64 *pos;
747 u64 *end;
748
47ad8e68 749 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
3c915510 750 if (is_shadow_present_pte(*pos)) {
b8688d51 751 printk(KERN_ERR "%s: %p %llx\n", __func__,
139bdb2d 752 pos, *pos);
6aa8b732 753 return 0;
139bdb2d 754 }
6aa8b732
AK
755 return 1;
756}
d6c69ee9 757#endif
6aa8b732 758
4db35314 759static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
260746c0 760{
4db35314
AK
761 ASSERT(is_empty_shadow_page(sp->spt));
762 list_del(&sp->link);
763 __free_page(virt_to_page(sp->spt));
764 __free_page(virt_to_page(sp->gfns));
765 kfree(sp);
f05e70ac 766 ++kvm->arch.n_free_mmu_pages;
260746c0
AK
767}
768
cea0f0e7
AK
769static unsigned kvm_page_table_hashfn(gfn_t gfn)
770{
1ae0a13d 771 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
cea0f0e7
AK
772}
773
25c0de2c
AK
774static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
775 u64 *parent_pte)
6aa8b732 776{
4db35314 777 struct kvm_mmu_page *sp;
6aa8b732 778
ad312c7c
ZX
779 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
780 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
781 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
4db35314 782 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
f05e70ac 783 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
4db35314
AK
784 ASSERT(is_empty_shadow_page(sp->spt));
785 sp->slot_bitmap = 0;
786 sp->multimapped = 0;
787 sp->parent_pte = parent_pte;
f05e70ac 788 --vcpu->kvm->arch.n_free_mmu_pages;
4db35314 789 return sp;
6aa8b732
AK
790}
791
714b93da 792static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
4db35314 793 struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7
AK
794{
795 struct kvm_pte_chain *pte_chain;
796 struct hlist_node *node;
797 int i;
798
799 if (!parent_pte)
800 return;
4db35314
AK
801 if (!sp->multimapped) {
802 u64 *old = sp->parent_pte;
cea0f0e7
AK
803
804 if (!old) {
4db35314 805 sp->parent_pte = parent_pte;
cea0f0e7
AK
806 return;
807 }
4db35314 808 sp->multimapped = 1;
714b93da 809 pte_chain = mmu_alloc_pte_chain(vcpu);
4db35314
AK
810 INIT_HLIST_HEAD(&sp->parent_ptes);
811 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
812 pte_chain->parent_ptes[0] = old;
813 }
4db35314 814 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
cea0f0e7
AK
815 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
816 continue;
817 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
818 if (!pte_chain->parent_ptes[i]) {
819 pte_chain->parent_ptes[i] = parent_pte;
820 return;
821 }
822 }
714b93da 823 pte_chain = mmu_alloc_pte_chain(vcpu);
cea0f0e7 824 BUG_ON(!pte_chain);
4db35314 825 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
cea0f0e7
AK
826 pte_chain->parent_ptes[0] = parent_pte;
827}
828
4db35314 829static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
cea0f0e7
AK
830 u64 *parent_pte)
831{
832 struct kvm_pte_chain *pte_chain;
833 struct hlist_node *node;
834 int i;
835
4db35314
AK
836 if (!sp->multimapped) {
837 BUG_ON(sp->parent_pte != parent_pte);
838 sp->parent_pte = NULL;
cea0f0e7
AK
839 return;
840 }
4db35314 841 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
cea0f0e7
AK
842 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
843 if (!pte_chain->parent_ptes[i])
844 break;
845 if (pte_chain->parent_ptes[i] != parent_pte)
846 continue;
697fe2e2
AK
847 while (i + 1 < NR_PTE_CHAIN_ENTRIES
848 && pte_chain->parent_ptes[i + 1]) {
cea0f0e7
AK
849 pte_chain->parent_ptes[i]
850 = pte_chain->parent_ptes[i + 1];
851 ++i;
852 }
853 pte_chain->parent_ptes[i] = NULL;
697fe2e2
AK
854 if (i == 0) {
855 hlist_del(&pte_chain->link);
90cb0529 856 mmu_free_pte_chain(pte_chain);
4db35314
AK
857 if (hlist_empty(&sp->parent_ptes)) {
858 sp->multimapped = 0;
859 sp->parent_pte = NULL;
697fe2e2
AK
860 }
861 }
cea0f0e7
AK
862 return;
863 }
864 BUG();
865}
866
ad8cfbe3
MT
867
868static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
869 mmu_parent_walk_fn fn)
870{
871 struct kvm_pte_chain *pte_chain;
872 struct hlist_node *node;
873 struct kvm_mmu_page *parent_sp;
874 int i;
875
876 if (!sp->multimapped && sp->parent_pte) {
877 parent_sp = page_header(__pa(sp->parent_pte));
878 fn(vcpu, parent_sp);
879 mmu_parent_walk(vcpu, parent_sp, fn);
880 return;
881 }
882 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
883 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
884 if (!pte_chain->parent_ptes[i])
885 break;
886 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
887 fn(vcpu, parent_sp);
888 mmu_parent_walk(vcpu, parent_sp, fn);
889 }
890}
891
d761a501
AK
892static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
893 struct kvm_mmu_page *sp)
894{
895 int i;
896
897 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
898 sp->spt[i] = shadow_trap_nonpresent_pte;
899}
900
e8bc217a
MT
901static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
902 struct kvm_mmu_page *sp)
903{
904 return 1;
905}
906
a7052897
MT
907static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
908{
909}
910
4db35314 911static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
cea0f0e7
AK
912{
913 unsigned index;
914 struct hlist_head *bucket;
4db35314 915 struct kvm_mmu_page *sp;
cea0f0e7
AK
916 struct hlist_node *node;
917
b8688d51 918 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1ae0a13d 919 index = kvm_page_table_hashfn(gfn);
f05e70ac 920 bucket = &kvm->arch.mmu_page_hash[index];
4db35314 921 hlist_for_each_entry(sp, node, bucket, hash_link)
2e53d63a
MT
922 if (sp->gfn == gfn && !sp->role.metaphysical
923 && !sp->role.invalid) {
cea0f0e7 924 pgprintk("%s: found role %x\n",
b8688d51 925 __func__, sp->role.word);
4db35314 926 return sp;
cea0f0e7
AK
927 }
928 return NULL;
929}
930
931static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
932 gfn_t gfn,
933 gva_t gaddr,
934 unsigned level,
935 int metaphysical,
41074d07 936 unsigned access,
f7d9c7b7 937 u64 *parent_pte)
cea0f0e7
AK
938{
939 union kvm_mmu_page_role role;
940 unsigned index;
941 unsigned quadrant;
942 struct hlist_head *bucket;
4db35314 943 struct kvm_mmu_page *sp;
cea0f0e7
AK
944 struct hlist_node *node;
945
946 role.word = 0;
ad312c7c 947 role.glevels = vcpu->arch.mmu.root_level;
cea0f0e7
AK
948 role.level = level;
949 role.metaphysical = metaphysical;
41074d07 950 role.access = access;
ad312c7c 951 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
cea0f0e7
AK
952 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
953 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
954 role.quadrant = quadrant;
955 }
b8688d51 956 pgprintk("%s: looking gfn %lx role %x\n", __func__,
cea0f0e7 957 gfn, role.word);
1ae0a13d 958 index = kvm_page_table_hashfn(gfn);
f05e70ac 959 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4db35314
AK
960 hlist_for_each_entry(sp, node, bucket, hash_link)
961 if (sp->gfn == gfn && sp->role.word == role.word) {
962 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
b8688d51 963 pgprintk("%s: found\n", __func__);
4db35314 964 return sp;
cea0f0e7 965 }
dfc5aa00 966 ++vcpu->kvm->stat.mmu_cache_miss;
4db35314
AK
967 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
968 if (!sp)
969 return sp;
b8688d51 970 pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
4db35314
AK
971 sp->gfn = gfn;
972 sp->role = role;
973 hlist_add_head(&sp->hash_link, bucket);
374cbac0 974 if (!metaphysical)
4a4c9924 975 rmap_write_protect(vcpu->kvm, gfn);
131d8279
AK
976 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
977 vcpu->arch.mmu.prefetch_page(vcpu, sp);
978 else
979 nonpaging_prefetch_page(vcpu, sp);
4db35314 980 return sp;
cea0f0e7
AK
981}
982
3d000db5 983static int walk_shadow(struct kvm_shadow_walk *walker,
d40a1ee4 984 struct kvm_vcpu *vcpu, u64 addr)
3d000db5
AK
985{
986 hpa_t shadow_addr;
987 int level;
988 int r;
989 u64 *sptep;
990 unsigned index;
991
992 shadow_addr = vcpu->arch.mmu.root_hpa;
993 level = vcpu->arch.mmu.shadow_root_level;
994 if (level == PT32E_ROOT_LEVEL) {
995 shadow_addr = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
996 shadow_addr &= PT64_BASE_ADDR_MASK;
997 --level;
998 }
999
1000 while (level >= PT_PAGE_TABLE_LEVEL) {
1001 index = SHADOW_PT_INDEX(addr, level);
1002 sptep = ((u64 *)__va(shadow_addr)) + index;
1003 r = walker->entry(walker, vcpu, addr, sptep, level);
1004 if (r)
1005 return r;
1006 shadow_addr = *sptep & PT64_BASE_ADDR_MASK;
1007 --level;
1008 }
1009 return 0;
1010}
1011
90cb0529 1012static void kvm_mmu_page_unlink_children(struct kvm *kvm,
4db35314 1013 struct kvm_mmu_page *sp)
a436036b 1014{
697fe2e2
AK
1015 unsigned i;
1016 u64 *pt;
1017 u64 ent;
1018
4db35314 1019 pt = sp->spt;
697fe2e2 1020
4db35314 1021 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
697fe2e2 1022 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
c7addb90 1023 if (is_shadow_present_pte(pt[i]))
290fc38d 1024 rmap_remove(kvm, &pt[i]);
c7addb90 1025 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2
AK
1026 }
1027 return;
1028 }
1029
1030 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1031 ent = pt[i];
1032
05da4558
MT
1033 if (is_shadow_present_pte(ent)) {
1034 if (!is_large_pte(ent)) {
1035 ent &= PT64_BASE_ADDR_MASK;
1036 mmu_page_remove_parent_pte(page_header(ent),
1037 &pt[i]);
1038 } else {
1039 --kvm->stat.lpages;
1040 rmap_remove(kvm, &pt[i]);
1041 }
1042 }
c7addb90 1043 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2 1044 }
a436036b
AK
1045}
1046
4db35314 1047static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7 1048{
4db35314 1049 mmu_page_remove_parent_pte(sp, parent_pte);
a436036b
AK
1050}
1051
12b7d28f
AK
1052static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1053{
1054 int i;
1055
1056 for (i = 0; i < KVM_MAX_VCPUS; ++i)
1057 if (kvm->vcpus[i])
ad312c7c 1058 kvm->vcpus[i]->arch.last_pte_updated = NULL;
12b7d28f
AK
1059}
1060
31aa2b44 1061static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
a436036b
AK
1062{
1063 u64 *parent_pte;
1064
4db35314
AK
1065 while (sp->multimapped || sp->parent_pte) {
1066 if (!sp->multimapped)
1067 parent_pte = sp->parent_pte;
a436036b
AK
1068 else {
1069 struct kvm_pte_chain *chain;
1070
4db35314 1071 chain = container_of(sp->parent_ptes.first,
a436036b
AK
1072 struct kvm_pte_chain, link);
1073 parent_pte = chain->parent_ptes[0];
1074 }
697fe2e2 1075 BUG_ON(!parent_pte);
4db35314 1076 kvm_mmu_put_page(sp, parent_pte);
c7addb90 1077 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
a436036b 1078 }
31aa2b44
AK
1079}
1080
1081static void kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1082{
1083 ++kvm->stat.mmu_shadow_zapped;
4db35314 1084 kvm_mmu_page_unlink_children(kvm, sp);
31aa2b44 1085 kvm_mmu_unlink_parents(kvm, sp);
5b5c6a5a
AK
1086 kvm_flush_remote_tlbs(kvm);
1087 if (!sp->role.invalid && !sp->role.metaphysical)
1088 unaccount_shadowed(kvm, sp->gfn);
4db35314
AK
1089 if (!sp->root_count) {
1090 hlist_del(&sp->hash_link);
1091 kvm_mmu_free_page(kvm, sp);
2e53d63a 1092 } else {
2e53d63a 1093 sp->role.invalid = 1;
5b5c6a5a 1094 list_move(&sp->link, &kvm->arch.active_mmu_pages);
2e53d63a
MT
1095 kvm_reload_remote_mmus(kvm);
1096 }
12b7d28f 1097 kvm_mmu_reset_last_pte_updated(kvm);
a436036b
AK
1098}
1099
82ce2c96
IE
1100/*
1101 * Changing the number of mmu pages allocated to the vm
1102 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1103 */
1104void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1105{
1106 /*
1107 * If we set the number of mmu pages to be smaller be than the
1108 * number of actived pages , we must to free some mmu pages before we
1109 * change the value
1110 */
1111
f05e70ac 1112 if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
82ce2c96 1113 kvm_nr_mmu_pages) {
f05e70ac
ZX
1114 int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
1115 - kvm->arch.n_free_mmu_pages;
82ce2c96
IE
1116
1117 while (n_used_mmu_pages > kvm_nr_mmu_pages) {
1118 struct kvm_mmu_page *page;
1119
f05e70ac 1120 page = container_of(kvm->arch.active_mmu_pages.prev,
82ce2c96
IE
1121 struct kvm_mmu_page, link);
1122 kvm_mmu_zap_page(kvm, page);
1123 n_used_mmu_pages--;
1124 }
f05e70ac 1125 kvm->arch.n_free_mmu_pages = 0;
82ce2c96
IE
1126 }
1127 else
f05e70ac
ZX
1128 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1129 - kvm->arch.n_alloc_mmu_pages;
82ce2c96 1130
f05e70ac 1131 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
82ce2c96
IE
1132}
1133
f67a46f4 1134static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
a436036b
AK
1135{
1136 unsigned index;
1137 struct hlist_head *bucket;
4db35314 1138 struct kvm_mmu_page *sp;
a436036b
AK
1139 struct hlist_node *node, *n;
1140 int r;
1141
b8688d51 1142 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
a436036b 1143 r = 0;
1ae0a13d 1144 index = kvm_page_table_hashfn(gfn);
f05e70ac 1145 bucket = &kvm->arch.mmu_page_hash[index];
4db35314
AK
1146 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1147 if (sp->gfn == gfn && !sp->role.metaphysical) {
b8688d51 1148 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
4db35314
AK
1149 sp->role.word);
1150 kvm_mmu_zap_page(kvm, sp);
a436036b
AK
1151 r = 1;
1152 }
1153 return r;
cea0f0e7
AK
1154}
1155
f67a46f4 1156static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
97a0a01e 1157{
4db35314 1158 struct kvm_mmu_page *sp;
97a0a01e 1159
4db35314 1160 while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
b8688d51 1161 pgprintk("%s: zap %lx %x\n", __func__, gfn, sp->role.word);
4db35314 1162 kvm_mmu_zap_page(kvm, sp);
97a0a01e
AK
1163 }
1164}
1165
38c335f1 1166static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
6aa8b732 1167{
38c335f1 1168 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
4db35314 1169 struct kvm_mmu_page *sp = page_header(__pa(pte));
6aa8b732 1170
4db35314 1171 __set_bit(slot, &sp->slot_bitmap);
6aa8b732
AK
1172}
1173
039576c0
AK
1174struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1175{
72dc67a6
IE
1176 struct page *page;
1177
ad312c7c 1178 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
039576c0
AK
1179
1180 if (gpa == UNMAPPED_GVA)
1181 return NULL;
72dc67a6 1182
72dc67a6 1183 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
72dc67a6
IE
1184
1185 return page;
039576c0
AK
1186}
1187
1e73f9dd
MT
1188static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1189 unsigned pte_access, int user_fault,
1190 int write_fault, int dirty, int largepage,
1191 gfn_t gfn, pfn_t pfn, bool speculative)
1c4f1fd6
AK
1192{
1193 u64 spte;
1e73f9dd 1194 int ret = 0;
1c4f1fd6
AK
1195 /*
1196 * We don't set the accessed bit, since we sometimes want to see
1197 * whether the guest actually used the pte (in order to detect
1198 * demand paging).
1199 */
7b52345e 1200 spte = shadow_base_present_pte | shadow_dirty_mask;
947da538 1201 if (!speculative)
3201b5d9 1202 spte |= shadow_accessed_mask;
1c4f1fd6
AK
1203 if (!dirty)
1204 pte_access &= ~ACC_WRITE_MASK;
7b52345e
SY
1205 if (pte_access & ACC_EXEC_MASK)
1206 spte |= shadow_x_mask;
1207 else
1208 spte |= shadow_nx_mask;
1c4f1fd6 1209 if (pte_access & ACC_USER_MASK)
7b52345e 1210 spte |= shadow_user_mask;
05da4558
MT
1211 if (largepage)
1212 spte |= PT_PAGE_SIZE_MASK;
1c4f1fd6 1213
35149e21 1214 spte |= (u64)pfn << PAGE_SHIFT;
1c4f1fd6
AK
1215
1216 if ((pte_access & ACC_WRITE_MASK)
1217 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1218 struct kvm_mmu_page *shadow;
1219
38187c83
MT
1220 if (largepage && has_wrprotected_page(vcpu->kvm, gfn)) {
1221 ret = 1;
1222 spte = shadow_trap_nonpresent_pte;
1223 goto set_pte;
1224 }
1225
1c4f1fd6 1226 spte |= PT_WRITABLE_MASK;
1c4f1fd6
AK
1227
1228 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
38187c83 1229 if (shadow) {
1c4f1fd6 1230 pgprintk("%s: found shadow page for %lx, marking ro\n",
b8688d51 1231 __func__, gfn);
1e73f9dd 1232 ret = 1;
1c4f1fd6 1233 pte_access &= ~ACC_WRITE_MASK;
a378b4e6 1234 if (is_writeble_pte(spte))
1c4f1fd6 1235 spte &= ~PT_WRITABLE_MASK;
1c4f1fd6
AK
1236 }
1237 }
1238
1c4f1fd6
AK
1239 if (pte_access & ACC_WRITE_MASK)
1240 mark_page_dirty(vcpu->kvm, gfn);
1241
38187c83 1242set_pte:
1c4f1fd6 1243 set_shadow_pte(shadow_pte, spte);
1e73f9dd
MT
1244 return ret;
1245}
1246
1247
1248static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
1249 unsigned pt_access, unsigned pte_access,
1250 int user_fault, int write_fault, int dirty,
1251 int *ptwrite, int largepage, gfn_t gfn,
1252 pfn_t pfn, bool speculative)
1253{
1254 int was_rmapped = 0;
1255 int was_writeble = is_writeble_pte(*shadow_pte);
1256
1257 pgprintk("%s: spte %llx access %x write_fault %d"
1258 " user_fault %d gfn %lx\n",
1259 __func__, *shadow_pte, pt_access,
1260 write_fault, user_fault, gfn);
1261
1262 if (is_rmap_pte(*shadow_pte)) {
1263 /*
1264 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1265 * the parent of the now unreachable PTE.
1266 */
1267 if (largepage && !is_large_pte(*shadow_pte)) {
1268 struct kvm_mmu_page *child;
1269 u64 pte = *shadow_pte;
1270
1271 child = page_header(pte & PT64_BASE_ADDR_MASK);
1272 mmu_page_remove_parent_pte(child, shadow_pte);
1273 } else if (pfn != spte_to_pfn(*shadow_pte)) {
1274 pgprintk("hfn old %lx new %lx\n",
1275 spte_to_pfn(*shadow_pte), pfn);
1276 rmap_remove(vcpu->kvm, shadow_pte);
1277 } else {
1278 if (largepage)
1279 was_rmapped = is_large_pte(*shadow_pte);
1280 else
1281 was_rmapped = 1;
1282 }
1283 }
1284 if (set_spte(vcpu, shadow_pte, pte_access, user_fault, write_fault,
a378b4e6 1285 dirty, largepage, gfn, pfn, speculative)) {
1e73f9dd
MT
1286 if (write_fault)
1287 *ptwrite = 1;
a378b4e6
MT
1288 kvm_x86_ops->tlb_flush(vcpu);
1289 }
1e73f9dd
MT
1290
1291 pgprintk("%s: setting spte %llx\n", __func__, *shadow_pte);
1292 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1293 is_large_pte(*shadow_pte)? "2MB" : "4kB",
1294 is_present_pte(*shadow_pte)?"RW":"R", gfn,
1295 *shadow_pte, shadow_pte);
1296 if (!was_rmapped && is_large_pte(*shadow_pte))
05da4558
MT
1297 ++vcpu->kvm->stat.lpages;
1298
1c4f1fd6
AK
1299 page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
1300 if (!was_rmapped) {
05da4558 1301 rmap_add(vcpu, shadow_pte, gfn, largepage);
1c4f1fd6 1302 if (!is_rmap_pte(*shadow_pte))
35149e21 1303 kvm_release_pfn_clean(pfn);
75e68e60
IE
1304 } else {
1305 if (was_writeble)
35149e21 1306 kvm_release_pfn_dirty(pfn);
75e68e60 1307 else
35149e21 1308 kvm_release_pfn_clean(pfn);
1c4f1fd6 1309 }
1b7fcd32 1310 if (speculative) {
ad312c7c 1311 vcpu->arch.last_pte_updated = shadow_pte;
1b7fcd32
AK
1312 vcpu->arch.last_pte_gfn = gfn;
1313 }
1c4f1fd6
AK
1314}
1315
6aa8b732
AK
1316static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1317{
1318}
1319
140754bc
AK
1320struct direct_shadow_walk {
1321 struct kvm_shadow_walk walker;
1322 pfn_t pfn;
1323 int write;
1324 int largepage;
1325 int pt_write;
1326};
6aa8b732 1327
140754bc
AK
1328static int direct_map_entry(struct kvm_shadow_walk *_walk,
1329 struct kvm_vcpu *vcpu,
d40a1ee4 1330 u64 addr, u64 *sptep, int level)
140754bc
AK
1331{
1332 struct direct_shadow_walk *walk =
1333 container_of(_walk, struct direct_shadow_walk, walker);
1334 struct kvm_mmu_page *sp;
1335 gfn_t pseudo_gfn;
1336 gfn_t gfn = addr >> PAGE_SHIFT;
1337
1338 if (level == PT_PAGE_TABLE_LEVEL
1339 || (walk->largepage && level == PT_DIRECTORY_LEVEL)) {
1340 mmu_set_spte(vcpu, sptep, ACC_ALL, ACC_ALL,
1341 0, walk->write, 1, &walk->pt_write,
1342 walk->largepage, gfn, walk->pfn, false);
bc2d4299 1343 ++vcpu->stat.pf_fixed;
140754bc
AK
1344 return 1;
1345 }
6aa8b732 1346
140754bc
AK
1347 if (*sptep == shadow_trap_nonpresent_pte) {
1348 pseudo_gfn = (addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
d40a1ee4 1349 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, (gva_t)addr, level - 1,
140754bc
AK
1350 1, ACC_ALL, sptep);
1351 if (!sp) {
1352 pgprintk("nonpaging_map: ENOMEM\n");
1353 kvm_release_pfn_clean(walk->pfn);
1354 return -ENOMEM;
6aa8b732
AK
1355 }
1356
140754bc
AK
1357 set_shadow_pte(sptep,
1358 __pa(sp->spt)
1359 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1360 | shadow_user_mask | shadow_x_mask);
6aa8b732 1361 }
140754bc
AK
1362 return 0;
1363}
1364
1365static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1366 int largepage, gfn_t gfn, pfn_t pfn)
1367{
1368 int r;
1369 struct direct_shadow_walk walker = {
1370 .walker = { .entry = direct_map_entry, },
1371 .pfn = pfn,
1372 .largepage = largepage,
1373 .write = write,
1374 .pt_write = 0,
1375 };
1376
d40a1ee4 1377 r = walk_shadow(&walker.walker, vcpu, gfn << PAGE_SHIFT);
140754bc
AK
1378 if (r < 0)
1379 return r;
1380 return walker.pt_write;
6aa8b732
AK
1381}
1382
10589a46
MT
1383static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1384{
1385 int r;
05da4558 1386 int largepage = 0;
35149e21 1387 pfn_t pfn;
e930bffe 1388 unsigned long mmu_seq;
aaee2c94 1389
05da4558
MT
1390 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
1391 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1392 largepage = 1;
1393 }
1394
e930bffe 1395 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 1396 smp_rmb();
35149e21 1397 pfn = gfn_to_pfn(vcpu->kvm, gfn);
aaee2c94 1398
d196e343 1399 /* mmio */
35149e21
AL
1400 if (is_error_pfn(pfn)) {
1401 kvm_release_pfn_clean(pfn);
d196e343
AK
1402 return 1;
1403 }
1404
aaee2c94 1405 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA
1406 if (mmu_notifier_retry(vcpu, mmu_seq))
1407 goto out_unlock;
eb787d10 1408 kvm_mmu_free_some_pages(vcpu);
6c41f428 1409 r = __direct_map(vcpu, v, write, largepage, gfn, pfn);
aaee2c94
MT
1410 spin_unlock(&vcpu->kvm->mmu_lock);
1411
aaee2c94 1412
10589a46 1413 return r;
e930bffe
AA
1414
1415out_unlock:
1416 spin_unlock(&vcpu->kvm->mmu_lock);
1417 kvm_release_pfn_clean(pfn);
1418 return 0;
10589a46
MT
1419}
1420
1421
17ac10ad
AK
1422static void mmu_free_roots(struct kvm_vcpu *vcpu)
1423{
1424 int i;
4db35314 1425 struct kvm_mmu_page *sp;
17ac10ad 1426
ad312c7c 1427 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
7b53aa56 1428 return;
aaee2c94 1429 spin_lock(&vcpu->kvm->mmu_lock);
ad312c7c
ZX
1430 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1431 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad 1432
4db35314
AK
1433 sp = page_header(root);
1434 --sp->root_count;
2e53d63a
MT
1435 if (!sp->root_count && sp->role.invalid)
1436 kvm_mmu_zap_page(vcpu->kvm, sp);
ad312c7c 1437 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
aaee2c94 1438 spin_unlock(&vcpu->kvm->mmu_lock);
17ac10ad
AK
1439 return;
1440 }
17ac10ad 1441 for (i = 0; i < 4; ++i) {
ad312c7c 1442 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad 1443
417726a3 1444 if (root) {
417726a3 1445 root &= PT64_BASE_ADDR_MASK;
4db35314
AK
1446 sp = page_header(root);
1447 --sp->root_count;
2e53d63a
MT
1448 if (!sp->root_count && sp->role.invalid)
1449 kvm_mmu_zap_page(vcpu->kvm, sp);
417726a3 1450 }
ad312c7c 1451 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 1452 }
aaee2c94 1453 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 1454 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
17ac10ad
AK
1455}
1456
1457static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
1458{
1459 int i;
cea0f0e7 1460 gfn_t root_gfn;
4db35314 1461 struct kvm_mmu_page *sp;
fb72d167 1462 int metaphysical = 0;
3bb65a22 1463
ad312c7c 1464 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
17ac10ad 1465
ad312c7c
ZX
1466 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1467 hpa_t root = vcpu->arch.mmu.root_hpa;
17ac10ad
AK
1468
1469 ASSERT(!VALID_PAGE(root));
fb72d167
JR
1470 if (tdp_enabled)
1471 metaphysical = 1;
4db35314 1472 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
fb72d167
JR
1473 PT64_ROOT_LEVEL, metaphysical,
1474 ACC_ALL, NULL);
4db35314
AK
1475 root = __pa(sp->spt);
1476 ++sp->root_count;
ad312c7c 1477 vcpu->arch.mmu.root_hpa = root;
17ac10ad
AK
1478 return;
1479 }
fb72d167
JR
1480 metaphysical = !is_paging(vcpu);
1481 if (tdp_enabled)
1482 metaphysical = 1;
17ac10ad 1483 for (i = 0; i < 4; ++i) {
ad312c7c 1484 hpa_t root = vcpu->arch.mmu.pae_root[i];
17ac10ad
AK
1485
1486 ASSERT(!VALID_PAGE(root));
ad312c7c
ZX
1487 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
1488 if (!is_present_pte(vcpu->arch.pdptrs[i])) {
1489 vcpu->arch.mmu.pae_root[i] = 0;
417726a3
AK
1490 continue;
1491 }
ad312c7c
ZX
1492 root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
1493 } else if (vcpu->arch.mmu.root_level == 0)
cea0f0e7 1494 root_gfn = 0;
4db35314 1495 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
fb72d167 1496 PT32_ROOT_LEVEL, metaphysical,
f7d9c7b7 1497 ACC_ALL, NULL);
4db35314
AK
1498 root = __pa(sp->spt);
1499 ++sp->root_count;
ad312c7c 1500 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
17ac10ad 1501 }
ad312c7c 1502 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
17ac10ad
AK
1503}
1504
0ba73cda
MT
1505static void mmu_sync_children(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1506{
1507}
1508
1509static void mmu_sync_roots(struct kvm_vcpu *vcpu)
1510{
1511 int i;
1512 struct kvm_mmu_page *sp;
1513
1514 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
1515 return;
1516 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1517 hpa_t root = vcpu->arch.mmu.root_hpa;
1518 sp = page_header(root);
1519 mmu_sync_children(vcpu, sp);
1520 return;
1521 }
1522 for (i = 0; i < 4; ++i) {
1523 hpa_t root = vcpu->arch.mmu.pae_root[i];
1524
1525 if (root) {
1526 root &= PT64_BASE_ADDR_MASK;
1527 sp = page_header(root);
1528 mmu_sync_children(vcpu, sp);
1529 }
1530 }
1531}
1532
1533void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
1534{
1535 spin_lock(&vcpu->kvm->mmu_lock);
1536 mmu_sync_roots(vcpu);
1537 spin_unlock(&vcpu->kvm->mmu_lock);
1538}
1539
6aa8b732
AK
1540static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
1541{
1542 return vaddr;
1543}
1544
1545static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
3f3e7124 1546 u32 error_code)
6aa8b732 1547{
e833240f 1548 gfn_t gfn;
e2dec939 1549 int r;
6aa8b732 1550
b8688d51 1551 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
e2dec939
AK
1552 r = mmu_topup_memory_caches(vcpu);
1553 if (r)
1554 return r;
714b93da 1555
6aa8b732 1556 ASSERT(vcpu);
ad312c7c 1557 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 1558
e833240f 1559 gfn = gva >> PAGE_SHIFT;
6aa8b732 1560
e833240f
AK
1561 return nonpaging_map(vcpu, gva & PAGE_MASK,
1562 error_code & PFERR_WRITE_MASK, gfn);
6aa8b732
AK
1563}
1564
fb72d167
JR
1565static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
1566 u32 error_code)
1567{
35149e21 1568 pfn_t pfn;
fb72d167 1569 int r;
05da4558
MT
1570 int largepage = 0;
1571 gfn_t gfn = gpa >> PAGE_SHIFT;
e930bffe 1572 unsigned long mmu_seq;
fb72d167
JR
1573
1574 ASSERT(vcpu);
1575 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
1576
1577 r = mmu_topup_memory_caches(vcpu);
1578 if (r)
1579 return r;
1580
05da4558
MT
1581 if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
1582 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1583 largepage = 1;
1584 }
e930bffe 1585 mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 1586 smp_rmb();
35149e21 1587 pfn = gfn_to_pfn(vcpu->kvm, gfn);
35149e21
AL
1588 if (is_error_pfn(pfn)) {
1589 kvm_release_pfn_clean(pfn);
fb72d167
JR
1590 return 1;
1591 }
1592 spin_lock(&vcpu->kvm->mmu_lock);
e930bffe
AA
1593 if (mmu_notifier_retry(vcpu, mmu_seq))
1594 goto out_unlock;
fb72d167
JR
1595 kvm_mmu_free_some_pages(vcpu);
1596 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
6c41f428 1597 largepage, gfn, pfn);
fb72d167 1598 spin_unlock(&vcpu->kvm->mmu_lock);
fb72d167
JR
1599
1600 return r;
e930bffe
AA
1601
1602out_unlock:
1603 spin_unlock(&vcpu->kvm->mmu_lock);
1604 kvm_release_pfn_clean(pfn);
1605 return 0;
fb72d167
JR
1606}
1607
6aa8b732
AK
1608static void nonpaging_free(struct kvm_vcpu *vcpu)
1609{
17ac10ad 1610 mmu_free_roots(vcpu);
6aa8b732
AK
1611}
1612
1613static int nonpaging_init_context(struct kvm_vcpu *vcpu)
1614{
ad312c7c 1615 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
1616
1617 context->new_cr3 = nonpaging_new_cr3;
1618 context->page_fault = nonpaging_page_fault;
6aa8b732
AK
1619 context->gva_to_gpa = nonpaging_gva_to_gpa;
1620 context->free = nonpaging_free;
c7addb90 1621 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 1622 context->sync_page = nonpaging_sync_page;
a7052897 1623 context->invlpg = nonpaging_invlpg;
cea0f0e7 1624 context->root_level = 0;
6aa8b732 1625 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 1626 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
1627 return 0;
1628}
1629
d835dfec 1630void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
6aa8b732 1631{
1165f5fe 1632 ++vcpu->stat.tlb_flush;
cbdd1bea 1633 kvm_x86_ops->tlb_flush(vcpu);
6aa8b732
AK
1634}
1635
1636static void paging_new_cr3(struct kvm_vcpu *vcpu)
1637{
b8688d51 1638 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
cea0f0e7 1639 mmu_free_roots(vcpu);
6aa8b732
AK
1640}
1641
6aa8b732
AK
1642static void inject_page_fault(struct kvm_vcpu *vcpu,
1643 u64 addr,
1644 u32 err_code)
1645{
c3c91fee 1646 kvm_inject_page_fault(vcpu, addr, err_code);
6aa8b732
AK
1647}
1648
6aa8b732
AK
1649static void paging_free(struct kvm_vcpu *vcpu)
1650{
1651 nonpaging_free(vcpu);
1652}
1653
1654#define PTTYPE 64
1655#include "paging_tmpl.h"
1656#undef PTTYPE
1657
1658#define PTTYPE 32
1659#include "paging_tmpl.h"
1660#undef PTTYPE
1661
17ac10ad 1662static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
6aa8b732 1663{
ad312c7c 1664 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
1665
1666 ASSERT(is_pae(vcpu));
1667 context->new_cr3 = paging_new_cr3;
1668 context->page_fault = paging64_page_fault;
6aa8b732 1669 context->gva_to_gpa = paging64_gva_to_gpa;
c7addb90 1670 context->prefetch_page = paging64_prefetch_page;
e8bc217a 1671 context->sync_page = paging64_sync_page;
a7052897 1672 context->invlpg = paging64_invlpg;
6aa8b732 1673 context->free = paging_free;
17ac10ad
AK
1674 context->root_level = level;
1675 context->shadow_root_level = level;
17c3ba9d 1676 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
1677 return 0;
1678}
1679
17ac10ad
AK
1680static int paging64_init_context(struct kvm_vcpu *vcpu)
1681{
1682 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
1683}
1684
6aa8b732
AK
1685static int paging32_init_context(struct kvm_vcpu *vcpu)
1686{
ad312c7c 1687 struct kvm_mmu *context = &vcpu->arch.mmu;
6aa8b732
AK
1688
1689 context->new_cr3 = paging_new_cr3;
1690 context->page_fault = paging32_page_fault;
6aa8b732
AK
1691 context->gva_to_gpa = paging32_gva_to_gpa;
1692 context->free = paging_free;
c7addb90 1693 context->prefetch_page = paging32_prefetch_page;
e8bc217a 1694 context->sync_page = paging32_sync_page;
a7052897 1695 context->invlpg = paging32_invlpg;
6aa8b732
AK
1696 context->root_level = PT32_ROOT_LEVEL;
1697 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 1698 context->root_hpa = INVALID_PAGE;
6aa8b732
AK
1699 return 0;
1700}
1701
1702static int paging32E_init_context(struct kvm_vcpu *vcpu)
1703{
17ac10ad 1704 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
6aa8b732
AK
1705}
1706
fb72d167
JR
1707static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
1708{
1709 struct kvm_mmu *context = &vcpu->arch.mmu;
1710
1711 context->new_cr3 = nonpaging_new_cr3;
1712 context->page_fault = tdp_page_fault;
1713 context->free = nonpaging_free;
1714 context->prefetch_page = nonpaging_prefetch_page;
e8bc217a 1715 context->sync_page = nonpaging_sync_page;
a7052897 1716 context->invlpg = nonpaging_invlpg;
67253af5 1717 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
fb72d167
JR
1718 context->root_hpa = INVALID_PAGE;
1719
1720 if (!is_paging(vcpu)) {
1721 context->gva_to_gpa = nonpaging_gva_to_gpa;
1722 context->root_level = 0;
1723 } else if (is_long_mode(vcpu)) {
1724 context->gva_to_gpa = paging64_gva_to_gpa;
1725 context->root_level = PT64_ROOT_LEVEL;
1726 } else if (is_pae(vcpu)) {
1727 context->gva_to_gpa = paging64_gva_to_gpa;
1728 context->root_level = PT32E_ROOT_LEVEL;
1729 } else {
1730 context->gva_to_gpa = paging32_gva_to_gpa;
1731 context->root_level = PT32_ROOT_LEVEL;
1732 }
1733
1734 return 0;
1735}
1736
1737static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
6aa8b732
AK
1738{
1739 ASSERT(vcpu);
ad312c7c 1740 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732
AK
1741
1742 if (!is_paging(vcpu))
1743 return nonpaging_init_context(vcpu);
a9058ecd 1744 else if (is_long_mode(vcpu))
6aa8b732
AK
1745 return paging64_init_context(vcpu);
1746 else if (is_pae(vcpu))
1747 return paging32E_init_context(vcpu);
1748 else
1749 return paging32_init_context(vcpu);
1750}
1751
fb72d167
JR
1752static int init_kvm_mmu(struct kvm_vcpu *vcpu)
1753{
35149e21
AL
1754 vcpu->arch.update_pte.pfn = bad_pfn;
1755
fb72d167
JR
1756 if (tdp_enabled)
1757 return init_kvm_tdp_mmu(vcpu);
1758 else
1759 return init_kvm_softmmu(vcpu);
1760}
1761
6aa8b732
AK
1762static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
1763{
1764 ASSERT(vcpu);
ad312c7c
ZX
1765 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
1766 vcpu->arch.mmu.free(vcpu);
1767 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6aa8b732
AK
1768 }
1769}
1770
1771int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
17c3ba9d
AK
1772{
1773 destroy_kvm_mmu(vcpu);
1774 return init_kvm_mmu(vcpu);
1775}
8668a3c4 1776EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
17c3ba9d
AK
1777
1778int kvm_mmu_load(struct kvm_vcpu *vcpu)
6aa8b732 1779{
714b93da
AK
1780 int r;
1781
e2dec939 1782 r = mmu_topup_memory_caches(vcpu);
17c3ba9d
AK
1783 if (r)
1784 goto out;
aaee2c94 1785 spin_lock(&vcpu->kvm->mmu_lock);
eb787d10 1786 kvm_mmu_free_some_pages(vcpu);
17c3ba9d 1787 mmu_alloc_roots(vcpu);
0ba73cda 1788 mmu_sync_roots(vcpu);
aaee2c94 1789 spin_unlock(&vcpu->kvm->mmu_lock);
ad312c7c 1790 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
17c3ba9d 1791 kvm_mmu_flush_tlb(vcpu);
714b93da
AK
1792out:
1793 return r;
6aa8b732 1794}
17c3ba9d
AK
1795EXPORT_SYMBOL_GPL(kvm_mmu_load);
1796
1797void kvm_mmu_unload(struct kvm_vcpu *vcpu)
1798{
1799 mmu_free_roots(vcpu);
1800}
6aa8b732 1801
09072daf 1802static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
4db35314 1803 struct kvm_mmu_page *sp,
ac1b714e
AK
1804 u64 *spte)
1805{
1806 u64 pte;
1807 struct kvm_mmu_page *child;
1808
1809 pte = *spte;
c7addb90 1810 if (is_shadow_present_pte(pte)) {
05da4558
MT
1811 if (sp->role.level == PT_PAGE_TABLE_LEVEL ||
1812 is_large_pte(pte))
290fc38d 1813 rmap_remove(vcpu->kvm, spte);
ac1b714e
AK
1814 else {
1815 child = page_header(pte & PT64_BASE_ADDR_MASK);
90cb0529 1816 mmu_page_remove_parent_pte(child, spte);
ac1b714e
AK
1817 }
1818 }
c7addb90 1819 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
05da4558
MT
1820 if (is_large_pte(pte))
1821 --vcpu->kvm->stat.lpages;
ac1b714e
AK
1822}
1823
0028425f 1824static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
4db35314 1825 struct kvm_mmu_page *sp,
0028425f 1826 u64 *spte,
489f1d65 1827 const void *new)
0028425f 1828{
30945387
MT
1829 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
1830 if (!vcpu->arch.update_pte.largepage ||
1831 sp->role.glevels == PT32_ROOT_LEVEL) {
1832 ++vcpu->kvm->stat.mmu_pde_zapped;
1833 return;
1834 }
1835 }
0028425f 1836
4cee5764 1837 ++vcpu->kvm->stat.mmu_pte_updated;
4db35314 1838 if (sp->role.glevels == PT32_ROOT_LEVEL)
489f1d65 1839 paging32_update_pte(vcpu, sp, spte, new);
0028425f 1840 else
489f1d65 1841 paging64_update_pte(vcpu, sp, spte, new);
0028425f
AK
1842}
1843
79539cec
AK
1844static bool need_remote_flush(u64 old, u64 new)
1845{
1846 if (!is_shadow_present_pte(old))
1847 return false;
1848 if (!is_shadow_present_pte(new))
1849 return true;
1850 if ((old ^ new) & PT64_BASE_ADDR_MASK)
1851 return true;
1852 old ^= PT64_NX_MASK;
1853 new ^= PT64_NX_MASK;
1854 return (old & ~new & PT64_PERM_MASK) != 0;
1855}
1856
1857static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
1858{
1859 if (need_remote_flush(old, new))
1860 kvm_flush_remote_tlbs(vcpu->kvm);
1861 else
1862 kvm_mmu_flush_tlb(vcpu);
1863}
1864
12b7d28f
AK
1865static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
1866{
ad312c7c 1867 u64 *spte = vcpu->arch.last_pte_updated;
12b7d28f 1868
7b52345e 1869 return !!(spte && (*spte & shadow_accessed_mask));
12b7d28f
AK
1870}
1871
d7824fff
AK
1872static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
1873 const u8 *new, int bytes)
1874{
1875 gfn_t gfn;
1876 int r;
1877 u64 gpte = 0;
35149e21 1878 pfn_t pfn;
d7824fff 1879
05da4558
MT
1880 vcpu->arch.update_pte.largepage = 0;
1881
d7824fff
AK
1882 if (bytes != 4 && bytes != 8)
1883 return;
1884
1885 /*
1886 * Assume that the pte write on a page table of the same type
1887 * as the current vcpu paging mode. This is nearly always true
1888 * (might be false while changing modes). Note it is verified later
1889 * by update_pte().
1890 */
1891 if (is_pae(vcpu)) {
1892 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
1893 if ((bytes == 4) && (gpa % 4 == 0)) {
1894 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
1895 if (r)
1896 return;
1897 memcpy((void *)&gpte + (gpa % 8), new, 4);
1898 } else if ((bytes == 8) && (gpa % 8 == 0)) {
1899 memcpy((void *)&gpte, new, 8);
1900 }
1901 } else {
1902 if ((bytes == 4) && (gpa % 4 == 0))
1903 memcpy((void *)&gpte, new, 4);
1904 }
1905 if (!is_present_pte(gpte))
1906 return;
1907 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
72dc67a6 1908
05da4558
MT
1909 if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
1910 gfn &= ~(KVM_PAGES_PER_HPAGE-1);
1911 vcpu->arch.update_pte.largepage = 1;
1912 }
e930bffe 1913 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
4c2155ce 1914 smp_rmb();
35149e21 1915 pfn = gfn_to_pfn(vcpu->kvm, gfn);
72dc67a6 1916
35149e21
AL
1917 if (is_error_pfn(pfn)) {
1918 kvm_release_pfn_clean(pfn);
d196e343
AK
1919 return;
1920 }
d7824fff 1921 vcpu->arch.update_pte.gfn = gfn;
35149e21 1922 vcpu->arch.update_pte.pfn = pfn;
d7824fff
AK
1923}
1924
1b7fcd32
AK
1925static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
1926{
1927 u64 *spte = vcpu->arch.last_pte_updated;
1928
1929 if (spte
1930 && vcpu->arch.last_pte_gfn == gfn
1931 && shadow_accessed_mask
1932 && !(*spte & shadow_accessed_mask)
1933 && is_shadow_present_pte(*spte))
1934 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
1935}
1936
09072daf 1937void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
fe551881 1938 const u8 *new, int bytes)
da4a00f0 1939{
9b7a0325 1940 gfn_t gfn = gpa >> PAGE_SHIFT;
4db35314 1941 struct kvm_mmu_page *sp;
0e7bc4b9 1942 struct hlist_node *node, *n;
9b7a0325
AK
1943 struct hlist_head *bucket;
1944 unsigned index;
489f1d65 1945 u64 entry, gentry;
9b7a0325 1946 u64 *spte;
9b7a0325 1947 unsigned offset = offset_in_page(gpa);
0e7bc4b9 1948 unsigned pte_size;
9b7a0325 1949 unsigned page_offset;
0e7bc4b9 1950 unsigned misaligned;
fce0657f 1951 unsigned quadrant;
9b7a0325 1952 int level;
86a5ba02 1953 int flooded = 0;
ac1b714e 1954 int npte;
489f1d65 1955 int r;
9b7a0325 1956
b8688d51 1957 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
d7824fff 1958 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
aaee2c94 1959 spin_lock(&vcpu->kvm->mmu_lock);
1b7fcd32 1960 kvm_mmu_access_page(vcpu, gfn);
eb787d10 1961 kvm_mmu_free_some_pages(vcpu);
4cee5764 1962 ++vcpu->kvm->stat.mmu_pte_write;
c7addb90 1963 kvm_mmu_audit(vcpu, "pre pte write");
ad312c7c 1964 if (gfn == vcpu->arch.last_pt_write_gfn
12b7d28f 1965 && !last_updated_pte_accessed(vcpu)) {
ad312c7c
ZX
1966 ++vcpu->arch.last_pt_write_count;
1967 if (vcpu->arch.last_pt_write_count >= 3)
86a5ba02
AK
1968 flooded = 1;
1969 } else {
ad312c7c
ZX
1970 vcpu->arch.last_pt_write_gfn = gfn;
1971 vcpu->arch.last_pt_write_count = 1;
1972 vcpu->arch.last_pte_updated = NULL;
86a5ba02 1973 }
1ae0a13d 1974 index = kvm_page_table_hashfn(gfn);
f05e70ac 1975 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
4db35314 1976 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
5b5c6a5a 1977 if (sp->gfn != gfn || sp->role.metaphysical || sp->role.invalid)
9b7a0325 1978 continue;
4db35314 1979 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
0e7bc4b9 1980 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
e925c5ba 1981 misaligned |= bytes < 4;
86a5ba02 1982 if (misaligned || flooded) {
0e7bc4b9
AK
1983 /*
1984 * Misaligned accesses are too much trouble to fix
1985 * up; also, they usually indicate a page is not used
1986 * as a page table.
86a5ba02
AK
1987 *
1988 * If we're seeing too many writes to a page,
1989 * it may no longer be a page table, or we may be
1990 * forking, in which case it is better to unmap the
1991 * page.
0e7bc4b9
AK
1992 */
1993 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
4db35314
AK
1994 gpa, bytes, sp->role.word);
1995 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 1996 ++vcpu->kvm->stat.mmu_flooded;
0e7bc4b9
AK
1997 continue;
1998 }
9b7a0325 1999 page_offset = offset;
4db35314 2000 level = sp->role.level;
ac1b714e 2001 npte = 1;
4db35314 2002 if (sp->role.glevels == PT32_ROOT_LEVEL) {
ac1b714e
AK
2003 page_offset <<= 1; /* 32->64 */
2004 /*
2005 * A 32-bit pde maps 4MB while the shadow pdes map
2006 * only 2MB. So we need to double the offset again
2007 * and zap two pdes instead of one.
2008 */
2009 if (level == PT32_ROOT_LEVEL) {
6b8d0f9b 2010 page_offset &= ~7; /* kill rounding error */
ac1b714e
AK
2011 page_offset <<= 1;
2012 npte = 2;
2013 }
fce0657f 2014 quadrant = page_offset >> PAGE_SHIFT;
9b7a0325 2015 page_offset &= ~PAGE_MASK;
4db35314 2016 if (quadrant != sp->role.quadrant)
fce0657f 2017 continue;
9b7a0325 2018 }
4db35314 2019 spte = &sp->spt[page_offset / sizeof(*spte)];
489f1d65
DE
2020 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2021 gentry = 0;
2022 r = kvm_read_guest_atomic(vcpu->kvm,
2023 gpa & ~(u64)(pte_size - 1),
2024 &gentry, pte_size);
2025 new = (const void *)&gentry;
2026 if (r < 0)
2027 new = NULL;
2028 }
ac1b714e 2029 while (npte--) {
79539cec 2030 entry = *spte;
4db35314 2031 mmu_pte_write_zap_pte(vcpu, sp, spte);
489f1d65
DE
2032 if (new)
2033 mmu_pte_write_new_pte(vcpu, sp, spte, new);
79539cec 2034 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
ac1b714e 2035 ++spte;
9b7a0325 2036 }
9b7a0325 2037 }
c7addb90 2038 kvm_mmu_audit(vcpu, "post pte write");
aaee2c94 2039 spin_unlock(&vcpu->kvm->mmu_lock);
35149e21
AL
2040 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2041 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2042 vcpu->arch.update_pte.pfn = bad_pfn;
d7824fff 2043 }
da4a00f0
AK
2044}
2045
a436036b
AK
2046int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2047{
10589a46
MT
2048 gpa_t gpa;
2049 int r;
a436036b 2050
10589a46 2051 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
10589a46 2052
aaee2c94 2053 spin_lock(&vcpu->kvm->mmu_lock);
10589a46 2054 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
aaee2c94 2055 spin_unlock(&vcpu->kvm->mmu_lock);
10589a46 2056 return r;
a436036b 2057}
577bdc49 2058EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
a436036b 2059
22d95b12 2060void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
ebeace86 2061{
f05e70ac 2062 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
4db35314 2063 struct kvm_mmu_page *sp;
ebeace86 2064
f05e70ac 2065 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
4db35314
AK
2066 struct kvm_mmu_page, link);
2067 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 2068 ++vcpu->kvm->stat.mmu_recycled;
ebeace86
AK
2069 }
2070}
ebeace86 2071
3067714c
AK
2072int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2073{
2074 int r;
2075 enum emulation_result er;
2076
ad312c7c 2077 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
3067714c
AK
2078 if (r < 0)
2079 goto out;
2080
2081 if (!r) {
2082 r = 1;
2083 goto out;
2084 }
2085
b733bfb5
AK
2086 r = mmu_topup_memory_caches(vcpu);
2087 if (r)
2088 goto out;
2089
3067714c 2090 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
3067714c
AK
2091
2092 switch (er) {
2093 case EMULATE_DONE:
2094 return 1;
2095 case EMULATE_DO_MMIO:
2096 ++vcpu->stat.mmio_exits;
2097 return 0;
2098 case EMULATE_FAIL:
2099 kvm_report_emulation_failure(vcpu, "pagetable");
2100 return 1;
2101 default:
2102 BUG();
2103 }
2104out:
3067714c
AK
2105 return r;
2106}
2107EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2108
a7052897
MT
2109void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2110{
2111 spin_lock(&vcpu->kvm->mmu_lock);
2112 vcpu->arch.mmu.invlpg(vcpu, gva);
2113 spin_unlock(&vcpu->kvm->mmu_lock);
2114 kvm_mmu_flush_tlb(vcpu);
2115 ++vcpu->stat.invlpg;
2116}
2117EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2118
18552672
JR
2119void kvm_enable_tdp(void)
2120{
2121 tdp_enabled = true;
2122}
2123EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2124
5f4cb662
JR
2125void kvm_disable_tdp(void)
2126{
2127 tdp_enabled = false;
2128}
2129EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2130
6aa8b732
AK
2131static void free_mmu_pages(struct kvm_vcpu *vcpu)
2132{
4db35314 2133 struct kvm_mmu_page *sp;
6aa8b732 2134
f05e70ac
ZX
2135 while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2136 sp = container_of(vcpu->kvm->arch.active_mmu_pages.next,
4db35314
AK
2137 struct kvm_mmu_page, link);
2138 kvm_mmu_zap_page(vcpu->kvm, sp);
8d2d73b9 2139 cond_resched();
f51234c2 2140 }
ad312c7c 2141 free_page((unsigned long)vcpu->arch.mmu.pae_root);
6aa8b732
AK
2142}
2143
2144static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2145{
17ac10ad 2146 struct page *page;
6aa8b732
AK
2147 int i;
2148
2149 ASSERT(vcpu);
2150
f05e70ac
ZX
2151 if (vcpu->kvm->arch.n_requested_mmu_pages)
2152 vcpu->kvm->arch.n_free_mmu_pages =
2153 vcpu->kvm->arch.n_requested_mmu_pages;
82ce2c96 2154 else
f05e70ac
ZX
2155 vcpu->kvm->arch.n_free_mmu_pages =
2156 vcpu->kvm->arch.n_alloc_mmu_pages;
17ac10ad
AK
2157 /*
2158 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2159 * Therefore we need to allocate shadow page tables in the first
2160 * 4GB of memory, which happens to fit the DMA32 zone.
2161 */
2162 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2163 if (!page)
2164 goto error_1;
ad312c7c 2165 vcpu->arch.mmu.pae_root = page_address(page);
17ac10ad 2166 for (i = 0; i < 4; ++i)
ad312c7c 2167 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
17ac10ad 2168
6aa8b732
AK
2169 return 0;
2170
2171error_1:
2172 free_mmu_pages(vcpu);
2173 return -ENOMEM;
2174}
2175
8018c27b 2176int kvm_mmu_create(struct kvm_vcpu *vcpu)
6aa8b732 2177{
6aa8b732 2178 ASSERT(vcpu);
ad312c7c 2179 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
6aa8b732 2180
8018c27b
IM
2181 return alloc_mmu_pages(vcpu);
2182}
6aa8b732 2183
8018c27b
IM
2184int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2185{
2186 ASSERT(vcpu);
ad312c7c 2187 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2c264957 2188
8018c27b 2189 return init_kvm_mmu(vcpu);
6aa8b732
AK
2190}
2191
2192void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2193{
2194 ASSERT(vcpu);
2195
2196 destroy_kvm_mmu(vcpu);
2197 free_mmu_pages(vcpu);
714b93da 2198 mmu_free_memory_caches(vcpu);
6aa8b732
AK
2199}
2200
90cb0529 2201void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
6aa8b732 2202{
4db35314 2203 struct kvm_mmu_page *sp;
6aa8b732 2204
2245a28f 2205 spin_lock(&kvm->mmu_lock);
f05e70ac 2206 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
6aa8b732
AK
2207 int i;
2208 u64 *pt;
2209
4db35314 2210 if (!test_bit(slot, &sp->slot_bitmap))
6aa8b732
AK
2211 continue;
2212
4db35314 2213 pt = sp->spt;
6aa8b732
AK
2214 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2215 /* avoid RMW */
9647c14c 2216 if (pt[i] & PT_WRITABLE_MASK)
6aa8b732 2217 pt[i] &= ~PT_WRITABLE_MASK;
6aa8b732 2218 }
171d595d 2219 kvm_flush_remote_tlbs(kvm);
2245a28f 2220 spin_unlock(&kvm->mmu_lock);
6aa8b732 2221}
37a7d8b0 2222
90cb0529 2223void kvm_mmu_zap_all(struct kvm *kvm)
e0fa826f 2224{
4db35314 2225 struct kvm_mmu_page *sp, *node;
e0fa826f 2226
aaee2c94 2227 spin_lock(&kvm->mmu_lock);
f05e70ac 2228 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
4db35314 2229 kvm_mmu_zap_page(kvm, sp);
aaee2c94 2230 spin_unlock(&kvm->mmu_lock);
e0fa826f 2231
90cb0529 2232 kvm_flush_remote_tlbs(kvm);
e0fa826f
DL
2233}
2234
8b2cf73c 2235static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
3ee16c81
IE
2236{
2237 struct kvm_mmu_page *page;
2238
2239 page = container_of(kvm->arch.active_mmu_pages.prev,
2240 struct kvm_mmu_page, link);
2241 kvm_mmu_zap_page(kvm, page);
2242}
2243
2244static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2245{
2246 struct kvm *kvm;
2247 struct kvm *kvm_freed = NULL;
2248 int cache_count = 0;
2249
2250 spin_lock(&kvm_lock);
2251
2252 list_for_each_entry(kvm, &vm_list, vm_list) {
2253 int npages;
2254
5a4c9288
MT
2255 if (!down_read_trylock(&kvm->slots_lock))
2256 continue;
3ee16c81
IE
2257 spin_lock(&kvm->mmu_lock);
2258 npages = kvm->arch.n_alloc_mmu_pages -
2259 kvm->arch.n_free_mmu_pages;
2260 cache_count += npages;
2261 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2262 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2263 cache_count--;
2264 kvm_freed = kvm;
2265 }
2266 nr_to_scan--;
2267
2268 spin_unlock(&kvm->mmu_lock);
5a4c9288 2269 up_read(&kvm->slots_lock);
3ee16c81
IE
2270 }
2271 if (kvm_freed)
2272 list_move_tail(&kvm_freed->vm_list, &vm_list);
2273
2274 spin_unlock(&kvm_lock);
2275
2276 return cache_count;
2277}
2278
2279static struct shrinker mmu_shrinker = {
2280 .shrink = mmu_shrink,
2281 .seeks = DEFAULT_SEEKS * 10,
2282};
2283
2ddfd20e 2284static void mmu_destroy_caches(void)
b5a33a75
AK
2285{
2286 if (pte_chain_cache)
2287 kmem_cache_destroy(pte_chain_cache);
2288 if (rmap_desc_cache)
2289 kmem_cache_destroy(rmap_desc_cache);
d3d25b04
AK
2290 if (mmu_page_header_cache)
2291 kmem_cache_destroy(mmu_page_header_cache);
b5a33a75
AK
2292}
2293
3ee16c81
IE
2294void kvm_mmu_module_exit(void)
2295{
2296 mmu_destroy_caches();
2297 unregister_shrinker(&mmu_shrinker);
2298}
2299
b5a33a75
AK
2300int kvm_mmu_module_init(void)
2301{
2302 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2303 sizeof(struct kvm_pte_chain),
20c2df83 2304 0, 0, NULL);
b5a33a75
AK
2305 if (!pte_chain_cache)
2306 goto nomem;
2307 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2308 sizeof(struct kvm_rmap_desc),
20c2df83 2309 0, 0, NULL);
b5a33a75
AK
2310 if (!rmap_desc_cache)
2311 goto nomem;
2312
d3d25b04
AK
2313 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2314 sizeof(struct kvm_mmu_page),
20c2df83 2315 0, 0, NULL);
d3d25b04
AK
2316 if (!mmu_page_header_cache)
2317 goto nomem;
2318
3ee16c81
IE
2319 register_shrinker(&mmu_shrinker);
2320
b5a33a75
AK
2321 return 0;
2322
2323nomem:
3ee16c81 2324 mmu_destroy_caches();
b5a33a75
AK
2325 return -ENOMEM;
2326}
2327
3ad82a7e
ZX
2328/*
2329 * Caculate mmu pages needed for kvm.
2330 */
2331unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
2332{
2333 int i;
2334 unsigned int nr_mmu_pages;
2335 unsigned int nr_pages = 0;
2336
2337 for (i = 0; i < kvm->nmemslots; i++)
2338 nr_pages += kvm->memslots[i].npages;
2339
2340 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
2341 nr_mmu_pages = max(nr_mmu_pages,
2342 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
2343
2344 return nr_mmu_pages;
2345}
2346
2f333bcb
MT
2347static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2348 unsigned len)
2349{
2350 if (len > buffer->len)
2351 return NULL;
2352 return buffer->ptr;
2353}
2354
2355static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2356 unsigned len)
2357{
2358 void *ret;
2359
2360 ret = pv_mmu_peek_buffer(buffer, len);
2361 if (!ret)
2362 return ret;
2363 buffer->ptr += len;
2364 buffer->len -= len;
2365 buffer->processed += len;
2366 return ret;
2367}
2368
2369static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
2370 gpa_t addr, gpa_t value)
2371{
2372 int bytes = 8;
2373 int r;
2374
2375 if (!is_long_mode(vcpu) && !is_pae(vcpu))
2376 bytes = 4;
2377
2378 r = mmu_topup_memory_caches(vcpu);
2379 if (r)
2380 return r;
2381
3200f405 2382 if (!emulator_write_phys(vcpu, addr, &value, bytes))
2f333bcb
MT
2383 return -EFAULT;
2384
2385 return 1;
2386}
2387
2388static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2389{
2390 kvm_x86_ops->tlb_flush(vcpu);
2391 return 1;
2392}
2393
2394static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
2395{
2396 spin_lock(&vcpu->kvm->mmu_lock);
2397 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
2398 spin_unlock(&vcpu->kvm->mmu_lock);
2399 return 1;
2400}
2401
2402static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
2403 struct kvm_pv_mmu_op_buffer *buffer)
2404{
2405 struct kvm_mmu_op_header *header;
2406
2407 header = pv_mmu_peek_buffer(buffer, sizeof *header);
2408 if (!header)
2409 return 0;
2410 switch (header->op) {
2411 case KVM_MMU_OP_WRITE_PTE: {
2412 struct kvm_mmu_op_write_pte *wpte;
2413
2414 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
2415 if (!wpte)
2416 return 0;
2417 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
2418 wpte->pte_val);
2419 }
2420 case KVM_MMU_OP_FLUSH_TLB: {
2421 struct kvm_mmu_op_flush_tlb *ftlb;
2422
2423 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
2424 if (!ftlb)
2425 return 0;
2426 return kvm_pv_mmu_flush_tlb(vcpu);
2427 }
2428 case KVM_MMU_OP_RELEASE_PT: {
2429 struct kvm_mmu_op_release_pt *rpt;
2430
2431 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
2432 if (!rpt)
2433 return 0;
2434 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
2435 }
2436 default: return 0;
2437 }
2438}
2439
2440int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
2441 gpa_t addr, unsigned long *ret)
2442{
2443 int r;
6ad18fba 2444 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
2f333bcb 2445
6ad18fba
DH
2446 buffer->ptr = buffer->buf;
2447 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
2448 buffer->processed = 0;
2f333bcb 2449
6ad18fba 2450 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
2f333bcb
MT
2451 if (r)
2452 goto out;
2453
6ad18fba
DH
2454 while (buffer->len) {
2455 r = kvm_pv_mmu_op_one(vcpu, buffer);
2f333bcb
MT
2456 if (r < 0)
2457 goto out;
2458 if (r == 0)
2459 break;
2460 }
2461
2462 r = 1;
2463out:
6ad18fba 2464 *ret = buffer->processed;
2f333bcb
MT
2465 return r;
2466}
2467
37a7d8b0
AK
2468#ifdef AUDIT
2469
2470static const char *audit_msg;
2471
2472static gva_t canonicalize(gva_t gva)
2473{
2474#ifdef CONFIG_X86_64
2475 gva = (long long)(gva << 16) >> 16;
2476#endif
2477 return gva;
2478}
2479
2480static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
2481 gva_t va, int level)
2482{
2483 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
2484 int i;
2485 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
2486
2487 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
2488 u64 ent = pt[i];
2489
c7addb90 2490 if (ent == shadow_trap_nonpresent_pte)
37a7d8b0
AK
2491 continue;
2492
2493 va = canonicalize(va);
c7addb90
AK
2494 if (level > 1) {
2495 if (ent == shadow_notrap_nonpresent_pte)
2496 printk(KERN_ERR "audit: (%s) nontrapping pte"
2497 " in nonleaf level: levels %d gva %lx"
2498 " level %d pte %llx\n", audit_msg,
ad312c7c 2499 vcpu->arch.mmu.root_level, va, level, ent);
c7addb90 2500
37a7d8b0 2501 audit_mappings_page(vcpu, ent, va, level - 1);
c7addb90 2502 } else {
ad312c7c 2503 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
35149e21 2504 hpa_t hpa = (hpa_t)gpa_to_pfn(vcpu, gpa) << PAGE_SHIFT;
37a7d8b0 2505
c7addb90 2506 if (is_shadow_present_pte(ent)
37a7d8b0 2507 && (ent & PT64_BASE_ADDR_MASK) != hpa)
c7addb90
AK
2508 printk(KERN_ERR "xx audit error: (%s) levels %d"
2509 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
ad312c7c 2510 audit_msg, vcpu->arch.mmu.root_level,
d77c26fc
MD
2511 va, gpa, hpa, ent,
2512 is_shadow_present_pte(ent));
c7addb90
AK
2513 else if (ent == shadow_notrap_nonpresent_pte
2514 && !is_error_hpa(hpa))
2515 printk(KERN_ERR "audit: (%s) notrap shadow,"
2516 " valid guest gva %lx\n", audit_msg, va);
35149e21 2517 kvm_release_pfn_clean(pfn);
c7addb90 2518
37a7d8b0
AK
2519 }
2520 }
2521}
2522
2523static void audit_mappings(struct kvm_vcpu *vcpu)
2524{
1ea252af 2525 unsigned i;
37a7d8b0 2526
ad312c7c
ZX
2527 if (vcpu->arch.mmu.root_level == 4)
2528 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
37a7d8b0
AK
2529 else
2530 for (i = 0; i < 4; ++i)
ad312c7c 2531 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
37a7d8b0 2532 audit_mappings_page(vcpu,
ad312c7c 2533 vcpu->arch.mmu.pae_root[i],
37a7d8b0
AK
2534 i << 30,
2535 2);
2536}
2537
2538static int count_rmaps(struct kvm_vcpu *vcpu)
2539{
2540 int nmaps = 0;
2541 int i, j, k;
2542
2543 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
2544 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
2545 struct kvm_rmap_desc *d;
2546
2547 for (j = 0; j < m->npages; ++j) {
290fc38d 2548 unsigned long *rmapp = &m->rmap[j];
37a7d8b0 2549
290fc38d 2550 if (!*rmapp)
37a7d8b0 2551 continue;
290fc38d 2552 if (!(*rmapp & 1)) {
37a7d8b0
AK
2553 ++nmaps;
2554 continue;
2555 }
290fc38d 2556 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
37a7d8b0
AK
2557 while (d) {
2558 for (k = 0; k < RMAP_EXT; ++k)
2559 if (d->shadow_ptes[k])
2560 ++nmaps;
2561 else
2562 break;
2563 d = d->more;
2564 }
2565 }
2566 }
2567 return nmaps;
2568}
2569
2570static int count_writable_mappings(struct kvm_vcpu *vcpu)
2571{
2572 int nmaps = 0;
4db35314 2573 struct kvm_mmu_page *sp;
37a7d8b0
AK
2574 int i;
2575
f05e70ac 2576 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 2577 u64 *pt = sp->spt;
37a7d8b0 2578
4db35314 2579 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
37a7d8b0
AK
2580 continue;
2581
2582 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
2583 u64 ent = pt[i];
2584
2585 if (!(ent & PT_PRESENT_MASK))
2586 continue;
2587 if (!(ent & PT_WRITABLE_MASK))
2588 continue;
2589 ++nmaps;
2590 }
2591 }
2592 return nmaps;
2593}
2594
2595static void audit_rmap(struct kvm_vcpu *vcpu)
2596{
2597 int n_rmap = count_rmaps(vcpu);
2598 int n_actual = count_writable_mappings(vcpu);
2599
2600 if (n_rmap != n_actual)
2601 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
b8688d51 2602 __func__, audit_msg, n_rmap, n_actual);
37a7d8b0
AK
2603}
2604
2605static void audit_write_protection(struct kvm_vcpu *vcpu)
2606{
4db35314 2607 struct kvm_mmu_page *sp;
290fc38d
IE
2608 struct kvm_memory_slot *slot;
2609 unsigned long *rmapp;
2610 gfn_t gfn;
37a7d8b0 2611
f05e70ac 2612 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
4db35314 2613 if (sp->role.metaphysical)
37a7d8b0
AK
2614 continue;
2615
4db35314
AK
2616 slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
2617 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
290fc38d
IE
2618 rmapp = &slot->rmap[gfn - slot->base_gfn];
2619 if (*rmapp)
37a7d8b0
AK
2620 printk(KERN_ERR "%s: (%s) shadow page has writable"
2621 " mappings: gfn %lx role %x\n",
b8688d51 2622 __func__, audit_msg, sp->gfn,
4db35314 2623 sp->role.word);
37a7d8b0
AK
2624 }
2625}
2626
2627static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
2628{
2629 int olddbg = dbg;
2630
2631 dbg = 0;
2632 audit_msg = msg;
2633 audit_rmap(vcpu);
2634 audit_write_protection(vcpu);
2635 audit_mappings(vcpu);
2636 dbg = olddbg;
2637}
2638
2639#endif
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