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KVM: x86 emulator: make register_address_increment and JMP_REL static inlines
[deliverable/linux.git] / arch / x86 / kvm / x86.c
CommitLineData
043405e1
CO		 1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * derived from drivers/kvm/kvm_main.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 *
8 * Authors:
9 * Avi Kivity <avi@qumranet.com>
10 * Yaniv Kamay <yaniv@qumranet.com>
11 *
12 * This work is licensed under the terms of the GNU GPL, version 2. See
13 * the COPYING file in the top-level directory.
14 *
15 */
16
edf88417 17#include <linux/kvm_host.h>
5fb76f9b 18#include "segment_descriptor.h"
313a3dc7 19#include "irq.h"
1d737c8a 20#include "mmu.h"
313a3dc7 21
18068523 22#include <linux/clocksource.h>
313a3dc7
CO		 23#include <linux/kvm.h>
24#include <linux/fs.h>
25#include <linux/vmalloc.h>
5fb76f9b 26#include <linux/module.h>
0de10343 27#include <linux/mman.h>
2bacc55c 28#include <linux/highmem.h>
043405e1
CO		 29
30#include <asm/uaccess.h>
d825ed0a 31#include <asm/msr.h>
043405e1 32
313a3dc7 33#define MAX_IO_MSRS 256
a03490ed
CO		 34#define CR0_RESERVED_BITS \
35 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
36 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
37 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
38#define CR4_RESERVED_BITS \
39 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
40 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
41 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
42 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
43
44#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
50a37eb4
JR		 45/* EFER defaults:
46 * - enable syscall per default because its emulated by KVM
47 * - enable LME and LMA per default on 64 bit KVM
48 */
49#ifdef CONFIG_X86_64
50static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
51#else
52static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
53#endif
313a3dc7 54
ba1389b7
AK		 55#define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
56#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
417bc304 57
674eea0f
AK		 58static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
59 struct kvm_cpuid_entry2 __user *entries);
60
97896d04
ZX		 61struct kvm_x86_ops *kvm_x86_ops;
62
417bc304 63struct kvm_stats_debugfs_item debugfs_entries[] = {
ba1389b7
AK		 64 { "pf_fixed", VCPU_STAT(pf_fixed) },
65 { "pf_guest", VCPU_STAT(pf_guest) },
66 { "tlb_flush", VCPU_STAT(tlb_flush) },
67 { "invlpg", VCPU_STAT(invlpg) },
68 { "exits", VCPU_STAT(exits) },
69 { "io_exits", VCPU_STAT(io_exits) },
70 { "mmio_exits", VCPU_STAT(mmio_exits) },
71 { "signal_exits", VCPU_STAT(signal_exits) },
72 { "irq_window", VCPU_STAT(irq_window_exits) },
73 { "halt_exits", VCPU_STAT(halt_exits) },
74 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
75 { "request_irq", VCPU_STAT(request_irq_exits) },
76 { "irq_exits", VCPU_STAT(irq_exits) },
77 { "host_state_reload", VCPU_STAT(host_state_reload) },
78 { "efer_reload", VCPU_STAT(efer_reload) },
79 { "fpu_reload", VCPU_STAT(fpu_reload) },
80 { "insn_emulation", VCPU_STAT(insn_emulation) },
81 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
4cee5764
AK		 82 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
83 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
84 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
85 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
86 { "mmu_flooded", VM_STAT(mmu_flooded) },
87 { "mmu_recycled", VM_STAT(mmu_recycled) },
dfc5aa00 88 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
0f74a24c 89 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
417bc304
HB		 90 { NULL }
91};
92
93
5fb76f9b
CO		 94unsigned long segment_base(u16 selector)
95{
96 struct descriptor_table gdt;
97 struct segment_descriptor *d;
98 unsigned long table_base;
99 unsigned long v;
100
101 if (selector == 0)
102 return 0;
103
104 asm("sgdt %0" : "=m"(gdt));
105 table_base = gdt.base;
106
107 if (selector & 4) { /* from ldt */
108 u16 ldt_selector;
109
110 asm("sldt %0" : "=g"(ldt_selector));
111 table_base = segment_base(ldt_selector);
112 }
113 d = (struct segment_descriptor *)(table_base + (selector & ~7));
114 v = d->base_low | ((unsigned long)d->base_mid << 16) |
115 ((unsigned long)d->base_high << 24);
116#ifdef CONFIG_X86_64
117 if (d->system == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
118 v |= ((unsigned long) \
119 ((struct segment_descriptor_64 *)d)->base_higher) << 32;
120#endif
121 return v;
122}
123EXPORT_SYMBOL_GPL(segment_base);
124
6866b83e
CO		 125u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
126{
127 if (irqchip_in_kernel(vcpu->kvm))
ad312c7c 128 return vcpu->arch.apic_base;
6866b83e 129 else
ad312c7c 130 return vcpu->arch.apic_base;
6866b83e
CO		 131}
132EXPORT_SYMBOL_GPL(kvm_get_apic_base);
133
134void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
135{
136 /* TODO: reserve bits check */
137 if (irqchip_in_kernel(vcpu->kvm))
138 kvm_lapic_set_base(vcpu, data);
139 else
ad312c7c 140 vcpu->arch.apic_base = data;
6866b83e
CO		 141}
142EXPORT_SYMBOL_GPL(kvm_set_apic_base);
143
298101da
AK		 144void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
145{
ad312c7c
ZX		 146 WARN_ON(vcpu->arch.exception.pending);
147 vcpu->arch.exception.pending = true;
148 vcpu->arch.exception.has_error_code = false;
149 vcpu->arch.exception.nr = nr;
298101da
AK		 150}
151EXPORT_SYMBOL_GPL(kvm_queue_exception);
152
c3c91fee
AK		 153void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
154 u32 error_code)
155{
156 ++vcpu->stat.pf_guest;
ad312c7c 157 if (vcpu->arch.exception.pending && vcpu->arch.exception.nr == PF_VECTOR) {
c3c91fee
AK		 158 printk(KERN_DEBUG "kvm: inject_page_fault:"
159 " double fault 0x%lx\n", addr);
ad312c7c
ZX		 160 vcpu->arch.exception.nr = DF_VECTOR;
161 vcpu->arch.exception.error_code = 0;
c3c91fee
AK		 162 return;
163 }
ad312c7c 164 vcpu->arch.cr2 = addr;
c3c91fee
AK		 165 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
166}
167
298101da
AK		 168void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
169{
ad312c7c
ZX		 170 WARN_ON(vcpu->arch.exception.pending);
171 vcpu->arch.exception.pending = true;
172 vcpu->arch.exception.has_error_code = true;
173 vcpu->arch.exception.nr = nr;
174 vcpu->arch.exception.error_code = error_code;
298101da
AK		 175}
176EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
177
178static void __queue_exception(struct kvm_vcpu *vcpu)
179{
ad312c7c
ZX		 180 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
181 vcpu->arch.exception.has_error_code,
182 vcpu->arch.exception.error_code);
298101da
AK		 183}
184
a03490ed
CO		 185/*
186 * Load the pae pdptrs. Return true is they are all valid.
187 */
188int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
189{
190 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
191 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
192 int i;
193 int ret;
ad312c7c 194 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
a03490ed 195
72dc67a6 196 down_read(&vcpu->kvm->slots_lock);
a03490ed
CO		 197 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
198 offset * sizeof(u64), sizeof(pdpte));
199 if (ret < 0) {
200 ret = 0;
201 goto out;
202 }
203 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
204 if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
205 ret = 0;
206 goto out;
207 }
208 }
209 ret = 1;
210
ad312c7c 211 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
a03490ed 212out:
72dc67a6 213 up_read(&vcpu->kvm->slots_lock);
a03490ed
CO		 214
215 return ret;
216}
cc4b6871 217EXPORT_SYMBOL_GPL(load_pdptrs);
a03490ed 218
d835dfec
AK		 219static bool pdptrs_changed(struct kvm_vcpu *vcpu)
220{
ad312c7c 221 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
d835dfec
AK		 222 bool changed = true;
223 int r;
224
225 if (is_long_mode(vcpu) || !is_pae(vcpu))
226 return false;
227
72dc67a6 228 down_read(&vcpu->kvm->slots_lock);
ad312c7c 229 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
d835dfec
AK		 230 if (r < 0)
231 goto out;
ad312c7c 232 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
d835dfec 233out:
72dc67a6 234 up_read(&vcpu->kvm->slots_lock);
d835dfec
AK		 235
236 return changed;
237}
238
a03490ed
CO		 239void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
240{
241 if (cr0 & CR0_RESERVED_BITS) {
242 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
ad312c7c 243 cr0, vcpu->arch.cr0);
c1a5d4f9 244 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 245 return;
246 }
247
248 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
249 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
c1a5d4f9 250 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 251 return;
252 }
253
254 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
255 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
256 "and a clear PE flag\n");
c1a5d4f9 257 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 258 return;
259 }
260
261 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
262#ifdef CONFIG_X86_64
ad312c7c 263 if ((vcpu->arch.shadow_efer & EFER_LME)) {
a03490ed
CO		 264 int cs_db, cs_l;
265
266 if (!is_pae(vcpu)) {
267 printk(KERN_DEBUG "set_cr0: #GP, start paging "
268 "in long mode while PAE is disabled\n");
c1a5d4f9 269 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 270 return;
271 }
272 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
273 if (cs_l) {
274 printk(KERN_DEBUG "set_cr0: #GP, start paging "
275 "in long mode while CS.L == 1\n");
c1a5d4f9 276 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 277 return;
278
279 }
280 } else
281#endif
ad312c7c 282 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
a03490ed
CO		 283 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
284 "reserved bits\n");
c1a5d4f9 285 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 286 return;
287 }
288
289 }
290
291 kvm_x86_ops->set_cr0(vcpu, cr0);
ad312c7c 292 vcpu->arch.cr0 = cr0;
a03490ed 293
a03490ed 294 kvm_mmu_reset_context(vcpu);
a03490ed
CO		 295 return;
296}
297EXPORT_SYMBOL_GPL(set_cr0);
298
299void lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
300{
ad312c7c 301 set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
a03490ed
CO		 302}
303EXPORT_SYMBOL_GPL(lmsw);
304
305void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
306{
307 if (cr4 & CR4_RESERVED_BITS) {
308 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
c1a5d4f9 309 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 310 return;
311 }
312
313 if (is_long_mode(vcpu)) {
314 if (!(cr4 & X86_CR4_PAE)) {
315 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
316 "in long mode\n");
c1a5d4f9 317 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 318 return;
319 }
320 } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
ad312c7c 321 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
a03490ed 322 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
c1a5d4f9 323 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 324 return;
325 }
326
327 if (cr4 & X86_CR4_VMXE) {
328 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
c1a5d4f9 329 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 330 return;
331 }
332 kvm_x86_ops->set_cr4(vcpu, cr4);
ad312c7c 333 vcpu->arch.cr4 = cr4;
a03490ed 334 kvm_mmu_reset_context(vcpu);
a03490ed
CO		 335}
336EXPORT_SYMBOL_GPL(set_cr4);
337
338void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
339{
ad312c7c 340 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
d835dfec
AK		 341 kvm_mmu_flush_tlb(vcpu);
342 return;
343 }
344
a03490ed
CO		 345 if (is_long_mode(vcpu)) {
346 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
347 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
c1a5d4f9 348 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 349 return;
350 }
351 } else {
352 if (is_pae(vcpu)) {
353 if (cr3 & CR3_PAE_RESERVED_BITS) {
354 printk(KERN_DEBUG
355 "set_cr3: #GP, reserved bits\n");
c1a5d4f9 356 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 357 return;
358 }
359 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
360 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
361 "reserved bits\n");
c1a5d4f9 362 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 363 return;
364 }
365 }
366 /*
367 * We don't check reserved bits in nonpae mode, because
368 * this isn't enforced, and VMware depends on this.
369 */
370 }
371
72dc67a6 372 down_read(&vcpu->kvm->slots_lock);
a03490ed
CO		 373 /*
374 * Does the new cr3 value map to physical memory? (Note, we
375 * catch an invalid cr3 even in real-mode, because it would
376 * cause trouble later on when we turn on paging anyway.)
377 *
378 * A real CPU would silently accept an invalid cr3 and would
379 * attempt to use it - with largely undefined (and often hard
380 * to debug) behavior on the guest side.
381 */
382 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
c1a5d4f9 383 kvm_inject_gp(vcpu, 0);
a03490ed 384 else {
ad312c7c
ZX		 385 vcpu->arch.cr3 = cr3;
386 vcpu->arch.mmu.new_cr3(vcpu);
a03490ed 387 }
72dc67a6 388 up_read(&vcpu->kvm->slots_lock);
a03490ed
CO		 389}
390EXPORT_SYMBOL_GPL(set_cr3);
391
392void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
393{
394 if (cr8 & CR8_RESERVED_BITS) {
395 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
c1a5d4f9 396 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 397 return;
398 }
399 if (irqchip_in_kernel(vcpu->kvm))
400 kvm_lapic_set_tpr(vcpu, cr8);
401 else
ad312c7c 402 vcpu->arch.cr8 = cr8;
a03490ed
CO		 403}
404EXPORT_SYMBOL_GPL(set_cr8);
405
406unsigned long get_cr8(struct kvm_vcpu *vcpu)
407{
408 if (irqchip_in_kernel(vcpu->kvm))
409 return kvm_lapic_get_cr8(vcpu);
410 else
ad312c7c 411 return vcpu->arch.cr8;
a03490ed
CO		 412}
413EXPORT_SYMBOL_GPL(get_cr8);
414
043405e1
CO		 415/*
416 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
417 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
418 *
419 * This list is modified at module load time to reflect the
420 * capabilities of the host cpu.
421 */
422static u32 msrs_to_save[] = {
423 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
424 MSR_K6_STAR,
425#ifdef CONFIG_X86_64
426 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
427#endif
18068523 428 MSR_IA32_TIME_STAMP_COUNTER, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
043405e1
CO		 429};
430
431static unsigned num_msrs_to_save;
432
433static u32 emulated_msrs[] = {
434 MSR_IA32_MISC_ENABLE,
435};
436
15c4a640
CO		 437static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
438{
f2b4b7dd 439 if (efer & efer_reserved_bits) {
15c4a640
CO		 440 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
441 efer);
c1a5d4f9 442 kvm_inject_gp(vcpu, 0);
15c4a640
CO		 443 return;
444 }
445
446 if (is_paging(vcpu)
ad312c7c 447 && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
15c4a640 448 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
c1a5d4f9 449 kvm_inject_gp(vcpu, 0);
15c4a640
CO		 450 return;
451 }
452
453 kvm_x86_ops->set_efer(vcpu, efer);
454
455 efer &= ~EFER_LMA;
ad312c7c 456 efer |= vcpu->arch.shadow_efer & EFER_LMA;
15c4a640 457
ad312c7c 458 vcpu->arch.shadow_efer = efer;
15c4a640
CO		 459}
460
f2b4b7dd
JR		 461void kvm_enable_efer_bits(u64 mask)
462{
463 efer_reserved_bits &= ~mask;
464}
465EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
466
467
15c4a640
CO		 468/*
469 * Writes msr value into into the appropriate "register".
470 * Returns 0 on success, non-0 otherwise.
471 * Assumes vcpu_load() was already called.
472 */
473int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
474{
475 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
476}
477
313a3dc7
CO		 478/*
479 * Adapt set_msr() to msr_io()'s calling convention
480 */
481static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
482{
483 return kvm_set_msr(vcpu, index, *data);
484}
485
18068523
GOC		 486static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
487{
488 static int version;
489 struct kvm_wall_clock wc;
490 struct timespec wc_ts;
491
492 if (!wall_clock)
493 return;
494
495 version++;
496
497 down_read(&kvm->slots_lock);
498 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
499
500 wc_ts = current_kernel_time();
501 wc.wc_sec = wc_ts.tv_sec;
502 wc.wc_nsec = wc_ts.tv_nsec;
503 wc.wc_version = version;
504
505 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
506
507 version++;
508 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
509 up_read(&kvm->slots_lock);
510}
511
512static void kvm_write_guest_time(struct kvm_vcpu *v)
513{
514 struct timespec ts;
515 unsigned long flags;
516 struct kvm_vcpu_arch *vcpu = &v->arch;
517 void *shared_kaddr;
518
519 if ((!vcpu->time_page))
520 return;
521
522 /* Keep irq disabled to prevent changes to the clock */
523 local_irq_save(flags);
524 kvm_get_msr(v, MSR_IA32_TIME_STAMP_COUNTER,
525 &vcpu->hv_clock.tsc_timestamp);
526 ktime_get_ts(&ts);
527 local_irq_restore(flags);
528
529 /* With all the info we got, fill in the values */
530
531 vcpu->hv_clock.system_time = ts.tv_nsec +
532 (NSEC_PER_SEC * (u64)ts.tv_sec);
533 /*
534 * The interface expects us to write an even number signaling that the
535 * update is finished. Since the guest won't see the intermediate
536 * state, we just write "2" at the end
537 */
538 vcpu->hv_clock.version = 2;
539
540 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
541
542 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
543 sizeof(vcpu->hv_clock));
544
545 kunmap_atomic(shared_kaddr, KM_USER0);
546
547 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
548}
549
15c4a640
CO		 550
551int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
552{
553 switch (msr) {
15c4a640
CO		 554 case MSR_EFER:
555 set_efer(vcpu, data);
556 break;
15c4a640
CO		 557 case MSR_IA32_MC0_STATUS:
558 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
559 __FUNCTION__, data);
560 break;
561 case MSR_IA32_MCG_STATUS:
562 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
563 __FUNCTION__, data);
564 break;
c7ac679c
JR		 565 case MSR_IA32_MCG_CTL:
566 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
567 __FUNCTION__, data);
568 break;
15c4a640
CO		 569 case MSR_IA32_UCODE_REV:
570 case MSR_IA32_UCODE_WRITE:
571 case 0x200 ... 0x2ff: /* MTRRs */
572 break;
573 case MSR_IA32_APICBASE:
574 kvm_set_apic_base(vcpu, data);
575 break;
576 case MSR_IA32_MISC_ENABLE:
ad312c7c 577 vcpu->arch.ia32_misc_enable_msr = data;
15c4a640 578 break;
18068523
GOC		 579 case MSR_KVM_WALL_CLOCK:
580 vcpu->kvm->arch.wall_clock = data;
581 kvm_write_wall_clock(vcpu->kvm, data);
582 break;
583 case MSR_KVM_SYSTEM_TIME: {
584 if (vcpu->arch.time_page) {
585 kvm_release_page_dirty(vcpu->arch.time_page);
586 vcpu->arch.time_page = NULL;
587 }
588
589 vcpu->arch.time = data;
590
591 /* we verify if the enable bit is set... */
592 if (!(data & 1))
593 break;
594
595 /* ...but clean it before doing the actual write */
596 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
597
598 vcpu->arch.hv_clock.tsc_to_system_mul =
599 clocksource_khz2mult(tsc_khz, 22);
600 vcpu->arch.hv_clock.tsc_shift = 22;
601
602 down_read(&current->mm->mmap_sem);
603 down_read(&vcpu->kvm->slots_lock);
604 vcpu->arch.time_page =
605 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
606 up_read(&vcpu->kvm->slots_lock);
607 up_read(&current->mm->mmap_sem);
608
609 if (is_error_page(vcpu->arch.time_page)) {
610 kvm_release_page_clean(vcpu->arch.time_page);
611 vcpu->arch.time_page = NULL;
612 }
613
614 kvm_write_guest_time(vcpu);
615 break;
616 }
15c4a640 617 default:
565f1fbd 618 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
15c4a640
CO		 619 return 1;
620 }
621 return 0;
622}
623EXPORT_SYMBOL_GPL(kvm_set_msr_common);
624
625
626/*
627 * Reads an msr value (of 'msr_index') into 'pdata'.
628 * Returns 0 on success, non-0 otherwise.
629 * Assumes vcpu_load() was already called.
630 */
631int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
632{
633 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
634}
635
636int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
637{
638 u64 data;
639
640 switch (msr) {
641 case 0xc0010010: /* SYSCFG */
642 case 0xc0010015: /* HWCR */
643 case MSR_IA32_PLATFORM_ID:
644 case MSR_IA32_P5_MC_ADDR:
645 case MSR_IA32_P5_MC_TYPE:
646 case MSR_IA32_MC0_CTL:
647 case MSR_IA32_MCG_STATUS:
648 case MSR_IA32_MCG_CAP:
c7ac679c 649 case MSR_IA32_MCG_CTL:
15c4a640
CO		 650 case MSR_IA32_MC0_MISC:
651 case MSR_IA32_MC0_MISC+4:
652 case MSR_IA32_MC0_MISC+8:
653 case MSR_IA32_MC0_MISC+12:
654 case MSR_IA32_MC0_MISC+16:
655 case MSR_IA32_UCODE_REV:
656 case MSR_IA32_PERF_STATUS:
657 case MSR_IA32_EBL_CR_POWERON:
658 /* MTRR registers */
659 case 0xfe:
660 case 0x200 ... 0x2ff:
661 data = 0;
662 break;
663 case 0xcd: /* fsb frequency */
664 data = 3;
665 break;
666 case MSR_IA32_APICBASE:
667 data = kvm_get_apic_base(vcpu);
668 break;
669 case MSR_IA32_MISC_ENABLE:
ad312c7c 670 data = vcpu->arch.ia32_misc_enable_msr;
15c4a640 671 break;
15c4a640 672 case MSR_EFER:
ad312c7c 673 data = vcpu->arch.shadow_efer;
15c4a640 674 break;
18068523
GOC		 675 case MSR_KVM_WALL_CLOCK:
676 data = vcpu->kvm->arch.wall_clock;
677 break;
678 case MSR_KVM_SYSTEM_TIME:
679 data = vcpu->arch.time;
680 break;
15c4a640
CO		 681 default:
682 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
683 return 1;
684 }
685 *pdata = data;
686 return 0;
687}
688EXPORT_SYMBOL_GPL(kvm_get_msr_common);
689
313a3dc7
CO		 690/*
691 * Read or write a bunch of msrs. All parameters are kernel addresses.
692 *
693 * @return number of msrs set successfully.
694 */
695static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
696 struct kvm_msr_entry *entries,
697 int (*do_msr)(struct kvm_vcpu *vcpu,
698 unsigned index, u64 *data))
699{
700 int i;
701
702 vcpu_load(vcpu);
703
704 for (i = 0; i < msrs->nmsrs; ++i)
705 if (do_msr(vcpu, entries[i].index, &entries[i].data))
706 break;
707
708 vcpu_put(vcpu);
709
710 return i;
711}
712
713/*
714 * Read or write a bunch of msrs. Parameters are user addresses.
715 *
716 * @return number of msrs set successfully.
717 */
718static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
719 int (*do_msr)(struct kvm_vcpu *vcpu,
720 unsigned index, u64 *data),
721 int writeback)
722{
723 struct kvm_msrs msrs;
724 struct kvm_msr_entry *entries;
725 int r, n;
726 unsigned size;
727
728 r = -EFAULT;
729 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
730 goto out;
731
732 r = -E2BIG;
733 if (msrs.nmsrs >= MAX_IO_MSRS)
734 goto out;
735
736 r = -ENOMEM;
737 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
738 entries = vmalloc(size);
739 if (!entries)
740 goto out;
741
742 r = -EFAULT;
743 if (copy_from_user(entries, user_msrs->entries, size))
744 goto out_free;
745
746 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
747 if (r < 0)
748 goto out_free;
749
750 r = -EFAULT;
751 if (writeback && copy_to_user(user_msrs->entries, entries, size))
752 goto out_free;
753
754 r = n;
755
756out_free:
757 vfree(entries);
758out:
759 return r;
760}
761
e9b11c17
ZX		 762/*
763 * Make sure that a cpu that is being hot-unplugged does not have any vcpus
764 * cached on it.
765 */
766void decache_vcpus_on_cpu(int cpu)
767{
768 struct kvm *vm;
769 struct kvm_vcpu *vcpu;
770 int i;
771
772 spin_lock(&kvm_lock);
773 list_for_each_entry(vm, &vm_list, vm_list)
774 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
775 vcpu = vm->vcpus[i];
776 if (!vcpu)
777 continue;
778 /*
779 * If the vcpu is locked, then it is running on some
780 * other cpu and therefore it is not cached on the
781 * cpu in question.
782 *
783 * If it's not locked, check the last cpu it executed
784 * on.
785 */
786 if (mutex_trylock(&vcpu->mutex)) {
787 if (vcpu->cpu == cpu) {
788 kvm_x86_ops->vcpu_decache(vcpu);
789 vcpu->cpu = -1;
790 }
791 mutex_unlock(&vcpu->mutex);
792 }
793 }
794 spin_unlock(&kvm_lock);
795}
796
018d00d2
ZX		 797int kvm_dev_ioctl_check_extension(long ext)
798{
799 int r;
800
801 switch (ext) {
802 case KVM_CAP_IRQCHIP:
803 case KVM_CAP_HLT:
804 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
805 case KVM_CAP_USER_MEMORY:
806 case KVM_CAP_SET_TSS_ADDR:
07716717 807 case KVM_CAP_EXT_CPUID:
18068523 808 case KVM_CAP_CLOCKSOURCE:
018d00d2
ZX		 809 r = 1;
810 break;
774ead3a
AK		 811 case KVM_CAP_VAPIC:
812 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
813 break;
018d00d2
ZX		 814 default:
815 r = 0;
816 break;
817 }
818 return r;
819
820}
821
043405e1
CO		 822long kvm_arch_dev_ioctl(struct file *filp,
823 unsigned int ioctl, unsigned long arg)
824{
825 void __user *argp = (void __user *)arg;
826 long r;
827
828 switch (ioctl) {
829 case KVM_GET_MSR_INDEX_LIST: {
830 struct kvm_msr_list __user *user_msr_list = argp;
831 struct kvm_msr_list msr_list;
832 unsigned n;
833
834 r = -EFAULT;
835 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
836 goto out;
837 n = msr_list.nmsrs;
838 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
839 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
840 goto out;
841 r = -E2BIG;
842 if (n < num_msrs_to_save)
843 goto out;
844 r = -EFAULT;
845 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
846 num_msrs_to_save * sizeof(u32)))
847 goto out;
848 if (copy_to_user(user_msr_list->indices
849 + num_msrs_to_save * sizeof(u32),
850 &emulated_msrs,
851 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
852 goto out;
853 r = 0;
854 break;
855 }
674eea0f
AK		 856 case KVM_GET_SUPPORTED_CPUID: {
857 struct kvm_cpuid2 __user *cpuid_arg = argp;
858 struct kvm_cpuid2 cpuid;
859
860 r = -EFAULT;
861 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
862 goto out;
863 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
864 cpuid_arg->entries);
865 if (r)
866 goto out;
867
868 r = -EFAULT;
869 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
870 goto out;
871 r = 0;
872 break;
873 }
043405e1
CO		 874 default:
875 r = -EINVAL;
876 }
877out:
878 return r;
879}
880
313a3dc7
CO		 881void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
882{
883 kvm_x86_ops->vcpu_load(vcpu, cpu);
18068523 884 kvm_write_guest_time(vcpu);
313a3dc7
CO		 885}
886
887void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
888{
889 kvm_x86_ops->vcpu_put(vcpu);
9327fd11 890 kvm_put_guest_fpu(vcpu);
313a3dc7
CO		 891}
892
07716717 893static int is_efer_nx(void)
313a3dc7
CO		 894{
895 u64 efer;
313a3dc7
CO		 896
897 rdmsrl(MSR_EFER, efer);
07716717
DK		 898 return efer & EFER_NX;
899}
900
901static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
902{
903 int i;
904 struct kvm_cpuid_entry2 *e, *entry;
905
313a3dc7 906 entry = NULL;
ad312c7c
ZX		 907 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
908 e = &vcpu->arch.cpuid_entries[i];
313a3dc7
CO		 909 if (e->function == 0x80000001) {
910 entry = e;
911 break;
912 }
913 }
07716717 914 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
313a3dc7
CO		 915 entry->edx &= ~(1 << 20);
916 printk(KERN_INFO "kvm: guest NX capability removed\n");
917 }
918}
919
07716717 920/* when an old userspace process fills a new kernel module */
313a3dc7
CO		 921static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
922 struct kvm_cpuid *cpuid,
923 struct kvm_cpuid_entry __user *entries)
07716717
DK		 924{
925 int r, i;
926 struct kvm_cpuid_entry *cpuid_entries;
927
928 r = -E2BIG;
929 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
930 goto out;
931 r = -ENOMEM;
932 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
933 if (!cpuid_entries)
934 goto out;
935 r = -EFAULT;
936 if (copy_from_user(cpuid_entries, entries,
937 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
938 goto out_free;
939 for (i = 0; i < cpuid->nent; i++) {
ad312c7c
ZX		 940 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
941 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
942 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
943 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
944 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
945 vcpu->arch.cpuid_entries[i].index = 0;
946 vcpu->arch.cpuid_entries[i].flags = 0;
947 vcpu->arch.cpuid_entries[i].padding[0] = 0;
948 vcpu->arch.cpuid_entries[i].padding[1] = 0;
949 vcpu->arch.cpuid_entries[i].padding[2] = 0;
950 }
951 vcpu->arch.cpuid_nent = cpuid->nent;
07716717
DK		 952 cpuid_fix_nx_cap(vcpu);
953 r = 0;
954
955out_free:
956 vfree(cpuid_entries);
957out:
958 return r;
959}
960
961static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
962 struct kvm_cpuid2 *cpuid,
963 struct kvm_cpuid_entry2 __user *entries)
313a3dc7
CO		 964{
965 int r;
966
967 r = -E2BIG;
968 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
969 goto out;
970 r = -EFAULT;
ad312c7c 971 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
07716717 972 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
313a3dc7 973 goto out;
ad312c7c 974 vcpu->arch.cpuid_nent = cpuid->nent;
313a3dc7
CO		 975 return 0;
976
977out:
978 return r;
979}
980
07716717
DK		 981static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
982 struct kvm_cpuid2 *cpuid,
983 struct kvm_cpuid_entry2 __user *entries)
984{
985 int r;
986
987 r = -E2BIG;
ad312c7c 988 if (cpuid->nent < vcpu->arch.cpuid_nent)
07716717
DK		 989 goto out;
990 r = -EFAULT;
ad312c7c
ZX		 991 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
992 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
07716717
DK		 993 goto out;
994 return 0;
995
996out:
ad312c7c 997 cpuid->nent = vcpu->arch.cpuid_nent;
07716717
DK		 998 return r;
999}
1000
1001static inline u32 bit(int bitno)
1002{
1003 return 1 << (bitno & 31);
1004}
1005
1006static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1007 u32 index)
1008{
1009 entry->function = function;
1010 entry->index = index;
1011 cpuid_count(entry->function, entry->index,
1012 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1013 entry->flags = 0;
1014}
1015
1016static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1017 u32 index, int *nent, int maxnent)
1018{
1019 const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
1020 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1021 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1022 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1023 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1024 bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) |
1025 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1026 bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
1027 bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
1028 bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
1029 const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
1030 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1031 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1032 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1033 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1034 bit(X86_FEATURE_PGE) |
1035 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1036 bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
1037 bit(X86_FEATURE_SYSCALL) |
1038 (bit(X86_FEATURE_NX) && is_efer_nx()) |
1039#ifdef CONFIG_X86_64
1040 bit(X86_FEATURE_LM) |
1041#endif
1042 bit(X86_FEATURE_MMXEXT) |
1043 bit(X86_FEATURE_3DNOWEXT) |
1044 bit(X86_FEATURE_3DNOW);
1045 const u32 kvm_supported_word3_x86_features =
1046 bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
1047 const u32 kvm_supported_word6_x86_features =
1048 bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY);
1049
1050 /* all func 2 cpuid_count() should be called on the same cpu */
1051 get_cpu();
1052 do_cpuid_1_ent(entry, function, index);
1053 ++*nent;
1054
1055 switch (function) {
1056 case 0:
1057 entry->eax = min(entry->eax, (u32)0xb);
1058 break;
1059 case 1:
1060 entry->edx &= kvm_supported_word0_x86_features;
1061 entry->ecx &= kvm_supported_word3_x86_features;
1062 break;
1063 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1064 * may return different values. This forces us to get_cpu() before
1065 * issuing the first command, and also to emulate this annoying behavior
1066 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1067 case 2: {
1068 int t, times = entry->eax & 0xff;
1069
1070 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1071 for (t = 1; t < times && *nent < maxnent; ++t) {
1072 do_cpuid_1_ent(&entry[t], function, 0);
1073 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1074 ++*nent;
1075 }
1076 break;
1077 }
1078 /* function 4 and 0xb have additional index. */
1079 case 4: {
1080 int index, cache_type;
1081
1082 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1083 /* read more entries until cache_type is zero */
1084 for (index = 1; *nent < maxnent; ++index) {
1085 cache_type = entry[index - 1].eax & 0x1f;
1086 if (!cache_type)
1087 break;
1088 do_cpuid_1_ent(&entry[index], function, index);
1089 entry[index].flags |=
1090 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1091 ++*nent;
1092 }
1093 break;
1094 }
1095 case 0xb: {
1096 int index, level_type;
1097
1098 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1099 /* read more entries until level_type is zero */
1100 for (index = 1; *nent < maxnent; ++index) {
1101 level_type = entry[index - 1].ecx & 0xff;
1102 if (!level_type)
1103 break;
1104 do_cpuid_1_ent(&entry[index], function, index);
1105 entry[index].flags |=
1106 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1107 ++*nent;
1108 }
1109 break;
1110 }
1111 case 0x80000000:
1112 entry->eax = min(entry->eax, 0x8000001a);
1113 break;
1114 case 0x80000001:
1115 entry->edx &= kvm_supported_word1_x86_features;
1116 entry->ecx &= kvm_supported_word6_x86_features;
1117 break;
1118 }
1119 put_cpu();
1120}
1121
674eea0f 1122static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
07716717
DK		 1123 struct kvm_cpuid_entry2 __user *entries)
1124{
1125 struct kvm_cpuid_entry2 *cpuid_entries;
1126 int limit, nent = 0, r = -E2BIG;
1127 u32 func;
1128
1129 if (cpuid->nent < 1)
1130 goto out;
1131 r = -ENOMEM;
1132 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1133 if (!cpuid_entries)
1134 goto out;
1135
1136 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1137 limit = cpuid_entries[0].eax;
1138 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1139 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1140 &nent, cpuid->nent);
1141 r = -E2BIG;
1142 if (nent >= cpuid->nent)
1143 goto out_free;
1144
1145 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1146 limit = cpuid_entries[nent - 1].eax;
1147 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1148 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1149 &nent, cpuid->nent);
1150 r = -EFAULT;
1151 if (copy_to_user(entries, cpuid_entries,
1152 nent * sizeof(struct kvm_cpuid_entry2)))
1153 goto out_free;
1154 cpuid->nent = nent;
1155 r = 0;
1156
1157out_free:
1158 vfree(cpuid_entries);
1159out:
1160 return r;
1161}
1162
313a3dc7
CO		 1163static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1164 struct kvm_lapic_state *s)
1165{
1166 vcpu_load(vcpu);
ad312c7c 1167 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
313a3dc7
CO		 1168 vcpu_put(vcpu);
1169
1170 return 0;
1171}
1172
1173static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1174 struct kvm_lapic_state *s)
1175{
1176 vcpu_load(vcpu);
ad312c7c 1177 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
313a3dc7
CO		 1178 kvm_apic_post_state_restore(vcpu);
1179 vcpu_put(vcpu);
1180
1181 return 0;
1182}
1183
f77bc6a4
ZX		 1184static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1185 struct kvm_interrupt *irq)
1186{
1187 if (irq->irq < 0 || irq->irq >= 256)
1188 return -EINVAL;
1189 if (irqchip_in_kernel(vcpu->kvm))
1190 return -ENXIO;
1191 vcpu_load(vcpu);
1192
ad312c7c
ZX		 1193 set_bit(irq->irq, vcpu->arch.irq_pending);
1194 set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
f77bc6a4
ZX		 1195
1196 vcpu_put(vcpu);
1197
1198 return 0;
1199}
1200
b209749f
AK		 1201static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1202 struct kvm_tpr_access_ctl *tac)
1203{
1204 if (tac->flags)
1205 return -EINVAL;
1206 vcpu->arch.tpr_access_reporting = !!tac->enabled;
1207 return 0;
1208}
1209
313a3dc7
CO		 1210long kvm_arch_vcpu_ioctl(struct file *filp,
1211 unsigned int ioctl, unsigned long arg)
1212{
1213 struct kvm_vcpu *vcpu = filp->private_data;
1214 void __user *argp = (void __user *)arg;
1215 int r;
1216
1217 switch (ioctl) {
1218 case KVM_GET_LAPIC: {
1219 struct kvm_lapic_state lapic;
1220
1221 memset(&lapic, 0, sizeof lapic);
1222 r = kvm_vcpu_ioctl_get_lapic(vcpu, &lapic);
1223 if (r)
1224 goto out;
1225 r = -EFAULT;
1226 if (copy_to_user(argp, &lapic, sizeof lapic))
1227 goto out;
1228 r = 0;
1229 break;
1230 }
1231 case KVM_SET_LAPIC: {
1232 struct kvm_lapic_state lapic;
1233
1234 r = -EFAULT;
1235 if (copy_from_user(&lapic, argp, sizeof lapic))
1236 goto out;
1237 r = kvm_vcpu_ioctl_set_lapic(vcpu, &lapic);;
1238 if (r)
1239 goto out;
1240 r = 0;
1241 break;
1242 }
f77bc6a4
ZX		 1243 case KVM_INTERRUPT: {
1244 struct kvm_interrupt irq;
1245
1246 r = -EFAULT;
1247 if (copy_from_user(&irq, argp, sizeof irq))
1248 goto out;
1249 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1250 if (r)
1251 goto out;
1252 r = 0;
1253 break;
1254 }
313a3dc7
CO		 1255 case KVM_SET_CPUID: {
1256 struct kvm_cpuid __user *cpuid_arg = argp;
1257 struct kvm_cpuid cpuid;
1258
1259 r = -EFAULT;
1260 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1261 goto out;
1262 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1263 if (r)
1264 goto out;
1265 break;
1266 }
07716717
DK		 1267 case KVM_SET_CPUID2: {
1268 struct kvm_cpuid2 __user *cpuid_arg = argp;
1269 struct kvm_cpuid2 cpuid;
1270
1271 r = -EFAULT;
1272 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1273 goto out;
1274 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1275 cpuid_arg->entries);
1276 if (r)
1277 goto out;
1278 break;
1279 }
1280 case KVM_GET_CPUID2: {
1281 struct kvm_cpuid2 __user *cpuid_arg = argp;
1282 struct kvm_cpuid2 cpuid;
1283
1284 r = -EFAULT;
1285 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1286 goto out;
1287 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1288 cpuid_arg->entries);
1289 if (r)
1290 goto out;
1291 r = -EFAULT;
1292 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1293 goto out;
1294 r = 0;
1295 break;
1296 }
313a3dc7
CO		 1297 case KVM_GET_MSRS:
1298 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1299 break;
1300 case KVM_SET_MSRS:
1301 r = msr_io(vcpu, argp, do_set_msr, 0);
1302 break;
b209749f
AK		 1303 case KVM_TPR_ACCESS_REPORTING: {
1304 struct kvm_tpr_access_ctl tac;
1305
1306 r = -EFAULT;
1307 if (copy_from_user(&tac, argp, sizeof tac))
1308 goto out;
1309 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1310 if (r)
1311 goto out;
1312 r = -EFAULT;
1313 if (copy_to_user(argp, &tac, sizeof tac))
1314 goto out;
1315 r = 0;
1316 break;
1317 };
b93463aa
AK		 1318 case KVM_SET_VAPIC_ADDR: {
1319 struct kvm_vapic_addr va;
1320
1321 r = -EINVAL;
1322 if (!irqchip_in_kernel(vcpu->kvm))
1323 goto out;
1324 r = -EFAULT;
1325 if (copy_from_user(&va, argp, sizeof va))
1326 goto out;
1327 r = 0;
1328 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1329 break;
1330 }
313a3dc7
CO		 1331 default:
1332 r = -EINVAL;
1333 }
1334out:
1335 return r;
1336}
1337
1fe779f8
CO		 1338static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1339{
1340 int ret;
1341
1342 if (addr > (unsigned int)(-3 * PAGE_SIZE))
1343 return -1;
1344 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1345 return ret;
1346}
1347
1348static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1349 u32 kvm_nr_mmu_pages)
1350{
1351 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1352 return -EINVAL;
1353
72dc67a6 1354 down_write(&kvm->slots_lock);
1fe779f8
CO		 1355
1356 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
f05e70ac 1357 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1fe779f8 1358
72dc67a6 1359 up_write(&kvm->slots_lock);
1fe779f8
CO		 1360 return 0;
1361}
1362
1363static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1364{
f05e70ac 1365 return kvm->arch.n_alloc_mmu_pages;
1fe779f8
CO		 1366}
1367
e9f85cde
ZX		 1368gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1369{
1370 int i;
1371 struct kvm_mem_alias *alias;
1372
d69fb81f
ZX		 1373 for (i = 0; i < kvm->arch.naliases; ++i) {
1374 alias = &kvm->arch.aliases[i];
e9f85cde
ZX		 1375 if (gfn >= alias->base_gfn
1376 && gfn < alias->base_gfn + alias->npages)
1377 return alias->target_gfn + gfn - alias->base_gfn;
1378 }
1379 return gfn;
1380}
1381
1fe779f8
CO		 1382/*
1383 * Set a new alias region. Aliases map a portion of physical memory into
1384 * another portion. This is useful for memory windows, for example the PC
1385 * VGA region.
1386 */
1387static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1388 struct kvm_memory_alias *alias)
1389{
1390 int r, n;
1391 struct kvm_mem_alias *p;
1392
1393 r = -EINVAL;
1394 /* General sanity checks */
1395 if (alias->memory_size & (PAGE_SIZE - 1))
1396 goto out;
1397 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1398 goto out;
1399 if (alias->slot >= KVM_ALIAS_SLOTS)
1400 goto out;
1401 if (alias->guest_phys_addr + alias->memory_size
1402 < alias->guest_phys_addr)
1403 goto out;
1404 if (alias->target_phys_addr + alias->memory_size
1405 < alias->target_phys_addr)
1406 goto out;
1407
72dc67a6 1408 down_write(&kvm->slots_lock);
1fe779f8 1409
d69fb81f 1410 p = &kvm->arch.aliases[alias->slot];
1fe779f8
CO		 1411 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1412 p->npages = alias->memory_size >> PAGE_SHIFT;
1413 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1414
1415 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
d69fb81f 1416 if (kvm->arch.aliases[n - 1].npages)
1fe779f8 1417 break;
d69fb81f 1418 kvm->arch.naliases = n;
1fe779f8
CO		 1419
1420 kvm_mmu_zap_all(kvm);
1421
72dc67a6 1422 up_write(&kvm->slots_lock);
1fe779f8
CO		 1423
1424 return 0;
1425
1426out:
1427 return r;
1428}
1429
1430static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1431{
1432 int r;
1433
1434 r = 0;
1435 switch (chip->chip_id) {
1436 case KVM_IRQCHIP_PIC_MASTER:
1437 memcpy(&chip->chip.pic,
1438 &pic_irqchip(kvm)->pics[0],
1439 sizeof(struct kvm_pic_state));
1440 break;
1441 case KVM_IRQCHIP_PIC_SLAVE:
1442 memcpy(&chip->chip.pic,
1443 &pic_irqchip(kvm)->pics[1],
1444 sizeof(struct kvm_pic_state));
1445 break;
1446 case KVM_IRQCHIP_IOAPIC:
1447 memcpy(&chip->chip.ioapic,
1448 ioapic_irqchip(kvm),
1449 sizeof(struct kvm_ioapic_state));
1450 break;
1451 default:
1452 r = -EINVAL;
1453 break;
1454 }
1455 return r;
1456}
1457
1458static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1459{
1460 int r;
1461
1462 r = 0;
1463 switch (chip->chip_id) {
1464 case KVM_IRQCHIP_PIC_MASTER:
1465 memcpy(&pic_irqchip(kvm)->pics[0],
1466 &chip->chip.pic,
1467 sizeof(struct kvm_pic_state));
1468 break;
1469 case KVM_IRQCHIP_PIC_SLAVE:
1470 memcpy(&pic_irqchip(kvm)->pics[1],
1471 &chip->chip.pic,
1472 sizeof(struct kvm_pic_state));
1473 break;
1474 case KVM_IRQCHIP_IOAPIC:
1475 memcpy(ioapic_irqchip(kvm),
1476 &chip->chip.ioapic,
1477 sizeof(struct kvm_ioapic_state));
1478 break;
1479 default:
1480 r = -EINVAL;
1481 break;
1482 }
1483 kvm_pic_update_irq(pic_irqchip(kvm));
1484 return r;
1485}
1486
5bb064dc
ZX		 1487/*
1488 * Get (and clear) the dirty memory log for a memory slot.
1489 */
1490int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1491 struct kvm_dirty_log *log)
1492{
1493 int r;
1494 int n;
1495 struct kvm_memory_slot *memslot;
1496 int is_dirty = 0;
1497
72dc67a6 1498 down_write(&kvm->slots_lock);
5bb064dc
ZX		 1499
1500 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1501 if (r)
1502 goto out;
1503
1504 /* If nothing is dirty, don't bother messing with page tables. */
1505 if (is_dirty) {
1506 kvm_mmu_slot_remove_write_access(kvm, log->slot);
1507 kvm_flush_remote_tlbs(kvm);
1508 memslot = &kvm->memslots[log->slot];
1509 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
1510 memset(memslot->dirty_bitmap, 0, n);
1511 }
1512 r = 0;
1513out:
72dc67a6 1514 up_write(&kvm->slots_lock);
5bb064dc
ZX		 1515 return r;
1516}
1517
1fe779f8
CO		 1518long kvm_arch_vm_ioctl(struct file *filp,
1519 unsigned int ioctl, unsigned long arg)
1520{
1521 struct kvm *kvm = filp->private_data;
1522 void __user *argp = (void __user *)arg;
1523 int r = -EINVAL;
1524
1525 switch (ioctl) {
1526 case KVM_SET_TSS_ADDR:
1527 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
1528 if (r < 0)
1529 goto out;
1530 break;
1531 case KVM_SET_MEMORY_REGION: {
1532 struct kvm_memory_region kvm_mem;
1533 struct kvm_userspace_memory_region kvm_userspace_mem;
1534
1535 r = -EFAULT;
1536 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
1537 goto out;
1538 kvm_userspace_mem.slot = kvm_mem.slot;
1539 kvm_userspace_mem.flags = kvm_mem.flags;
1540 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
1541 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
1542 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
1543 if (r)
1544 goto out;
1545 break;
1546 }
1547 case KVM_SET_NR_MMU_PAGES:
1548 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
1549 if (r)
1550 goto out;
1551 break;
1552 case KVM_GET_NR_MMU_PAGES:
1553 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
1554 break;
1555 case KVM_SET_MEMORY_ALIAS: {
1556 struct kvm_memory_alias alias;
1557
1558 r = -EFAULT;
1559 if (copy_from_user(&alias, argp, sizeof alias))
1560 goto out;
1561 r = kvm_vm_ioctl_set_memory_alias(kvm, &alias);
1562 if (r)
1563 goto out;
1564 break;
1565 }
1566 case KVM_CREATE_IRQCHIP:
1567 r = -ENOMEM;
d7deeeb0
ZX		 1568 kvm->arch.vpic = kvm_create_pic(kvm);
1569 if (kvm->arch.vpic) {
1fe779f8
CO		 1570 r = kvm_ioapic_init(kvm);
1571 if (r) {
d7deeeb0
ZX		 1572 kfree(kvm->arch.vpic);
1573 kvm->arch.vpic = NULL;
1fe779f8
CO		 1574 goto out;
1575 }
1576 } else
1577 goto out;
1578 break;
1579 case KVM_IRQ_LINE: {
1580 struct kvm_irq_level irq_event;
1581
1582 r = -EFAULT;
1583 if (copy_from_user(&irq_event, argp, sizeof irq_event))
1584 goto out;
1585 if (irqchip_in_kernel(kvm)) {
1586 mutex_lock(&kvm->lock);
1587 if (irq_event.irq < 16)
1588 kvm_pic_set_irq(pic_irqchip(kvm),
1589 irq_event.irq,
1590 irq_event.level);
d7deeeb0 1591 kvm_ioapic_set_irq(kvm->arch.vioapic,
1fe779f8
CO		 1592 irq_event.irq,
1593 irq_event.level);
1594 mutex_unlock(&kvm->lock);
1595 r = 0;
1596 }
1597 break;
1598 }
1599 case KVM_GET_IRQCHIP: {
1600 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1601 struct kvm_irqchip chip;
1602
1603 r = -EFAULT;
1604 if (copy_from_user(&chip, argp, sizeof chip))
1605 goto out;
1606 r = -ENXIO;
1607 if (!irqchip_in_kernel(kvm))
1608 goto out;
1609 r = kvm_vm_ioctl_get_irqchip(kvm, &chip);
1610 if (r)
1611 goto out;
1612 r = -EFAULT;
1613 if (copy_to_user(argp, &chip, sizeof chip))
1614 goto out;
1615 r = 0;
1616 break;
1617 }
1618 case KVM_SET_IRQCHIP: {
1619 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1620 struct kvm_irqchip chip;
1621
1622 r = -EFAULT;
1623 if (copy_from_user(&chip, argp, sizeof chip))
1624 goto out;
1625 r = -ENXIO;
1626 if (!irqchip_in_kernel(kvm))
1627 goto out;
1628 r = kvm_vm_ioctl_set_irqchip(kvm, &chip);
1629 if (r)
1630 goto out;
1631 r = 0;
1632 break;
1633 }
1634 default:
1635 ;
1636 }
1637out:
1638 return r;
1639}
1640
a16b043c 1641static void kvm_init_msr_list(void)
043405e1
CO		 1642{
1643 u32 dummy[2];
1644 unsigned i, j;
1645
1646 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
1647 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
1648 continue;
1649 if (j < i)
1650 msrs_to_save[j] = msrs_to_save[i];
1651 j++;
1652 }
1653 num_msrs_to_save = j;
1654}
1655
bbd9b64e
CO		 1656/*
1657 * Only apic need an MMIO device hook, so shortcut now..
1658 */
1659static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
1660 gpa_t addr)
1661{
1662 struct kvm_io_device *dev;
1663
ad312c7c
ZX		 1664 if (vcpu->arch.apic) {
1665 dev = &vcpu->arch.apic->dev;
bbd9b64e
CO		 1666 if (dev->in_range(dev, addr))
1667 return dev;
1668 }
1669 return NULL;
1670}
1671
1672
1673static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
1674 gpa_t addr)
1675{
1676 struct kvm_io_device *dev;
1677
1678 dev = vcpu_find_pervcpu_dev(vcpu, addr);
1679 if (dev == NULL)
1680 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr);
1681 return dev;
1682}
1683
1684int emulator_read_std(unsigned long addr,
1685 void *val,
1686 unsigned int bytes,
1687 struct kvm_vcpu *vcpu)
1688{
1689 void *data = val;
10589a46 1690 int r = X86EMUL_CONTINUE;
bbd9b64e 1691
72dc67a6 1692 down_read(&vcpu->kvm->slots_lock);
bbd9b64e 1693 while (bytes) {
ad312c7c 1694 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
bbd9b64e
CO		 1695 unsigned offset = addr & (PAGE_SIZE-1);
1696 unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
1697 int ret;
1698
10589a46
MT		 1699 if (gpa == UNMAPPED_GVA) {
1700 r = X86EMUL_PROPAGATE_FAULT;
1701 goto out;
1702 }
bbd9b64e 1703 ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
10589a46
MT		 1704 if (ret < 0) {
1705 r = X86EMUL_UNHANDLEABLE;
1706 goto out;
1707 }
bbd9b64e
CO		 1708
1709 bytes -= tocopy;
1710 data += tocopy;
1711 addr += tocopy;
1712 }
10589a46 1713out:
72dc67a6 1714 up_read(&vcpu->kvm->slots_lock);
10589a46 1715 return r;
bbd9b64e
CO		 1716}
1717EXPORT_SYMBOL_GPL(emulator_read_std);
1718
bbd9b64e
CO		 1719static int emulator_read_emulated(unsigned long addr,
1720 void *val,
1721 unsigned int bytes,
1722 struct kvm_vcpu *vcpu)
1723{
1724 struct kvm_io_device *mmio_dev;
1725 gpa_t gpa;
1726
1727 if (vcpu->mmio_read_completed) {
1728 memcpy(val, vcpu->mmio_data, bytes);
1729 vcpu->mmio_read_completed = 0;
1730 return X86EMUL_CONTINUE;
1731 }
1732
72dc67a6 1733 down_read(&vcpu->kvm->slots_lock);
ad312c7c 1734 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
72dc67a6 1735 up_read(&vcpu->kvm->slots_lock);
bbd9b64e
CO		 1736
1737 /* For APIC access vmexit */
1738 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
1739 goto mmio;
1740
1741 if (emulator_read_std(addr, val, bytes, vcpu)
1742 == X86EMUL_CONTINUE)
1743 return X86EMUL_CONTINUE;
1744 if (gpa == UNMAPPED_GVA)
1745 return X86EMUL_PROPAGATE_FAULT;
1746
1747mmio:
1748 /*
1749 * Is this MMIO handled locally?
1750 */
10589a46 1751 mutex_lock(&vcpu->kvm->lock);
bbd9b64e
CO		 1752 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
1753 if (mmio_dev) {
1754 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
10589a46 1755 mutex_unlock(&vcpu->kvm->lock);
bbd9b64e
CO		 1756 return X86EMUL_CONTINUE;
1757 }
10589a46 1758 mutex_unlock(&vcpu->kvm->lock);
bbd9b64e
CO		 1759
1760 vcpu->mmio_needed = 1;
1761 vcpu->mmio_phys_addr = gpa;
1762 vcpu->mmio_size = bytes;
1763 vcpu->mmio_is_write = 0;
1764
1765 return X86EMUL_UNHANDLEABLE;
1766}
1767
1768static int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
1769 const void *val, int bytes)
1770{
1771 int ret;
1772
72dc67a6 1773 down_read(&vcpu->kvm->slots_lock);
bbd9b64e 1774 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
10589a46 1775 if (ret < 0) {
72dc67a6 1776 up_read(&vcpu->kvm->slots_lock);
bbd9b64e 1777 return 0;
10589a46 1778 }
bbd9b64e 1779 kvm_mmu_pte_write(vcpu, gpa, val, bytes);
72dc67a6 1780 up_read(&vcpu->kvm->slots_lock);
bbd9b64e
CO		 1781 return 1;
1782}
1783
1784static int emulator_write_emulated_onepage(unsigned long addr,
1785 const void *val,
1786 unsigned int bytes,
1787 struct kvm_vcpu *vcpu)
1788{
1789 struct kvm_io_device *mmio_dev;
10589a46
MT		 1790 gpa_t gpa;
1791
72dc67a6 1792 down_read(&vcpu->kvm->slots_lock);
10589a46 1793 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
72dc67a6 1794 up_read(&vcpu->kvm->slots_lock);
bbd9b64e
CO		 1795
1796 if (gpa == UNMAPPED_GVA) {
c3c91fee 1797 kvm_inject_page_fault(vcpu, addr, 2);
bbd9b64e
CO		 1798 return X86EMUL_PROPAGATE_FAULT;
1799 }
1800
1801 /* For APIC access vmexit */
1802 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
1803 goto mmio;
1804
1805 if (emulator_write_phys(vcpu, gpa, val, bytes))
1806 return X86EMUL_CONTINUE;
1807
1808mmio:
1809 /*
1810 * Is this MMIO handled locally?
1811 */
10589a46 1812 mutex_lock(&vcpu->kvm->lock);
bbd9b64e
CO		 1813 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
1814 if (mmio_dev) {
1815 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
10589a46 1816 mutex_unlock(&vcpu->kvm->lock);
bbd9b64e
CO		 1817 return X86EMUL_CONTINUE;
1818 }
10589a46 1819 mutex_unlock(&vcpu->kvm->lock);
bbd9b64e
CO		 1820
1821 vcpu->mmio_needed = 1;
1822 vcpu->mmio_phys_addr = gpa;
1823 vcpu->mmio_size = bytes;
1824 vcpu->mmio_is_write = 1;
1825 memcpy(vcpu->mmio_data, val, bytes);
1826
1827 return X86EMUL_CONTINUE;
1828}
1829
1830int emulator_write_emulated(unsigned long addr,
1831 const void *val,
1832 unsigned int bytes,
1833 struct kvm_vcpu *vcpu)
1834{
1835 /* Crossing a page boundary? */
1836 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
1837 int rc, now;
1838
1839 now = -addr & ~PAGE_MASK;
1840 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
1841 if (rc != X86EMUL_CONTINUE)
1842 return rc;
1843 addr += now;
1844 val += now;
1845 bytes -= now;
1846 }
1847 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
1848}
1849EXPORT_SYMBOL_GPL(emulator_write_emulated);
1850
1851static int emulator_cmpxchg_emulated(unsigned long addr,
1852 const void *old,
1853 const void *new,
1854 unsigned int bytes,
1855 struct kvm_vcpu *vcpu)
1856{
1857 static int reported;
1858
1859 if (!reported) {
1860 reported = 1;
1861 printk(KERN_WARNING "kvm: emulating exchange as write\n");
1862 }
2bacc55c
MT		 1863#ifndef CONFIG_X86_64
1864 /* guests cmpxchg8b have to be emulated atomically */
1865 if (bytes == 8) {
10589a46 1866 gpa_t gpa;
2bacc55c 1867 struct page *page;
c0b49b0d 1868 char *kaddr;
2bacc55c
MT		 1869 u64 val;
1870
72dc67a6 1871 down_read(&vcpu->kvm->slots_lock);
10589a46
MT		 1872 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
1873
2bacc55c
MT		 1874 if (gpa == UNMAPPED_GVA ||
1875 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
1876 goto emul_write;
1877
1878 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
1879 goto emul_write;
1880
1881 val = *(u64 *)new;
72dc67a6
IE		 1882
1883 down_read(&current->mm->mmap_sem);
2bacc55c 1884 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
72dc67a6
IE		 1885 up_read(&current->mm->mmap_sem);
1886
c0b49b0d
AM		 1887 kaddr = kmap_atomic(page, KM_USER0);
1888 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
1889 kunmap_atomic(kaddr, KM_USER0);
2bacc55c 1890 kvm_release_page_dirty(page);
10589a46 1891 emul_write:
72dc67a6 1892 up_read(&vcpu->kvm->slots_lock);
2bacc55c 1893 }
2bacc55c
MT		 1894#endif
1895
bbd9b64e
CO		 1896 return emulator_write_emulated(addr, new, bytes, vcpu);
1897}
1898
1899static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
1900{
1901 return kvm_x86_ops->get_segment_base(vcpu, seg);
1902}
1903
1904int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
1905{
1906 return X86EMUL_CONTINUE;
1907}
1908
1909int emulate_clts(struct kvm_vcpu *vcpu)
1910{
ad312c7c 1911 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
bbd9b64e
CO		 1912 return X86EMUL_CONTINUE;
1913}
1914
1915int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
1916{
1917 struct kvm_vcpu *vcpu = ctxt->vcpu;
1918
1919 switch (dr) {
1920 case 0 ... 3:
1921 *dest = kvm_x86_ops->get_dr(vcpu, dr);
1922 return X86EMUL_CONTINUE;
1923 default:
1924 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __FUNCTION__, dr);
1925 return X86EMUL_UNHANDLEABLE;
1926 }
1927}
1928
1929int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
1930{
1931 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
1932 int exception;
1933
1934 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
1935 if (exception) {
1936 /* FIXME: better handling */
1937 return X86EMUL_UNHANDLEABLE;
1938 }
1939 return X86EMUL_CONTINUE;
1940}
1941
1942void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
1943{
1944 static int reported;
1945 u8 opcodes[4];
ad312c7c 1946 unsigned long rip = vcpu->arch.rip;
bbd9b64e
CO		 1947 unsigned long rip_linear;
1948
1949 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
1950
1951 if (reported)
1952 return;
1953
1954 emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
1955
1956 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
1957 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
1958 reported = 1;
1959}
1960EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
1961
1962struct x86_emulate_ops emulate_ops = {
1963 .read_std = emulator_read_std,
bbd9b64e
CO		 1964 .read_emulated = emulator_read_emulated,
1965 .write_emulated = emulator_write_emulated,
1966 .cmpxchg_emulated = emulator_cmpxchg_emulated,
1967};
1968
1969int emulate_instruction(struct kvm_vcpu *vcpu,
1970 struct kvm_run *run,
1971 unsigned long cr2,
1972 u16 error_code,
571008da 1973 int emulation_type)
bbd9b64e
CO		 1974{
1975 int r;
571008da 1976 struct decode_cache *c;
bbd9b64e 1977
ad312c7c 1978 vcpu->arch.mmio_fault_cr2 = cr2;
bbd9b64e
CO		 1979 kvm_x86_ops->cache_regs(vcpu);
1980
1981 vcpu->mmio_is_write = 0;
ad312c7c 1982 vcpu->arch.pio.string = 0;
bbd9b64e 1983
571008da 1984 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
bbd9b64e
CO		 1985 int cs_db, cs_l;
1986 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
1987
ad312c7c
ZX		 1988 vcpu->arch.emulate_ctxt.vcpu = vcpu;
1989 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
1990 vcpu->arch.emulate_ctxt.mode =
1991 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
bbd9b64e
CO		 1992 ? X86EMUL_MODE_REAL : cs_l
1993 ? X86EMUL_MODE_PROT64 : cs_db
1994 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
1995
ad312c7c
ZX		 1996 if (vcpu->arch.emulate_ctxt.mode == X86EMUL_MODE_PROT64) {
1997 vcpu->arch.emulate_ctxt.cs_base = 0;
1998 vcpu->arch.emulate_ctxt.ds_base = 0;
1999 vcpu->arch.emulate_ctxt.es_base = 0;
2000 vcpu->arch.emulate_ctxt.ss_base = 0;
bbd9b64e 2001 } else {
ad312c7c 2002 vcpu->arch.emulate_ctxt.cs_base =
bbd9b64e 2003 get_segment_base(vcpu, VCPU_SREG_CS);
ad312c7c 2004 vcpu->arch.emulate_ctxt.ds_base =
bbd9b64e 2005 get_segment_base(vcpu, VCPU_SREG_DS);
ad312c7c 2006 vcpu->arch.emulate_ctxt.es_base =
bbd9b64e 2007 get_segment_base(vcpu, VCPU_SREG_ES);
ad312c7c 2008 vcpu->arch.emulate_ctxt.ss_base =
bbd9b64e
CO		 2009 get_segment_base(vcpu, VCPU_SREG_SS);
2010 }
2011
ad312c7c 2012 vcpu->arch.emulate_ctxt.gs_base =
bbd9b64e 2013 get_segment_base(vcpu, VCPU_SREG_GS);
ad312c7c 2014 vcpu->arch.emulate_ctxt.fs_base =
bbd9b64e
CO		 2015 get_segment_base(vcpu, VCPU_SREG_FS);
2016
ad312c7c 2017 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
571008da
SY		 2018
2019 /* Reject the instructions other than VMCALL/VMMCALL when
2020 * try to emulate invalid opcode */
2021 c = &vcpu->arch.emulate_ctxt.decode;
2022 if ((emulation_type & EMULTYPE_TRAP_UD) &&
2023 (!(c->twobyte && c->b == 0x01 &&
2024 (c->modrm_reg == 0 || c->modrm_reg == 3) &&
2025 c->modrm_mod == 3 && c->modrm_rm == 1)))
2026 return EMULATE_FAIL;
2027
f2b5756b 2028 ++vcpu->stat.insn_emulation;
bbd9b64e 2029 if (r) {
f2b5756b 2030 ++vcpu->stat.insn_emulation_fail;
bbd9b64e
CO		 2031 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2032 return EMULATE_DONE;
2033 return EMULATE_FAIL;
2034 }
2035 }
2036
ad312c7c 2037 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
bbd9b64e 2038
ad312c7c 2039 if (vcpu->arch.pio.string)
bbd9b64e
CO		 2040 return EMULATE_DO_MMIO;
2041
2042 if ((r || vcpu->mmio_is_write) && run) {
2043 run->exit_reason = KVM_EXIT_MMIO;
2044 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2045 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2046 run->mmio.len = vcpu->mmio_size;
2047 run->mmio.is_write = vcpu->mmio_is_write;
2048 }
2049
2050 if (r) {
2051 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2052 return EMULATE_DONE;
2053 if (!vcpu->mmio_needed) {
2054 kvm_report_emulation_failure(vcpu, "mmio");
2055 return EMULATE_FAIL;
2056 }
2057 return EMULATE_DO_MMIO;
2058 }
2059
2060 kvm_x86_ops->decache_regs(vcpu);
ad312c7c 2061 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
bbd9b64e
CO		 2062
2063 if (vcpu->mmio_is_write) {
2064 vcpu->mmio_needed = 0;
2065 return EMULATE_DO_MMIO;
2066 }
2067
2068 return EMULATE_DONE;
2069}
2070EXPORT_SYMBOL_GPL(emulate_instruction);
2071
de7d789a
CO		 2072static void free_pio_guest_pages(struct kvm_vcpu *vcpu)
2073{
2074 int i;
2075
ad312c7c
ZX		 2076 for (i = 0; i < ARRAY_SIZE(vcpu->arch.pio.guest_pages); ++i)
2077 if (vcpu->arch.pio.guest_pages[i]) {
2078 kvm_release_page_dirty(vcpu->arch.pio.guest_pages[i]);
2079 vcpu->arch.pio.guest_pages[i] = NULL;
de7d789a
CO		 2080 }
2081}
2082
2083static int pio_copy_data(struct kvm_vcpu *vcpu)
2084{
ad312c7c 2085 void *p = vcpu->arch.pio_data;
de7d789a
CO		 2086 void *q;
2087 unsigned bytes;
ad312c7c 2088 int nr_pages = vcpu->arch.pio.guest_pages[1] ? 2 : 1;
de7d789a 2089
ad312c7c 2090 q = vmap(vcpu->arch.pio.guest_pages, nr_pages, VM_READ|VM_WRITE,
de7d789a
CO		 2091 PAGE_KERNEL);
2092 if (!q) {
2093 free_pio_guest_pages(vcpu);
2094 return -ENOMEM;
2095 }
ad312c7c
ZX		 2096 q += vcpu->arch.pio.guest_page_offset;
2097 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2098 if (vcpu->arch.pio.in)
de7d789a
CO		 2099 memcpy(q, p, bytes);
2100 else
2101 memcpy(p, q, bytes);
ad312c7c 2102 q -= vcpu->arch.pio.guest_page_offset;
de7d789a
CO		 2103 vunmap(q);
2104 free_pio_guest_pages(vcpu);
2105 return 0;
2106}
2107
2108int complete_pio(struct kvm_vcpu *vcpu)
2109{
ad312c7c 2110 struct kvm_pio_request *io = &vcpu->arch.pio;
de7d789a
CO		 2111 long delta;
2112 int r;
2113
2114 kvm_x86_ops->cache_regs(vcpu);
2115
2116 if (!io->string) {
2117 if (io->in)
ad312c7c 2118 memcpy(&vcpu->arch.regs[VCPU_REGS_RAX], vcpu->arch.pio_data,
de7d789a
CO		 2119 io->size);
2120 } else {
2121 if (io->in) {
2122 r = pio_copy_data(vcpu);
2123 if (r) {
2124 kvm_x86_ops->cache_regs(vcpu);
2125 return r;
2126 }
2127 }
2128
2129 delta = 1;
2130 if (io->rep) {
2131 delta *= io->cur_count;
2132 /*
2133 * The size of the register should really depend on
2134 * current address size.
2135 */
ad312c7c 2136 vcpu->arch.regs[VCPU_REGS_RCX] -= delta;
de7d789a
CO		 2137 }
2138 if (io->down)
2139 delta = -delta;
2140 delta *= io->size;
2141 if (io->in)
ad312c7c 2142 vcpu->arch.regs[VCPU_REGS_RDI] += delta;
de7d789a 2143 else
ad312c7c 2144 vcpu->arch.regs[VCPU_REGS_RSI] += delta;
de7d789a
CO		 2145 }
2146
2147 kvm_x86_ops->decache_regs(vcpu);
2148
2149 io->count -= io->cur_count;
2150 io->cur_count = 0;
2151
2152 return 0;
2153}
2154
2155static void kernel_pio(struct kvm_io_device *pio_dev,
2156 struct kvm_vcpu *vcpu,
2157 void *pd)
2158{
2159 /* TODO: String I/O for in kernel device */
2160
2161 mutex_lock(&vcpu->kvm->lock);
ad312c7c
ZX		 2162 if (vcpu->arch.pio.in)
2163 kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
2164 vcpu->arch.pio.size,
de7d789a
CO		 2165 pd);
2166 else
ad312c7c
ZX		 2167 kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
2168 vcpu->arch.pio.size,
de7d789a
CO		 2169 pd);
2170 mutex_unlock(&vcpu->kvm->lock);
2171}
2172
2173static void pio_string_write(struct kvm_io_device *pio_dev,
2174 struct kvm_vcpu *vcpu)
2175{
ad312c7c
ZX		 2176 struct kvm_pio_request *io = &vcpu->arch.pio;
2177 void *pd = vcpu->arch.pio_data;
de7d789a
CO		 2178 int i;
2179
2180 mutex_lock(&vcpu->kvm->lock);
2181 for (i = 0; i < io->cur_count; i++) {
2182 kvm_iodevice_write(pio_dev, io->port,
2183 io->size,
2184 pd);
2185 pd += io->size;
2186 }
2187 mutex_unlock(&vcpu->kvm->lock);
2188}
2189
2190static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
2191 gpa_t addr)
2192{
2193 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr);
2194}
2195
2196int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2197 int size, unsigned port)
2198{
2199 struct kvm_io_device *pio_dev;
2200
2201 vcpu->run->exit_reason = KVM_EXIT_IO;
2202 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
ad312c7c 2203 vcpu->run->io.size = vcpu->arch.pio.size = size;
de7d789a 2204 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
ad312c7c
ZX		 2205 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2206 vcpu->run->io.port = vcpu->arch.pio.port = port;
2207 vcpu->arch.pio.in = in;
2208 vcpu->arch.pio.string = 0;
2209 vcpu->arch.pio.down = 0;
2210 vcpu->arch.pio.guest_page_offset = 0;
2211 vcpu->arch.pio.rep = 0;
de7d789a
CO		 2212
2213 kvm_x86_ops->cache_regs(vcpu);
ad312c7c 2214 memcpy(vcpu->arch.pio_data, &vcpu->arch.regs[VCPU_REGS_RAX], 4);
de7d789a
CO		 2215 kvm_x86_ops->decache_regs(vcpu);
2216
2217 kvm_x86_ops->skip_emulated_instruction(vcpu);
2218
2219 pio_dev = vcpu_find_pio_dev(vcpu, port);
2220 if (pio_dev) {
ad312c7c 2221 kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
de7d789a
CO		 2222 complete_pio(vcpu);
2223 return 1;
2224 }
2225 return 0;
2226}
2227EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2228
2229int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2230 int size, unsigned long count, int down,
2231 gva_t address, int rep, unsigned port)
2232{
2233 unsigned now, in_page;
2234 int i, ret = 0;
2235 int nr_pages = 1;
2236 struct page *page;
2237 struct kvm_io_device *pio_dev;
2238
2239 vcpu->run->exit_reason = KVM_EXIT_IO;
2240 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
ad312c7c 2241 vcpu->run->io.size = vcpu->arch.pio.size = size;
de7d789a 2242 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
ad312c7c
ZX		 2243 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2244 vcpu->run->io.port = vcpu->arch.pio.port = port;
2245 vcpu->arch.pio.in = in;
2246 vcpu->arch.pio.string = 1;
2247 vcpu->arch.pio.down = down;
2248 vcpu->arch.pio.guest_page_offset = offset_in_page(address);
2249 vcpu->arch.pio.rep = rep;
de7d789a
CO		 2250
2251 if (!count) {
2252 kvm_x86_ops->skip_emulated_instruction(vcpu);
2253 return 1;
2254 }
2255
2256 if (!down)
2257 in_page = PAGE_SIZE - offset_in_page(address);
2258 else
2259 in_page = offset_in_page(address) + size;
2260 now = min(count, (unsigned long)in_page / size);
2261 if (!now) {
2262 /*
2263 * String I/O straddles page boundary. Pin two guest pages
2264 * so that we satisfy atomicity constraints. Do just one
2265 * transaction to avoid complexity.
2266 */
2267 nr_pages = 2;
2268 now = 1;
2269 }
2270 if (down) {
2271 /*
2272 * String I/O in reverse. Yuck. Kill the guest, fix later.
2273 */
2274 pr_unimpl(vcpu, "guest string pio down\n");
c1a5d4f9 2275 kvm_inject_gp(vcpu, 0);
de7d789a
CO		 2276 return 1;
2277 }
2278 vcpu->run->io.count = now;
ad312c7c 2279 vcpu->arch.pio.cur_count = now;
de7d789a 2280
ad312c7c 2281 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
de7d789a
CO		 2282 kvm_x86_ops->skip_emulated_instruction(vcpu);
2283
2284 for (i = 0; i < nr_pages; ++i) {
72dc67a6 2285 down_read(&vcpu->kvm->slots_lock);
de7d789a 2286 page = gva_to_page(vcpu, address + i * PAGE_SIZE);
ad312c7c 2287 vcpu->arch.pio.guest_pages[i] = page;
72dc67a6 2288 up_read(&vcpu->kvm->slots_lock);
de7d789a 2289 if (!page) {
c1a5d4f9 2290 kvm_inject_gp(vcpu, 0);
de7d789a
CO		 2291 free_pio_guest_pages(vcpu);
2292 return 1;
2293 }
2294 }
2295
2296 pio_dev = vcpu_find_pio_dev(vcpu, port);
ad312c7c 2297 if (!vcpu->arch.pio.in) {
de7d789a
CO		 2298 /* string PIO write */
2299 ret = pio_copy_data(vcpu);
2300 if (ret >= 0 && pio_dev) {
2301 pio_string_write(pio_dev, vcpu);
2302 complete_pio(vcpu);
ad312c7c 2303 if (vcpu->arch.pio.count == 0)
de7d789a
CO		 2304 ret = 1;
2305 }
2306 } else if (pio_dev)
2307 pr_unimpl(vcpu, "no string pio read support yet, "
2308 "port %x size %d count %ld\n",
2309 port, size, count);
2310
2311 return ret;
2312}
2313EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
2314
f8c16bba 2315int kvm_arch_init(void *opaque)
043405e1 2316{
56c6d28a 2317 int r;
f8c16bba
ZX		 2318 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
2319
f8c16bba
ZX		 2320 if (kvm_x86_ops) {
2321 printk(KERN_ERR "kvm: already loaded the other module\n");
56c6d28a
ZX		 2322 r = -EEXIST;
2323 goto out;
f8c16bba
ZX		 2324 }
2325
2326 if (!ops->cpu_has_kvm_support()) {
2327 printk(KERN_ERR "kvm: no hardware support\n");
56c6d28a
ZX		 2328 r = -EOPNOTSUPP;
2329 goto out;
f8c16bba
ZX		 2330 }
2331 if (ops->disabled_by_bios()) {
2332 printk(KERN_ERR "kvm: disabled by bios\n");
56c6d28a
ZX		 2333 r = -EOPNOTSUPP;
2334 goto out;
f8c16bba
ZX		 2335 }
2336
97db56ce
AK		 2337 r = kvm_mmu_module_init();
2338 if (r)
2339 goto out;
2340
2341 kvm_init_msr_list();
2342
f8c16bba 2343 kvm_x86_ops = ops;
56c6d28a 2344 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
f8c16bba 2345 return 0;
56c6d28a
ZX		 2346
2347out:
56c6d28a 2348 return r;
043405e1 2349}
8776e519 2350
f8c16bba
ZX		 2351void kvm_arch_exit(void)
2352{
2353 kvm_x86_ops = NULL;
56c6d28a
ZX		 2354 kvm_mmu_module_exit();
2355}
f8c16bba 2356
8776e519
HB		 2357int kvm_emulate_halt(struct kvm_vcpu *vcpu)
2358{
2359 ++vcpu->stat.halt_exits;
2360 if (irqchip_in_kernel(vcpu->kvm)) {
ad312c7c 2361 vcpu->arch.mp_state = VCPU_MP_STATE_HALTED;
8776e519 2362 kvm_vcpu_block(vcpu);
ad312c7c 2363 if (vcpu->arch.mp_state != VCPU_MP_STATE_RUNNABLE)
8776e519
HB		 2364 return -EINTR;
2365 return 1;
2366 } else {
2367 vcpu->run->exit_reason = KVM_EXIT_HLT;
2368 return 0;
2369 }
2370}
2371EXPORT_SYMBOL_GPL(kvm_emulate_halt);
2372
2373int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
2374{
2375 unsigned long nr, a0, a1, a2, a3, ret;
2376
2377 kvm_x86_ops->cache_regs(vcpu);
2378
ad312c7c
ZX		 2379 nr = vcpu->arch.regs[VCPU_REGS_RAX];
2380 a0 = vcpu->arch.regs[VCPU_REGS_RBX];
2381 a1 = vcpu->arch.regs[VCPU_REGS_RCX];
2382 a2 = vcpu->arch.regs[VCPU_REGS_RDX];
2383 a3 = vcpu->arch.regs[VCPU_REGS_RSI];
8776e519
HB		 2384
2385 if (!is_long_mode(vcpu)) {
2386 nr &= 0xFFFFFFFF;
2387 a0 &= 0xFFFFFFFF;
2388 a1 &= 0xFFFFFFFF;
2389 a2 &= 0xFFFFFFFF;
2390 a3 &= 0xFFFFFFFF;
2391 }
2392
2393 switch (nr) {
b93463aa
AK		 2394 case KVM_HC_VAPIC_POLL_IRQ:
2395 ret = 0;
2396 break;
8776e519
HB		 2397 default:
2398 ret = -KVM_ENOSYS;
2399 break;
2400 }
ad312c7c 2401 vcpu->arch.regs[VCPU_REGS_RAX] = ret;
8776e519
HB		 2402 kvm_x86_ops->decache_regs(vcpu);
2403 return 0;
2404}
2405EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
2406
2407int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
2408{
2409 char instruction[3];
2410 int ret = 0;
2411
8776e519
HB		 2412
2413 /*
2414 * Blow out the MMU to ensure that no other VCPU has an active mapping
2415 * to ensure that the updated hypercall appears atomically across all
2416 * VCPUs.
2417 */
2418 kvm_mmu_zap_all(vcpu->kvm);
2419
2420 kvm_x86_ops->cache_regs(vcpu);
2421 kvm_x86_ops->patch_hypercall(vcpu, instruction);
ad312c7c 2422 if (emulator_write_emulated(vcpu->arch.rip, instruction, 3, vcpu)
8776e519
HB		 2423 != X86EMUL_CONTINUE)
2424 ret = -EFAULT;
2425
8776e519
HB		 2426 return ret;
2427}
2428
2429static u64 mk_cr_64(u64 curr_cr, u32 new_val)
2430{
2431 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
2432}
2433
2434void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2435{
2436 struct descriptor_table dt = { limit, base };
2437
2438 kvm_x86_ops->set_gdt(vcpu, &dt);
2439}
2440
2441void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2442{
2443 struct descriptor_table dt = { limit, base };
2444
2445 kvm_x86_ops->set_idt(vcpu, &dt);
2446}
2447
2448void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
2449 unsigned long *rflags)
2450{
2451 lmsw(vcpu, msw);
2452 *rflags = kvm_x86_ops->get_rflags(vcpu);
2453}
2454
2455unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
2456{
2457 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2458 switch (cr) {
2459 case 0:
ad312c7c 2460 return vcpu->arch.cr0;
8776e519 2461 case 2:
ad312c7c 2462 return vcpu->arch.cr2;
8776e519 2463 case 3:
ad312c7c 2464 return vcpu->arch.cr3;
8776e519 2465 case 4:
ad312c7c 2466 return vcpu->arch.cr4;
152ff9be
JR		 2467 case 8:
2468 return get_cr8(vcpu);
8776e519
HB		 2469 default:
2470 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
2471 return 0;
2472 }
2473}
2474
2475void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
2476 unsigned long *rflags)
2477{
2478 switch (cr) {
2479 case 0:
ad312c7c 2480 set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
8776e519
HB		 2481 *rflags = kvm_x86_ops->get_rflags(vcpu);
2482 break;
2483 case 2:
ad312c7c 2484 vcpu->arch.cr2 = val;
8776e519
HB		 2485 break;
2486 case 3:
2487 set_cr3(vcpu, val);
2488 break;
2489 case 4:
ad312c7c 2490 set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
8776e519 2491 break;
152ff9be
JR		 2492 case 8:
2493 set_cr8(vcpu, val & 0xfUL);
2494 break;
8776e519
HB		 2495 default:
2496 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
2497 }
2498}
2499
07716717
DK		 2500static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
2501{
ad312c7c
ZX		 2502 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
2503 int j, nent = vcpu->arch.cpuid_nent;
07716717
DK		 2504
2505 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
2506 /* when no next entry is found, the current entry[i] is reselected */
2507 for (j = i + 1; j == i; j = (j + 1) % nent) {
ad312c7c 2508 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
07716717
DK		 2509 if (ej->function == e->function) {
2510 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2511 return j;
2512 }
2513 }
2514 return 0; /* silence gcc, even though control never reaches here */
2515}
2516
2517/* find an entry with matching function, matching index (if needed), and that
2518 * should be read next (if it's stateful) */
2519static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
2520 u32 function, u32 index)
2521{
2522 if (e->function != function)
2523 return 0;
2524 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
2525 return 0;
2526 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
2527 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
2528 return 0;
2529 return 1;
2530}
2531
8776e519
HB		 2532void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
2533{
2534 int i;
07716717
DK		 2535 u32 function, index;
2536 struct kvm_cpuid_entry2 *e, *best;
8776e519
HB		 2537
2538 kvm_x86_ops->cache_regs(vcpu);
ad312c7c
ZX		 2539 function = vcpu->arch.regs[VCPU_REGS_RAX];
2540 index = vcpu->arch.regs[VCPU_REGS_RCX];
2541 vcpu->arch.regs[VCPU_REGS_RAX] = 0;
2542 vcpu->arch.regs[VCPU_REGS_RBX] = 0;
2543 vcpu->arch.regs[VCPU_REGS_RCX] = 0;
2544 vcpu->arch.regs[VCPU_REGS_RDX] = 0;
8776e519 2545 best = NULL;
ad312c7c
ZX		 2546 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2547 e = &vcpu->arch.cpuid_entries[i];
07716717
DK		 2548 if (is_matching_cpuid_entry(e, function, index)) {
2549 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
2550 move_to_next_stateful_cpuid_entry(vcpu, i);
8776e519
HB		 2551 best = e;
2552 break;
2553 }
2554 /*
2555 * Both basic or both extended?
2556 */
2557 if (((e->function ^ function) & 0x80000000) == 0)
2558 if (!best || e->function > best->function)
2559 best = e;
2560 }
2561 if (best) {
ad312c7c
ZX		 2562 vcpu->arch.regs[VCPU_REGS_RAX] = best->eax;
2563 vcpu->arch.regs[VCPU_REGS_RBX] = best->ebx;
2564 vcpu->arch.regs[VCPU_REGS_RCX] = best->ecx;
2565 vcpu->arch.regs[VCPU_REGS_RDX] = best->edx;
8776e519
HB		 2566 }
2567 kvm_x86_ops->decache_regs(vcpu);
2568 kvm_x86_ops->skip_emulated_instruction(vcpu);
2569}
2570EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
d0752060 2571
b6c7a5dc
HB		 2572/*
2573 * Check if userspace requested an interrupt window, and that the
2574 * interrupt window is open.
2575 *
2576 * No need to exit to userspace if we already have an interrupt queued.
2577 */
2578static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
2579 struct kvm_run *kvm_run)
2580{
ad312c7c 2581 return (!vcpu->arch.irq_summary &&
b6c7a5dc 2582 kvm_run->request_interrupt_window &&
ad312c7c 2583 vcpu->arch.interrupt_window_open &&
b6c7a5dc
HB		 2584 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
2585}
2586
2587static void post_kvm_run_save(struct kvm_vcpu *vcpu,
2588 struct kvm_run *kvm_run)
2589{
2590 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
2591 kvm_run->cr8 = get_cr8(vcpu);
2592 kvm_run->apic_base = kvm_get_apic_base(vcpu);
2593 if (irqchip_in_kernel(vcpu->kvm))
2594 kvm_run->ready_for_interrupt_injection = 1;
2595 else
2596 kvm_run->ready_for_interrupt_injection =
ad312c7c
ZX		 2597 (vcpu->arch.interrupt_window_open &&
2598 vcpu->arch.irq_summary == 0);
b6c7a5dc
HB		 2599}
2600
b93463aa
AK		 2601static void vapic_enter(struct kvm_vcpu *vcpu)
2602{
2603 struct kvm_lapic *apic = vcpu->arch.apic;
2604 struct page *page;
2605
2606 if (!apic || !apic->vapic_addr)
2607 return;
2608
10589a46 2609 down_read(&current->mm->mmap_sem);
b93463aa 2610 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
10589a46 2611 up_read(&current->mm->mmap_sem);
72dc67a6
IE		 2612
2613 vcpu->arch.apic->vapic_page = page;
b93463aa
AK		 2614}
2615
2616static void vapic_exit(struct kvm_vcpu *vcpu)
2617{
2618 struct kvm_lapic *apic = vcpu->arch.apic;
2619
2620 if (!apic || !apic->vapic_addr)
2621 return;
2622
2623 kvm_release_page_dirty(apic->vapic_page);
2624 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
2625}
2626
b6c7a5dc
HB		 2627static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2628{
2629 int r;
2630
ad312c7c 2631 if (unlikely(vcpu->arch.mp_state == VCPU_MP_STATE_SIPI_RECEIVED)) {
b6c7a5dc 2632 pr_debug("vcpu %d received sipi with vector # %x\n",
ad312c7c 2633 vcpu->vcpu_id, vcpu->arch.sipi_vector);
b6c7a5dc
HB		 2634 kvm_lapic_reset(vcpu);
2635 r = kvm_x86_ops->vcpu_reset(vcpu);
2636 if (r)
2637 return r;
ad312c7c 2638 vcpu->arch.mp_state = VCPU_MP_STATE_RUNNABLE;
b6c7a5dc
HB		 2639 }
2640
b93463aa
AK		 2641 vapic_enter(vcpu);
2642
b6c7a5dc
HB		 2643preempted:
2644 if (vcpu->guest_debug.enabled)
2645 kvm_x86_ops->guest_debug_pre(vcpu);
2646
2647again:
2648 r = kvm_mmu_reload(vcpu);
2649 if (unlikely(r))
2650 goto out;
2651
2f52d58c
AK		 2652 if (vcpu->requests) {
2653 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
2654 __kvm_migrate_apic_timer(vcpu);
b93463aa
AK		 2655 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
2656 &vcpu->requests)) {
2657 kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
2658 r = 0;
2659 goto out;
2660 }
2f52d58c 2661 }
b93463aa 2662
b6c7a5dc
HB		 2663 kvm_inject_pending_timer_irqs(vcpu);
2664
2665 preempt_disable();
2666
2667 kvm_x86_ops->prepare_guest_switch(vcpu);
2668 kvm_load_guest_fpu(vcpu);
2669
2670 local_irq_disable();
2671
6c142801
AK		 2672 if (need_resched()) {
2673 local_irq_enable();
2674 preempt_enable();
2675 r = 1;
2676 goto out;
2677 }
2678
b6c7a5dc
HB		 2679 if (signal_pending(current)) {
2680 local_irq_enable();
2681 preempt_enable();
2682 r = -EINTR;
2683 kvm_run->exit_reason = KVM_EXIT_INTR;
2684 ++vcpu->stat.signal_exits;
2685 goto out;
2686 }
2687
ad312c7c 2688 if (vcpu->arch.exception.pending)
298101da
AK		 2689 __queue_exception(vcpu);
2690 else if (irqchip_in_kernel(vcpu->kvm))
b6c7a5dc 2691 kvm_x86_ops->inject_pending_irq(vcpu);
eb9774f0 2692 else
b6c7a5dc
HB		 2693 kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
2694
b93463aa
AK		 2695 kvm_lapic_sync_to_vapic(vcpu);
2696
b6c7a5dc
HB		 2697 vcpu->guest_mode = 1;
2698 kvm_guest_enter();
2699
2700 if (vcpu->requests)
2701 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
2702 kvm_x86_ops->tlb_flush(vcpu);
2703
2704 kvm_x86_ops->run(vcpu, kvm_run);
2705
2706 vcpu->guest_mode = 0;
2707 local_irq_enable();
2708
2709 ++vcpu->stat.exits;
2710
2711 /*
2712 * We must have an instruction between local_irq_enable() and
2713 * kvm_guest_exit(), so the timer interrupt isn't delayed by
2714 * the interrupt shadow. The stat.exits increment will do nicely.
2715 * But we need to prevent reordering, hence this barrier():
2716 */
2717 barrier();
2718
2719 kvm_guest_exit();
2720
2721 preempt_enable();
2722
2723 /*
2724 * Profile KVM exit RIPs:
2725 */
2726 if (unlikely(prof_on == KVM_PROFILING)) {
2727 kvm_x86_ops->cache_regs(vcpu);
ad312c7c 2728 profile_hit(KVM_PROFILING, (void *)vcpu->arch.rip);
b6c7a5dc
HB		 2729 }
2730
ad312c7c
ZX		 2731 if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
2732 vcpu->arch.exception.pending = false;
298101da 2733
b93463aa
AK		 2734 kvm_lapic_sync_from_vapic(vcpu);
2735
b6c7a5dc
HB		 2736 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
2737
2738 if (r > 0) {
2739 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
2740 r = -EINTR;
2741 kvm_run->exit_reason = KVM_EXIT_INTR;
2742 ++vcpu->stat.request_irq_exits;
2743 goto out;
2744 }
e1beb1d3 2745 if (!need_resched())
b6c7a5dc 2746 goto again;
b6c7a5dc
HB		 2747 }
2748
2749out:
2750 if (r > 0) {
2751 kvm_resched(vcpu);
2752 goto preempted;
2753 }
2754
2755 post_kvm_run_save(vcpu, kvm_run);
2756
b93463aa
AK		 2757 vapic_exit(vcpu);
2758
b6c7a5dc
HB		 2759 return r;
2760}
2761
2762int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2763{
2764 int r;
2765 sigset_t sigsaved;
2766
2767 vcpu_load(vcpu);
2768
ad312c7c 2769 if (unlikely(vcpu->arch.mp_state == VCPU_MP_STATE_UNINITIALIZED)) {
b6c7a5dc
HB		 2770 kvm_vcpu_block(vcpu);
2771 vcpu_put(vcpu);
2772 return -EAGAIN;
2773 }
2774
2775 if (vcpu->sigset_active)
2776 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
2777
2778 /* re-sync apic's tpr */
2779 if (!irqchip_in_kernel(vcpu->kvm))
2780 set_cr8(vcpu, kvm_run->cr8);
2781
ad312c7c 2782 if (vcpu->arch.pio.cur_count) {
b6c7a5dc
HB		 2783 r = complete_pio(vcpu);
2784 if (r)
2785 goto out;
2786 }
2787#if CONFIG_HAS_IOMEM
2788 if (vcpu->mmio_needed) {
2789 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
2790 vcpu->mmio_read_completed = 1;
2791 vcpu->mmio_needed = 0;
2792 r = emulate_instruction(vcpu, kvm_run,
571008da
SY		 2793 vcpu->arch.mmio_fault_cr2, 0,
2794 EMULTYPE_NO_DECODE);
b6c7a5dc
HB		 2795 if (r == EMULATE_DO_MMIO) {
2796 /*
2797 * Read-modify-write. Back to userspace.
2798 */
2799 r = 0;
2800 goto out;
2801 }
2802 }
2803#endif
2804 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL) {
2805 kvm_x86_ops->cache_regs(vcpu);
ad312c7c 2806 vcpu->arch.regs[VCPU_REGS_RAX] = kvm_run->hypercall.ret;
b6c7a5dc
HB		 2807 kvm_x86_ops->decache_regs(vcpu);
2808 }
2809
2810 r = __vcpu_run(vcpu, kvm_run);
2811
2812out:
2813 if (vcpu->sigset_active)
2814 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
2815
2816 vcpu_put(vcpu);
2817 return r;
2818}
2819
2820int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
2821{
2822 vcpu_load(vcpu);
2823
2824 kvm_x86_ops->cache_regs(vcpu);
2825
ad312c7c
ZX		 2826 regs->rax = vcpu->arch.regs[VCPU_REGS_RAX];
2827 regs->rbx = vcpu->arch.regs[VCPU_REGS_RBX];
2828 regs->rcx = vcpu->arch.regs[VCPU_REGS_RCX];
2829 regs->rdx = vcpu->arch.regs[VCPU_REGS_RDX];
2830 regs->rsi = vcpu->arch.regs[VCPU_REGS_RSI];
2831 regs->rdi = vcpu->arch.regs[VCPU_REGS_RDI];
2832 regs->rsp = vcpu->arch.regs[VCPU_REGS_RSP];
2833 regs->rbp = vcpu->arch.regs[VCPU_REGS_RBP];
b6c7a5dc 2834#ifdef CONFIG_X86_64
ad312c7c
ZX		 2835 regs->r8 = vcpu->arch.regs[VCPU_REGS_R8];
2836 regs->r9 = vcpu->arch.regs[VCPU_REGS_R9];
2837 regs->r10 = vcpu->arch.regs[VCPU_REGS_R10];
2838 regs->r11 = vcpu->arch.regs[VCPU_REGS_R11];
2839 regs->r12 = vcpu->arch.regs[VCPU_REGS_R12];
2840 regs->r13 = vcpu->arch.regs[VCPU_REGS_R13];
2841 regs->r14 = vcpu->arch.regs[VCPU_REGS_R14];
2842 regs->r15 = vcpu->arch.regs[VCPU_REGS_R15];
b6c7a5dc
HB		 2843#endif
2844
ad312c7c 2845 regs->rip = vcpu->arch.rip;
b6c7a5dc
HB		 2846 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
2847
2848 /*
2849 * Don't leak debug flags in case they were set for guest debugging
2850 */
2851 if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep)
2852 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
2853
2854 vcpu_put(vcpu);
2855
2856 return 0;
2857}
2858
2859int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
2860{
2861 vcpu_load(vcpu);
2862
ad312c7c
ZX		 2863 vcpu->arch.regs[VCPU_REGS_RAX] = regs->rax;
2864 vcpu->arch.regs[VCPU_REGS_RBX] = regs->rbx;
2865 vcpu->arch.regs[VCPU_REGS_RCX] = regs->rcx;
2866 vcpu->arch.regs[VCPU_REGS_RDX] = regs->rdx;
2867 vcpu->arch.regs[VCPU_REGS_RSI] = regs->rsi;
2868 vcpu->arch.regs[VCPU_REGS_RDI] = regs->rdi;
2869 vcpu->arch.regs[VCPU_REGS_RSP] = regs->rsp;
2870 vcpu->arch.regs[VCPU_REGS_RBP] = regs->rbp;
b6c7a5dc 2871#ifdef CONFIG_X86_64
ad312c7c
ZX		 2872 vcpu->arch.regs[VCPU_REGS_R8] = regs->r8;
2873 vcpu->arch.regs[VCPU_REGS_R9] = regs->r9;
2874 vcpu->arch.regs[VCPU_REGS_R10] = regs->r10;
2875 vcpu->arch.regs[VCPU_REGS_R11] = regs->r11;
2876 vcpu->arch.regs[VCPU_REGS_R12] = regs->r12;
2877 vcpu->arch.regs[VCPU_REGS_R13] = regs->r13;
2878 vcpu->arch.regs[VCPU_REGS_R14] = regs->r14;
2879 vcpu->arch.regs[VCPU_REGS_R15] = regs->r15;
b6c7a5dc
HB		 2880#endif
2881
ad312c7c 2882 vcpu->arch.rip = regs->rip;
b6c7a5dc
HB		 2883 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
2884
2885 kvm_x86_ops->decache_regs(vcpu);
2886
2887 vcpu_put(vcpu);
2888
2889 return 0;
2890}
2891
2892static void get_segment(struct kvm_vcpu *vcpu,
2893 struct kvm_segment *var, int seg)
2894{
2895 return kvm_x86_ops->get_segment(vcpu, var, seg);
2896}
2897
2898void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
2899{
2900 struct kvm_segment cs;
2901
2902 get_segment(vcpu, &cs, VCPU_SREG_CS);
2903 *db = cs.db;
2904 *l = cs.l;
2905}
2906EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
2907
2908int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
2909 struct kvm_sregs *sregs)
2910{
2911 struct descriptor_table dt;
2912 int pending_vec;
2913
2914 vcpu_load(vcpu);
2915
2916 get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
2917 get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
2918 get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
2919 get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
2920 get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
2921 get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
2922
2923 get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
2924 get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
2925
2926 kvm_x86_ops->get_idt(vcpu, &dt);
2927 sregs->idt.limit = dt.limit;
2928 sregs->idt.base = dt.base;
2929 kvm_x86_ops->get_gdt(vcpu, &dt);
2930 sregs->gdt.limit = dt.limit;
2931 sregs->gdt.base = dt.base;
2932
2933 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
ad312c7c
ZX		 2934 sregs->cr0 = vcpu->arch.cr0;
2935 sregs->cr2 = vcpu->arch.cr2;
2936 sregs->cr3 = vcpu->arch.cr3;
2937 sregs->cr4 = vcpu->arch.cr4;
b6c7a5dc 2938 sregs->cr8 = get_cr8(vcpu);
ad312c7c 2939 sregs->efer = vcpu->arch.shadow_efer;
b6c7a5dc
HB		 2940 sregs->apic_base = kvm_get_apic_base(vcpu);
2941
2942 if (irqchip_in_kernel(vcpu->kvm)) {
2943 memset(sregs->interrupt_bitmap, 0,
2944 sizeof sregs->interrupt_bitmap);
2945 pending_vec = kvm_x86_ops->get_irq(vcpu);
2946 if (pending_vec >= 0)
2947 set_bit(pending_vec,
2948 (unsigned long *)sregs->interrupt_bitmap);
2949 } else
ad312c7c 2950 memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
b6c7a5dc
HB		 2951 sizeof sregs->interrupt_bitmap);
2952
2953 vcpu_put(vcpu);
2954
2955 return 0;
2956}
2957
2958static void set_segment(struct kvm_vcpu *vcpu,
2959 struct kvm_segment *var, int seg)
2960{
2961 return kvm_x86_ops->set_segment(vcpu, var, seg);
2962}
2963
2964int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
2965 struct kvm_sregs *sregs)
2966{
2967 int mmu_reset_needed = 0;
2968 int i, pending_vec, max_bits;
2969 struct descriptor_table dt;
2970
2971 vcpu_load(vcpu);
2972
2973 dt.limit = sregs->idt.limit;
2974 dt.base = sregs->idt.base;
2975 kvm_x86_ops->set_idt(vcpu, &dt);
2976 dt.limit = sregs->gdt.limit;
2977 dt.base = sregs->gdt.base;
2978 kvm_x86_ops->set_gdt(vcpu, &dt);
2979
ad312c7c
ZX		 2980 vcpu->arch.cr2 = sregs->cr2;
2981 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
2982 vcpu->arch.cr3 = sregs->cr3;
b6c7a5dc
HB		 2983
2984 set_cr8(vcpu, sregs->cr8);
2985
ad312c7c 2986 mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
b6c7a5dc 2987 kvm_x86_ops->set_efer(vcpu, sregs->efer);
b6c7a5dc
HB		 2988 kvm_set_apic_base(vcpu, sregs->apic_base);
2989
2990 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2991
ad312c7c 2992 mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
b6c7a5dc 2993 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
d7306163 2994 vcpu->arch.cr0 = sregs->cr0;
b6c7a5dc 2995
ad312c7c 2996 mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
b6c7a5dc
HB		 2997 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
2998 if (!is_long_mode(vcpu) && is_pae(vcpu))
ad312c7c 2999 load_pdptrs(vcpu, vcpu->arch.cr3);
b6c7a5dc
HB		 3000
3001 if (mmu_reset_needed)
3002 kvm_mmu_reset_context(vcpu);
3003
3004 if (!irqchip_in_kernel(vcpu->kvm)) {
ad312c7c
ZX		 3005 memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
3006 sizeof vcpu->arch.irq_pending);
3007 vcpu->arch.irq_summary = 0;
3008 for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
3009 if (vcpu->arch.irq_pending[i])
3010 __set_bit(i, &vcpu->arch.irq_summary);
b6c7a5dc
HB		 3011 } else {
3012 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
3013 pending_vec = find_first_bit(
3014 (const unsigned long *)sregs->interrupt_bitmap,
3015 max_bits);
3016 /* Only pending external irq is handled here */
3017 if (pending_vec < max_bits) {
3018 kvm_x86_ops->set_irq(vcpu, pending_vec);
3019 pr_debug("Set back pending irq %d\n",
3020 pending_vec);
3021 }
3022 }
3023
3024 set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3025 set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3026 set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3027 set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3028 set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3029 set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3030
3031 set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3032 set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3033
3034 vcpu_put(vcpu);
3035
3036 return 0;
3037}
3038
3039int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
3040 struct kvm_debug_guest *dbg)
3041{
3042 int r;
3043
3044 vcpu_load(vcpu);
3045
3046 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
3047
3048 vcpu_put(vcpu);
3049
3050 return r;
3051}
3052
d0752060
HB		 3053/*
3054 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
3055 * we have asm/x86/processor.h
3056 */
3057struct fxsave {
3058 u16 cwd;
3059 u16 swd;
3060 u16 twd;
3061 u16 fop;
3062 u64 rip;
3063 u64 rdp;
3064 u32 mxcsr;
3065 u32 mxcsr_mask;
3066 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
3067#ifdef CONFIG_X86_64
3068 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
3069#else
3070 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
3071#endif
3072};
3073
8b006791
ZX		 3074/*
3075 * Translate a guest virtual address to a guest physical address.
3076 */
3077int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
3078 struct kvm_translation *tr)
3079{
3080 unsigned long vaddr = tr->linear_address;
3081 gpa_t gpa;
3082
3083 vcpu_load(vcpu);
72dc67a6 3084 down_read(&vcpu->kvm->slots_lock);
ad312c7c 3085 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
72dc67a6 3086 up_read(&vcpu->kvm->slots_lock);
8b006791
ZX		 3087 tr->physical_address = gpa;
3088 tr->valid = gpa != UNMAPPED_GVA;
3089 tr->writeable = 1;
3090 tr->usermode = 0;
8b006791
ZX		 3091 vcpu_put(vcpu);
3092
3093 return 0;
3094}
3095
d0752060
HB		 3096int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
3097{
ad312c7c 3098 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
d0752060
HB		 3099
3100 vcpu_load(vcpu);
3101
3102 memcpy(fpu->fpr, fxsave->st_space, 128);
3103 fpu->fcw = fxsave->cwd;
3104 fpu->fsw = fxsave->swd;
3105 fpu->ftwx = fxsave->twd;
3106 fpu->last_opcode = fxsave->fop;
3107 fpu->last_ip = fxsave->rip;
3108 fpu->last_dp = fxsave->rdp;
3109 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
3110
3111 vcpu_put(vcpu);
3112
3113 return 0;
3114}
3115
3116int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
3117{
ad312c7c 3118 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
d0752060
HB		 3119
3120 vcpu_load(vcpu);
3121
3122 memcpy(fxsave->st_space, fpu->fpr, 128);
3123 fxsave->cwd = fpu->fcw;
3124 fxsave->swd = fpu->fsw;
3125 fxsave->twd = fpu->ftwx;
3126 fxsave->fop = fpu->last_opcode;
3127 fxsave->rip = fpu->last_ip;
3128 fxsave->rdp = fpu->last_dp;
3129 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
3130
3131 vcpu_put(vcpu);
3132
3133 return 0;
3134}
3135
3136void fx_init(struct kvm_vcpu *vcpu)
3137{
3138 unsigned after_mxcsr_mask;
3139
3140 /* Initialize guest FPU by resetting ours and saving into guest's */
3141 preempt_disable();
ad312c7c 3142 fx_save(&vcpu->arch.host_fx_image);
d0752060 3143 fpu_init();
ad312c7c
ZX		 3144 fx_save(&vcpu->arch.guest_fx_image);
3145 fx_restore(&vcpu->arch.host_fx_image);
d0752060
HB		 3146 preempt_enable();
3147
ad312c7c 3148 vcpu->arch.cr0 |= X86_CR0_ET;
d0752060 3149 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
ad312c7c
ZX		 3150 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
3151 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
d0752060
HB		 3152 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
3153}
3154EXPORT_SYMBOL_GPL(fx_init);
3155
3156void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
3157{
3158 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
3159 return;
3160
3161 vcpu->guest_fpu_loaded = 1;
ad312c7c
ZX		 3162 fx_save(&vcpu->arch.host_fx_image);
3163 fx_restore(&vcpu->arch.guest_fx_image);
d0752060
HB		 3164}
3165EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
3166
3167void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
3168{
3169 if (!vcpu->guest_fpu_loaded)
3170 return;
3171
3172 vcpu->guest_fpu_loaded = 0;
ad312c7c
ZX		 3173 fx_save(&vcpu->arch.guest_fx_image);
3174 fx_restore(&vcpu->arch.host_fx_image);
f096ed85 3175 ++vcpu->stat.fpu_reload;
d0752060
HB		 3176}
3177EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
e9b11c17
ZX		 3178
3179void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
3180{
3181 kvm_x86_ops->vcpu_free(vcpu);
3182}
3183
3184struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
3185 unsigned int id)
3186{
26e5215f
AK		 3187 return kvm_x86_ops->vcpu_create(kvm, id);
3188}
e9b11c17 3189
26e5215f
AK		 3190int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
3191{
3192 int r;
e9b11c17
ZX		 3193
3194 /* We do fxsave: this must be aligned. */
ad312c7c 3195 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
e9b11c17
ZX		 3196
3197 vcpu_load(vcpu);
3198 r = kvm_arch_vcpu_reset(vcpu);
3199 if (r == 0)
3200 r = kvm_mmu_setup(vcpu);
3201 vcpu_put(vcpu);
3202 if (r < 0)
3203 goto free_vcpu;
3204
26e5215f 3205 return 0;
e9b11c17
ZX		 3206free_vcpu:
3207 kvm_x86_ops->vcpu_free(vcpu);
26e5215f 3208 return r;
e9b11c17
ZX		 3209}
3210
d40ccc62 3211void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
e9b11c17
ZX		 3212{
3213 vcpu_load(vcpu);
3214 kvm_mmu_unload(vcpu);
3215 vcpu_put(vcpu);
3216
3217 kvm_x86_ops->vcpu_free(vcpu);
3218}
3219
3220int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
3221{
3222 return kvm_x86_ops->vcpu_reset(vcpu);
3223}
3224
3225void kvm_arch_hardware_enable(void *garbage)
3226{
3227 kvm_x86_ops->hardware_enable(garbage);
3228}
3229
3230void kvm_arch_hardware_disable(void *garbage)
3231{
3232 kvm_x86_ops->hardware_disable(garbage);
3233}
3234
3235int kvm_arch_hardware_setup(void)
3236{
3237 return kvm_x86_ops->hardware_setup();
3238}
3239
3240void kvm_arch_hardware_unsetup(void)
3241{
3242 kvm_x86_ops->hardware_unsetup();
3243}
3244
3245void kvm_arch_check_processor_compat(void *rtn)
3246{
3247 kvm_x86_ops->check_processor_compatibility(rtn);
3248}
3249
3250int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
3251{
3252 struct page *page;
3253 struct kvm *kvm;
3254 int r;
3255
3256 BUG_ON(vcpu->kvm == NULL);
3257 kvm = vcpu->kvm;
3258
ad312c7c 3259 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
e9b11c17 3260 if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
ad312c7c 3261 vcpu->arch.mp_state = VCPU_MP_STATE_RUNNABLE;
e9b11c17 3262 else
ad312c7c 3263 vcpu->arch.mp_state = VCPU_MP_STATE_UNINITIALIZED;
e9b11c17
ZX		 3264
3265 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
3266 if (!page) {
3267 r = -ENOMEM;
3268 goto fail;
3269 }
ad312c7c 3270 vcpu->arch.pio_data = page_address(page);
e9b11c17
ZX		 3271
3272 r = kvm_mmu_create(vcpu);
3273 if (r < 0)
3274 goto fail_free_pio_data;
3275
3276 if (irqchip_in_kernel(kvm)) {
3277 r = kvm_create_lapic(vcpu);
3278 if (r < 0)
3279 goto fail_mmu_destroy;
3280 }
3281
3282 return 0;
3283
3284fail_mmu_destroy:
3285 kvm_mmu_destroy(vcpu);
3286fail_free_pio_data:
ad312c7c 3287 free_page((unsigned long)vcpu->arch.pio_data);
e9b11c17
ZX		 3288fail:
3289 return r;
3290}
3291
3292void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
3293{
3294 kvm_free_lapic(vcpu);
3295 kvm_mmu_destroy(vcpu);
ad312c7c 3296 free_page((unsigned long)vcpu->arch.pio_data);
e9b11c17 3297}
d19a9cd2
ZX		 3298
3299struct kvm *kvm_arch_create_vm(void)
3300{
3301 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
3302
3303 if (!kvm)
3304 return ERR_PTR(-ENOMEM);
3305
f05e70ac 3306 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
d19a9cd2
ZX		 3307
3308 return kvm;
3309}
3310
3311static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
3312{
3313 vcpu_load(vcpu);
3314 kvm_mmu_unload(vcpu);
3315 vcpu_put(vcpu);
3316}
3317
3318static void kvm_free_vcpus(struct kvm *kvm)
3319{
3320 unsigned int i;
3321
3322 /*
3323 * Unpin any mmu pages first.
3324 */
3325 for (i = 0; i < KVM_MAX_VCPUS; ++i)
3326 if (kvm->vcpus[i])
3327 kvm_unload_vcpu_mmu(kvm->vcpus[i]);
3328 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
3329 if (kvm->vcpus[i]) {
3330 kvm_arch_vcpu_free(kvm->vcpus[i]);
3331 kvm->vcpus[i] = NULL;
3332 }
3333 }
3334
3335}
3336
3337void kvm_arch_destroy_vm(struct kvm *kvm)
3338{
d7deeeb0
ZX		 3339 kfree(kvm->arch.vpic);
3340 kfree(kvm->arch.vioapic);
d19a9cd2
ZX		 3341 kvm_free_vcpus(kvm);
3342 kvm_free_physmem(kvm);
3343 kfree(kvm);
3344}
0de10343
ZX		 3345
3346int kvm_arch_set_memory_region(struct kvm *kvm,
3347 struct kvm_userspace_memory_region *mem,
3348 struct kvm_memory_slot old,
3349 int user_alloc)
3350{
3351 int npages = mem->memory_size >> PAGE_SHIFT;
3352 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
3353
3354 /*To keep backward compatibility with older userspace,
3355 *x86 needs to hanlde !user_alloc case.
3356 */
3357 if (!user_alloc) {
3358 if (npages && !old.rmap) {
72dc67a6 3359 down_write(&current->mm->mmap_sem);
0de10343
ZX		 3360 memslot->userspace_addr = do_mmap(NULL, 0,
3361 npages * PAGE_SIZE,
3362 PROT_READ | PROT_WRITE,
3363 MAP_SHARED | MAP_ANONYMOUS,
3364 0);
72dc67a6 3365 up_write(&current->mm->mmap_sem);
0de10343
ZX		 3366
3367 if (IS_ERR((void *)memslot->userspace_addr))
3368 return PTR_ERR((void *)memslot->userspace_addr);
3369 } else {
3370 if (!old.user_alloc && old.rmap) {
3371 int ret;
3372
72dc67a6 3373 down_write(&current->mm->mmap_sem);
0de10343
ZX		 3374 ret = do_munmap(current->mm, old.userspace_addr,
3375 old.npages * PAGE_SIZE);
72dc67a6 3376 up_write(&current->mm->mmap_sem);
0de10343
ZX		 3377 if (ret < 0)
3378 printk(KERN_WARNING
3379 "kvm_vm_ioctl_set_memory_region: "
3380 "failed to munmap memory\n");
3381 }
3382 }
3383 }
3384
f05e70ac 3385 if (!kvm->arch.n_requested_mmu_pages) {
0de10343
ZX		 3386 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
3387 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
3388 }
3389
3390 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
3391 kvm_flush_remote_tlbs(kvm);
3392
3393 return 0;
3394}
1d737c8a
ZX		 3395
3396int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
3397{
3398 return vcpu->arch.mp_state == VCPU_MP_STATE_RUNNABLE
3399 || vcpu->arch.mp_state == VCPU_MP_STATE_SIPI_RECEIVED;
3400}
5736199a
ZX		 3401
3402static void vcpu_kick_intr(void *info)
3403{
3404#ifdef DEBUG
3405 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
3406 printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
3407#endif
3408}
3409
3410void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
3411{
3412 int ipi_pcpu = vcpu->cpu;
3413
3414 if (waitqueue_active(&vcpu->wq)) {
3415 wake_up_interruptible(&vcpu->wq);
3416 ++vcpu->stat.halt_wakeup;
3417 }
3418 if (vcpu->guest_mode)
3419 smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0, 0);
3420}
Linux kernel - Deliverables
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