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KVM: Accelerated apic support
[deliverable/linux.git] / arch / x86 / kvm / x86.c
CommitLineData
043405e1
CO		 1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * derived from drivers/kvm/kvm_main.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 *
8 * Authors:
9 * Avi Kivity <avi@qumranet.com>
10 * Yaniv Kamay <yaniv@qumranet.com>
11 *
12 * This work is licensed under the terms of the GNU GPL, version 2. See
13 * the COPYING file in the top-level directory.
14 *
15 */
16
edf88417 17#include <linux/kvm_host.h>
5fb76f9b 18#include "segment_descriptor.h"
313a3dc7 19#include "irq.h"
1d737c8a 20#include "mmu.h"
313a3dc7
CO		 21
22#include <linux/kvm.h>
23#include <linux/fs.h>
24#include <linux/vmalloc.h>
5fb76f9b 25#include <linux/module.h>
0de10343 26#include <linux/mman.h>
2bacc55c 27#include <linux/highmem.h>
043405e1
CO		 28
29#include <asm/uaccess.h>
d825ed0a 30#include <asm/msr.h>
043405e1 31
313a3dc7 32#define MAX_IO_MSRS 256
a03490ed
CO		 33#define CR0_RESERVED_BITS \
34 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
35 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
36 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
37#define CR4_RESERVED_BITS \
38 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
39 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
40 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
41 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
42
43#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
15c4a640 44#define EFER_RESERVED_BITS 0xfffffffffffff2fe
313a3dc7 45
ba1389b7
AK		 46#define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
47#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
417bc304 48
97896d04
ZX		 49struct kvm_x86_ops *kvm_x86_ops;
50
417bc304 51struct kvm_stats_debugfs_item debugfs_entries[] = {
ba1389b7
AK		 52 { "pf_fixed", VCPU_STAT(pf_fixed) },
53 { "pf_guest", VCPU_STAT(pf_guest) },
54 { "tlb_flush", VCPU_STAT(tlb_flush) },
55 { "invlpg", VCPU_STAT(invlpg) },
56 { "exits", VCPU_STAT(exits) },
57 { "io_exits", VCPU_STAT(io_exits) },
58 { "mmio_exits", VCPU_STAT(mmio_exits) },
59 { "signal_exits", VCPU_STAT(signal_exits) },
60 { "irq_window", VCPU_STAT(irq_window_exits) },
61 { "halt_exits", VCPU_STAT(halt_exits) },
62 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
63 { "request_irq", VCPU_STAT(request_irq_exits) },
64 { "irq_exits", VCPU_STAT(irq_exits) },
65 { "host_state_reload", VCPU_STAT(host_state_reload) },
66 { "efer_reload", VCPU_STAT(efer_reload) },
67 { "fpu_reload", VCPU_STAT(fpu_reload) },
68 { "insn_emulation", VCPU_STAT(insn_emulation) },
69 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
4cee5764
AK		 70 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
71 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
72 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
73 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
74 { "mmu_flooded", VM_STAT(mmu_flooded) },
75 { "mmu_recycled", VM_STAT(mmu_recycled) },
dfc5aa00 76 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
0f74a24c 77 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
417bc304
HB		 78 { NULL }
79};
80
81
5fb76f9b
CO		 82unsigned long segment_base(u16 selector)
83{
84 struct descriptor_table gdt;
85 struct segment_descriptor *d;
86 unsigned long table_base;
87 unsigned long v;
88
89 if (selector == 0)
90 return 0;
91
92 asm("sgdt %0" : "=m"(gdt));
93 table_base = gdt.base;
94
95 if (selector & 4) { /* from ldt */
96 u16 ldt_selector;
97
98 asm("sldt %0" : "=g"(ldt_selector));
99 table_base = segment_base(ldt_selector);
100 }
101 d = (struct segment_descriptor *)(table_base + (selector & ~7));
102 v = d->base_low | ((unsigned long)d->base_mid << 16) |
103 ((unsigned long)d->base_high << 24);
104#ifdef CONFIG_X86_64
105 if (d->system == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
106 v |= ((unsigned long) \
107 ((struct segment_descriptor_64 *)d)->base_higher) << 32;
108#endif
109 return v;
110}
111EXPORT_SYMBOL_GPL(segment_base);
112
6866b83e
CO		 113u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
114{
115 if (irqchip_in_kernel(vcpu->kvm))
ad312c7c 116 return vcpu->arch.apic_base;
6866b83e 117 else
ad312c7c 118 return vcpu->arch.apic_base;
6866b83e
CO		 119}
120EXPORT_SYMBOL_GPL(kvm_get_apic_base);
121
122void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
123{
124 /* TODO: reserve bits check */
125 if (irqchip_in_kernel(vcpu->kvm))
126 kvm_lapic_set_base(vcpu, data);
127 else
ad312c7c 128 vcpu->arch.apic_base = data;
6866b83e
CO		 129}
130EXPORT_SYMBOL_GPL(kvm_set_apic_base);
131
298101da
AK		 132void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
133{
ad312c7c
ZX		 134 WARN_ON(vcpu->arch.exception.pending);
135 vcpu->arch.exception.pending = true;
136 vcpu->arch.exception.has_error_code = false;
137 vcpu->arch.exception.nr = nr;
298101da
AK		 138}
139EXPORT_SYMBOL_GPL(kvm_queue_exception);
140
c3c91fee
AK		 141void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
142 u32 error_code)
143{
144 ++vcpu->stat.pf_guest;
ad312c7c 145 if (vcpu->arch.exception.pending && vcpu->arch.exception.nr == PF_VECTOR) {
c3c91fee
AK		 146 printk(KERN_DEBUG "kvm: inject_page_fault:"
147 " double fault 0x%lx\n", addr);
ad312c7c
ZX		 148 vcpu->arch.exception.nr = DF_VECTOR;
149 vcpu->arch.exception.error_code = 0;
c3c91fee
AK		 150 return;
151 }
ad312c7c 152 vcpu->arch.cr2 = addr;
c3c91fee
AK		 153 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
154}
155
298101da
AK		 156void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
157{
ad312c7c
ZX		 158 WARN_ON(vcpu->arch.exception.pending);
159 vcpu->arch.exception.pending = true;
160 vcpu->arch.exception.has_error_code = true;
161 vcpu->arch.exception.nr = nr;
162 vcpu->arch.exception.error_code = error_code;
298101da
AK		 163}
164EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
165
166static void __queue_exception(struct kvm_vcpu *vcpu)
167{
ad312c7c
ZX		 168 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
169 vcpu->arch.exception.has_error_code,
170 vcpu->arch.exception.error_code);
298101da
AK		 171}
172
a03490ed
CO		 173/*
174 * Load the pae pdptrs. Return true is they are all valid.
175 */
176int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
177{
178 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
179 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
180 int i;
181 int ret;
ad312c7c 182 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
a03490ed
CO		 183
184 mutex_lock(&vcpu->kvm->lock);
185 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
186 offset * sizeof(u64), sizeof(pdpte));
187 if (ret < 0) {
188 ret = 0;
189 goto out;
190 }
191 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
192 if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
193 ret = 0;
194 goto out;
195 }
196 }
197 ret = 1;
198
ad312c7c 199 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
a03490ed
CO		 200out:
201 mutex_unlock(&vcpu->kvm->lock);
202
203 return ret;
204}
205
d835dfec
AK		 206static bool pdptrs_changed(struct kvm_vcpu *vcpu)
207{
ad312c7c 208 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
d835dfec
AK		 209 bool changed = true;
210 int r;
211
212 if (is_long_mode(vcpu) || !is_pae(vcpu))
213 return false;
214
215 mutex_lock(&vcpu->kvm->lock);
ad312c7c 216 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
d835dfec
AK		 217 if (r < 0)
218 goto out;
ad312c7c 219 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
d835dfec
AK		 220out:
221 mutex_unlock(&vcpu->kvm->lock);
222
223 return changed;
224}
225
a03490ed
CO		 226void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
227{
228 if (cr0 & CR0_RESERVED_BITS) {
229 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
ad312c7c 230 cr0, vcpu->arch.cr0);
c1a5d4f9 231 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 232 return;
233 }
234
235 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
236 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
c1a5d4f9 237 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 238 return;
239 }
240
241 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
242 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
243 "and a clear PE flag\n");
c1a5d4f9 244 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 245 return;
246 }
247
248 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
249#ifdef CONFIG_X86_64
ad312c7c 250 if ((vcpu->arch.shadow_efer & EFER_LME)) {
a03490ed
CO		 251 int cs_db, cs_l;
252
253 if (!is_pae(vcpu)) {
254 printk(KERN_DEBUG "set_cr0: #GP, start paging "
255 "in long mode while PAE is disabled\n");
c1a5d4f9 256 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 257 return;
258 }
259 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
260 if (cs_l) {
261 printk(KERN_DEBUG "set_cr0: #GP, start paging "
262 "in long mode while CS.L == 1\n");
c1a5d4f9 263 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 264 return;
265
266 }
267 } else
268#endif
ad312c7c 269 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
a03490ed
CO		 270 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
271 "reserved bits\n");
c1a5d4f9 272 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 273 return;
274 }
275
276 }
277
278 kvm_x86_ops->set_cr0(vcpu, cr0);
ad312c7c 279 vcpu->arch.cr0 = cr0;
a03490ed
CO		 280
281 mutex_lock(&vcpu->kvm->lock);
282 kvm_mmu_reset_context(vcpu);
283 mutex_unlock(&vcpu->kvm->lock);
284 return;
285}
286EXPORT_SYMBOL_GPL(set_cr0);
287
288void lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
289{
ad312c7c 290 set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
a03490ed
CO		 291}
292EXPORT_SYMBOL_GPL(lmsw);
293
294void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
295{
296 if (cr4 & CR4_RESERVED_BITS) {
297 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
c1a5d4f9 298 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 299 return;
300 }
301
302 if (is_long_mode(vcpu)) {
303 if (!(cr4 & X86_CR4_PAE)) {
304 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
305 "in long mode\n");
c1a5d4f9 306 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 307 return;
308 }
309 } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
ad312c7c 310 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
a03490ed 311 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
c1a5d4f9 312 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 313 return;
314 }
315
316 if (cr4 & X86_CR4_VMXE) {
317 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
c1a5d4f9 318 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 319 return;
320 }
321 kvm_x86_ops->set_cr4(vcpu, cr4);
ad312c7c 322 vcpu->arch.cr4 = cr4;
a03490ed
CO		 323 mutex_lock(&vcpu->kvm->lock);
324 kvm_mmu_reset_context(vcpu);
325 mutex_unlock(&vcpu->kvm->lock);
326}
327EXPORT_SYMBOL_GPL(set_cr4);
328
329void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
330{
ad312c7c 331 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
d835dfec
AK		 332 kvm_mmu_flush_tlb(vcpu);
333 return;
334 }
335
a03490ed
CO		 336 if (is_long_mode(vcpu)) {
337 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
338 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
c1a5d4f9 339 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 340 return;
341 }
342 } else {
343 if (is_pae(vcpu)) {
344 if (cr3 & CR3_PAE_RESERVED_BITS) {
345 printk(KERN_DEBUG
346 "set_cr3: #GP, reserved bits\n");
c1a5d4f9 347 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 348 return;
349 }
350 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
351 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
352 "reserved bits\n");
c1a5d4f9 353 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 354 return;
355 }
356 }
357 /*
358 * We don't check reserved bits in nonpae mode, because
359 * this isn't enforced, and VMware depends on this.
360 */
361 }
362
363 mutex_lock(&vcpu->kvm->lock);
364 /*
365 * Does the new cr3 value map to physical memory? (Note, we
366 * catch an invalid cr3 even in real-mode, because it would
367 * cause trouble later on when we turn on paging anyway.)
368 *
369 * A real CPU would silently accept an invalid cr3 and would
370 * attempt to use it - with largely undefined (and often hard
371 * to debug) behavior on the guest side.
372 */
373 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
c1a5d4f9 374 kvm_inject_gp(vcpu, 0);
a03490ed 375 else {
ad312c7c
ZX		 376 vcpu->arch.cr3 = cr3;
377 vcpu->arch.mmu.new_cr3(vcpu);
a03490ed
CO		 378 }
379 mutex_unlock(&vcpu->kvm->lock);
380}
381EXPORT_SYMBOL_GPL(set_cr3);
382
383void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
384{
385 if (cr8 & CR8_RESERVED_BITS) {
386 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
c1a5d4f9 387 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 388 return;
389 }
390 if (irqchip_in_kernel(vcpu->kvm))
391 kvm_lapic_set_tpr(vcpu, cr8);
392 else
ad312c7c 393 vcpu->arch.cr8 = cr8;
a03490ed
CO		 394}
395EXPORT_SYMBOL_GPL(set_cr8);
396
397unsigned long get_cr8(struct kvm_vcpu *vcpu)
398{
399 if (irqchip_in_kernel(vcpu->kvm))
400 return kvm_lapic_get_cr8(vcpu);
401 else
ad312c7c 402 return vcpu->arch.cr8;
a03490ed
CO		 403}
404EXPORT_SYMBOL_GPL(get_cr8);
405
043405e1
CO		 406/*
407 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
408 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
409 *
410 * This list is modified at module load time to reflect the
411 * capabilities of the host cpu.
412 */
413static u32 msrs_to_save[] = {
414 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
415 MSR_K6_STAR,
416#ifdef CONFIG_X86_64
417 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
418#endif
419 MSR_IA32_TIME_STAMP_COUNTER,
420};
421
422static unsigned num_msrs_to_save;
423
424static u32 emulated_msrs[] = {
425 MSR_IA32_MISC_ENABLE,
426};
427
15c4a640
CO		 428#ifdef CONFIG_X86_64
429
430static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
431{
432 if (efer & EFER_RESERVED_BITS) {
433 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
434 efer);
c1a5d4f9 435 kvm_inject_gp(vcpu, 0);
15c4a640
CO		 436 return;
437 }
438
439 if (is_paging(vcpu)
ad312c7c 440 && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
15c4a640 441 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
c1a5d4f9 442 kvm_inject_gp(vcpu, 0);
15c4a640
CO		 443 return;
444 }
445
446 kvm_x86_ops->set_efer(vcpu, efer);
447
448 efer &= ~EFER_LMA;
ad312c7c 449 efer |= vcpu->arch.shadow_efer & EFER_LMA;
15c4a640 450
ad312c7c 451 vcpu->arch.shadow_efer = efer;
15c4a640
CO		 452}
453
454#endif
455
456/*
457 * Writes msr value into into the appropriate "register".
458 * Returns 0 on success, non-0 otherwise.
459 * Assumes vcpu_load() was already called.
460 */
461int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
462{
463 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
464}
465
313a3dc7
CO		 466/*
467 * Adapt set_msr() to msr_io()'s calling convention
468 */
469static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
470{
471 return kvm_set_msr(vcpu, index, *data);
472}
473
15c4a640
CO		 474
475int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
476{
477 switch (msr) {
478#ifdef CONFIG_X86_64
479 case MSR_EFER:
480 set_efer(vcpu, data);
481 break;
482#endif
483 case MSR_IA32_MC0_STATUS:
484 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
485 __FUNCTION__, data);
486 break;
487 case MSR_IA32_MCG_STATUS:
488 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
489 __FUNCTION__, data);
490 break;
491 case MSR_IA32_UCODE_REV:
492 case MSR_IA32_UCODE_WRITE:
493 case 0x200 ... 0x2ff: /* MTRRs */
494 break;
495 case MSR_IA32_APICBASE:
496 kvm_set_apic_base(vcpu, data);
497 break;
498 case MSR_IA32_MISC_ENABLE:
ad312c7c 499 vcpu->arch.ia32_misc_enable_msr = data;
15c4a640
CO		 500 break;
501 default:
565f1fbd 502 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
15c4a640
CO		 503 return 1;
504 }
505 return 0;
506}
507EXPORT_SYMBOL_GPL(kvm_set_msr_common);
508
509
510/*
511 * Reads an msr value (of 'msr_index') into 'pdata'.
512 * Returns 0 on success, non-0 otherwise.
513 * Assumes vcpu_load() was already called.
514 */
515int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
516{
517 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
518}
519
520int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
521{
522 u64 data;
523
524 switch (msr) {
525 case 0xc0010010: /* SYSCFG */
526 case 0xc0010015: /* HWCR */
527 case MSR_IA32_PLATFORM_ID:
528 case MSR_IA32_P5_MC_ADDR:
529 case MSR_IA32_P5_MC_TYPE:
530 case MSR_IA32_MC0_CTL:
531 case MSR_IA32_MCG_STATUS:
532 case MSR_IA32_MCG_CAP:
533 case MSR_IA32_MC0_MISC:
534 case MSR_IA32_MC0_MISC+4:
535 case MSR_IA32_MC0_MISC+8:
536 case MSR_IA32_MC0_MISC+12:
537 case MSR_IA32_MC0_MISC+16:
538 case MSR_IA32_UCODE_REV:
539 case MSR_IA32_PERF_STATUS:
540 case MSR_IA32_EBL_CR_POWERON:
541 /* MTRR registers */
542 case 0xfe:
543 case 0x200 ... 0x2ff:
544 data = 0;
545 break;
546 case 0xcd: /* fsb frequency */
547 data = 3;
548 break;
549 case MSR_IA32_APICBASE:
550 data = kvm_get_apic_base(vcpu);
551 break;
552 case MSR_IA32_MISC_ENABLE:
ad312c7c 553 data = vcpu->arch.ia32_misc_enable_msr;
15c4a640
CO		 554 break;
555#ifdef CONFIG_X86_64
556 case MSR_EFER:
ad312c7c 557 data = vcpu->arch.shadow_efer;
15c4a640
CO		 558 break;
559#endif
560 default:
561 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
562 return 1;
563 }
564 *pdata = data;
565 return 0;
566}
567EXPORT_SYMBOL_GPL(kvm_get_msr_common);
568
313a3dc7
CO		 569/*
570 * Read or write a bunch of msrs. All parameters are kernel addresses.
571 *
572 * @return number of msrs set successfully.
573 */
574static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
575 struct kvm_msr_entry *entries,
576 int (*do_msr)(struct kvm_vcpu *vcpu,
577 unsigned index, u64 *data))
578{
579 int i;
580
581 vcpu_load(vcpu);
582
583 for (i = 0; i < msrs->nmsrs; ++i)
584 if (do_msr(vcpu, entries[i].index, &entries[i].data))
585 break;
586
587 vcpu_put(vcpu);
588
589 return i;
590}
591
592/*
593 * Read or write a bunch of msrs. Parameters are user addresses.
594 *
595 * @return number of msrs set successfully.
596 */
597static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
598 int (*do_msr)(struct kvm_vcpu *vcpu,
599 unsigned index, u64 *data),
600 int writeback)
601{
602 struct kvm_msrs msrs;
603 struct kvm_msr_entry *entries;
604 int r, n;
605 unsigned size;
606
607 r = -EFAULT;
608 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
609 goto out;
610
611 r = -E2BIG;
612 if (msrs.nmsrs >= MAX_IO_MSRS)
613 goto out;
614
615 r = -ENOMEM;
616 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
617 entries = vmalloc(size);
618 if (!entries)
619 goto out;
620
621 r = -EFAULT;
622 if (copy_from_user(entries, user_msrs->entries, size))
623 goto out_free;
624
625 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
626 if (r < 0)
627 goto out_free;
628
629 r = -EFAULT;
630 if (writeback && copy_to_user(user_msrs->entries, entries, size))
631 goto out_free;
632
633 r = n;
634
635out_free:
636 vfree(entries);
637out:
638 return r;
639}
640
e9b11c17
ZX		 641/*
642 * Make sure that a cpu that is being hot-unplugged does not have any vcpus
643 * cached on it.
644 */
645void decache_vcpus_on_cpu(int cpu)
646{
647 struct kvm *vm;
648 struct kvm_vcpu *vcpu;
649 int i;
650
651 spin_lock(&kvm_lock);
652 list_for_each_entry(vm, &vm_list, vm_list)
653 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
654 vcpu = vm->vcpus[i];
655 if (!vcpu)
656 continue;
657 /*
658 * If the vcpu is locked, then it is running on some
659 * other cpu and therefore it is not cached on the
660 * cpu in question.
661 *
662 * If it's not locked, check the last cpu it executed
663 * on.
664 */
665 if (mutex_trylock(&vcpu->mutex)) {
666 if (vcpu->cpu == cpu) {
667 kvm_x86_ops->vcpu_decache(vcpu);
668 vcpu->cpu = -1;
669 }
670 mutex_unlock(&vcpu->mutex);
671 }
672 }
673 spin_unlock(&kvm_lock);
674}
675
018d00d2
ZX		 676int kvm_dev_ioctl_check_extension(long ext)
677{
678 int r;
679
680 switch (ext) {
681 case KVM_CAP_IRQCHIP:
682 case KVM_CAP_HLT:
683 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
684 case KVM_CAP_USER_MEMORY:
685 case KVM_CAP_SET_TSS_ADDR:
07716717 686 case KVM_CAP_EXT_CPUID:
b209749f 687 case KVM_CAP_VAPIC:
018d00d2
ZX		 688 r = 1;
689 break;
690 default:
691 r = 0;
692 break;
693 }
694 return r;
695
696}
697
043405e1
CO		 698long kvm_arch_dev_ioctl(struct file *filp,
699 unsigned int ioctl, unsigned long arg)
700{
701 void __user *argp = (void __user *)arg;
702 long r;
703
704 switch (ioctl) {
705 case KVM_GET_MSR_INDEX_LIST: {
706 struct kvm_msr_list __user *user_msr_list = argp;
707 struct kvm_msr_list msr_list;
708 unsigned n;
709
710 r = -EFAULT;
711 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
712 goto out;
713 n = msr_list.nmsrs;
714 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
715 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
716 goto out;
717 r = -E2BIG;
718 if (n < num_msrs_to_save)
719 goto out;
720 r = -EFAULT;
721 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
722 num_msrs_to_save * sizeof(u32)))
723 goto out;
724 if (copy_to_user(user_msr_list->indices
725 + num_msrs_to_save * sizeof(u32),
726 &emulated_msrs,
727 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
728 goto out;
729 r = 0;
730 break;
731 }
732 default:
733 r = -EINVAL;
734 }
735out:
736 return r;
737}
738
313a3dc7
CO		 739void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
740{
741 kvm_x86_ops->vcpu_load(vcpu, cpu);
742}
743
744void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
745{
746 kvm_x86_ops->vcpu_put(vcpu);
9327fd11 747 kvm_put_guest_fpu(vcpu);
313a3dc7
CO		 748}
749
07716717 750static int is_efer_nx(void)
313a3dc7
CO		 751{
752 u64 efer;
313a3dc7
CO		 753
754 rdmsrl(MSR_EFER, efer);
07716717
DK		 755 return efer & EFER_NX;
756}
757
758static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
759{
760 int i;
761 struct kvm_cpuid_entry2 *e, *entry;
762
313a3dc7 763 entry = NULL;
ad312c7c
ZX		 764 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
765 e = &vcpu->arch.cpuid_entries[i];
313a3dc7
CO		 766 if (e->function == 0x80000001) {
767 entry = e;
768 break;
769 }
770 }
07716717 771 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
313a3dc7
CO		 772 entry->edx &= ~(1 << 20);
773 printk(KERN_INFO "kvm: guest NX capability removed\n");
774 }
775}
776
07716717 777/* when an old userspace process fills a new kernel module */
313a3dc7
CO		 778static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
779 struct kvm_cpuid *cpuid,
780 struct kvm_cpuid_entry __user *entries)
07716717
DK		 781{
782 int r, i;
783 struct kvm_cpuid_entry *cpuid_entries;
784
785 r = -E2BIG;
786 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
787 goto out;
788 r = -ENOMEM;
789 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
790 if (!cpuid_entries)
791 goto out;
792 r = -EFAULT;
793 if (copy_from_user(cpuid_entries, entries,
794 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
795 goto out_free;
796 for (i = 0; i < cpuid->nent; i++) {
ad312c7c
ZX		 797 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
798 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
799 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
800 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
801 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
802 vcpu->arch.cpuid_entries[i].index = 0;
803 vcpu->arch.cpuid_entries[i].flags = 0;
804 vcpu->arch.cpuid_entries[i].padding[0] = 0;
805 vcpu->arch.cpuid_entries[i].padding[1] = 0;
806 vcpu->arch.cpuid_entries[i].padding[2] = 0;
807 }
808 vcpu->arch.cpuid_nent = cpuid->nent;
07716717
DK		 809 cpuid_fix_nx_cap(vcpu);
810 r = 0;
811
812out_free:
813 vfree(cpuid_entries);
814out:
815 return r;
816}
817
818static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
819 struct kvm_cpuid2 *cpuid,
820 struct kvm_cpuid_entry2 __user *entries)
313a3dc7
CO		 821{
822 int r;
823
824 r = -E2BIG;
825 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
826 goto out;
827 r = -EFAULT;
ad312c7c 828 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
07716717 829 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
313a3dc7 830 goto out;
ad312c7c 831 vcpu->arch.cpuid_nent = cpuid->nent;
313a3dc7
CO		 832 return 0;
833
834out:
835 return r;
836}
837
07716717
DK		 838static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
839 struct kvm_cpuid2 *cpuid,
840 struct kvm_cpuid_entry2 __user *entries)
841{
842 int r;
843
844 r = -E2BIG;
ad312c7c 845 if (cpuid->nent < vcpu->arch.cpuid_nent)
07716717
DK		 846 goto out;
847 r = -EFAULT;
ad312c7c
ZX		 848 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
849 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
07716717
DK		 850 goto out;
851 return 0;
852
853out:
ad312c7c 854 cpuid->nent = vcpu->arch.cpuid_nent;
07716717
DK		 855 return r;
856}
857
858static inline u32 bit(int bitno)
859{
860 return 1 << (bitno & 31);
861}
862
863static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
864 u32 index)
865{
866 entry->function = function;
867 entry->index = index;
868 cpuid_count(entry->function, entry->index,
869 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
870 entry->flags = 0;
871}
872
873static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
874 u32 index, int *nent, int maxnent)
875{
876 const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
877 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
878 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
879 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
880 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
881 bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) |
882 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
883 bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
884 bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
885 bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
886 const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
887 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
888 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
889 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
890 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
891 bit(X86_FEATURE_PGE) |
892 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
893 bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
894 bit(X86_FEATURE_SYSCALL) |
895 (bit(X86_FEATURE_NX) && is_efer_nx()) |
896#ifdef CONFIG_X86_64
897 bit(X86_FEATURE_LM) |
898#endif
899 bit(X86_FEATURE_MMXEXT) |
900 bit(X86_FEATURE_3DNOWEXT) |
901 bit(X86_FEATURE_3DNOW);
902 const u32 kvm_supported_word3_x86_features =
903 bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
904 const u32 kvm_supported_word6_x86_features =
905 bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY);
906
907 /* all func 2 cpuid_count() should be called on the same cpu */
908 get_cpu();
909 do_cpuid_1_ent(entry, function, index);
910 ++*nent;
911
912 switch (function) {
913 case 0:
914 entry->eax = min(entry->eax, (u32)0xb);
915 break;
916 case 1:
917 entry->edx &= kvm_supported_word0_x86_features;
918 entry->ecx &= kvm_supported_word3_x86_features;
919 break;
920 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
921 * may return different values. This forces us to get_cpu() before
922 * issuing the first command, and also to emulate this annoying behavior
923 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
924 case 2: {
925 int t, times = entry->eax & 0xff;
926
927 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
928 for (t = 1; t < times && *nent < maxnent; ++t) {
929 do_cpuid_1_ent(&entry[t], function, 0);
930 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
931 ++*nent;
932 }
933 break;
934 }
935 /* function 4 and 0xb have additional index. */
936 case 4: {
937 int index, cache_type;
938
939 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
940 /* read more entries until cache_type is zero */
941 for (index = 1; *nent < maxnent; ++index) {
942 cache_type = entry[index - 1].eax & 0x1f;
943 if (!cache_type)
944 break;
945 do_cpuid_1_ent(&entry[index], function, index);
946 entry[index].flags |=
947 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
948 ++*nent;
949 }
950 break;
951 }
952 case 0xb: {
953 int index, level_type;
954
955 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
956 /* read more entries until level_type is zero */
957 for (index = 1; *nent < maxnent; ++index) {
958 level_type = entry[index - 1].ecx & 0xff;
959 if (!level_type)
960 break;
961 do_cpuid_1_ent(&entry[index], function, index);
962 entry[index].flags |=
963 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
964 ++*nent;
965 }
966 break;
967 }
968 case 0x80000000:
969 entry->eax = min(entry->eax, 0x8000001a);
970 break;
971 case 0x80000001:
972 entry->edx &= kvm_supported_word1_x86_features;
973 entry->ecx &= kvm_supported_word6_x86_features;
974 break;
975 }
976 put_cpu();
977}
978
979static int kvm_vm_ioctl_get_supported_cpuid(struct kvm *kvm,
980 struct kvm_cpuid2 *cpuid,
981 struct kvm_cpuid_entry2 __user *entries)
982{
983 struct kvm_cpuid_entry2 *cpuid_entries;
984 int limit, nent = 0, r = -E2BIG;
985 u32 func;
986
987 if (cpuid->nent < 1)
988 goto out;
989 r = -ENOMEM;
990 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
991 if (!cpuid_entries)
992 goto out;
993
994 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
995 limit = cpuid_entries[0].eax;
996 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
997 do_cpuid_ent(&cpuid_entries[nent], func, 0,
998 &nent, cpuid->nent);
999 r = -E2BIG;
1000 if (nent >= cpuid->nent)
1001 goto out_free;
1002
1003 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1004 limit = cpuid_entries[nent - 1].eax;
1005 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1006 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1007 &nent, cpuid->nent);
1008 r = -EFAULT;
1009 if (copy_to_user(entries, cpuid_entries,
1010 nent * sizeof(struct kvm_cpuid_entry2)))
1011 goto out_free;
1012 cpuid->nent = nent;
1013 r = 0;
1014
1015out_free:
1016 vfree(cpuid_entries);
1017out:
1018 return r;
1019}
1020
313a3dc7
CO		 1021static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1022 struct kvm_lapic_state *s)
1023{
1024 vcpu_load(vcpu);
ad312c7c 1025 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
313a3dc7
CO		 1026 vcpu_put(vcpu);
1027
1028 return 0;
1029}
1030
1031static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1032 struct kvm_lapic_state *s)
1033{
1034 vcpu_load(vcpu);
ad312c7c 1035 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
313a3dc7
CO		 1036 kvm_apic_post_state_restore(vcpu);
1037 vcpu_put(vcpu);
1038
1039 return 0;
1040}
1041
f77bc6a4
ZX		 1042static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1043 struct kvm_interrupt *irq)
1044{
1045 if (irq->irq < 0 || irq->irq >= 256)
1046 return -EINVAL;
1047 if (irqchip_in_kernel(vcpu->kvm))
1048 return -ENXIO;
1049 vcpu_load(vcpu);
1050
ad312c7c
ZX		 1051 set_bit(irq->irq, vcpu->arch.irq_pending);
1052 set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
f77bc6a4
ZX		 1053
1054 vcpu_put(vcpu);
1055
1056 return 0;
1057}
1058
b209749f
AK		 1059static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1060 struct kvm_tpr_access_ctl *tac)
1061{
1062 if (tac->flags)
1063 return -EINVAL;
1064 vcpu->arch.tpr_access_reporting = !!tac->enabled;
1065 return 0;
1066}
1067
313a3dc7
CO		 1068long kvm_arch_vcpu_ioctl(struct file *filp,
1069 unsigned int ioctl, unsigned long arg)
1070{
1071 struct kvm_vcpu *vcpu = filp->private_data;
1072 void __user *argp = (void __user *)arg;
1073 int r;
1074
1075 switch (ioctl) {
1076 case KVM_GET_LAPIC: {
1077 struct kvm_lapic_state lapic;
1078
1079 memset(&lapic, 0, sizeof lapic);
1080 r = kvm_vcpu_ioctl_get_lapic(vcpu, &lapic);
1081 if (r)
1082 goto out;
1083 r = -EFAULT;
1084 if (copy_to_user(argp, &lapic, sizeof lapic))
1085 goto out;
1086 r = 0;
1087 break;
1088 }
1089 case KVM_SET_LAPIC: {
1090 struct kvm_lapic_state lapic;
1091
1092 r = -EFAULT;
1093 if (copy_from_user(&lapic, argp, sizeof lapic))
1094 goto out;
1095 r = kvm_vcpu_ioctl_set_lapic(vcpu, &lapic);;
1096 if (r)
1097 goto out;
1098 r = 0;
1099 break;
1100 }
f77bc6a4
ZX		 1101 case KVM_INTERRUPT: {
1102 struct kvm_interrupt irq;
1103
1104 r = -EFAULT;
1105 if (copy_from_user(&irq, argp, sizeof irq))
1106 goto out;
1107 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1108 if (r)
1109 goto out;
1110 r = 0;
1111 break;
1112 }
313a3dc7
CO		 1113 case KVM_SET_CPUID: {
1114 struct kvm_cpuid __user *cpuid_arg = argp;
1115 struct kvm_cpuid cpuid;
1116
1117 r = -EFAULT;
1118 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1119 goto out;
1120 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1121 if (r)
1122 goto out;
1123 break;
1124 }
07716717
DK		 1125 case KVM_SET_CPUID2: {
1126 struct kvm_cpuid2 __user *cpuid_arg = argp;
1127 struct kvm_cpuid2 cpuid;
1128
1129 r = -EFAULT;
1130 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1131 goto out;
1132 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1133 cpuid_arg->entries);
1134 if (r)
1135 goto out;
1136 break;
1137 }
1138 case KVM_GET_CPUID2: {
1139 struct kvm_cpuid2 __user *cpuid_arg = argp;
1140 struct kvm_cpuid2 cpuid;
1141
1142 r = -EFAULT;
1143 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1144 goto out;
1145 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1146 cpuid_arg->entries);
1147 if (r)
1148 goto out;
1149 r = -EFAULT;
1150 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1151 goto out;
1152 r = 0;
1153 break;
1154 }
313a3dc7
CO		 1155 case KVM_GET_MSRS:
1156 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1157 break;
1158 case KVM_SET_MSRS:
1159 r = msr_io(vcpu, argp, do_set_msr, 0);
1160 break;
b209749f
AK		 1161 case KVM_TPR_ACCESS_REPORTING: {
1162 struct kvm_tpr_access_ctl tac;
1163
1164 r = -EFAULT;
1165 if (copy_from_user(&tac, argp, sizeof tac))
1166 goto out;
1167 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1168 if (r)
1169 goto out;
1170 r = -EFAULT;
1171 if (copy_to_user(argp, &tac, sizeof tac))
1172 goto out;
1173 r = 0;
1174 break;
1175 };
b93463aa
AK		 1176 case KVM_SET_VAPIC_ADDR: {
1177 struct kvm_vapic_addr va;
1178
1179 r = -EINVAL;
1180 if (!irqchip_in_kernel(vcpu->kvm))
1181 goto out;
1182 r = -EFAULT;
1183 if (copy_from_user(&va, argp, sizeof va))
1184 goto out;
1185 r = 0;
1186 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1187 break;
1188 }
313a3dc7
CO		 1189 default:
1190 r = -EINVAL;
1191 }
1192out:
1193 return r;
1194}
1195
1fe779f8
CO		 1196static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1197{
1198 int ret;
1199
1200 if (addr > (unsigned int)(-3 * PAGE_SIZE))
1201 return -1;
1202 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1203 return ret;
1204}
1205
1206static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1207 u32 kvm_nr_mmu_pages)
1208{
1209 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1210 return -EINVAL;
1211
1212 mutex_lock(&kvm->lock);
1213
1214 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
f05e70ac 1215 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1fe779f8
CO		 1216
1217 mutex_unlock(&kvm->lock);
1218 return 0;
1219}
1220
1221static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1222{
f05e70ac 1223 return kvm->arch.n_alloc_mmu_pages;
1fe779f8
CO		 1224}
1225
e9f85cde
ZX		 1226gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1227{
1228 int i;
1229 struct kvm_mem_alias *alias;
1230
d69fb81f
ZX		 1231 for (i = 0; i < kvm->arch.naliases; ++i) {
1232 alias = &kvm->arch.aliases[i];
e9f85cde
ZX		 1233 if (gfn >= alias->base_gfn
1234 && gfn < alias->base_gfn + alias->npages)
1235 return alias->target_gfn + gfn - alias->base_gfn;
1236 }
1237 return gfn;
1238}
1239
1fe779f8
CO		 1240/*
1241 * Set a new alias region. Aliases map a portion of physical memory into
1242 * another portion. This is useful for memory windows, for example the PC
1243 * VGA region.
1244 */
1245static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1246 struct kvm_memory_alias *alias)
1247{
1248 int r, n;
1249 struct kvm_mem_alias *p;
1250
1251 r = -EINVAL;
1252 /* General sanity checks */
1253 if (alias->memory_size & (PAGE_SIZE - 1))
1254 goto out;
1255 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1256 goto out;
1257 if (alias->slot >= KVM_ALIAS_SLOTS)
1258 goto out;
1259 if (alias->guest_phys_addr + alias->memory_size
1260 < alias->guest_phys_addr)
1261 goto out;
1262 if (alias->target_phys_addr + alias->memory_size
1263 < alias->target_phys_addr)
1264 goto out;
1265
1266 mutex_lock(&kvm->lock);
1267
d69fb81f 1268 p = &kvm->arch.aliases[alias->slot];
1fe779f8
CO		 1269 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1270 p->npages = alias->memory_size >> PAGE_SHIFT;
1271 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1272
1273 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
d69fb81f 1274 if (kvm->arch.aliases[n - 1].npages)
1fe779f8 1275 break;
d69fb81f 1276 kvm->arch.naliases = n;
1fe779f8
CO		 1277
1278 kvm_mmu_zap_all(kvm);
1279
1280 mutex_unlock(&kvm->lock);
1281
1282 return 0;
1283
1284out:
1285 return r;
1286}
1287
1288static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1289{
1290 int r;
1291
1292 r = 0;
1293 switch (chip->chip_id) {
1294 case KVM_IRQCHIP_PIC_MASTER:
1295 memcpy(&chip->chip.pic,
1296 &pic_irqchip(kvm)->pics[0],
1297 sizeof(struct kvm_pic_state));
1298 break;
1299 case KVM_IRQCHIP_PIC_SLAVE:
1300 memcpy(&chip->chip.pic,
1301 &pic_irqchip(kvm)->pics[1],
1302 sizeof(struct kvm_pic_state));
1303 break;
1304 case KVM_IRQCHIP_IOAPIC:
1305 memcpy(&chip->chip.ioapic,
1306 ioapic_irqchip(kvm),
1307 sizeof(struct kvm_ioapic_state));
1308 break;
1309 default:
1310 r = -EINVAL;
1311 break;
1312 }
1313 return r;
1314}
1315
1316static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1317{
1318 int r;
1319
1320 r = 0;
1321 switch (chip->chip_id) {
1322 case KVM_IRQCHIP_PIC_MASTER:
1323 memcpy(&pic_irqchip(kvm)->pics[0],
1324 &chip->chip.pic,
1325 sizeof(struct kvm_pic_state));
1326 break;
1327 case KVM_IRQCHIP_PIC_SLAVE:
1328 memcpy(&pic_irqchip(kvm)->pics[1],
1329 &chip->chip.pic,
1330 sizeof(struct kvm_pic_state));
1331 break;
1332 case KVM_IRQCHIP_IOAPIC:
1333 memcpy(ioapic_irqchip(kvm),
1334 &chip->chip.ioapic,
1335 sizeof(struct kvm_ioapic_state));
1336 break;
1337 default:
1338 r = -EINVAL;
1339 break;
1340 }
1341 kvm_pic_update_irq(pic_irqchip(kvm));
1342 return r;
1343}
1344
5bb064dc
ZX		 1345/*
1346 * Get (and clear) the dirty memory log for a memory slot.
1347 */
1348int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1349 struct kvm_dirty_log *log)
1350{
1351 int r;
1352 int n;
1353 struct kvm_memory_slot *memslot;
1354 int is_dirty = 0;
1355
1356 mutex_lock(&kvm->lock);
1357
1358 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1359 if (r)
1360 goto out;
1361
1362 /* If nothing is dirty, don't bother messing with page tables. */
1363 if (is_dirty) {
1364 kvm_mmu_slot_remove_write_access(kvm, log->slot);
1365 kvm_flush_remote_tlbs(kvm);
1366 memslot = &kvm->memslots[log->slot];
1367 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
1368 memset(memslot->dirty_bitmap, 0, n);
1369 }
1370 r = 0;
1371out:
1372 mutex_unlock(&kvm->lock);
1373 return r;
1374}
1375
1fe779f8
CO		 1376long kvm_arch_vm_ioctl(struct file *filp,
1377 unsigned int ioctl, unsigned long arg)
1378{
1379 struct kvm *kvm = filp->private_data;
1380 void __user *argp = (void __user *)arg;
1381 int r = -EINVAL;
1382
1383 switch (ioctl) {
1384 case KVM_SET_TSS_ADDR:
1385 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
1386 if (r < 0)
1387 goto out;
1388 break;
1389 case KVM_SET_MEMORY_REGION: {
1390 struct kvm_memory_region kvm_mem;
1391 struct kvm_userspace_memory_region kvm_userspace_mem;
1392
1393 r = -EFAULT;
1394 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
1395 goto out;
1396 kvm_userspace_mem.slot = kvm_mem.slot;
1397 kvm_userspace_mem.flags = kvm_mem.flags;
1398 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
1399 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
1400 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
1401 if (r)
1402 goto out;
1403 break;
1404 }
1405 case KVM_SET_NR_MMU_PAGES:
1406 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
1407 if (r)
1408 goto out;
1409 break;
1410 case KVM_GET_NR_MMU_PAGES:
1411 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
1412 break;
1413 case KVM_SET_MEMORY_ALIAS: {
1414 struct kvm_memory_alias alias;
1415
1416 r = -EFAULT;
1417 if (copy_from_user(&alias, argp, sizeof alias))
1418 goto out;
1419 r = kvm_vm_ioctl_set_memory_alias(kvm, &alias);
1420 if (r)
1421 goto out;
1422 break;
1423 }
1424 case KVM_CREATE_IRQCHIP:
1425 r = -ENOMEM;
d7deeeb0
ZX		 1426 kvm->arch.vpic = kvm_create_pic(kvm);
1427 if (kvm->arch.vpic) {
1fe779f8
CO		 1428 r = kvm_ioapic_init(kvm);
1429 if (r) {
d7deeeb0
ZX		 1430 kfree(kvm->arch.vpic);
1431 kvm->arch.vpic = NULL;
1fe779f8
CO		 1432 goto out;
1433 }
1434 } else
1435 goto out;
1436 break;
1437 case KVM_IRQ_LINE: {
1438 struct kvm_irq_level irq_event;
1439
1440 r = -EFAULT;
1441 if (copy_from_user(&irq_event, argp, sizeof irq_event))
1442 goto out;
1443 if (irqchip_in_kernel(kvm)) {
1444 mutex_lock(&kvm->lock);
1445 if (irq_event.irq < 16)
1446 kvm_pic_set_irq(pic_irqchip(kvm),
1447 irq_event.irq,
1448 irq_event.level);
d7deeeb0 1449 kvm_ioapic_set_irq(kvm->arch.vioapic,
1fe779f8
CO		 1450 irq_event.irq,
1451 irq_event.level);
1452 mutex_unlock(&kvm->lock);
1453 r = 0;
1454 }
1455 break;
1456 }
1457 case KVM_GET_IRQCHIP: {
1458 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1459 struct kvm_irqchip chip;
1460
1461 r = -EFAULT;
1462 if (copy_from_user(&chip, argp, sizeof chip))
1463 goto out;
1464 r = -ENXIO;
1465 if (!irqchip_in_kernel(kvm))
1466 goto out;
1467 r = kvm_vm_ioctl_get_irqchip(kvm, &chip);
1468 if (r)
1469 goto out;
1470 r = -EFAULT;
1471 if (copy_to_user(argp, &chip, sizeof chip))
1472 goto out;
1473 r = 0;
1474 break;
1475 }
1476 case KVM_SET_IRQCHIP: {
1477 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1478 struct kvm_irqchip chip;
1479
1480 r = -EFAULT;
1481 if (copy_from_user(&chip, argp, sizeof chip))
1482 goto out;
1483 r = -ENXIO;
1484 if (!irqchip_in_kernel(kvm))
1485 goto out;
1486 r = kvm_vm_ioctl_set_irqchip(kvm, &chip);
1487 if (r)
1488 goto out;
1489 r = 0;
1490 break;
1491 }
07716717
DK		 1492 case KVM_GET_SUPPORTED_CPUID: {
1493 struct kvm_cpuid2 __user *cpuid_arg = argp;
1494 struct kvm_cpuid2 cpuid;
1495
1496 r = -EFAULT;
1497 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1498 goto out;
1499 r = kvm_vm_ioctl_get_supported_cpuid(kvm, &cpuid,
1500 cpuid_arg->entries);
1501 if (r)
1502 goto out;
1503
1504 r = -EFAULT;
1505 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1506 goto out;
1507 r = 0;
1508 break;
1509 }
1fe779f8
CO		 1510 default:
1511 ;
1512 }
1513out:
1514 return r;
1515}
1516
a16b043c 1517static void kvm_init_msr_list(void)
043405e1
CO		 1518{
1519 u32 dummy[2];
1520 unsigned i, j;
1521
1522 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
1523 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
1524 continue;
1525 if (j < i)
1526 msrs_to_save[j] = msrs_to_save[i];
1527 j++;
1528 }
1529 num_msrs_to_save = j;
1530}
1531
bbd9b64e
CO		 1532/*
1533 * Only apic need an MMIO device hook, so shortcut now..
1534 */
1535static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
1536 gpa_t addr)
1537{
1538 struct kvm_io_device *dev;
1539
ad312c7c
ZX		 1540 if (vcpu->arch.apic) {
1541 dev = &vcpu->arch.apic->dev;
bbd9b64e
CO		 1542 if (dev->in_range(dev, addr))
1543 return dev;
1544 }
1545 return NULL;
1546}
1547
1548
1549static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
1550 gpa_t addr)
1551{
1552 struct kvm_io_device *dev;
1553
1554 dev = vcpu_find_pervcpu_dev(vcpu, addr);
1555 if (dev == NULL)
1556 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr);
1557 return dev;
1558}
1559
1560int emulator_read_std(unsigned long addr,
1561 void *val,
1562 unsigned int bytes,
1563 struct kvm_vcpu *vcpu)
1564{
1565 void *data = val;
1566
1567 while (bytes) {
ad312c7c 1568 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
bbd9b64e
CO		 1569 unsigned offset = addr & (PAGE_SIZE-1);
1570 unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
1571 int ret;
1572
1573 if (gpa == UNMAPPED_GVA)
1574 return X86EMUL_PROPAGATE_FAULT;
1575 ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
1576 if (ret < 0)
1577 return X86EMUL_UNHANDLEABLE;
1578
1579 bytes -= tocopy;
1580 data += tocopy;
1581 addr += tocopy;
1582 }
1583
1584 return X86EMUL_CONTINUE;
1585}
1586EXPORT_SYMBOL_GPL(emulator_read_std);
1587
bbd9b64e
CO		 1588static int emulator_read_emulated(unsigned long addr,
1589 void *val,
1590 unsigned int bytes,
1591 struct kvm_vcpu *vcpu)
1592{
1593 struct kvm_io_device *mmio_dev;
1594 gpa_t gpa;
1595
1596 if (vcpu->mmio_read_completed) {
1597 memcpy(val, vcpu->mmio_data, bytes);
1598 vcpu->mmio_read_completed = 0;
1599 return X86EMUL_CONTINUE;
1600 }
1601
ad312c7c 1602 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
bbd9b64e
CO		 1603
1604 /* For APIC access vmexit */
1605 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
1606 goto mmio;
1607
1608 if (emulator_read_std(addr, val, bytes, vcpu)
1609 == X86EMUL_CONTINUE)
1610 return X86EMUL_CONTINUE;
1611 if (gpa == UNMAPPED_GVA)
1612 return X86EMUL_PROPAGATE_FAULT;
1613
1614mmio:
1615 /*
1616 * Is this MMIO handled locally?
1617 */
1618 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
1619 if (mmio_dev) {
1620 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
1621 return X86EMUL_CONTINUE;
1622 }
1623
1624 vcpu->mmio_needed = 1;
1625 vcpu->mmio_phys_addr = gpa;
1626 vcpu->mmio_size = bytes;
1627 vcpu->mmio_is_write = 0;
1628
1629 return X86EMUL_UNHANDLEABLE;
1630}
1631
1632static int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
1633 const void *val, int bytes)
1634{
1635 int ret;
1636
1637 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
1638 if (ret < 0)
1639 return 0;
1640 kvm_mmu_pte_write(vcpu, gpa, val, bytes);
1641 return 1;
1642}
1643
1644static int emulator_write_emulated_onepage(unsigned long addr,
1645 const void *val,
1646 unsigned int bytes,
1647 struct kvm_vcpu *vcpu)
1648{
1649 struct kvm_io_device *mmio_dev;
ad312c7c 1650 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
bbd9b64e
CO		 1651
1652 if (gpa == UNMAPPED_GVA) {
c3c91fee 1653 kvm_inject_page_fault(vcpu, addr, 2);
bbd9b64e
CO		 1654 return X86EMUL_PROPAGATE_FAULT;
1655 }
1656
1657 /* For APIC access vmexit */
1658 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
1659 goto mmio;
1660
1661 if (emulator_write_phys(vcpu, gpa, val, bytes))
1662 return X86EMUL_CONTINUE;
1663
1664mmio:
1665 /*
1666 * Is this MMIO handled locally?
1667 */
1668 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
1669 if (mmio_dev) {
1670 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
1671 return X86EMUL_CONTINUE;
1672 }
1673
1674 vcpu->mmio_needed = 1;
1675 vcpu->mmio_phys_addr = gpa;
1676 vcpu->mmio_size = bytes;
1677 vcpu->mmio_is_write = 1;
1678 memcpy(vcpu->mmio_data, val, bytes);
1679
1680 return X86EMUL_CONTINUE;
1681}
1682
1683int emulator_write_emulated(unsigned long addr,
1684 const void *val,
1685 unsigned int bytes,
1686 struct kvm_vcpu *vcpu)
1687{
1688 /* Crossing a page boundary? */
1689 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
1690 int rc, now;
1691
1692 now = -addr & ~PAGE_MASK;
1693 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
1694 if (rc != X86EMUL_CONTINUE)
1695 return rc;
1696 addr += now;
1697 val += now;
1698 bytes -= now;
1699 }
1700 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
1701}
1702EXPORT_SYMBOL_GPL(emulator_write_emulated);
1703
1704static int emulator_cmpxchg_emulated(unsigned long addr,
1705 const void *old,
1706 const void *new,
1707 unsigned int bytes,
1708 struct kvm_vcpu *vcpu)
1709{
1710 static int reported;
1711
1712 if (!reported) {
1713 reported = 1;
1714 printk(KERN_WARNING "kvm: emulating exchange as write\n");
1715 }
2bacc55c
MT		 1716#ifndef CONFIG_X86_64
1717 /* guests cmpxchg8b have to be emulated atomically */
1718 if (bytes == 8) {
ad312c7c 1719 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2bacc55c
MT		 1720 struct page *page;
1721 char *addr;
1722 u64 val;
1723
1724 if (gpa == UNMAPPED_GVA ||
1725 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
1726 goto emul_write;
1727
1728 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
1729 goto emul_write;
1730
1731 val = *(u64 *)new;
1732 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
1733 addr = kmap_atomic(page, KM_USER0);
1734 set_64bit((u64 *)(addr + offset_in_page(gpa)), val);
1735 kunmap_atomic(addr, KM_USER0);
1736 kvm_release_page_dirty(page);
1737 }
1738emul_write:
1739#endif
1740
bbd9b64e
CO		 1741 return emulator_write_emulated(addr, new, bytes, vcpu);
1742}
1743
1744static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
1745{
1746 return kvm_x86_ops->get_segment_base(vcpu, seg);
1747}
1748
1749int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
1750{
1751 return X86EMUL_CONTINUE;
1752}
1753
1754int emulate_clts(struct kvm_vcpu *vcpu)
1755{
ad312c7c 1756 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
bbd9b64e
CO		 1757 return X86EMUL_CONTINUE;
1758}
1759
1760int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
1761{
1762 struct kvm_vcpu *vcpu = ctxt->vcpu;
1763
1764 switch (dr) {
1765 case 0 ... 3:
1766 *dest = kvm_x86_ops->get_dr(vcpu, dr);
1767 return X86EMUL_CONTINUE;
1768 default:
1769 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __FUNCTION__, dr);
1770 return X86EMUL_UNHANDLEABLE;
1771 }
1772}
1773
1774int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
1775{
1776 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
1777 int exception;
1778
1779 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
1780 if (exception) {
1781 /* FIXME: better handling */
1782 return X86EMUL_UNHANDLEABLE;
1783 }
1784 return X86EMUL_CONTINUE;
1785}
1786
1787void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
1788{
1789 static int reported;
1790 u8 opcodes[4];
ad312c7c 1791 unsigned long rip = vcpu->arch.rip;
bbd9b64e
CO		 1792 unsigned long rip_linear;
1793
1794 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
1795
1796 if (reported)
1797 return;
1798
1799 emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
1800
1801 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
1802 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
1803 reported = 1;
1804}
1805EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
1806
1807struct x86_emulate_ops emulate_ops = {
1808 .read_std = emulator_read_std,
bbd9b64e
CO		 1809 .read_emulated = emulator_read_emulated,
1810 .write_emulated = emulator_write_emulated,
1811 .cmpxchg_emulated = emulator_cmpxchg_emulated,
1812};
1813
1814int emulate_instruction(struct kvm_vcpu *vcpu,
1815 struct kvm_run *run,
1816 unsigned long cr2,
1817 u16 error_code,
1818 int no_decode)
1819{
1820 int r;
1821
ad312c7c 1822 vcpu->arch.mmio_fault_cr2 = cr2;
bbd9b64e
CO		 1823 kvm_x86_ops->cache_regs(vcpu);
1824
1825 vcpu->mmio_is_write = 0;
ad312c7c 1826 vcpu->arch.pio.string = 0;
bbd9b64e
CO		 1827
1828 if (!no_decode) {
1829 int cs_db, cs_l;
1830 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
1831
ad312c7c
ZX		 1832 vcpu->arch.emulate_ctxt.vcpu = vcpu;
1833 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
1834 vcpu->arch.emulate_ctxt.mode =
1835 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
bbd9b64e
CO		 1836 ? X86EMUL_MODE_REAL : cs_l
1837 ? X86EMUL_MODE_PROT64 : cs_db
1838 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
1839
ad312c7c
ZX		 1840 if (vcpu->arch.emulate_ctxt.mode == X86EMUL_MODE_PROT64) {
1841 vcpu->arch.emulate_ctxt.cs_base = 0;
1842 vcpu->arch.emulate_ctxt.ds_base = 0;
1843 vcpu->arch.emulate_ctxt.es_base = 0;
1844 vcpu->arch.emulate_ctxt.ss_base = 0;
bbd9b64e 1845 } else {
ad312c7c 1846 vcpu->arch.emulate_ctxt.cs_base =
bbd9b64e 1847 get_segment_base(vcpu, VCPU_SREG_CS);
ad312c7c 1848 vcpu->arch.emulate_ctxt.ds_base =
bbd9b64e 1849 get_segment_base(vcpu, VCPU_SREG_DS);
ad312c7c 1850 vcpu->arch.emulate_ctxt.es_base =
bbd9b64e 1851 get_segment_base(vcpu, VCPU_SREG_ES);
ad312c7c 1852 vcpu->arch.emulate_ctxt.ss_base =
bbd9b64e
CO		 1853 get_segment_base(vcpu, VCPU_SREG_SS);
1854 }
1855
ad312c7c 1856 vcpu->arch.emulate_ctxt.gs_base =
bbd9b64e 1857 get_segment_base(vcpu, VCPU_SREG_GS);
ad312c7c 1858 vcpu->arch.emulate_ctxt.fs_base =
bbd9b64e
CO		 1859 get_segment_base(vcpu, VCPU_SREG_FS);
1860
ad312c7c 1861 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
f2b5756b 1862 ++vcpu->stat.insn_emulation;
bbd9b64e 1863 if (r) {
f2b5756b 1864 ++vcpu->stat.insn_emulation_fail;
bbd9b64e
CO		 1865 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
1866 return EMULATE_DONE;
1867 return EMULATE_FAIL;
1868 }
1869 }
1870
ad312c7c 1871 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
bbd9b64e 1872
ad312c7c 1873 if (vcpu->arch.pio.string)
bbd9b64e
CO		 1874 return EMULATE_DO_MMIO;
1875
1876 if ((r || vcpu->mmio_is_write) && run) {
1877 run->exit_reason = KVM_EXIT_MMIO;
1878 run->mmio.phys_addr = vcpu->mmio_phys_addr;
1879 memcpy(run->mmio.data, vcpu->mmio_data, 8);
1880 run->mmio.len = vcpu->mmio_size;
1881 run->mmio.is_write = vcpu->mmio_is_write;
1882 }
1883
1884 if (r) {
1885 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
1886 return EMULATE_DONE;
1887 if (!vcpu->mmio_needed) {
1888 kvm_report_emulation_failure(vcpu, "mmio");
1889 return EMULATE_FAIL;
1890 }
1891 return EMULATE_DO_MMIO;
1892 }
1893
1894 kvm_x86_ops->decache_regs(vcpu);
ad312c7c 1895 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
bbd9b64e
CO		 1896
1897 if (vcpu->mmio_is_write) {
1898 vcpu->mmio_needed = 0;
1899 return EMULATE_DO_MMIO;
1900 }
1901
1902 return EMULATE_DONE;
1903}
1904EXPORT_SYMBOL_GPL(emulate_instruction);
1905
de7d789a
CO		 1906static void free_pio_guest_pages(struct kvm_vcpu *vcpu)
1907{
1908 int i;
1909
ad312c7c
ZX		 1910 for (i = 0; i < ARRAY_SIZE(vcpu->arch.pio.guest_pages); ++i)
1911 if (vcpu->arch.pio.guest_pages[i]) {
1912 kvm_release_page_dirty(vcpu->arch.pio.guest_pages[i]);
1913 vcpu->arch.pio.guest_pages[i] = NULL;
de7d789a
CO		 1914 }
1915}
1916
1917static int pio_copy_data(struct kvm_vcpu *vcpu)
1918{
ad312c7c 1919 void *p = vcpu->arch.pio_data;
de7d789a
CO		 1920 void *q;
1921 unsigned bytes;
ad312c7c 1922 int nr_pages = vcpu->arch.pio.guest_pages[1] ? 2 : 1;
de7d789a 1923
ad312c7c 1924 q = vmap(vcpu->arch.pio.guest_pages, nr_pages, VM_READ|VM_WRITE,
de7d789a
CO		 1925 PAGE_KERNEL);
1926 if (!q) {
1927 free_pio_guest_pages(vcpu);
1928 return -ENOMEM;
1929 }
ad312c7c
ZX		 1930 q += vcpu->arch.pio.guest_page_offset;
1931 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
1932 if (vcpu->arch.pio.in)
de7d789a
CO		 1933 memcpy(q, p, bytes);
1934 else
1935 memcpy(p, q, bytes);
ad312c7c 1936 q -= vcpu->arch.pio.guest_page_offset;
de7d789a
CO		 1937 vunmap(q);
1938 free_pio_guest_pages(vcpu);
1939 return 0;
1940}
1941
1942int complete_pio(struct kvm_vcpu *vcpu)
1943{
ad312c7c 1944 struct kvm_pio_request *io = &vcpu->arch.pio;
de7d789a
CO		 1945 long delta;
1946 int r;
1947
1948 kvm_x86_ops->cache_regs(vcpu);
1949
1950 if (!io->string) {
1951 if (io->in)
ad312c7c 1952 memcpy(&vcpu->arch.regs[VCPU_REGS_RAX], vcpu->arch.pio_data,
de7d789a
CO		 1953 io->size);
1954 } else {
1955 if (io->in) {
1956 r = pio_copy_data(vcpu);
1957 if (r) {
1958 kvm_x86_ops->cache_regs(vcpu);
1959 return r;
1960 }
1961 }
1962
1963 delta = 1;
1964 if (io->rep) {
1965 delta *= io->cur_count;
1966 /*
1967 * The size of the register should really depend on
1968 * current address size.
1969 */
ad312c7c 1970 vcpu->arch.regs[VCPU_REGS_RCX] -= delta;
de7d789a
CO		 1971 }
1972 if (io->down)
1973 delta = -delta;
1974 delta *= io->size;
1975 if (io->in)
ad312c7c 1976 vcpu->arch.regs[VCPU_REGS_RDI] += delta;
de7d789a 1977 else
ad312c7c 1978 vcpu->arch.regs[VCPU_REGS_RSI] += delta;
de7d789a
CO		 1979 }
1980
1981 kvm_x86_ops->decache_regs(vcpu);
1982
1983 io->count -= io->cur_count;
1984 io->cur_count = 0;
1985
1986 return 0;
1987}
1988
1989static void kernel_pio(struct kvm_io_device *pio_dev,
1990 struct kvm_vcpu *vcpu,
1991 void *pd)
1992{
1993 /* TODO: String I/O for in kernel device */
1994
1995 mutex_lock(&vcpu->kvm->lock);
ad312c7c
ZX		 1996 if (vcpu->arch.pio.in)
1997 kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
1998 vcpu->arch.pio.size,
de7d789a
CO		 1999 pd);
2000 else
ad312c7c
ZX		 2001 kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
2002 vcpu->arch.pio.size,
de7d789a
CO		 2003 pd);
2004 mutex_unlock(&vcpu->kvm->lock);
2005}
2006
2007static void pio_string_write(struct kvm_io_device *pio_dev,
2008 struct kvm_vcpu *vcpu)
2009{
ad312c7c
ZX		 2010 struct kvm_pio_request *io = &vcpu->arch.pio;
2011 void *pd = vcpu->arch.pio_data;
de7d789a
CO		 2012 int i;
2013
2014 mutex_lock(&vcpu->kvm->lock);
2015 for (i = 0; i < io->cur_count; i++) {
2016 kvm_iodevice_write(pio_dev, io->port,
2017 io->size,
2018 pd);
2019 pd += io->size;
2020 }
2021 mutex_unlock(&vcpu->kvm->lock);
2022}
2023
2024static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
2025 gpa_t addr)
2026{
2027 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr);
2028}
2029
2030int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2031 int size, unsigned port)
2032{
2033 struct kvm_io_device *pio_dev;
2034
2035 vcpu->run->exit_reason = KVM_EXIT_IO;
2036 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
ad312c7c 2037 vcpu->run->io.size = vcpu->arch.pio.size = size;
de7d789a 2038 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
ad312c7c
ZX		 2039 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2040 vcpu->run->io.port = vcpu->arch.pio.port = port;
2041 vcpu->arch.pio.in = in;
2042 vcpu->arch.pio.string = 0;
2043 vcpu->arch.pio.down = 0;
2044 vcpu->arch.pio.guest_page_offset = 0;
2045 vcpu->arch.pio.rep = 0;
de7d789a
CO		 2046
2047 kvm_x86_ops->cache_regs(vcpu);
ad312c7c 2048 memcpy(vcpu->arch.pio_data, &vcpu->arch.regs[VCPU_REGS_RAX], 4);
de7d789a
CO		 2049 kvm_x86_ops->decache_regs(vcpu);
2050
2051 kvm_x86_ops->skip_emulated_instruction(vcpu);
2052
2053 pio_dev = vcpu_find_pio_dev(vcpu, port);
2054 if (pio_dev) {
ad312c7c 2055 kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
de7d789a
CO		 2056 complete_pio(vcpu);
2057 return 1;
2058 }
2059 return 0;
2060}
2061EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2062
2063int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2064 int size, unsigned long count, int down,
2065 gva_t address, int rep, unsigned port)
2066{
2067 unsigned now, in_page;
2068 int i, ret = 0;
2069 int nr_pages = 1;
2070 struct page *page;
2071 struct kvm_io_device *pio_dev;
2072
2073 vcpu->run->exit_reason = KVM_EXIT_IO;
2074 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
ad312c7c 2075 vcpu->run->io.size = vcpu->arch.pio.size = size;
de7d789a 2076 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
ad312c7c
ZX		 2077 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2078 vcpu->run->io.port = vcpu->arch.pio.port = port;
2079 vcpu->arch.pio.in = in;
2080 vcpu->arch.pio.string = 1;
2081 vcpu->arch.pio.down = down;
2082 vcpu->arch.pio.guest_page_offset = offset_in_page(address);
2083 vcpu->arch.pio.rep = rep;
de7d789a
CO		 2084
2085 if (!count) {
2086 kvm_x86_ops->skip_emulated_instruction(vcpu);
2087 return 1;
2088 }
2089
2090 if (!down)
2091 in_page = PAGE_SIZE - offset_in_page(address);
2092 else
2093 in_page = offset_in_page(address) + size;
2094 now = min(count, (unsigned long)in_page / size);
2095 if (!now) {
2096 /*
2097 * String I/O straddles page boundary. Pin two guest pages
2098 * so that we satisfy atomicity constraints. Do just one
2099 * transaction to avoid complexity.
2100 */
2101 nr_pages = 2;
2102 now = 1;
2103 }
2104 if (down) {
2105 /*
2106 * String I/O in reverse. Yuck. Kill the guest, fix later.
2107 */
2108 pr_unimpl(vcpu, "guest string pio down\n");
c1a5d4f9 2109 kvm_inject_gp(vcpu, 0);
de7d789a
CO		 2110 return 1;
2111 }
2112 vcpu->run->io.count = now;
ad312c7c 2113 vcpu->arch.pio.cur_count = now;
de7d789a 2114
ad312c7c 2115 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
de7d789a
CO		 2116 kvm_x86_ops->skip_emulated_instruction(vcpu);
2117
2118 for (i = 0; i < nr_pages; ++i) {
2119 mutex_lock(&vcpu->kvm->lock);
2120 page = gva_to_page(vcpu, address + i * PAGE_SIZE);
ad312c7c 2121 vcpu->arch.pio.guest_pages[i] = page;
de7d789a
CO		 2122 mutex_unlock(&vcpu->kvm->lock);
2123 if (!page) {
c1a5d4f9 2124 kvm_inject_gp(vcpu, 0);
de7d789a
CO		 2125 free_pio_guest_pages(vcpu);
2126 return 1;
2127 }
2128 }
2129
2130 pio_dev = vcpu_find_pio_dev(vcpu, port);
ad312c7c 2131 if (!vcpu->arch.pio.in) {
de7d789a
CO		 2132 /* string PIO write */
2133 ret = pio_copy_data(vcpu);
2134 if (ret >= 0 && pio_dev) {
2135 pio_string_write(pio_dev, vcpu);
2136 complete_pio(vcpu);
ad312c7c 2137 if (vcpu->arch.pio.count == 0)
de7d789a
CO		 2138 ret = 1;
2139 }
2140 } else if (pio_dev)
2141 pr_unimpl(vcpu, "no string pio read support yet, "
2142 "port %x size %d count %ld\n",
2143 port, size, count);
2144
2145 return ret;
2146}
2147EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
2148
f8c16bba 2149int kvm_arch_init(void *opaque)
043405e1 2150{
56c6d28a 2151 int r;
f8c16bba
ZX		 2152 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
2153
56c6d28a
ZX		 2154 r = kvm_mmu_module_init();
2155 if (r)
2156 goto out_fail;
2157
043405e1 2158 kvm_init_msr_list();
f8c16bba
ZX		 2159
2160 if (kvm_x86_ops) {
2161 printk(KERN_ERR "kvm: already loaded the other module\n");
56c6d28a
ZX		 2162 r = -EEXIST;
2163 goto out;
f8c16bba
ZX		 2164 }
2165
2166 if (!ops->cpu_has_kvm_support()) {
2167 printk(KERN_ERR "kvm: no hardware support\n");
56c6d28a
ZX		 2168 r = -EOPNOTSUPP;
2169 goto out;
f8c16bba
ZX		 2170 }
2171 if (ops->disabled_by_bios()) {
2172 printk(KERN_ERR "kvm: disabled by bios\n");
56c6d28a
ZX		 2173 r = -EOPNOTSUPP;
2174 goto out;
f8c16bba
ZX		 2175 }
2176
2177 kvm_x86_ops = ops;
56c6d28a 2178 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
f8c16bba 2179 return 0;
56c6d28a
ZX		 2180
2181out:
2182 kvm_mmu_module_exit();
2183out_fail:
2184 return r;
043405e1 2185}
8776e519 2186
f8c16bba
ZX		 2187void kvm_arch_exit(void)
2188{
2189 kvm_x86_ops = NULL;
56c6d28a
ZX		 2190 kvm_mmu_module_exit();
2191}
f8c16bba 2192
8776e519
HB		 2193int kvm_emulate_halt(struct kvm_vcpu *vcpu)
2194{
2195 ++vcpu->stat.halt_exits;
2196 if (irqchip_in_kernel(vcpu->kvm)) {
ad312c7c 2197 vcpu->arch.mp_state = VCPU_MP_STATE_HALTED;
8776e519 2198 kvm_vcpu_block(vcpu);
ad312c7c 2199 if (vcpu->arch.mp_state != VCPU_MP_STATE_RUNNABLE)
8776e519
HB		 2200 return -EINTR;
2201 return 1;
2202 } else {
2203 vcpu->run->exit_reason = KVM_EXIT_HLT;
2204 return 0;
2205 }
2206}
2207EXPORT_SYMBOL_GPL(kvm_emulate_halt);
2208
2209int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
2210{
2211 unsigned long nr, a0, a1, a2, a3, ret;
2212
2213 kvm_x86_ops->cache_regs(vcpu);
2214
ad312c7c
ZX		 2215 nr = vcpu->arch.regs[VCPU_REGS_RAX];
2216 a0 = vcpu->arch.regs[VCPU_REGS_RBX];
2217 a1 = vcpu->arch.regs[VCPU_REGS_RCX];
2218 a2 = vcpu->arch.regs[VCPU_REGS_RDX];
2219 a3 = vcpu->arch.regs[VCPU_REGS_RSI];
8776e519
HB		 2220
2221 if (!is_long_mode(vcpu)) {
2222 nr &= 0xFFFFFFFF;
2223 a0 &= 0xFFFFFFFF;
2224 a1 &= 0xFFFFFFFF;
2225 a2 &= 0xFFFFFFFF;
2226 a3 &= 0xFFFFFFFF;
2227 }
2228
2229 switch (nr) {
b93463aa
AK		 2230 case KVM_HC_VAPIC_POLL_IRQ:
2231 ret = 0;
2232 break;
8776e519
HB		 2233 default:
2234 ret = -KVM_ENOSYS;
2235 break;
2236 }
ad312c7c 2237 vcpu->arch.regs[VCPU_REGS_RAX] = ret;
8776e519
HB		 2238 kvm_x86_ops->decache_regs(vcpu);
2239 return 0;
2240}
2241EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
2242
2243int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
2244{
2245 char instruction[3];
2246 int ret = 0;
2247
2248 mutex_lock(&vcpu->kvm->lock);
2249
2250 /*
2251 * Blow out the MMU to ensure that no other VCPU has an active mapping
2252 * to ensure that the updated hypercall appears atomically across all
2253 * VCPUs.
2254 */
2255 kvm_mmu_zap_all(vcpu->kvm);
2256
2257 kvm_x86_ops->cache_regs(vcpu);
2258 kvm_x86_ops->patch_hypercall(vcpu, instruction);
ad312c7c 2259 if (emulator_write_emulated(vcpu->arch.rip, instruction, 3, vcpu)
8776e519
HB		 2260 != X86EMUL_CONTINUE)
2261 ret = -EFAULT;
2262
2263 mutex_unlock(&vcpu->kvm->lock);
2264
2265 return ret;
2266}
2267
2268static u64 mk_cr_64(u64 curr_cr, u32 new_val)
2269{
2270 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
2271}
2272
2273void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2274{
2275 struct descriptor_table dt = { limit, base };
2276
2277 kvm_x86_ops->set_gdt(vcpu, &dt);
2278}
2279
2280void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2281{
2282 struct descriptor_table dt = { limit, base };
2283
2284 kvm_x86_ops->set_idt(vcpu, &dt);
2285}
2286
2287void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
2288 unsigned long *rflags)
2289{
2290 lmsw(vcpu, msw);
2291 *rflags = kvm_x86_ops->get_rflags(vcpu);
2292}
2293
2294unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
2295{
2296 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2297 switch (cr) {
2298 case 0:
ad312c7c 2299 return vcpu->arch.cr0;
8776e519 2300 case 2:
ad312c7c 2301 return vcpu->arch.cr2;
8776e519 2302 case 3:
ad312c7c 2303 return vcpu->arch.cr3;
8776e519 2304 case 4:
ad312c7c 2305 return vcpu->arch.cr4;
152ff9be
JR		 2306 case 8:
2307 return get_cr8(vcpu);
8776e519
HB		 2308 default:
2309 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
2310 return 0;
2311 }
2312}
2313
2314void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
2315 unsigned long *rflags)
2316{
2317 switch (cr) {
2318 case 0:
ad312c7c 2319 set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
8776e519
HB		 2320 *rflags = kvm_x86_ops->get_rflags(vcpu);
2321 break;
2322 case 2:
ad312c7c 2323 vcpu->arch.cr2 = val;
8776e519
HB		 2324 break;
2325 case 3:
2326 set_cr3(vcpu, val);
2327 break;
2328 case 4:
ad312c7c 2329 set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
8776e519 2330 break;
152ff9be
JR		 2331 case 8:
2332 set_cr8(vcpu, val & 0xfUL);
2333 break;
8776e519
HB		 2334 default:
2335 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
2336 }
2337}
2338
07716717
DK		 2339static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
2340{
ad312c7c
ZX		 2341 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
2342 int j, nent = vcpu->arch.cpuid_nent;
07716717
DK		 2343
2344 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
2345 /* when no next entry is found, the current entry[i] is reselected */
2346 for (j = i + 1; j == i; j = (j + 1) % nent) {
ad312c7c 2347 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
07716717
DK		 2348 if (ej->function == e->function) {
2349 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2350 return j;
2351 }
2352 }
2353 return 0; /* silence gcc, even though control never reaches here */
2354}
2355
2356/* find an entry with matching function, matching index (if needed), and that
2357 * should be read next (if it's stateful) */
2358static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
2359 u32 function, u32 index)
2360{
2361 if (e->function != function)
2362 return 0;
2363 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
2364 return 0;
2365 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
2366 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
2367 return 0;
2368 return 1;
2369}
2370
8776e519
HB		 2371void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
2372{
2373 int i;
07716717
DK		 2374 u32 function, index;
2375 struct kvm_cpuid_entry2 *e, *best;
8776e519
HB		 2376
2377 kvm_x86_ops->cache_regs(vcpu);
ad312c7c
ZX		 2378 function = vcpu->arch.regs[VCPU_REGS_RAX];
2379 index = vcpu->arch.regs[VCPU_REGS_RCX];
2380 vcpu->arch.regs[VCPU_REGS_RAX] = 0;
2381 vcpu->arch.regs[VCPU_REGS_RBX] = 0;
2382 vcpu->arch.regs[VCPU_REGS_RCX] = 0;
2383 vcpu->arch.regs[VCPU_REGS_RDX] = 0;
8776e519 2384 best = NULL;
ad312c7c
ZX		 2385 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2386 e = &vcpu->arch.cpuid_entries[i];
07716717
DK		 2387 if (is_matching_cpuid_entry(e, function, index)) {
2388 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
2389 move_to_next_stateful_cpuid_entry(vcpu, i);
8776e519
HB		 2390 best = e;
2391 break;
2392 }
2393 /*
2394 * Both basic or both extended?
2395 */
2396 if (((e->function ^ function) & 0x80000000) == 0)
2397 if (!best || e->function > best->function)
2398 best = e;
2399 }
2400 if (best) {
ad312c7c
ZX		 2401 vcpu->arch.regs[VCPU_REGS_RAX] = best->eax;
2402 vcpu->arch.regs[VCPU_REGS_RBX] = best->ebx;
2403 vcpu->arch.regs[VCPU_REGS_RCX] = best->ecx;
2404 vcpu->arch.regs[VCPU_REGS_RDX] = best->edx;
8776e519
HB		 2405 }
2406 kvm_x86_ops->decache_regs(vcpu);
2407 kvm_x86_ops->skip_emulated_instruction(vcpu);
2408}
2409EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
d0752060 2410
b6c7a5dc
HB		 2411/*
2412 * Check if userspace requested an interrupt window, and that the
2413 * interrupt window is open.
2414 *
2415 * No need to exit to userspace if we already have an interrupt queued.
2416 */
2417static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
2418 struct kvm_run *kvm_run)
2419{
ad312c7c 2420 return (!vcpu->arch.irq_summary &&
b6c7a5dc 2421 kvm_run->request_interrupt_window &&
ad312c7c 2422 vcpu->arch.interrupt_window_open &&
b6c7a5dc
HB		 2423 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
2424}
2425
2426static void post_kvm_run_save(struct kvm_vcpu *vcpu,
2427 struct kvm_run *kvm_run)
2428{
2429 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
2430 kvm_run->cr8 = get_cr8(vcpu);
2431 kvm_run->apic_base = kvm_get_apic_base(vcpu);
2432 if (irqchip_in_kernel(vcpu->kvm))
2433 kvm_run->ready_for_interrupt_injection = 1;
2434 else
2435 kvm_run->ready_for_interrupt_injection =
ad312c7c
ZX		 2436 (vcpu->arch.interrupt_window_open &&
2437 vcpu->arch.irq_summary == 0);
b6c7a5dc
HB		 2438}
2439
b93463aa
AK		 2440static void vapic_enter(struct kvm_vcpu *vcpu)
2441{
2442 struct kvm_lapic *apic = vcpu->arch.apic;
2443 struct page *page;
2444
2445 if (!apic || !apic->vapic_addr)
2446 return;
2447
2448 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
2449 vcpu->arch.apic->vapic_page = page;
2450}
2451
2452static void vapic_exit(struct kvm_vcpu *vcpu)
2453{
2454 struct kvm_lapic *apic = vcpu->arch.apic;
2455
2456 if (!apic || !apic->vapic_addr)
2457 return;
2458
2459 kvm_release_page_dirty(apic->vapic_page);
2460 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
2461}
2462
b6c7a5dc
HB		 2463static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2464{
2465 int r;
2466
ad312c7c 2467 if (unlikely(vcpu->arch.mp_state == VCPU_MP_STATE_SIPI_RECEIVED)) {
b6c7a5dc 2468 pr_debug("vcpu %d received sipi with vector # %x\n",
ad312c7c 2469 vcpu->vcpu_id, vcpu->arch.sipi_vector);
b6c7a5dc
HB		 2470 kvm_lapic_reset(vcpu);
2471 r = kvm_x86_ops->vcpu_reset(vcpu);
2472 if (r)
2473 return r;
ad312c7c 2474 vcpu->arch.mp_state = VCPU_MP_STATE_RUNNABLE;
b6c7a5dc
HB		 2475 }
2476
b93463aa
AK		 2477 vapic_enter(vcpu);
2478
b6c7a5dc
HB		 2479preempted:
2480 if (vcpu->guest_debug.enabled)
2481 kvm_x86_ops->guest_debug_pre(vcpu);
2482
2483again:
2484 r = kvm_mmu_reload(vcpu);
2485 if (unlikely(r))
2486 goto out;
2487
b93463aa
AK		 2488 if (vcpu->requests)
2489 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
2490 &vcpu->requests)) {
2491 kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
2492 r = 0;
2493 goto out;
2494 }
2495
b6c7a5dc
HB		 2496 kvm_inject_pending_timer_irqs(vcpu);
2497
2498 preempt_disable();
2499
2500 kvm_x86_ops->prepare_guest_switch(vcpu);
2501 kvm_load_guest_fpu(vcpu);
2502
2503 local_irq_disable();
2504
2505 if (signal_pending(current)) {
2506 local_irq_enable();
2507 preempt_enable();
2508 r = -EINTR;
2509 kvm_run->exit_reason = KVM_EXIT_INTR;
2510 ++vcpu->stat.signal_exits;
2511 goto out;
2512 }
2513
ad312c7c 2514 if (vcpu->arch.exception.pending)
298101da
AK		 2515 __queue_exception(vcpu);
2516 else if (irqchip_in_kernel(vcpu->kvm))
b6c7a5dc 2517 kvm_x86_ops->inject_pending_irq(vcpu);
eb9774f0 2518 else
b6c7a5dc
HB		 2519 kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
2520
b93463aa
AK		 2521 kvm_lapic_sync_to_vapic(vcpu);
2522
b6c7a5dc
HB		 2523 vcpu->guest_mode = 1;
2524 kvm_guest_enter();
2525
2526 if (vcpu->requests)
2527 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
2528 kvm_x86_ops->tlb_flush(vcpu);
2529
2530 kvm_x86_ops->run(vcpu, kvm_run);
2531
2532 vcpu->guest_mode = 0;
2533 local_irq_enable();
2534
2535 ++vcpu->stat.exits;
2536
2537 /*
2538 * We must have an instruction between local_irq_enable() and
2539 * kvm_guest_exit(), so the timer interrupt isn't delayed by
2540 * the interrupt shadow. The stat.exits increment will do nicely.
2541 * But we need to prevent reordering, hence this barrier():
2542 */
2543 barrier();
2544
2545 kvm_guest_exit();
2546
2547 preempt_enable();
2548
2549 /*
2550 * Profile KVM exit RIPs:
2551 */
2552 if (unlikely(prof_on == KVM_PROFILING)) {
2553 kvm_x86_ops->cache_regs(vcpu);
ad312c7c 2554 profile_hit(KVM_PROFILING, (void *)vcpu->arch.rip);
b6c7a5dc
HB		 2555 }
2556
ad312c7c
ZX		 2557 if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
2558 vcpu->arch.exception.pending = false;
298101da 2559
b93463aa
AK		 2560 kvm_lapic_sync_from_vapic(vcpu);
2561
b6c7a5dc
HB		 2562 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
2563
2564 if (r > 0) {
2565 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
2566 r = -EINTR;
2567 kvm_run->exit_reason = KVM_EXIT_INTR;
2568 ++vcpu->stat.request_irq_exits;
2569 goto out;
2570 }
e1beb1d3 2571 if (!need_resched())
b6c7a5dc 2572 goto again;
b6c7a5dc
HB		 2573 }
2574
2575out:
2576 if (r > 0) {
2577 kvm_resched(vcpu);
2578 goto preempted;
2579 }
2580
2581 post_kvm_run_save(vcpu, kvm_run);
2582
b93463aa
AK		 2583 vapic_exit(vcpu);
2584
b6c7a5dc
HB		 2585 return r;
2586}
2587
2588int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2589{
2590 int r;
2591 sigset_t sigsaved;
2592
2593 vcpu_load(vcpu);
2594
ad312c7c 2595 if (unlikely(vcpu->arch.mp_state == VCPU_MP_STATE_UNINITIALIZED)) {
b6c7a5dc
HB		 2596 kvm_vcpu_block(vcpu);
2597 vcpu_put(vcpu);
2598 return -EAGAIN;
2599 }
2600
2601 if (vcpu->sigset_active)
2602 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
2603
2604 /* re-sync apic's tpr */
2605 if (!irqchip_in_kernel(vcpu->kvm))
2606 set_cr8(vcpu, kvm_run->cr8);
2607
ad312c7c 2608 if (vcpu->arch.pio.cur_count) {
b6c7a5dc
HB		 2609 r = complete_pio(vcpu);
2610 if (r)
2611 goto out;
2612 }
2613#if CONFIG_HAS_IOMEM
2614 if (vcpu->mmio_needed) {
2615 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
2616 vcpu->mmio_read_completed = 1;
2617 vcpu->mmio_needed = 0;
2618 r = emulate_instruction(vcpu, kvm_run,
ad312c7c 2619 vcpu->arch.mmio_fault_cr2, 0, 1);
b6c7a5dc
HB		 2620 if (r == EMULATE_DO_MMIO) {
2621 /*
2622 * Read-modify-write. Back to userspace.
2623 */
2624 r = 0;
2625 goto out;
2626 }
2627 }
2628#endif
2629 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL) {
2630 kvm_x86_ops->cache_regs(vcpu);
ad312c7c 2631 vcpu->arch.regs[VCPU_REGS_RAX] = kvm_run->hypercall.ret;
b6c7a5dc
HB		 2632 kvm_x86_ops->decache_regs(vcpu);
2633 }
2634
2635 r = __vcpu_run(vcpu, kvm_run);
2636
2637out:
2638 if (vcpu->sigset_active)
2639 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
2640
2641 vcpu_put(vcpu);
2642 return r;
2643}
2644
2645int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
2646{
2647 vcpu_load(vcpu);
2648
2649 kvm_x86_ops->cache_regs(vcpu);
2650
ad312c7c
ZX		 2651 regs->rax = vcpu->arch.regs[VCPU_REGS_RAX];
2652 regs->rbx = vcpu->arch.regs[VCPU_REGS_RBX];
2653 regs->rcx = vcpu->arch.regs[VCPU_REGS_RCX];
2654 regs->rdx = vcpu->arch.regs[VCPU_REGS_RDX];
2655 regs->rsi = vcpu->arch.regs[VCPU_REGS_RSI];
2656 regs->rdi = vcpu->arch.regs[VCPU_REGS_RDI];
2657 regs->rsp = vcpu->arch.regs[VCPU_REGS_RSP];
2658 regs->rbp = vcpu->arch.regs[VCPU_REGS_RBP];
b6c7a5dc 2659#ifdef CONFIG_X86_64
ad312c7c
ZX		 2660 regs->r8 = vcpu->arch.regs[VCPU_REGS_R8];
2661 regs->r9 = vcpu->arch.regs[VCPU_REGS_R9];
2662 regs->r10 = vcpu->arch.regs[VCPU_REGS_R10];
2663 regs->r11 = vcpu->arch.regs[VCPU_REGS_R11];
2664 regs->r12 = vcpu->arch.regs[VCPU_REGS_R12];
2665 regs->r13 = vcpu->arch.regs[VCPU_REGS_R13];
2666 regs->r14 = vcpu->arch.regs[VCPU_REGS_R14];
2667 regs->r15 = vcpu->arch.regs[VCPU_REGS_R15];
b6c7a5dc
HB		 2668#endif
2669
ad312c7c 2670 regs->rip = vcpu->arch.rip;
b6c7a5dc
HB		 2671 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
2672
2673 /*
2674 * Don't leak debug flags in case they were set for guest debugging
2675 */
2676 if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep)
2677 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
2678
2679 vcpu_put(vcpu);
2680
2681 return 0;
2682}
2683
2684int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
2685{
2686 vcpu_load(vcpu);
2687
ad312c7c
ZX		 2688 vcpu->arch.regs[VCPU_REGS_RAX] = regs->rax;
2689 vcpu->arch.regs[VCPU_REGS_RBX] = regs->rbx;
2690 vcpu->arch.regs[VCPU_REGS_RCX] = regs->rcx;
2691 vcpu->arch.regs[VCPU_REGS_RDX] = regs->rdx;
2692 vcpu->arch.regs[VCPU_REGS_RSI] = regs->rsi;
2693 vcpu->arch.regs[VCPU_REGS_RDI] = regs->rdi;
2694 vcpu->arch.regs[VCPU_REGS_RSP] = regs->rsp;
2695 vcpu->arch.regs[VCPU_REGS_RBP] = regs->rbp;
b6c7a5dc 2696#ifdef CONFIG_X86_64
ad312c7c
ZX		 2697 vcpu->arch.regs[VCPU_REGS_R8] = regs->r8;
2698 vcpu->arch.regs[VCPU_REGS_R9] = regs->r9;
2699 vcpu->arch.regs[VCPU_REGS_R10] = regs->r10;
2700 vcpu->arch.regs[VCPU_REGS_R11] = regs->r11;
2701 vcpu->arch.regs[VCPU_REGS_R12] = regs->r12;
2702 vcpu->arch.regs[VCPU_REGS_R13] = regs->r13;
2703 vcpu->arch.regs[VCPU_REGS_R14] = regs->r14;
2704 vcpu->arch.regs[VCPU_REGS_R15] = regs->r15;
b6c7a5dc
HB		 2705#endif
2706
ad312c7c 2707 vcpu->arch.rip = regs->rip;
b6c7a5dc
HB		 2708 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
2709
2710 kvm_x86_ops->decache_regs(vcpu);
2711
2712 vcpu_put(vcpu);
2713
2714 return 0;
2715}
2716
2717static void get_segment(struct kvm_vcpu *vcpu,
2718 struct kvm_segment *var, int seg)
2719{
2720 return kvm_x86_ops->get_segment(vcpu, var, seg);
2721}
2722
2723void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
2724{
2725 struct kvm_segment cs;
2726
2727 get_segment(vcpu, &cs, VCPU_SREG_CS);
2728 *db = cs.db;
2729 *l = cs.l;
2730}
2731EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
2732
2733int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
2734 struct kvm_sregs *sregs)
2735{
2736 struct descriptor_table dt;
2737 int pending_vec;
2738
2739 vcpu_load(vcpu);
2740
2741 get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
2742 get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
2743 get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
2744 get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
2745 get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
2746 get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
2747
2748 get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
2749 get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
2750
2751 kvm_x86_ops->get_idt(vcpu, &dt);
2752 sregs->idt.limit = dt.limit;
2753 sregs->idt.base = dt.base;
2754 kvm_x86_ops->get_gdt(vcpu, &dt);
2755 sregs->gdt.limit = dt.limit;
2756 sregs->gdt.base = dt.base;
2757
2758 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
ad312c7c
ZX		 2759 sregs->cr0 = vcpu->arch.cr0;
2760 sregs->cr2 = vcpu->arch.cr2;
2761 sregs->cr3 = vcpu->arch.cr3;
2762 sregs->cr4 = vcpu->arch.cr4;
b6c7a5dc 2763 sregs->cr8 = get_cr8(vcpu);
ad312c7c 2764 sregs->efer = vcpu->arch.shadow_efer;
b6c7a5dc
HB		 2765 sregs->apic_base = kvm_get_apic_base(vcpu);
2766
2767 if (irqchip_in_kernel(vcpu->kvm)) {
2768 memset(sregs->interrupt_bitmap, 0,
2769 sizeof sregs->interrupt_bitmap);
2770 pending_vec = kvm_x86_ops->get_irq(vcpu);
2771 if (pending_vec >= 0)
2772 set_bit(pending_vec,
2773 (unsigned long *)sregs->interrupt_bitmap);
2774 } else
ad312c7c 2775 memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
b6c7a5dc
HB		 2776 sizeof sregs->interrupt_bitmap);
2777
2778 vcpu_put(vcpu);
2779
2780 return 0;
2781}
2782
2783static void set_segment(struct kvm_vcpu *vcpu,
2784 struct kvm_segment *var, int seg)
2785{
2786 return kvm_x86_ops->set_segment(vcpu, var, seg);
2787}
2788
2789int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
2790 struct kvm_sregs *sregs)
2791{
2792 int mmu_reset_needed = 0;
2793 int i, pending_vec, max_bits;
2794 struct descriptor_table dt;
2795
2796 vcpu_load(vcpu);
2797
2798 dt.limit = sregs->idt.limit;
2799 dt.base = sregs->idt.base;
2800 kvm_x86_ops->set_idt(vcpu, &dt);
2801 dt.limit = sregs->gdt.limit;
2802 dt.base = sregs->gdt.base;
2803 kvm_x86_ops->set_gdt(vcpu, &dt);
2804
ad312c7c
ZX		 2805 vcpu->arch.cr2 = sregs->cr2;
2806 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
2807 vcpu->arch.cr3 = sregs->cr3;
b6c7a5dc
HB		 2808
2809 set_cr8(vcpu, sregs->cr8);
2810
ad312c7c 2811 mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
b6c7a5dc
HB		 2812#ifdef CONFIG_X86_64
2813 kvm_x86_ops->set_efer(vcpu, sregs->efer);
2814#endif
2815 kvm_set_apic_base(vcpu, sregs->apic_base);
2816
2817 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2818
ad312c7c
ZX		 2819 mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
2820 vcpu->arch.cr0 = sregs->cr0;
b6c7a5dc
HB		 2821 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
2822
ad312c7c 2823 mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
b6c7a5dc
HB		 2824 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
2825 if (!is_long_mode(vcpu) && is_pae(vcpu))
ad312c7c 2826 load_pdptrs(vcpu, vcpu->arch.cr3);
b6c7a5dc
HB		 2827
2828 if (mmu_reset_needed)
2829 kvm_mmu_reset_context(vcpu);
2830
2831 if (!irqchip_in_kernel(vcpu->kvm)) {
ad312c7c
ZX		 2832 memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
2833 sizeof vcpu->arch.irq_pending);
2834 vcpu->arch.irq_summary = 0;
2835 for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
2836 if (vcpu->arch.irq_pending[i])
2837 __set_bit(i, &vcpu->arch.irq_summary);
b6c7a5dc
HB		 2838 } else {
2839 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
2840 pending_vec = find_first_bit(
2841 (const unsigned long *)sregs->interrupt_bitmap,
2842 max_bits);
2843 /* Only pending external irq is handled here */
2844 if (pending_vec < max_bits) {
2845 kvm_x86_ops->set_irq(vcpu, pending_vec);
2846 pr_debug("Set back pending irq %d\n",
2847 pending_vec);
2848 }
2849 }
2850
2851 set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
2852 set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
2853 set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
2854 set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
2855 set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
2856 set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
2857
2858 set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
2859 set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
2860
2861 vcpu_put(vcpu);
2862
2863 return 0;
2864}
2865
2866int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
2867 struct kvm_debug_guest *dbg)
2868{
2869 int r;
2870
2871 vcpu_load(vcpu);
2872
2873 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
2874
2875 vcpu_put(vcpu);
2876
2877 return r;
2878}
2879
d0752060
HB		 2880/*
2881 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
2882 * we have asm/x86/processor.h
2883 */
2884struct fxsave {
2885 u16 cwd;
2886 u16 swd;
2887 u16 twd;
2888 u16 fop;
2889 u64 rip;
2890 u64 rdp;
2891 u32 mxcsr;
2892 u32 mxcsr_mask;
2893 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
2894#ifdef CONFIG_X86_64
2895 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
2896#else
2897 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
2898#endif
2899};
2900
8b006791
ZX		 2901/*
2902 * Translate a guest virtual address to a guest physical address.
2903 */
2904int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
2905 struct kvm_translation *tr)
2906{
2907 unsigned long vaddr = tr->linear_address;
2908 gpa_t gpa;
2909
2910 vcpu_load(vcpu);
2911 mutex_lock(&vcpu->kvm->lock);
ad312c7c 2912 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
8b006791
ZX		 2913 tr->physical_address = gpa;
2914 tr->valid = gpa != UNMAPPED_GVA;
2915 tr->writeable = 1;
2916 tr->usermode = 0;
2917 mutex_unlock(&vcpu->kvm->lock);
2918 vcpu_put(vcpu);
2919
2920 return 0;
2921}
2922
d0752060
HB		 2923int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
2924{
ad312c7c 2925 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
d0752060
HB		 2926
2927 vcpu_load(vcpu);
2928
2929 memcpy(fpu->fpr, fxsave->st_space, 128);
2930 fpu->fcw = fxsave->cwd;
2931 fpu->fsw = fxsave->swd;
2932 fpu->ftwx = fxsave->twd;
2933 fpu->last_opcode = fxsave->fop;
2934 fpu->last_ip = fxsave->rip;
2935 fpu->last_dp = fxsave->rdp;
2936 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
2937
2938 vcpu_put(vcpu);
2939
2940 return 0;
2941}
2942
2943int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
2944{
ad312c7c 2945 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
d0752060
HB		 2946
2947 vcpu_load(vcpu);
2948
2949 memcpy(fxsave->st_space, fpu->fpr, 128);
2950 fxsave->cwd = fpu->fcw;
2951 fxsave->swd = fpu->fsw;
2952 fxsave->twd = fpu->ftwx;
2953 fxsave->fop = fpu->last_opcode;
2954 fxsave->rip = fpu->last_ip;
2955 fxsave->rdp = fpu->last_dp;
2956 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
2957
2958 vcpu_put(vcpu);
2959
2960 return 0;
2961}
2962
2963void fx_init(struct kvm_vcpu *vcpu)
2964{
2965 unsigned after_mxcsr_mask;
2966
2967 /* Initialize guest FPU by resetting ours and saving into guest's */
2968 preempt_disable();
ad312c7c 2969 fx_save(&vcpu->arch.host_fx_image);
d0752060 2970 fpu_init();
ad312c7c
ZX		 2971 fx_save(&vcpu->arch.guest_fx_image);
2972 fx_restore(&vcpu->arch.host_fx_image);
d0752060
HB		 2973 preempt_enable();
2974
ad312c7c 2975 vcpu->arch.cr0 |= X86_CR0_ET;
d0752060 2976 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
ad312c7c
ZX		 2977 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
2978 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
d0752060
HB		 2979 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
2980}
2981EXPORT_SYMBOL_GPL(fx_init);
2982
2983void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
2984{
2985 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
2986 return;
2987
2988 vcpu->guest_fpu_loaded = 1;
ad312c7c
ZX		 2989 fx_save(&vcpu->arch.host_fx_image);
2990 fx_restore(&vcpu->arch.guest_fx_image);
d0752060
HB		 2991}
2992EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
2993
2994void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
2995{
2996 if (!vcpu->guest_fpu_loaded)
2997 return;
2998
2999 vcpu->guest_fpu_loaded = 0;
ad312c7c
ZX		 3000 fx_save(&vcpu->arch.guest_fx_image);
3001 fx_restore(&vcpu->arch.host_fx_image);
f096ed85 3002 ++vcpu->stat.fpu_reload;
d0752060
HB		 3003}
3004EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
e9b11c17
ZX		 3005
3006void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
3007{
3008 kvm_x86_ops->vcpu_free(vcpu);
3009}
3010
3011struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
3012 unsigned int id)
3013{
26e5215f
AK		 3014 return kvm_x86_ops->vcpu_create(kvm, id);
3015}
e9b11c17 3016
26e5215f
AK		 3017int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
3018{
3019 int r;
e9b11c17
ZX		 3020
3021 /* We do fxsave: this must be aligned. */
ad312c7c 3022 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
e9b11c17
ZX		 3023
3024 vcpu_load(vcpu);
3025 r = kvm_arch_vcpu_reset(vcpu);
3026 if (r == 0)
3027 r = kvm_mmu_setup(vcpu);
3028 vcpu_put(vcpu);
3029 if (r < 0)
3030 goto free_vcpu;
3031
26e5215f 3032 return 0;
e9b11c17
ZX		 3033free_vcpu:
3034 kvm_x86_ops->vcpu_free(vcpu);
26e5215f 3035 return r;
e9b11c17
ZX		 3036}
3037
d40ccc62 3038void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
e9b11c17
ZX		 3039{
3040 vcpu_load(vcpu);
3041 kvm_mmu_unload(vcpu);
3042 vcpu_put(vcpu);
3043
3044 kvm_x86_ops->vcpu_free(vcpu);
3045}
3046
3047int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
3048{
3049 return kvm_x86_ops->vcpu_reset(vcpu);
3050}
3051
3052void kvm_arch_hardware_enable(void *garbage)
3053{
3054 kvm_x86_ops->hardware_enable(garbage);
3055}
3056
3057void kvm_arch_hardware_disable(void *garbage)
3058{
3059 kvm_x86_ops->hardware_disable(garbage);
3060}
3061
3062int kvm_arch_hardware_setup(void)
3063{
3064 return kvm_x86_ops->hardware_setup();
3065}
3066
3067void kvm_arch_hardware_unsetup(void)
3068{
3069 kvm_x86_ops->hardware_unsetup();
3070}
3071
3072void kvm_arch_check_processor_compat(void *rtn)
3073{
3074 kvm_x86_ops->check_processor_compatibility(rtn);
3075}
3076
3077int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
3078{
3079 struct page *page;
3080 struct kvm *kvm;
3081 int r;
3082
3083 BUG_ON(vcpu->kvm == NULL);
3084 kvm = vcpu->kvm;
3085
ad312c7c 3086 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
e9b11c17 3087 if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
ad312c7c 3088 vcpu->arch.mp_state = VCPU_MP_STATE_RUNNABLE;
e9b11c17 3089 else
ad312c7c 3090 vcpu->arch.mp_state = VCPU_MP_STATE_UNINITIALIZED;
e9b11c17
ZX		 3091
3092 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
3093 if (!page) {
3094 r = -ENOMEM;
3095 goto fail;
3096 }
ad312c7c 3097 vcpu->arch.pio_data = page_address(page);
e9b11c17
ZX		 3098
3099 r = kvm_mmu_create(vcpu);
3100 if (r < 0)
3101 goto fail_free_pio_data;
3102
3103 if (irqchip_in_kernel(kvm)) {
3104 r = kvm_create_lapic(vcpu);
3105 if (r < 0)
3106 goto fail_mmu_destroy;
3107 }
3108
3109 return 0;
3110
3111fail_mmu_destroy:
3112 kvm_mmu_destroy(vcpu);
3113fail_free_pio_data:
ad312c7c 3114 free_page((unsigned long)vcpu->arch.pio_data);
e9b11c17
ZX		 3115fail:
3116 return r;
3117}
3118
3119void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
3120{
3121 kvm_free_lapic(vcpu);
3122 kvm_mmu_destroy(vcpu);
ad312c7c 3123 free_page((unsigned long)vcpu->arch.pio_data);
e9b11c17 3124}
d19a9cd2
ZX		 3125
3126struct kvm *kvm_arch_create_vm(void)
3127{
3128 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
3129
3130 if (!kvm)
3131 return ERR_PTR(-ENOMEM);
3132
f05e70ac 3133 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
d19a9cd2
ZX		 3134
3135 return kvm;
3136}
3137
3138static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
3139{
3140 vcpu_load(vcpu);
3141 kvm_mmu_unload(vcpu);
3142 vcpu_put(vcpu);
3143}
3144
3145static void kvm_free_vcpus(struct kvm *kvm)
3146{
3147 unsigned int i;
3148
3149 /*
3150 * Unpin any mmu pages first.
3151 */
3152 for (i = 0; i < KVM_MAX_VCPUS; ++i)
3153 if (kvm->vcpus[i])
3154 kvm_unload_vcpu_mmu(kvm->vcpus[i]);
3155 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
3156 if (kvm->vcpus[i]) {
3157 kvm_arch_vcpu_free(kvm->vcpus[i]);
3158 kvm->vcpus[i] = NULL;
3159 }
3160 }
3161
3162}
3163
3164void kvm_arch_destroy_vm(struct kvm *kvm)
3165{
d7deeeb0
ZX		 3166 kfree(kvm->arch.vpic);
3167 kfree(kvm->arch.vioapic);
d19a9cd2
ZX		 3168 kvm_free_vcpus(kvm);
3169 kvm_free_physmem(kvm);
3170 kfree(kvm);
3171}
0de10343
ZX		 3172
3173int kvm_arch_set_memory_region(struct kvm *kvm,
3174 struct kvm_userspace_memory_region *mem,
3175 struct kvm_memory_slot old,
3176 int user_alloc)
3177{
3178 int npages = mem->memory_size >> PAGE_SHIFT;
3179 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
3180
3181 /*To keep backward compatibility with older userspace,
3182 *x86 needs to hanlde !user_alloc case.
3183 */
3184 if (!user_alloc) {
3185 if (npages && !old.rmap) {
3186 down_write(&current->mm->mmap_sem);
3187 memslot->userspace_addr = do_mmap(NULL, 0,
3188 npages * PAGE_SIZE,
3189 PROT_READ | PROT_WRITE,
3190 MAP_SHARED | MAP_ANONYMOUS,
3191 0);
3192 up_write(&current->mm->mmap_sem);
3193
3194 if (IS_ERR((void *)memslot->userspace_addr))
3195 return PTR_ERR((void *)memslot->userspace_addr);
3196 } else {
3197 if (!old.user_alloc && old.rmap) {
3198 int ret;
3199
3200 down_write(&current->mm->mmap_sem);
3201 ret = do_munmap(current->mm, old.userspace_addr,
3202 old.npages * PAGE_SIZE);
3203 up_write(&current->mm->mmap_sem);
3204 if (ret < 0)
3205 printk(KERN_WARNING
3206 "kvm_vm_ioctl_set_memory_region: "
3207 "failed to munmap memory\n");
3208 }
3209 }
3210 }
3211
f05e70ac 3212 if (!kvm->arch.n_requested_mmu_pages) {
0de10343
ZX		 3213 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
3214 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
3215 }
3216
3217 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
3218 kvm_flush_remote_tlbs(kvm);
3219
3220 return 0;
3221}
1d737c8a
ZX		 3222
3223int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
3224{
3225 return vcpu->arch.mp_state == VCPU_MP_STATE_RUNNABLE
3226 || vcpu->arch.mp_state == VCPU_MP_STATE_SIPI_RECEIVED;
3227}
5736199a
ZX		 3228
3229static void vcpu_kick_intr(void *info)
3230{
3231#ifdef DEBUG
3232 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
3233 printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
3234#endif
3235}
3236
3237void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
3238{
3239 int ipi_pcpu = vcpu->cpu;
3240
3241 if (waitqueue_active(&vcpu->wq)) {
3242 wake_up_interruptible(&vcpu->wq);
3243 ++vcpu->stat.halt_wakeup;
3244 }
3245 if (vcpu->guest_mode)
3246 smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0, 0);
3247}
Linux kernel - Deliverables
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