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KVM: MMU: Modify kvm_shadow_walk.entry to accept u64 addr
[deliverable/linux.git] / arch / x86 / kvm / x86.c
CommitLineData
043405e1
CO		 1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * derived from drivers/kvm/kvm_main.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
4d5c5d0f
BAY		 7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
043405e1
CO		 9 *
10 * Authors:
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
4d5c5d0f
BAY		 13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
043405e1
CO		 15 *
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
18 *
19 */
20
edf88417 21#include <linux/kvm_host.h>
313a3dc7 22#include "irq.h"
1d737c8a 23#include "mmu.h"
7837699f 24#include "i8254.h"
37817f29 25#include "tss.h"
5fdbf976 26#include "kvm_cache_regs.h"
26eef70c 27#include "x86.h"
313a3dc7 28
18068523 29#include <linux/clocksource.h>
4d5c5d0f 30#include <linux/interrupt.h>
313a3dc7
CO		 31#include <linux/kvm.h>
32#include <linux/fs.h>
4d5c5d0f 33#include <linux/pci.h>
313a3dc7 34#include <linux/vmalloc.h>
5fb76f9b 35#include <linux/module.h>
0de10343 36#include <linux/mman.h>
2bacc55c 37#include <linux/highmem.h>
043405e1
CO		 38
39#include <asm/uaccess.h>
d825ed0a 40#include <asm/msr.h>
a5f61300 41#include <asm/desc.h>
043405e1 42
313a3dc7 43#define MAX_IO_MSRS 256
a03490ed
CO		 44#define CR0_RESERVED_BITS \
45 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
46 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
47 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
48#define CR4_RESERVED_BITS \
49 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
50 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
51 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
52 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
53
54#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
50a37eb4
JR		 55/* EFER defaults:
56 * - enable syscall per default because its emulated by KVM
57 * - enable LME and LMA per default on 64 bit KVM
58 */
59#ifdef CONFIG_X86_64
60static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
61#else
62static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
63#endif
313a3dc7 64
ba1389b7
AK		 65#define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
66#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
417bc304 67
674eea0f
AK		 68static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
69 struct kvm_cpuid_entry2 __user *entries);
70
97896d04 71struct kvm_x86_ops *kvm_x86_ops;
5fdbf976 72EXPORT_SYMBOL_GPL(kvm_x86_ops);
97896d04 73
417bc304 74struct kvm_stats_debugfs_item debugfs_entries[] = {
ba1389b7
AK		 75 { "pf_fixed", VCPU_STAT(pf_fixed) },
76 { "pf_guest", VCPU_STAT(pf_guest) },
77 { "tlb_flush", VCPU_STAT(tlb_flush) },
78 { "invlpg", VCPU_STAT(invlpg) },
79 { "exits", VCPU_STAT(exits) },
80 { "io_exits", VCPU_STAT(io_exits) },
81 { "mmio_exits", VCPU_STAT(mmio_exits) },
82 { "signal_exits", VCPU_STAT(signal_exits) },
83 { "irq_window", VCPU_STAT(irq_window_exits) },
f08864b4 84 { "nmi_window", VCPU_STAT(nmi_window_exits) },
ba1389b7
AK		 85 { "halt_exits", VCPU_STAT(halt_exits) },
86 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
f11c3a8d 87 { "hypercalls", VCPU_STAT(hypercalls) },
ba1389b7
AK		 88 { "request_irq", VCPU_STAT(request_irq_exits) },
89 { "irq_exits", VCPU_STAT(irq_exits) },
90 { "host_state_reload", VCPU_STAT(host_state_reload) },
91 { "efer_reload", VCPU_STAT(efer_reload) },
92 { "fpu_reload", VCPU_STAT(fpu_reload) },
93 { "insn_emulation", VCPU_STAT(insn_emulation) },
94 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
4cee5764
AK		 95 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
96 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
97 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
98 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
99 { "mmu_flooded", VM_STAT(mmu_flooded) },
100 { "mmu_recycled", VM_STAT(mmu_recycled) },
dfc5aa00 101 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
0f74a24c 102 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
05da4558 103 { "largepages", VM_STAT(lpages) },
417bc304
HB		 104 { NULL }
105};
106
ee032c99 107static struct kvm_assigned_dev_kernel *kvm_find_assigned_dev(struct list_head *head,
4d5c5d0f
BAY		 108 int assigned_dev_id)
109{
110 struct list_head *ptr;
111 struct kvm_assigned_dev_kernel *match;
112
113 list_for_each(ptr, head) {
114 match = list_entry(ptr, struct kvm_assigned_dev_kernel, list);
115 if (match->assigned_dev_id == assigned_dev_id)
116 return match;
117 }
118 return NULL;
119}
120
121static void kvm_assigned_dev_interrupt_work_handler(struct work_struct *work)
122{
123 struct kvm_assigned_dev_kernel *assigned_dev;
124
125 assigned_dev = container_of(work, struct kvm_assigned_dev_kernel,
126 interrupt_work);
127
128 /* This is taken to safely inject irq inside the guest. When
129 * the interrupt injection (or the ioapic code) uses a
130 * finer-grained lock, update this
131 */
132 mutex_lock(&assigned_dev->kvm->lock);
133 kvm_set_irq(assigned_dev->kvm,
134 assigned_dev->guest_irq, 1);
135 mutex_unlock(&assigned_dev->kvm->lock);
136 kvm_put_kvm(assigned_dev->kvm);
137}
138
139/* FIXME: Implement the OR logic needed to make shared interrupts on
140 * this line behave properly
141 */
142static irqreturn_t kvm_assigned_dev_intr(int irq, void *dev_id)
143{
144 struct kvm_assigned_dev_kernel *assigned_dev =
145 (struct kvm_assigned_dev_kernel *) dev_id;
146
147 kvm_get_kvm(assigned_dev->kvm);
148 schedule_work(&assigned_dev->interrupt_work);
149 disable_irq_nosync(irq);
150 return IRQ_HANDLED;
151}
152
153/* Ack the irq line for an assigned device */
154static void kvm_assigned_dev_ack_irq(struct kvm_irq_ack_notifier *kian)
155{
156 struct kvm_assigned_dev_kernel *dev;
157
158 if (kian->gsi == -1)
159 return;
160
161 dev = container_of(kian, struct kvm_assigned_dev_kernel,
162 ack_notifier);
163 kvm_set_irq(dev->kvm, dev->guest_irq, 0);
164 enable_irq(dev->host_irq);
165}
166
167static int kvm_vm_ioctl_assign_irq(struct kvm *kvm,
168 struct kvm_assigned_irq
169 *assigned_irq)
170{
171 int r = 0;
172 struct kvm_assigned_dev_kernel *match;
173
174 mutex_lock(&kvm->lock);
175
176 match = kvm_find_assigned_dev(&kvm->arch.assigned_dev_head,
177 assigned_irq->assigned_dev_id);
178 if (!match) {
179 mutex_unlock(&kvm->lock);
180 return -EINVAL;
181 }
182
183 if (match->irq_requested) {
184 match->guest_irq = assigned_irq->guest_irq;
185 match->ack_notifier.gsi = assigned_irq->guest_irq;
186 mutex_unlock(&kvm->lock);
187 return 0;
188 }
189
190 INIT_WORK(&match->interrupt_work,
191 kvm_assigned_dev_interrupt_work_handler);
192
193 if (irqchip_in_kernel(kvm)) {
6762b729
AS		 194 if (!capable(CAP_SYS_RAWIO)) {
195 return -EPERM;
196 goto out;
197 }
198
4d5c5d0f
BAY		 199 if (assigned_irq->host_irq)
200 match->host_irq = assigned_irq->host_irq;
201 else
202 match->host_irq = match->dev->irq;
203 match->guest_irq = assigned_irq->guest_irq;
204 match->ack_notifier.gsi = assigned_irq->guest_irq;
205 match->ack_notifier.irq_acked = kvm_assigned_dev_ack_irq;
206 kvm_register_irq_ack_notifier(kvm, &match->ack_notifier);
207
208 /* Even though this is PCI, we don't want to use shared
209 * interrupts. Sharing host devices with guest-assigned devices
210 * on the same interrupt line is not a happy situation: there
211 * are going to be long delays in accepting, acking, etc.
212 */
213 if (request_irq(match->host_irq, kvm_assigned_dev_intr, 0,
214 "kvm_assigned_device", (void *)match)) {
215 printk(KERN_INFO "%s: couldn't allocate irq for pv "
216 "device\n", __func__);
217 r = -EIO;
218 goto out;
219 }
220 }
221
222 match->irq_requested = true;
223out:
224 mutex_unlock(&kvm->lock);
225 return r;
226}
227
228static int kvm_vm_ioctl_assign_device(struct kvm *kvm,
229 struct kvm_assigned_pci_dev *assigned_dev)
230{
231 int r = 0;
232 struct kvm_assigned_dev_kernel *match;
233 struct pci_dev *dev;
234
235 mutex_lock(&kvm->lock);
236
237 match = kvm_find_assigned_dev(&kvm->arch.assigned_dev_head,
238 assigned_dev->assigned_dev_id);
239 if (match) {
240 /* device already assigned */
241 r = -EINVAL;
242 goto out;
243 }
244
245 match = kzalloc(sizeof(struct kvm_assigned_dev_kernel), GFP_KERNEL);
246 if (match == NULL) {
247 printk(KERN_INFO "%s: Couldn't allocate memory\n",
248 __func__);
249 r = -ENOMEM;
250 goto out;
251 }
252 dev = pci_get_bus_and_slot(assigned_dev->busnr,
253 assigned_dev->devfn);
254 if (!dev) {
255 printk(KERN_INFO "%s: host device not found\n", __func__);
256 r = -EINVAL;
257 goto out_free;
258 }
259 if (pci_enable_device(dev)) {
260 printk(KERN_INFO "%s: Could not enable PCI device\n", __func__);
261 r = -EBUSY;
262 goto out_put;
263 }
264 r = pci_request_regions(dev, "kvm_assigned_device");
265 if (r) {
266 printk(KERN_INFO "%s: Could not get access to device regions\n",
267 __func__);
268 goto out_disable;
269 }
270 match->assigned_dev_id = assigned_dev->assigned_dev_id;
271 match->host_busnr = assigned_dev->busnr;
272 match->host_devfn = assigned_dev->devfn;
273 match->dev = dev;
274
275 match->kvm = kvm;
276
277 list_add(&match->list, &kvm->arch.assigned_dev_head);
278
279out:
280 mutex_unlock(&kvm->lock);
281 return r;
282out_disable:
283 pci_disable_device(dev);
284out_put:
285 pci_dev_put(dev);
286out_free:
287 kfree(match);
288 mutex_unlock(&kvm->lock);
289 return r;
290}
291
292static void kvm_free_assigned_devices(struct kvm *kvm)
293{
294 struct list_head *ptr, *ptr2;
295 struct kvm_assigned_dev_kernel *assigned_dev;
296
297 list_for_each_safe(ptr, ptr2, &kvm->arch.assigned_dev_head) {
298 assigned_dev = list_entry(ptr,
299 struct kvm_assigned_dev_kernel,
300 list);
301
302 if (irqchip_in_kernel(kvm) && assigned_dev->irq_requested) {
303 free_irq(assigned_dev->host_irq,
304 (void *)assigned_dev);
305
306 kvm_unregister_irq_ack_notifier(kvm,
307 &assigned_dev->
308 ack_notifier);
309 }
310
311 if (cancel_work_sync(&assigned_dev->interrupt_work))
312 /* We had pending work. That means we will have to take
313 * care of kvm_put_kvm.
314 */
315 kvm_put_kvm(kvm);
316
317 pci_release_regions(assigned_dev->dev);
318 pci_disable_device(assigned_dev->dev);
319 pci_dev_put(assigned_dev->dev);
320
321 list_del(&assigned_dev->list);
322 kfree(assigned_dev);
323 }
324}
417bc304 325
5fb76f9b
CO		 326unsigned long segment_base(u16 selector)
327{
328 struct descriptor_table gdt;
a5f61300 329 struct desc_struct *d;
5fb76f9b
CO		 330 unsigned long table_base;
331 unsigned long v;
332
333 if (selector == 0)
334 return 0;
335
336 asm("sgdt %0" : "=m"(gdt));
337 table_base = gdt.base;
338
339 if (selector & 4) { /* from ldt */
340 u16 ldt_selector;
341
342 asm("sldt %0" : "=g"(ldt_selector));
343 table_base = segment_base(ldt_selector);
344 }
a5f61300
AK		 345 d = (struct desc_struct *)(table_base + (selector & ~7));
346 v = d->base0 | ((unsigned long)d->base1 << 16) |
347 ((unsigned long)d->base2 << 24);
5fb76f9b 348#ifdef CONFIG_X86_64
a5f61300
AK		 349 if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
350 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
5fb76f9b
CO		 351#endif
352 return v;
353}
354EXPORT_SYMBOL_GPL(segment_base);
355
6866b83e
CO		 356u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
357{
358 if (irqchip_in_kernel(vcpu->kvm))
ad312c7c 359 return vcpu->arch.apic_base;
6866b83e 360 else
ad312c7c 361 return vcpu->arch.apic_base;
6866b83e
CO		 362}
363EXPORT_SYMBOL_GPL(kvm_get_apic_base);
364
365void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
366{
367 /* TODO: reserve bits check */
368 if (irqchip_in_kernel(vcpu->kvm))
369 kvm_lapic_set_base(vcpu, data);
370 else
ad312c7c 371 vcpu->arch.apic_base = data;
6866b83e
CO		 372}
373EXPORT_SYMBOL_GPL(kvm_set_apic_base);
374
298101da
AK		 375void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
376{
ad312c7c
ZX		 377 WARN_ON(vcpu->arch.exception.pending);
378 vcpu->arch.exception.pending = true;
379 vcpu->arch.exception.has_error_code = false;
380 vcpu->arch.exception.nr = nr;
298101da
AK		 381}
382EXPORT_SYMBOL_GPL(kvm_queue_exception);
383
c3c91fee
AK		 384void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
385 u32 error_code)
386{
387 ++vcpu->stat.pf_guest;
71c4dfaf
JR		 388 if (vcpu->arch.exception.pending) {
389 if (vcpu->arch.exception.nr == PF_VECTOR) {
390 printk(KERN_DEBUG "kvm: inject_page_fault:"
391 " double fault 0x%lx\n", addr);
392 vcpu->arch.exception.nr = DF_VECTOR;
393 vcpu->arch.exception.error_code = 0;
394 } else if (vcpu->arch.exception.nr == DF_VECTOR) {
395 /* triple fault -> shutdown */
396 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
397 }
c3c91fee
AK		 398 return;
399 }
ad312c7c 400 vcpu->arch.cr2 = addr;
c3c91fee
AK		 401 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
402}
403
3419ffc8
SY		 404void kvm_inject_nmi(struct kvm_vcpu *vcpu)
405{
406 vcpu->arch.nmi_pending = 1;
407}
408EXPORT_SYMBOL_GPL(kvm_inject_nmi);
409
298101da
AK		 410void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
411{
ad312c7c
ZX		 412 WARN_ON(vcpu->arch.exception.pending);
413 vcpu->arch.exception.pending = true;
414 vcpu->arch.exception.has_error_code = true;
415 vcpu->arch.exception.nr = nr;
416 vcpu->arch.exception.error_code = error_code;
298101da
AK		 417}
418EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
419
420static void __queue_exception(struct kvm_vcpu *vcpu)
421{
ad312c7c
ZX		 422 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
423 vcpu->arch.exception.has_error_code,
424 vcpu->arch.exception.error_code);
298101da
AK		 425}
426
a03490ed
CO		 427/*
428 * Load the pae pdptrs. Return true is they are all valid.
429 */
430int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
431{
432 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
433 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
434 int i;
435 int ret;
ad312c7c 436 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
a03490ed 437
a03490ed
CO		 438 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
439 offset * sizeof(u64), sizeof(pdpte));
440 if (ret < 0) {
441 ret = 0;
442 goto out;
443 }
444 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
445 if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
446 ret = 0;
447 goto out;
448 }
449 }
450 ret = 1;
451
ad312c7c 452 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
a03490ed 453out:
a03490ed
CO		 454
455 return ret;
456}
cc4b6871 457EXPORT_SYMBOL_GPL(load_pdptrs);
a03490ed 458
d835dfec
AK		 459static bool pdptrs_changed(struct kvm_vcpu *vcpu)
460{
ad312c7c 461 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
d835dfec
AK		 462 bool changed = true;
463 int r;
464
465 if (is_long_mode(vcpu) || !is_pae(vcpu))
466 return false;
467
ad312c7c 468 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
d835dfec
AK		 469 if (r < 0)
470 goto out;
ad312c7c 471 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
d835dfec 472out:
d835dfec
AK		 473
474 return changed;
475}
476
2d3ad1f4 477void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
a03490ed
CO		 478{
479 if (cr0 & CR0_RESERVED_BITS) {
480 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
ad312c7c 481 cr0, vcpu->arch.cr0);
c1a5d4f9 482 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 483 return;
484 }
485
486 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
487 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
c1a5d4f9 488 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 489 return;
490 }
491
492 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
493 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
494 "and a clear PE flag\n");
c1a5d4f9 495 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 496 return;
497 }
498
499 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
500#ifdef CONFIG_X86_64
ad312c7c 501 if ((vcpu->arch.shadow_efer & EFER_LME)) {
a03490ed
CO		 502 int cs_db, cs_l;
503
504 if (!is_pae(vcpu)) {
505 printk(KERN_DEBUG "set_cr0: #GP, start paging "
506 "in long mode while PAE is disabled\n");
c1a5d4f9 507 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 508 return;
509 }
510 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
511 if (cs_l) {
512 printk(KERN_DEBUG "set_cr0: #GP, start paging "
513 "in long mode while CS.L == 1\n");
c1a5d4f9 514 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 515 return;
516
517 }
518 } else
519#endif
ad312c7c 520 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
a03490ed
CO		 521 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
522 "reserved bits\n");
c1a5d4f9 523 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 524 return;
525 }
526
527 }
528
529 kvm_x86_ops->set_cr0(vcpu, cr0);
ad312c7c 530 vcpu->arch.cr0 = cr0;
a03490ed 531
a03490ed 532 kvm_mmu_reset_context(vcpu);
a03490ed
CO		 533 return;
534}
2d3ad1f4 535EXPORT_SYMBOL_GPL(kvm_set_cr0);
a03490ed 536
2d3ad1f4 537void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
a03490ed 538{
2d3ad1f4 539 kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
2714d1d3
FEL		 540 KVMTRACE_1D(LMSW, vcpu,
541 (u32)((vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f)),
542 handler);
a03490ed 543}
2d3ad1f4 544EXPORT_SYMBOL_GPL(kvm_lmsw);
a03490ed 545
2d3ad1f4 546void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
a03490ed
CO		 547{
548 if (cr4 & CR4_RESERVED_BITS) {
549 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
c1a5d4f9 550 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 551 return;
552 }
553
554 if (is_long_mode(vcpu)) {
555 if (!(cr4 & X86_CR4_PAE)) {
556 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
557 "in long mode\n");
c1a5d4f9 558 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 559 return;
560 }
561 } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
ad312c7c 562 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
a03490ed 563 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
c1a5d4f9 564 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 565 return;
566 }
567
568 if (cr4 & X86_CR4_VMXE) {
569 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
c1a5d4f9 570 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 571 return;
572 }
573 kvm_x86_ops->set_cr4(vcpu, cr4);
ad312c7c 574 vcpu->arch.cr4 = cr4;
a03490ed 575 kvm_mmu_reset_context(vcpu);
a03490ed 576}
2d3ad1f4 577EXPORT_SYMBOL_GPL(kvm_set_cr4);
a03490ed 578
2d3ad1f4 579void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
a03490ed 580{
ad312c7c 581 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
d835dfec
AK		 582 kvm_mmu_flush_tlb(vcpu);
583 return;
584 }
585
a03490ed
CO		 586 if (is_long_mode(vcpu)) {
587 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
588 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
c1a5d4f9 589 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 590 return;
591 }
592 } else {
593 if (is_pae(vcpu)) {
594 if (cr3 & CR3_PAE_RESERVED_BITS) {
595 printk(KERN_DEBUG
596 "set_cr3: #GP, reserved bits\n");
c1a5d4f9 597 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 598 return;
599 }
600 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
601 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
602 "reserved bits\n");
c1a5d4f9 603 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 604 return;
605 }
606 }
607 /*
608 * We don't check reserved bits in nonpae mode, because
609 * this isn't enforced, and VMware depends on this.
610 */
611 }
612
a03490ed
CO		 613 /*
614 * Does the new cr3 value map to physical memory? (Note, we
615 * catch an invalid cr3 even in real-mode, because it would
616 * cause trouble later on when we turn on paging anyway.)
617 *
618 * A real CPU would silently accept an invalid cr3 and would
619 * attempt to use it - with largely undefined (and often hard
620 * to debug) behavior on the guest side.
621 */
622 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
c1a5d4f9 623 kvm_inject_gp(vcpu, 0);
a03490ed 624 else {
ad312c7c
ZX		 625 vcpu->arch.cr3 = cr3;
626 vcpu->arch.mmu.new_cr3(vcpu);
a03490ed 627 }
a03490ed 628}
2d3ad1f4 629EXPORT_SYMBOL_GPL(kvm_set_cr3);
a03490ed 630
2d3ad1f4 631void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
a03490ed
CO		 632{
633 if (cr8 & CR8_RESERVED_BITS) {
634 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
c1a5d4f9 635 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 636 return;
637 }
638 if (irqchip_in_kernel(vcpu->kvm))
639 kvm_lapic_set_tpr(vcpu, cr8);
640 else
ad312c7c 641 vcpu->arch.cr8 = cr8;
a03490ed 642}
2d3ad1f4 643EXPORT_SYMBOL_GPL(kvm_set_cr8);
a03490ed 644
2d3ad1f4 645unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
a03490ed
CO		 646{
647 if (irqchip_in_kernel(vcpu->kvm))
648 return kvm_lapic_get_cr8(vcpu);
649 else
ad312c7c 650 return vcpu->arch.cr8;
a03490ed 651}
2d3ad1f4 652EXPORT_SYMBOL_GPL(kvm_get_cr8);
a03490ed 653
043405e1
CO		 654/*
655 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
656 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
657 *
658 * This list is modified at module load time to reflect the
659 * capabilities of the host cpu.
660 */
661static u32 msrs_to_save[] = {
662 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
663 MSR_K6_STAR,
664#ifdef CONFIG_X86_64
665 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
666#endif
18068523 667 MSR_IA32_TIME_STAMP_COUNTER, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
847f0ad8 668 MSR_IA32_PERF_STATUS,
043405e1
CO		 669};
670
671static unsigned num_msrs_to_save;
672
673static u32 emulated_msrs[] = {
674 MSR_IA32_MISC_ENABLE,
675};
676
15c4a640
CO		 677static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
678{
f2b4b7dd 679 if (efer & efer_reserved_bits) {
15c4a640
CO		 680 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
681 efer);
c1a5d4f9 682 kvm_inject_gp(vcpu, 0);
15c4a640
CO		 683 return;
684 }
685
686 if (is_paging(vcpu)
ad312c7c 687 && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
15c4a640 688 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
c1a5d4f9 689 kvm_inject_gp(vcpu, 0);
15c4a640
CO		 690 return;
691 }
692
693 kvm_x86_ops->set_efer(vcpu, efer);
694
695 efer &= ~EFER_LMA;
ad312c7c 696 efer |= vcpu->arch.shadow_efer & EFER_LMA;
15c4a640 697
ad312c7c 698 vcpu->arch.shadow_efer = efer;
15c4a640
CO		 699}
700
f2b4b7dd
JR		 701void kvm_enable_efer_bits(u64 mask)
702{
703 efer_reserved_bits &= ~mask;
704}
705EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
706
707
15c4a640
CO		 708/*
709 * Writes msr value into into the appropriate "register".
710 * Returns 0 on success, non-0 otherwise.
711 * Assumes vcpu_load() was already called.
712 */
713int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
714{
715 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
716}
717
313a3dc7
CO		 718/*
719 * Adapt set_msr() to msr_io()'s calling convention
720 */
721static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
722{
723 return kvm_set_msr(vcpu, index, *data);
724}
725
18068523
GOC		 726static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
727{
728 static int version;
50d0a0f9
GH		 729 struct pvclock_wall_clock wc;
730 struct timespec now, sys, boot;
18068523
GOC		 731
732 if (!wall_clock)
733 return;
734
735 version++;
736
18068523
GOC		 737 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
738
50d0a0f9
GH		 739 /*
740 * The guest calculates current wall clock time by adding
741 * system time (updated by kvm_write_guest_time below) to the
742 * wall clock specified here. guest system time equals host
743 * system time for us, thus we must fill in host boot time here.
744 */
745 now = current_kernel_time();
746 ktime_get_ts(&sys);
747 boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
748
749 wc.sec = boot.tv_sec;
750 wc.nsec = boot.tv_nsec;
751 wc.version = version;
18068523
GOC		 752
753 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
754
755 version++;
756 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
18068523
GOC		 757}
758
50d0a0f9
GH		 759static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
760{
761 uint32_t quotient, remainder;
762
763 /* Don't try to replace with do_div(), this one calculates
764 * "(dividend << 32) / divisor" */
765 __asm__ ( "divl %4"
766 : "=a" (quotient), "=d" (remainder)
767 : "0" (0), "1" (dividend), "r" (divisor) );
768 return quotient;
769}
770
771static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
772{
773 uint64_t nsecs = 1000000000LL;
774 int32_t shift = 0;
775 uint64_t tps64;
776 uint32_t tps32;
777
778 tps64 = tsc_khz * 1000LL;
779 while (tps64 > nsecs*2) {
780 tps64 >>= 1;
781 shift--;
782 }
783
784 tps32 = (uint32_t)tps64;
785 while (tps32 <= (uint32_t)nsecs) {
786 tps32 <<= 1;
787 shift++;
788 }
789
790 hv_clock->tsc_shift = shift;
791 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
792
793 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
794 __FUNCTION__, tsc_khz, hv_clock->tsc_shift,
795 hv_clock->tsc_to_system_mul);
796}
797
18068523
GOC		 798static void kvm_write_guest_time(struct kvm_vcpu *v)
799{
800 struct timespec ts;
801 unsigned long flags;
802 struct kvm_vcpu_arch *vcpu = &v->arch;
803 void *shared_kaddr;
804
805 if ((!vcpu->time_page))
806 return;
807
50d0a0f9
GH		 808 if (unlikely(vcpu->hv_clock_tsc_khz != tsc_khz)) {
809 kvm_set_time_scale(tsc_khz, &vcpu->hv_clock);
810 vcpu->hv_clock_tsc_khz = tsc_khz;
811 }
812
18068523
GOC		 813 /* Keep irq disabled to prevent changes to the clock */
814 local_irq_save(flags);
815 kvm_get_msr(v, MSR_IA32_TIME_STAMP_COUNTER,
816 &vcpu->hv_clock.tsc_timestamp);
817 ktime_get_ts(&ts);
818 local_irq_restore(flags);
819
820 /* With all the info we got, fill in the values */
821
822 vcpu->hv_clock.system_time = ts.tv_nsec +
823 (NSEC_PER_SEC * (u64)ts.tv_sec);
824 /*
825 * The interface expects us to write an even number signaling that the
826 * update is finished. Since the guest won't see the intermediate
50d0a0f9 827 * state, we just increase by 2 at the end.
18068523 828 */
50d0a0f9 829 vcpu->hv_clock.version += 2;
18068523
GOC		 830
831 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
832
833 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
50d0a0f9 834 sizeof(vcpu->hv_clock));
18068523
GOC		 835
836 kunmap_atomic(shared_kaddr, KM_USER0);
837
838 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
839}
840
9ba075a6
AK		 841static bool msr_mtrr_valid(unsigned msr)
842{
843 switch (msr) {
844 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
845 case MSR_MTRRfix64K_00000:
846 case MSR_MTRRfix16K_80000:
847 case MSR_MTRRfix16K_A0000:
848 case MSR_MTRRfix4K_C0000:
849 case MSR_MTRRfix4K_C8000:
850 case MSR_MTRRfix4K_D0000:
851 case MSR_MTRRfix4K_D8000:
852 case MSR_MTRRfix4K_E0000:
853 case MSR_MTRRfix4K_E8000:
854 case MSR_MTRRfix4K_F0000:
855 case MSR_MTRRfix4K_F8000:
856 case MSR_MTRRdefType:
857 case MSR_IA32_CR_PAT:
858 return true;
859 case 0x2f8:
860 return true;
861 }
862 return false;
863}
864
865static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
866{
867 if (!msr_mtrr_valid(msr))
868 return 1;
869
870 vcpu->arch.mtrr[msr - 0x200] = data;
871 return 0;
872}
15c4a640
CO		 873
874int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
875{
876 switch (msr) {
15c4a640
CO		 877 case MSR_EFER:
878 set_efer(vcpu, data);
879 break;
15c4a640
CO		 880 case MSR_IA32_MC0_STATUS:
881 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
b8688d51 882 __func__, data);
15c4a640
CO		 883 break;
884 case MSR_IA32_MCG_STATUS:
885 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
b8688d51 886 __func__, data);
15c4a640 887 break;
c7ac679c
JR		 888 case MSR_IA32_MCG_CTL:
889 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
b8688d51 890 __func__, data);
c7ac679c 891 break;
b5e2fec0
AG		 892 case MSR_IA32_DEBUGCTLMSR:
893 if (!data) {
894 /* We support the non-activated case already */
895 break;
896 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
897 /* Values other than LBR and BTF are vendor-specific,
898 thus reserved and should throw a #GP */
899 return 1;
900 }
901 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
902 __func__, data);
903 break;
15c4a640
CO		 904 case MSR_IA32_UCODE_REV:
905 case MSR_IA32_UCODE_WRITE:
15c4a640 906 break;
9ba075a6
AK		 907 case 0x200 ... 0x2ff:
908 return set_msr_mtrr(vcpu, msr, data);
15c4a640
CO		 909 case MSR_IA32_APICBASE:
910 kvm_set_apic_base(vcpu, data);
911 break;
912 case MSR_IA32_MISC_ENABLE:
ad312c7c 913 vcpu->arch.ia32_misc_enable_msr = data;
15c4a640 914 break;
18068523
GOC		 915 case MSR_KVM_WALL_CLOCK:
916 vcpu->kvm->arch.wall_clock = data;
917 kvm_write_wall_clock(vcpu->kvm, data);
918 break;
919 case MSR_KVM_SYSTEM_TIME: {
920 if (vcpu->arch.time_page) {
921 kvm_release_page_dirty(vcpu->arch.time_page);
922 vcpu->arch.time_page = NULL;
923 }
924
925 vcpu->arch.time = data;
926
927 /* we verify if the enable bit is set... */
928 if (!(data & 1))
929 break;
930
931 /* ...but clean it before doing the actual write */
932 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
933
18068523 934 down_read(&current->mm->mmap_sem);
18068523
GOC		 935 vcpu->arch.time_page =
936 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
18068523
GOC		 937 up_read(&current->mm->mmap_sem);
938
939 if (is_error_page(vcpu->arch.time_page)) {
940 kvm_release_page_clean(vcpu->arch.time_page);
941 vcpu->arch.time_page = NULL;
942 }
943
944 kvm_write_guest_time(vcpu);
945 break;
946 }
15c4a640 947 default:
565f1fbd 948 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
15c4a640
CO		 949 return 1;
950 }
951 return 0;
952}
953EXPORT_SYMBOL_GPL(kvm_set_msr_common);
954
955
956/*
957 * Reads an msr value (of 'msr_index') into 'pdata'.
958 * Returns 0 on success, non-0 otherwise.
959 * Assumes vcpu_load() was already called.
960 */
961int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
962{
963 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
964}
965
9ba075a6
AK		 966static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
967{
968 if (!msr_mtrr_valid(msr))
969 return 1;
970
971 *pdata = vcpu->arch.mtrr[msr - 0x200];
972 return 0;
973}
974
15c4a640
CO		 975int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
976{
977 u64 data;
978
979 switch (msr) {
980 case 0xc0010010: /* SYSCFG */
981 case 0xc0010015: /* HWCR */
982 case MSR_IA32_PLATFORM_ID:
983 case MSR_IA32_P5_MC_ADDR:
984 case MSR_IA32_P5_MC_TYPE:
985 case MSR_IA32_MC0_CTL:
986 case MSR_IA32_MCG_STATUS:
987 case MSR_IA32_MCG_CAP:
c7ac679c 988 case MSR_IA32_MCG_CTL:
15c4a640
CO		 989 case MSR_IA32_MC0_MISC:
990 case MSR_IA32_MC0_MISC+4:
991 case MSR_IA32_MC0_MISC+8:
992 case MSR_IA32_MC0_MISC+12:
993 case MSR_IA32_MC0_MISC+16:
a89c1ad2 994 case MSR_IA32_MC0_MISC+20:
15c4a640 995 case MSR_IA32_UCODE_REV:
15c4a640 996 case MSR_IA32_EBL_CR_POWERON:
b5e2fec0
AG		 997 case MSR_IA32_DEBUGCTLMSR:
998 case MSR_IA32_LASTBRANCHFROMIP:
999 case MSR_IA32_LASTBRANCHTOIP:
1000 case MSR_IA32_LASTINTFROMIP:
1001 case MSR_IA32_LASTINTTOIP:
15c4a640
CO		 1002 data = 0;
1003 break;
9ba075a6
AK		 1004 case MSR_MTRRcap:
1005 data = 0x500 | KVM_NR_VAR_MTRR;
1006 break;
1007 case 0x200 ... 0x2ff:
1008 return get_msr_mtrr(vcpu, msr, pdata);
15c4a640
CO		 1009 case 0xcd: /* fsb frequency */
1010 data = 3;
1011 break;
1012 case MSR_IA32_APICBASE:
1013 data = kvm_get_apic_base(vcpu);
1014 break;
1015 case MSR_IA32_MISC_ENABLE:
ad312c7c 1016 data = vcpu->arch.ia32_misc_enable_msr;
15c4a640 1017 break;
847f0ad8
AG		 1018 case MSR_IA32_PERF_STATUS:
1019 /* TSC increment by tick */
1020 data = 1000ULL;
1021 /* CPU multiplier */
1022 data |= (((uint64_t)4ULL) << 40);
1023 break;
15c4a640 1024 case MSR_EFER:
ad312c7c 1025 data = vcpu->arch.shadow_efer;
15c4a640 1026 break;
18068523
GOC		 1027 case MSR_KVM_WALL_CLOCK:
1028 data = vcpu->kvm->arch.wall_clock;
1029 break;
1030 case MSR_KVM_SYSTEM_TIME:
1031 data = vcpu->arch.time;
1032 break;
15c4a640
CO		 1033 default:
1034 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1035 return 1;
1036 }
1037 *pdata = data;
1038 return 0;
1039}
1040EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1041
313a3dc7
CO		 1042/*
1043 * Read or write a bunch of msrs. All parameters are kernel addresses.
1044 *
1045 * @return number of msrs set successfully.
1046 */
1047static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1048 struct kvm_msr_entry *entries,
1049 int (*do_msr)(struct kvm_vcpu *vcpu,
1050 unsigned index, u64 *data))
1051{
1052 int i;
1053
1054 vcpu_load(vcpu);
1055
3200f405 1056 down_read(&vcpu->kvm->slots_lock);
313a3dc7
CO		 1057 for (i = 0; i < msrs->nmsrs; ++i)
1058 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1059 break;
3200f405 1060 up_read(&vcpu->kvm->slots_lock);
313a3dc7
CO		 1061
1062 vcpu_put(vcpu);
1063
1064 return i;
1065}
1066
1067/*
1068 * Read or write a bunch of msrs. Parameters are user addresses.
1069 *
1070 * @return number of msrs set successfully.
1071 */
1072static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1073 int (*do_msr)(struct kvm_vcpu *vcpu,
1074 unsigned index, u64 *data),
1075 int writeback)
1076{
1077 struct kvm_msrs msrs;
1078 struct kvm_msr_entry *entries;
1079 int r, n;
1080 unsigned size;
1081
1082 r = -EFAULT;
1083 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1084 goto out;
1085
1086 r = -E2BIG;
1087 if (msrs.nmsrs >= MAX_IO_MSRS)
1088 goto out;
1089
1090 r = -ENOMEM;
1091 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1092 entries = vmalloc(size);
1093 if (!entries)
1094 goto out;
1095
1096 r = -EFAULT;
1097 if (copy_from_user(entries, user_msrs->entries, size))
1098 goto out_free;
1099
1100 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1101 if (r < 0)
1102 goto out_free;
1103
1104 r = -EFAULT;
1105 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1106 goto out_free;
1107
1108 r = n;
1109
1110out_free:
1111 vfree(entries);
1112out:
1113 return r;
1114}
1115
018d00d2
ZX		 1116int kvm_dev_ioctl_check_extension(long ext)
1117{
1118 int r;
1119
1120 switch (ext) {
1121 case KVM_CAP_IRQCHIP:
1122 case KVM_CAP_HLT:
1123 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1124 case KVM_CAP_USER_MEMORY:
1125 case KVM_CAP_SET_TSS_ADDR:
07716717 1126 case KVM_CAP_EXT_CPUID:
18068523 1127 case KVM_CAP_CLOCKSOURCE:
7837699f 1128 case KVM_CAP_PIT:
a28e4f5a 1129 case KVM_CAP_NOP_IO_DELAY:
62d9f0db 1130 case KVM_CAP_MP_STATE:
ed848624 1131 case KVM_CAP_SYNC_MMU:
018d00d2
ZX		 1132 r = 1;
1133 break;
542472b5
LV		 1134 case KVM_CAP_COALESCED_MMIO:
1135 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1136 break;
774ead3a
AK		 1137 case KVM_CAP_VAPIC:
1138 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1139 break;
f725230a
AK		 1140 case KVM_CAP_NR_VCPUS:
1141 r = KVM_MAX_VCPUS;
1142 break;
a988b910
AK		 1143 case KVM_CAP_NR_MEMSLOTS:
1144 r = KVM_MEMORY_SLOTS;
1145 break;
2f333bcb
MT		 1146 case KVM_CAP_PV_MMU:
1147 r = !tdp_enabled;
1148 break;
018d00d2
ZX		 1149 default:
1150 r = 0;
1151 break;
1152 }
1153 return r;
1154
1155}
1156
043405e1
CO		 1157long kvm_arch_dev_ioctl(struct file *filp,
1158 unsigned int ioctl, unsigned long arg)
1159{
1160 void __user *argp = (void __user *)arg;
1161 long r;
1162
1163 switch (ioctl) {
1164 case KVM_GET_MSR_INDEX_LIST: {
1165 struct kvm_msr_list __user *user_msr_list = argp;
1166 struct kvm_msr_list msr_list;
1167 unsigned n;
1168
1169 r = -EFAULT;
1170 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1171 goto out;
1172 n = msr_list.nmsrs;
1173 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1174 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1175 goto out;
1176 r = -E2BIG;
1177 if (n < num_msrs_to_save)
1178 goto out;
1179 r = -EFAULT;
1180 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1181 num_msrs_to_save * sizeof(u32)))
1182 goto out;
1183 if (copy_to_user(user_msr_list->indices
1184 + num_msrs_to_save * sizeof(u32),
1185 &emulated_msrs,
1186 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1187 goto out;
1188 r = 0;
1189 break;
1190 }
674eea0f
AK		 1191 case KVM_GET_SUPPORTED_CPUID: {
1192 struct kvm_cpuid2 __user *cpuid_arg = argp;
1193 struct kvm_cpuid2 cpuid;
1194
1195 r = -EFAULT;
1196 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1197 goto out;
1198 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1199 cpuid_arg->entries);
1200 if (r)
1201 goto out;
1202
1203 r = -EFAULT;
1204 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1205 goto out;
1206 r = 0;
1207 break;
1208 }
043405e1
CO		 1209 default:
1210 r = -EINVAL;
1211 }
1212out:
1213 return r;
1214}
1215
313a3dc7
CO		 1216void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1217{
1218 kvm_x86_ops->vcpu_load(vcpu, cpu);
18068523 1219 kvm_write_guest_time(vcpu);
313a3dc7
CO		 1220}
1221
1222void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1223{
1224 kvm_x86_ops->vcpu_put(vcpu);
9327fd11 1225 kvm_put_guest_fpu(vcpu);
313a3dc7
CO		 1226}
1227
07716717 1228static int is_efer_nx(void)
313a3dc7
CO		 1229{
1230 u64 efer;
313a3dc7
CO		 1231
1232 rdmsrl(MSR_EFER, efer);
07716717
DK		 1233 return efer & EFER_NX;
1234}
1235
1236static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1237{
1238 int i;
1239 struct kvm_cpuid_entry2 *e, *entry;
1240
313a3dc7 1241 entry = NULL;
ad312c7c
ZX		 1242 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1243 e = &vcpu->arch.cpuid_entries[i];
313a3dc7
CO		 1244 if (e->function == 0x80000001) {
1245 entry = e;
1246 break;
1247 }
1248 }
07716717 1249 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
313a3dc7
CO		 1250 entry->edx &= ~(1 << 20);
1251 printk(KERN_INFO "kvm: guest NX capability removed\n");
1252 }
1253}
1254
07716717 1255/* when an old userspace process fills a new kernel module */
313a3dc7
CO		 1256static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1257 struct kvm_cpuid *cpuid,
1258 struct kvm_cpuid_entry __user *entries)
07716717
DK		 1259{
1260 int r, i;
1261 struct kvm_cpuid_entry *cpuid_entries;
1262
1263 r = -E2BIG;
1264 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1265 goto out;
1266 r = -ENOMEM;
1267 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1268 if (!cpuid_entries)
1269 goto out;
1270 r = -EFAULT;
1271 if (copy_from_user(cpuid_entries, entries,
1272 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1273 goto out_free;
1274 for (i = 0; i < cpuid->nent; i++) {
ad312c7c
ZX		 1275 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1276 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1277 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1278 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1279 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1280 vcpu->arch.cpuid_entries[i].index = 0;
1281 vcpu->arch.cpuid_entries[i].flags = 0;
1282 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1283 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1284 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1285 }
1286 vcpu->arch.cpuid_nent = cpuid->nent;
07716717
DK		 1287 cpuid_fix_nx_cap(vcpu);
1288 r = 0;
1289
1290out_free:
1291 vfree(cpuid_entries);
1292out:
1293 return r;
1294}
1295
1296static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1297 struct kvm_cpuid2 *cpuid,
1298 struct kvm_cpuid_entry2 __user *entries)
313a3dc7
CO		 1299{
1300 int r;
1301
1302 r = -E2BIG;
1303 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1304 goto out;
1305 r = -EFAULT;
ad312c7c 1306 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
07716717 1307 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
313a3dc7 1308 goto out;
ad312c7c 1309 vcpu->arch.cpuid_nent = cpuid->nent;
313a3dc7
CO		 1310 return 0;
1311
1312out:
1313 return r;
1314}
1315
07716717
DK		 1316static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1317 struct kvm_cpuid2 *cpuid,
1318 struct kvm_cpuid_entry2 __user *entries)
1319{
1320 int r;
1321
1322 r = -E2BIG;
ad312c7c 1323 if (cpuid->nent < vcpu->arch.cpuid_nent)
07716717
DK		 1324 goto out;
1325 r = -EFAULT;
ad312c7c
ZX		 1326 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1327 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
07716717
DK		 1328 goto out;
1329 return 0;
1330
1331out:
ad312c7c 1332 cpuid->nent = vcpu->arch.cpuid_nent;
07716717
DK		 1333 return r;
1334}
1335
1336static inline u32 bit(int bitno)
1337{
1338 return 1 << (bitno & 31);
1339}
1340
1341static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1342 u32 index)
1343{
1344 entry->function = function;
1345 entry->index = index;
1346 cpuid_count(entry->function, entry->index,
1347 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1348 entry->flags = 0;
1349}
1350
1351static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1352 u32 index, int *nent, int maxnent)
1353{
1354 const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
1355 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1356 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1357 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1358 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1359 bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) |
1360 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1361 bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
1362 bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
1363 bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
1364 const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
1365 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1366 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1367 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1368 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1369 bit(X86_FEATURE_PGE) |
1370 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1371 bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
1372 bit(X86_FEATURE_SYSCALL) |
1373 (bit(X86_FEATURE_NX) && is_efer_nx()) |
1374#ifdef CONFIG_X86_64
1375 bit(X86_FEATURE_LM) |
1376#endif
1377 bit(X86_FEATURE_MMXEXT) |
1378 bit(X86_FEATURE_3DNOWEXT) |
1379 bit(X86_FEATURE_3DNOW);
1380 const u32 kvm_supported_word3_x86_features =
1381 bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
1382 const u32 kvm_supported_word6_x86_features =
1383 bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY);
1384
1385 /* all func 2 cpuid_count() should be called on the same cpu */
1386 get_cpu();
1387 do_cpuid_1_ent(entry, function, index);
1388 ++*nent;
1389
1390 switch (function) {
1391 case 0:
1392 entry->eax = min(entry->eax, (u32)0xb);
1393 break;
1394 case 1:
1395 entry->edx &= kvm_supported_word0_x86_features;
1396 entry->ecx &= kvm_supported_word3_x86_features;
1397 break;
1398 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1399 * may return different values. This forces us to get_cpu() before
1400 * issuing the first command, and also to emulate this annoying behavior
1401 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1402 case 2: {
1403 int t, times = entry->eax & 0xff;
1404
1405 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1406 for (t = 1; t < times && *nent < maxnent; ++t) {
1407 do_cpuid_1_ent(&entry[t], function, 0);
1408 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1409 ++*nent;
1410 }
1411 break;
1412 }
1413 /* function 4 and 0xb have additional index. */
1414 case 4: {
14af3f3c 1415 int i, cache_type;
07716717
DK		 1416
1417 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1418 /* read more entries until cache_type is zero */
14af3f3c
HH		 1419 for (i = 1; *nent < maxnent; ++i) {
1420 cache_type = entry[i - 1].eax & 0x1f;
07716717
DK		 1421 if (!cache_type)
1422 break;
14af3f3c
HH		 1423 do_cpuid_1_ent(&entry[i], function, i);
1424 entry[i].flags |=
07716717
DK		 1425 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1426 ++*nent;
1427 }
1428 break;
1429 }
1430 case 0xb: {
14af3f3c 1431 int i, level_type;
07716717
DK		 1432
1433 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1434 /* read more entries until level_type is zero */
14af3f3c
HH		 1435 for (i = 1; *nent < maxnent; ++i) {
1436 level_type = entry[i - 1].ecx & 0xff;
07716717
DK		 1437 if (!level_type)
1438 break;
14af3f3c
HH		 1439 do_cpuid_1_ent(&entry[i], function, i);
1440 entry[i].flags |=
07716717
DK		 1441 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1442 ++*nent;
1443 }
1444 break;
1445 }
1446 case 0x80000000:
1447 entry->eax = min(entry->eax, 0x8000001a);
1448 break;
1449 case 0x80000001:
1450 entry->edx &= kvm_supported_word1_x86_features;
1451 entry->ecx &= kvm_supported_word6_x86_features;
1452 break;
1453 }
1454 put_cpu();
1455}
1456
674eea0f 1457static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
07716717
DK		 1458 struct kvm_cpuid_entry2 __user *entries)
1459{
1460 struct kvm_cpuid_entry2 *cpuid_entries;
1461 int limit, nent = 0, r = -E2BIG;
1462 u32 func;
1463
1464 if (cpuid->nent < 1)
1465 goto out;
1466 r = -ENOMEM;
1467 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1468 if (!cpuid_entries)
1469 goto out;
1470
1471 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1472 limit = cpuid_entries[0].eax;
1473 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1474 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1475 &nent, cpuid->nent);
1476 r = -E2BIG;
1477 if (nent >= cpuid->nent)
1478 goto out_free;
1479
1480 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1481 limit = cpuid_entries[nent - 1].eax;
1482 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1483 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1484 &nent, cpuid->nent);
1485 r = -EFAULT;
1486 if (copy_to_user(entries, cpuid_entries,
1487 nent * sizeof(struct kvm_cpuid_entry2)))
1488 goto out_free;
1489 cpuid->nent = nent;
1490 r = 0;
1491
1492out_free:
1493 vfree(cpuid_entries);
1494out:
1495 return r;
1496}
1497
313a3dc7
CO		 1498static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1499 struct kvm_lapic_state *s)
1500{
1501 vcpu_load(vcpu);
ad312c7c 1502 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
313a3dc7
CO		 1503 vcpu_put(vcpu);
1504
1505 return 0;
1506}
1507
1508static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1509 struct kvm_lapic_state *s)
1510{
1511 vcpu_load(vcpu);
ad312c7c 1512 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
313a3dc7
CO		 1513 kvm_apic_post_state_restore(vcpu);
1514 vcpu_put(vcpu);
1515
1516 return 0;
1517}
1518
f77bc6a4
ZX		 1519static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1520 struct kvm_interrupt *irq)
1521{
1522 if (irq->irq < 0 || irq->irq >= 256)
1523 return -EINVAL;
1524 if (irqchip_in_kernel(vcpu->kvm))
1525 return -ENXIO;
1526 vcpu_load(vcpu);
1527
ad312c7c
ZX		 1528 set_bit(irq->irq, vcpu->arch.irq_pending);
1529 set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
f77bc6a4
ZX		 1530
1531 vcpu_put(vcpu);
1532
1533 return 0;
1534}
1535
b209749f
AK		 1536static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1537 struct kvm_tpr_access_ctl *tac)
1538{
1539 if (tac->flags)
1540 return -EINVAL;
1541 vcpu->arch.tpr_access_reporting = !!tac->enabled;
1542 return 0;
1543}
1544
313a3dc7
CO		 1545long kvm_arch_vcpu_ioctl(struct file *filp,
1546 unsigned int ioctl, unsigned long arg)
1547{
1548 struct kvm_vcpu *vcpu = filp->private_data;
1549 void __user *argp = (void __user *)arg;
1550 int r;
b772ff36 1551 struct kvm_lapic_state *lapic = NULL;
313a3dc7
CO		 1552
1553 switch (ioctl) {
1554 case KVM_GET_LAPIC: {
b772ff36 1555 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
313a3dc7 1556
b772ff36
DH		 1557 r = -ENOMEM;
1558 if (!lapic)
1559 goto out;
1560 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
313a3dc7
CO		 1561 if (r)
1562 goto out;
1563 r = -EFAULT;
b772ff36 1564 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
313a3dc7
CO		 1565 goto out;
1566 r = 0;
1567 break;
1568 }
1569 case KVM_SET_LAPIC: {
b772ff36
DH		 1570 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1571 r = -ENOMEM;
1572 if (!lapic)
1573 goto out;
313a3dc7 1574 r = -EFAULT;
b772ff36 1575 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
313a3dc7 1576 goto out;
b772ff36 1577 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
313a3dc7
CO		 1578 if (r)
1579 goto out;
1580 r = 0;
1581 break;
1582 }
f77bc6a4
ZX		 1583 case KVM_INTERRUPT: {
1584 struct kvm_interrupt irq;
1585
1586 r = -EFAULT;
1587 if (copy_from_user(&irq, argp, sizeof irq))
1588 goto out;
1589 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1590 if (r)
1591 goto out;
1592 r = 0;
1593 break;
1594 }
313a3dc7
CO		 1595 case KVM_SET_CPUID: {
1596 struct kvm_cpuid __user *cpuid_arg = argp;
1597 struct kvm_cpuid cpuid;
1598
1599 r = -EFAULT;
1600 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1601 goto out;
1602 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1603 if (r)
1604 goto out;
1605 break;
1606 }
07716717
DK		 1607 case KVM_SET_CPUID2: {
1608 struct kvm_cpuid2 __user *cpuid_arg = argp;
1609 struct kvm_cpuid2 cpuid;
1610
1611 r = -EFAULT;
1612 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1613 goto out;
1614 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1615 cpuid_arg->entries);
1616 if (r)
1617 goto out;
1618 break;
1619 }
1620 case KVM_GET_CPUID2: {
1621 struct kvm_cpuid2 __user *cpuid_arg = argp;
1622 struct kvm_cpuid2 cpuid;
1623
1624 r = -EFAULT;
1625 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1626 goto out;
1627 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1628 cpuid_arg->entries);
1629 if (r)
1630 goto out;
1631 r = -EFAULT;
1632 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1633 goto out;
1634 r = 0;
1635 break;
1636 }
313a3dc7
CO		 1637 case KVM_GET_MSRS:
1638 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1639 break;
1640 case KVM_SET_MSRS:
1641 r = msr_io(vcpu, argp, do_set_msr, 0);
1642 break;
b209749f
AK		 1643 case KVM_TPR_ACCESS_REPORTING: {
1644 struct kvm_tpr_access_ctl tac;
1645
1646 r = -EFAULT;
1647 if (copy_from_user(&tac, argp, sizeof tac))
1648 goto out;
1649 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1650 if (r)
1651 goto out;
1652 r = -EFAULT;
1653 if (copy_to_user(argp, &tac, sizeof tac))
1654 goto out;
1655 r = 0;
1656 break;
1657 };
b93463aa
AK		 1658 case KVM_SET_VAPIC_ADDR: {
1659 struct kvm_vapic_addr va;
1660
1661 r = -EINVAL;
1662 if (!irqchip_in_kernel(vcpu->kvm))
1663 goto out;
1664 r = -EFAULT;
1665 if (copy_from_user(&va, argp, sizeof va))
1666 goto out;
1667 r = 0;
1668 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1669 break;
1670 }
313a3dc7
CO		 1671 default:
1672 r = -EINVAL;
1673 }
1674out:
b772ff36
DH		 1675 if (lapic)
1676 kfree(lapic);
313a3dc7
CO		 1677 return r;
1678}
1679
1fe779f8
CO		 1680static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1681{
1682 int ret;
1683
1684 if (addr > (unsigned int)(-3 * PAGE_SIZE))
1685 return -1;
1686 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1687 return ret;
1688}
1689
1690static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1691 u32 kvm_nr_mmu_pages)
1692{
1693 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1694 return -EINVAL;
1695
72dc67a6 1696 down_write(&kvm->slots_lock);
1fe779f8
CO		 1697
1698 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
f05e70ac 1699 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1fe779f8 1700
72dc67a6 1701 up_write(&kvm->slots_lock);
1fe779f8
CO		 1702 return 0;
1703}
1704
1705static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1706{
f05e70ac 1707 return kvm->arch.n_alloc_mmu_pages;
1fe779f8
CO		 1708}
1709
e9f85cde
ZX		 1710gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1711{
1712 int i;
1713 struct kvm_mem_alias *alias;
1714
d69fb81f
ZX		 1715 for (i = 0; i < kvm->arch.naliases; ++i) {
1716 alias = &kvm->arch.aliases[i];
e9f85cde
ZX		 1717 if (gfn >= alias->base_gfn
1718 && gfn < alias->base_gfn + alias->npages)
1719 return alias->target_gfn + gfn - alias->base_gfn;
1720 }
1721 return gfn;
1722}
1723
1fe779f8
CO		 1724/*
1725 * Set a new alias region. Aliases map a portion of physical memory into
1726 * another portion. This is useful for memory windows, for example the PC
1727 * VGA region.
1728 */
1729static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1730 struct kvm_memory_alias *alias)
1731{
1732 int r, n;
1733 struct kvm_mem_alias *p;
1734
1735 r = -EINVAL;
1736 /* General sanity checks */
1737 if (alias->memory_size & (PAGE_SIZE - 1))
1738 goto out;
1739 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1740 goto out;
1741 if (alias->slot >= KVM_ALIAS_SLOTS)
1742 goto out;
1743 if (alias->guest_phys_addr + alias->memory_size
1744 < alias->guest_phys_addr)
1745 goto out;
1746 if (alias->target_phys_addr + alias->memory_size
1747 < alias->target_phys_addr)
1748 goto out;
1749
72dc67a6 1750 down_write(&kvm->slots_lock);
a1708ce8 1751 spin_lock(&kvm->mmu_lock);
1fe779f8 1752
d69fb81f 1753 p = &kvm->arch.aliases[alias->slot];
1fe779f8
CO		 1754 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1755 p->npages = alias->memory_size >> PAGE_SHIFT;
1756 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1757
1758 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
d69fb81f 1759 if (kvm->arch.aliases[n - 1].npages)
1fe779f8 1760 break;
d69fb81f 1761 kvm->arch.naliases = n;
1fe779f8 1762
a1708ce8 1763 spin_unlock(&kvm->mmu_lock);
1fe779f8
CO		 1764 kvm_mmu_zap_all(kvm);
1765
72dc67a6 1766 up_write(&kvm->slots_lock);
1fe779f8
CO		 1767
1768 return 0;
1769
1770out:
1771 return r;
1772}
1773
1774static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1775{
1776 int r;
1777
1778 r = 0;
1779 switch (chip->chip_id) {
1780 case KVM_IRQCHIP_PIC_MASTER:
1781 memcpy(&chip->chip.pic,
1782 &pic_irqchip(kvm)->pics[0],
1783 sizeof(struct kvm_pic_state));
1784 break;
1785 case KVM_IRQCHIP_PIC_SLAVE:
1786 memcpy(&chip->chip.pic,
1787 &pic_irqchip(kvm)->pics[1],
1788 sizeof(struct kvm_pic_state));
1789 break;
1790 case KVM_IRQCHIP_IOAPIC:
1791 memcpy(&chip->chip.ioapic,
1792 ioapic_irqchip(kvm),
1793 sizeof(struct kvm_ioapic_state));
1794 break;
1795 default:
1796 r = -EINVAL;
1797 break;
1798 }
1799 return r;
1800}
1801
1802static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1803{
1804 int r;
1805
1806 r = 0;
1807 switch (chip->chip_id) {
1808 case KVM_IRQCHIP_PIC_MASTER:
1809 memcpy(&pic_irqchip(kvm)->pics[0],
1810 &chip->chip.pic,
1811 sizeof(struct kvm_pic_state));
1812 break;
1813 case KVM_IRQCHIP_PIC_SLAVE:
1814 memcpy(&pic_irqchip(kvm)->pics[1],
1815 &chip->chip.pic,
1816 sizeof(struct kvm_pic_state));
1817 break;
1818 case KVM_IRQCHIP_IOAPIC:
1819 memcpy(ioapic_irqchip(kvm),
1820 &chip->chip.ioapic,
1821 sizeof(struct kvm_ioapic_state));
1822 break;
1823 default:
1824 r = -EINVAL;
1825 break;
1826 }
1827 kvm_pic_update_irq(pic_irqchip(kvm));
1828 return r;
1829}
1830
e0f63cb9
SY		 1831static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1832{
1833 int r = 0;
1834
1835 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
1836 return r;
1837}
1838
1839static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1840{
1841 int r = 0;
1842
1843 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
1844 kvm_pit_load_count(kvm, 0, ps->channels[0].count);
1845 return r;
1846}
1847
5bb064dc
ZX		 1848/*
1849 * Get (and clear) the dirty memory log for a memory slot.
1850 */
1851int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1852 struct kvm_dirty_log *log)
1853{
1854 int r;
1855 int n;
1856 struct kvm_memory_slot *memslot;
1857 int is_dirty = 0;
1858
72dc67a6 1859 down_write(&kvm->slots_lock);
5bb064dc
ZX		 1860
1861 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1862 if (r)
1863 goto out;
1864
1865 /* If nothing is dirty, don't bother messing with page tables. */
1866 if (is_dirty) {
1867 kvm_mmu_slot_remove_write_access(kvm, log->slot);
1868 kvm_flush_remote_tlbs(kvm);
1869 memslot = &kvm->memslots[log->slot];
1870 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
1871 memset(memslot->dirty_bitmap, 0, n);
1872 }
1873 r = 0;
1874out:
72dc67a6 1875 up_write(&kvm->slots_lock);
5bb064dc
ZX		 1876 return r;
1877}
1878
1fe779f8
CO		 1879long kvm_arch_vm_ioctl(struct file *filp,
1880 unsigned int ioctl, unsigned long arg)
1881{
1882 struct kvm *kvm = filp->private_data;
1883 void __user *argp = (void __user *)arg;
1884 int r = -EINVAL;
f0d66275
DH		 1885 /*
1886 * This union makes it completely explicit to gcc-3.x
1887 * that these two variables' stack usage should be
1888 * combined, not added together.
1889 */
1890 union {
1891 struct kvm_pit_state ps;
1892 struct kvm_memory_alias alias;
1893 } u;
1fe779f8
CO		 1894
1895 switch (ioctl) {
1896 case KVM_SET_TSS_ADDR:
1897 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
1898 if (r < 0)
1899 goto out;
1900 break;
1901 case KVM_SET_MEMORY_REGION: {
1902 struct kvm_memory_region kvm_mem;
1903 struct kvm_userspace_memory_region kvm_userspace_mem;
1904
1905 r = -EFAULT;
1906 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
1907 goto out;
1908 kvm_userspace_mem.slot = kvm_mem.slot;
1909 kvm_userspace_mem.flags = kvm_mem.flags;
1910 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
1911 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
1912 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
1913 if (r)
1914 goto out;
1915 break;
1916 }
1917 case KVM_SET_NR_MMU_PAGES:
1918 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
1919 if (r)
1920 goto out;
1921 break;
1922 case KVM_GET_NR_MMU_PAGES:
1923 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
1924 break;
f0d66275 1925 case KVM_SET_MEMORY_ALIAS:
1fe779f8 1926 r = -EFAULT;
f0d66275 1927 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
1fe779f8 1928 goto out;
f0d66275 1929 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
1fe779f8
CO		 1930 if (r)
1931 goto out;
1932 break;
1fe779f8
CO		 1933 case KVM_CREATE_IRQCHIP:
1934 r = -ENOMEM;
d7deeeb0
ZX		 1935 kvm->arch.vpic = kvm_create_pic(kvm);
1936 if (kvm->arch.vpic) {
1fe779f8
CO		 1937 r = kvm_ioapic_init(kvm);
1938 if (r) {
d7deeeb0
ZX		 1939 kfree(kvm->arch.vpic);
1940 kvm->arch.vpic = NULL;
1fe779f8
CO		 1941 goto out;
1942 }
1943 } else
1944 goto out;
1945 break;
7837699f
SY		 1946 case KVM_CREATE_PIT:
1947 r = -ENOMEM;
1948 kvm->arch.vpit = kvm_create_pit(kvm);
1949 if (kvm->arch.vpit)
1950 r = 0;
1951 break;
1fe779f8
CO		 1952 case KVM_IRQ_LINE: {
1953 struct kvm_irq_level irq_event;
1954
1955 r = -EFAULT;
1956 if (copy_from_user(&irq_event, argp, sizeof irq_event))
1957 goto out;
1958 if (irqchip_in_kernel(kvm)) {
1959 mutex_lock(&kvm->lock);
29c8fa32 1960 kvm_set_irq(kvm, irq_event.irq, irq_event.level);
1fe779f8
CO		 1961 mutex_unlock(&kvm->lock);
1962 r = 0;
1963 }
1964 break;
1965 }
1966 case KVM_GET_IRQCHIP: {
1967 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
f0d66275 1968 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1fe779f8 1969
f0d66275
DH		 1970 r = -ENOMEM;
1971 if (!chip)
1fe779f8 1972 goto out;
f0d66275
DH		 1973 r = -EFAULT;
1974 if (copy_from_user(chip, argp, sizeof *chip))
1975 goto get_irqchip_out;
1fe779f8
CO		 1976 r = -ENXIO;
1977 if (!irqchip_in_kernel(kvm))
f0d66275
DH		 1978 goto get_irqchip_out;
1979 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
1fe779f8 1980 if (r)
f0d66275 1981 goto get_irqchip_out;
1fe779f8 1982 r = -EFAULT;
f0d66275
DH		 1983 if (copy_to_user(argp, chip, sizeof *chip))
1984 goto get_irqchip_out;
1fe779f8 1985 r = 0;
f0d66275
DH		 1986 get_irqchip_out:
1987 kfree(chip);
1988 if (r)
1989 goto out;
1fe779f8
CO		 1990 break;
1991 }
1992 case KVM_SET_IRQCHIP: {
1993 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
f0d66275 1994 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1fe779f8 1995
f0d66275
DH		 1996 r = -ENOMEM;
1997 if (!chip)
1fe779f8 1998 goto out;
f0d66275
DH		 1999 r = -EFAULT;
2000 if (copy_from_user(chip, argp, sizeof *chip))
2001 goto set_irqchip_out;
1fe779f8
CO		 2002 r = -ENXIO;
2003 if (!irqchip_in_kernel(kvm))
f0d66275
DH		 2004 goto set_irqchip_out;
2005 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
1fe779f8 2006 if (r)
f0d66275 2007 goto set_irqchip_out;
1fe779f8 2008 r = 0;
f0d66275
DH		 2009 set_irqchip_out:
2010 kfree(chip);
2011 if (r)
2012 goto out;
1fe779f8
CO		 2013 break;
2014 }
4d5c5d0f
BAY		 2015 case KVM_ASSIGN_PCI_DEVICE: {
2016 struct kvm_assigned_pci_dev assigned_dev;
2017
2018 r = -EFAULT;
2019 if (copy_from_user(&assigned_dev, argp, sizeof assigned_dev))
2020 goto out;
2021 r = kvm_vm_ioctl_assign_device(kvm, &assigned_dev);
2022 if (r)
2023 goto out;
2024 break;
2025 }
2026 case KVM_ASSIGN_IRQ: {
2027 struct kvm_assigned_irq assigned_irq;
2028
2029 r = -EFAULT;
2030 if (copy_from_user(&assigned_irq, argp, sizeof assigned_irq))
2031 goto out;
2032 r = kvm_vm_ioctl_assign_irq(kvm, &assigned_irq);
2033 if (r)
2034 goto out;
2035 break;
2036 }
e0f63cb9 2037 case KVM_GET_PIT: {
e0f63cb9 2038 r = -EFAULT;
f0d66275 2039 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
e0f63cb9
SY		 2040 goto out;
2041 r = -ENXIO;
2042 if (!kvm->arch.vpit)
2043 goto out;
f0d66275 2044 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
e0f63cb9
SY		 2045 if (r)
2046 goto out;
2047 r = -EFAULT;
f0d66275 2048 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
e0f63cb9
SY		 2049 goto out;
2050 r = 0;
2051 break;
2052 }
2053 case KVM_SET_PIT: {
e0f63cb9 2054 r = -EFAULT;
f0d66275 2055 if (copy_from_user(&u.ps, argp, sizeof u.ps))
e0f63cb9
SY		 2056 goto out;
2057 r = -ENXIO;
2058 if (!kvm->arch.vpit)
2059 goto out;
f0d66275 2060 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
e0f63cb9
SY		 2061 if (r)
2062 goto out;
2063 r = 0;
2064 break;
2065 }
1fe779f8
CO		 2066 default:
2067 ;
2068 }
2069out:
2070 return r;
2071}
2072
a16b043c 2073static void kvm_init_msr_list(void)
043405e1
CO		 2074{
2075 u32 dummy[2];
2076 unsigned i, j;
2077
2078 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
2079 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2080 continue;
2081 if (j < i)
2082 msrs_to_save[j] = msrs_to_save[i];
2083 j++;
2084 }
2085 num_msrs_to_save = j;
2086}
2087
bbd9b64e
CO		 2088/*
2089 * Only apic need an MMIO device hook, so shortcut now..
2090 */
2091static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
92760499
LV		 2092 gpa_t addr, int len,
2093 int is_write)
bbd9b64e
CO		 2094{
2095 struct kvm_io_device *dev;
2096
ad312c7c
ZX		 2097 if (vcpu->arch.apic) {
2098 dev = &vcpu->arch.apic->dev;
92760499 2099 if (dev->in_range(dev, addr, len, is_write))
bbd9b64e
CO		 2100 return dev;
2101 }
2102 return NULL;
2103}
2104
2105
2106static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
92760499
LV		 2107 gpa_t addr, int len,
2108 int is_write)
bbd9b64e
CO		 2109{
2110 struct kvm_io_device *dev;
2111
92760499 2112 dev = vcpu_find_pervcpu_dev(vcpu, addr, len, is_write);
bbd9b64e 2113 if (dev == NULL)
92760499
LV		 2114 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr, len,
2115 is_write);
bbd9b64e
CO		 2116 return dev;
2117}
2118
2119int emulator_read_std(unsigned long addr,
2120 void *val,
2121 unsigned int bytes,
2122 struct kvm_vcpu *vcpu)
2123{
2124 void *data = val;
10589a46 2125 int r = X86EMUL_CONTINUE;
bbd9b64e
CO		 2126
2127 while (bytes) {
ad312c7c 2128 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
bbd9b64e
CO		 2129 unsigned offset = addr & (PAGE_SIZE-1);
2130 unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
2131 int ret;
2132
10589a46
MT		 2133 if (gpa == UNMAPPED_GVA) {
2134 r = X86EMUL_PROPAGATE_FAULT;
2135 goto out;
2136 }
bbd9b64e 2137 ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
10589a46
MT		 2138 if (ret < 0) {
2139 r = X86EMUL_UNHANDLEABLE;
2140 goto out;
2141 }
bbd9b64e
CO		 2142
2143 bytes -= tocopy;
2144 data += tocopy;
2145 addr += tocopy;
2146 }
10589a46 2147out:
10589a46 2148 return r;
bbd9b64e
CO		 2149}
2150EXPORT_SYMBOL_GPL(emulator_read_std);
2151
bbd9b64e
CO		 2152static int emulator_read_emulated(unsigned long addr,
2153 void *val,
2154 unsigned int bytes,
2155 struct kvm_vcpu *vcpu)
2156{
2157 struct kvm_io_device *mmio_dev;
2158 gpa_t gpa;
2159
2160 if (vcpu->mmio_read_completed) {
2161 memcpy(val, vcpu->mmio_data, bytes);
2162 vcpu->mmio_read_completed = 0;
2163 return X86EMUL_CONTINUE;
2164 }
2165
ad312c7c 2166 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
bbd9b64e
CO		 2167
2168 /* For APIC access vmexit */
2169 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2170 goto mmio;
2171
2172 if (emulator_read_std(addr, val, bytes, vcpu)
2173 == X86EMUL_CONTINUE)
2174 return X86EMUL_CONTINUE;
2175 if (gpa == UNMAPPED_GVA)
2176 return X86EMUL_PROPAGATE_FAULT;
2177
2178mmio:
2179 /*
2180 * Is this MMIO handled locally?
2181 */
10589a46 2182 mutex_lock(&vcpu->kvm->lock);
92760499 2183 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 0);
bbd9b64e
CO		 2184 if (mmio_dev) {
2185 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
10589a46 2186 mutex_unlock(&vcpu->kvm->lock);
bbd9b64e
CO		 2187 return X86EMUL_CONTINUE;
2188 }
10589a46 2189 mutex_unlock(&vcpu->kvm->lock);
bbd9b64e
CO		 2190
2191 vcpu->mmio_needed = 1;
2192 vcpu->mmio_phys_addr = gpa;
2193 vcpu->mmio_size = bytes;
2194 vcpu->mmio_is_write = 0;
2195
2196 return X86EMUL_UNHANDLEABLE;
2197}
2198
3200f405 2199int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
9f811285 2200 const void *val, int bytes)
bbd9b64e
CO		 2201{
2202 int ret;
2203
2204 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
9f811285 2205 if (ret < 0)
bbd9b64e
CO		 2206 return 0;
2207 kvm_mmu_pte_write(vcpu, gpa, val, bytes);
2208 return 1;
2209}
2210
2211static int emulator_write_emulated_onepage(unsigned long addr,
2212 const void *val,
2213 unsigned int bytes,
2214 struct kvm_vcpu *vcpu)
2215{
2216 struct kvm_io_device *mmio_dev;
10589a46
MT		 2217 gpa_t gpa;
2218
10589a46 2219 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
bbd9b64e
CO		 2220
2221 if (gpa == UNMAPPED_GVA) {
c3c91fee 2222 kvm_inject_page_fault(vcpu, addr, 2);
bbd9b64e
CO		 2223 return X86EMUL_PROPAGATE_FAULT;
2224 }
2225
2226 /* For APIC access vmexit */
2227 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2228 goto mmio;
2229
2230 if (emulator_write_phys(vcpu, gpa, val, bytes))
2231 return X86EMUL_CONTINUE;
2232
2233mmio:
2234 /*
2235 * Is this MMIO handled locally?
2236 */
10589a46 2237 mutex_lock(&vcpu->kvm->lock);
92760499 2238 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 1);
bbd9b64e
CO		 2239 if (mmio_dev) {
2240 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
10589a46 2241 mutex_unlock(&vcpu->kvm->lock);
bbd9b64e
CO		 2242 return X86EMUL_CONTINUE;
2243 }
10589a46 2244 mutex_unlock(&vcpu->kvm->lock);
bbd9b64e
CO		 2245
2246 vcpu->mmio_needed = 1;
2247 vcpu->mmio_phys_addr = gpa;
2248 vcpu->mmio_size = bytes;
2249 vcpu->mmio_is_write = 1;
2250 memcpy(vcpu->mmio_data, val, bytes);
2251
2252 return X86EMUL_CONTINUE;
2253}
2254
2255int emulator_write_emulated(unsigned long addr,
2256 const void *val,
2257 unsigned int bytes,
2258 struct kvm_vcpu *vcpu)
2259{
2260 /* Crossing a page boundary? */
2261 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2262 int rc, now;
2263
2264 now = -addr & ~PAGE_MASK;
2265 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2266 if (rc != X86EMUL_CONTINUE)
2267 return rc;
2268 addr += now;
2269 val += now;
2270 bytes -= now;
2271 }
2272 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2273}
2274EXPORT_SYMBOL_GPL(emulator_write_emulated);
2275
2276static int emulator_cmpxchg_emulated(unsigned long addr,
2277 const void *old,
2278 const void *new,
2279 unsigned int bytes,
2280 struct kvm_vcpu *vcpu)
2281{
2282 static int reported;
2283
2284 if (!reported) {
2285 reported = 1;
2286 printk(KERN_WARNING "kvm: emulating exchange as write\n");
2287 }
2bacc55c
MT		 2288#ifndef CONFIG_X86_64
2289 /* guests cmpxchg8b have to be emulated atomically */
2290 if (bytes == 8) {
10589a46 2291 gpa_t gpa;
2bacc55c 2292 struct page *page;
c0b49b0d 2293 char *kaddr;
2bacc55c
MT		 2294 u64 val;
2295
10589a46
MT		 2296 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2297
2bacc55c
MT		 2298 if (gpa == UNMAPPED_GVA ||
2299 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2300 goto emul_write;
2301
2302 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2303 goto emul_write;
2304
2305 val = *(u64 *)new;
72dc67a6
IE		 2306
2307 down_read(&current->mm->mmap_sem);
2bacc55c 2308 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
72dc67a6
IE		 2309 up_read(&current->mm->mmap_sem);
2310
c0b49b0d
AM		 2311 kaddr = kmap_atomic(page, KM_USER0);
2312 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2313 kunmap_atomic(kaddr, KM_USER0);
2bacc55c
MT		 2314 kvm_release_page_dirty(page);
2315 }
3200f405 2316emul_write:
2bacc55c
MT		 2317#endif
2318
bbd9b64e
CO		 2319 return emulator_write_emulated(addr, new, bytes, vcpu);
2320}
2321
2322static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2323{
2324 return kvm_x86_ops->get_segment_base(vcpu, seg);
2325}
2326
2327int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2328{
2329 return X86EMUL_CONTINUE;
2330}
2331
2332int emulate_clts(struct kvm_vcpu *vcpu)
2333{
54e445ca 2334 KVMTRACE_0D(CLTS, vcpu, handler);
ad312c7c 2335 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
bbd9b64e
CO		 2336 return X86EMUL_CONTINUE;
2337}
2338
2339int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2340{
2341 struct kvm_vcpu *vcpu = ctxt->vcpu;
2342
2343 switch (dr) {
2344 case 0 ... 3:
2345 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2346 return X86EMUL_CONTINUE;
2347 default:
b8688d51 2348 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
bbd9b64e
CO		 2349 return X86EMUL_UNHANDLEABLE;
2350 }
2351}
2352
2353int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2354{
2355 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2356 int exception;
2357
2358 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2359 if (exception) {
2360 /* FIXME: better handling */
2361 return X86EMUL_UNHANDLEABLE;
2362 }
2363 return X86EMUL_CONTINUE;
2364}
2365
2366void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2367{
bbd9b64e 2368 u8 opcodes[4];
5fdbf976 2369 unsigned long rip = kvm_rip_read(vcpu);
bbd9b64e
CO		 2370 unsigned long rip_linear;
2371
f76c710d 2372 if (!printk_ratelimit())
bbd9b64e
CO		 2373 return;
2374
25be4608
GC		 2375 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2376
bbd9b64e
CO		 2377 emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
2378
2379 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2380 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
bbd9b64e
CO		 2381}
2382EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2383
14af3f3c 2384static struct x86_emulate_ops emulate_ops = {
bbd9b64e 2385 .read_std = emulator_read_std,
bbd9b64e
CO		 2386 .read_emulated = emulator_read_emulated,
2387 .write_emulated = emulator_write_emulated,
2388 .cmpxchg_emulated = emulator_cmpxchg_emulated,
2389};
2390
5fdbf976
MT		 2391static void cache_all_regs(struct kvm_vcpu *vcpu)
2392{
2393 kvm_register_read(vcpu, VCPU_REGS_RAX);
2394 kvm_register_read(vcpu, VCPU_REGS_RSP);
2395 kvm_register_read(vcpu, VCPU_REGS_RIP);
2396 vcpu->arch.regs_dirty = ~0;
2397}
2398
bbd9b64e
CO		 2399int emulate_instruction(struct kvm_vcpu *vcpu,
2400 struct kvm_run *run,
2401 unsigned long cr2,
2402 u16 error_code,
571008da 2403 int emulation_type)
bbd9b64e
CO		 2404{
2405 int r;
571008da 2406 struct decode_cache *c;
bbd9b64e 2407
26eef70c 2408 kvm_clear_exception_queue(vcpu);
ad312c7c 2409 vcpu->arch.mmio_fault_cr2 = cr2;
5fdbf976
MT		 2410 /*
2411 * TODO: fix x86_emulate.c to use guest_read/write_register
2412 * instead of direct ->regs accesses, can save hundred cycles
2413 * on Intel for instructions that don't read/change RSP, for
2414 * for example.
2415 */
2416 cache_all_regs(vcpu);
bbd9b64e
CO		 2417
2418 vcpu->mmio_is_write = 0;
ad312c7c 2419 vcpu->arch.pio.string = 0;
bbd9b64e 2420
571008da 2421 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
bbd9b64e
CO		 2422 int cs_db, cs_l;
2423 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2424
ad312c7c
ZX		 2425 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2426 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2427 vcpu->arch.emulate_ctxt.mode =
2428 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
bbd9b64e
CO		 2429 ? X86EMUL_MODE_REAL : cs_l
2430 ? X86EMUL_MODE_PROT64 : cs_db
2431 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2432
ad312c7c 2433 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
571008da
SY		 2434
2435 /* Reject the instructions other than VMCALL/VMMCALL when
2436 * try to emulate invalid opcode */
2437 c = &vcpu->arch.emulate_ctxt.decode;
2438 if ((emulation_type & EMULTYPE_TRAP_UD) &&
2439 (!(c->twobyte && c->b == 0x01 &&
2440 (c->modrm_reg == 0 || c->modrm_reg == 3) &&
2441 c->modrm_mod == 3 && c->modrm_rm == 1)))
2442 return EMULATE_FAIL;
2443
f2b5756b 2444 ++vcpu->stat.insn_emulation;
bbd9b64e 2445 if (r) {
f2b5756b 2446 ++vcpu->stat.insn_emulation_fail;
bbd9b64e
CO		 2447 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2448 return EMULATE_DONE;
2449 return EMULATE_FAIL;
2450 }
2451 }
2452
ad312c7c 2453 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
bbd9b64e 2454
ad312c7c 2455 if (vcpu->arch.pio.string)
bbd9b64e
CO		 2456 return EMULATE_DO_MMIO;
2457
2458 if ((r || vcpu->mmio_is_write) && run) {
2459 run->exit_reason = KVM_EXIT_MMIO;
2460 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2461 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2462 run->mmio.len = vcpu->mmio_size;
2463 run->mmio.is_write = vcpu->mmio_is_write;
2464 }
2465
2466 if (r) {
2467 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2468 return EMULATE_DONE;
2469 if (!vcpu->mmio_needed) {
2470 kvm_report_emulation_failure(vcpu, "mmio");
2471 return EMULATE_FAIL;
2472 }
2473 return EMULATE_DO_MMIO;
2474 }
2475
ad312c7c 2476 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
bbd9b64e
CO		 2477
2478 if (vcpu->mmio_is_write) {
2479 vcpu->mmio_needed = 0;
2480 return EMULATE_DO_MMIO;
2481 }
2482
2483 return EMULATE_DONE;
2484}
2485EXPORT_SYMBOL_GPL(emulate_instruction);
2486
de7d789a
CO		 2487static void free_pio_guest_pages(struct kvm_vcpu *vcpu)
2488{
2489 int i;
2490
ad312c7c
ZX		 2491 for (i = 0; i < ARRAY_SIZE(vcpu->arch.pio.guest_pages); ++i)
2492 if (vcpu->arch.pio.guest_pages[i]) {
2493 kvm_release_page_dirty(vcpu->arch.pio.guest_pages[i]);
2494 vcpu->arch.pio.guest_pages[i] = NULL;
de7d789a
CO		 2495 }
2496}
2497
2498static int pio_copy_data(struct kvm_vcpu *vcpu)
2499{
ad312c7c 2500 void *p = vcpu->arch.pio_data;
de7d789a
CO		 2501 void *q;
2502 unsigned bytes;
ad312c7c 2503 int nr_pages = vcpu->arch.pio.guest_pages[1] ? 2 : 1;
de7d789a 2504
ad312c7c 2505 q = vmap(vcpu->arch.pio.guest_pages, nr_pages, VM_READ|VM_WRITE,
de7d789a
CO		 2506 PAGE_KERNEL);
2507 if (!q) {
2508 free_pio_guest_pages(vcpu);
2509 return -ENOMEM;
2510 }
ad312c7c
ZX		 2511 q += vcpu->arch.pio.guest_page_offset;
2512 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2513 if (vcpu->arch.pio.in)
de7d789a
CO		 2514 memcpy(q, p, bytes);
2515 else
2516 memcpy(p, q, bytes);
ad312c7c 2517 q -= vcpu->arch.pio.guest_page_offset;
de7d789a
CO		 2518 vunmap(q);
2519 free_pio_guest_pages(vcpu);
2520 return 0;
2521}
2522
2523int complete_pio(struct kvm_vcpu *vcpu)
2524{
ad312c7c 2525 struct kvm_pio_request *io = &vcpu->arch.pio;
de7d789a
CO		 2526 long delta;
2527 int r;
5fdbf976 2528 unsigned long val;
de7d789a
CO		 2529
2530 if (!io->string) {
5fdbf976
MT		 2531 if (io->in) {
2532 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2533 memcpy(&val, vcpu->arch.pio_data, io->size);
2534 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2535 }
de7d789a
CO		 2536 } else {
2537 if (io->in) {
2538 r = pio_copy_data(vcpu);
5fdbf976 2539 if (r)
de7d789a 2540 return r;
de7d789a
CO		 2541 }
2542
2543 delta = 1;
2544 if (io->rep) {
2545 delta *= io->cur_count;
2546 /*
2547 * The size of the register should really depend on
2548 * current address size.
2549 */
5fdbf976
MT		 2550 val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2551 val -= delta;
2552 kvm_register_write(vcpu, VCPU_REGS_RCX, val);
de7d789a
CO		 2553 }
2554 if (io->down)
2555 delta = -delta;
2556 delta *= io->size;
5fdbf976
MT		 2557 if (io->in) {
2558 val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2559 val += delta;
2560 kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2561 } else {
2562 val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2563 val += delta;
2564 kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2565 }
de7d789a
CO		 2566 }
2567
de7d789a
CO		 2568 io->count -= io->cur_count;
2569 io->cur_count = 0;
2570
2571 return 0;
2572}
2573
2574static void kernel_pio(struct kvm_io_device *pio_dev,
2575 struct kvm_vcpu *vcpu,
2576 void *pd)
2577{
2578 /* TODO: String I/O for in kernel device */
2579
2580 mutex_lock(&vcpu->kvm->lock);
ad312c7c
ZX		 2581 if (vcpu->arch.pio.in)
2582 kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
2583 vcpu->arch.pio.size,
de7d789a
CO		 2584 pd);
2585 else
ad312c7c
ZX		 2586 kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
2587 vcpu->arch.pio.size,
de7d789a
CO		 2588 pd);
2589 mutex_unlock(&vcpu->kvm->lock);
2590}
2591
2592static void pio_string_write(struct kvm_io_device *pio_dev,
2593 struct kvm_vcpu *vcpu)
2594{
ad312c7c
ZX		 2595 struct kvm_pio_request *io = &vcpu->arch.pio;
2596 void *pd = vcpu->arch.pio_data;
de7d789a
CO		 2597 int i;
2598
2599 mutex_lock(&vcpu->kvm->lock);
2600 for (i = 0; i < io->cur_count; i++) {
2601 kvm_iodevice_write(pio_dev, io->port,
2602 io->size,
2603 pd);
2604 pd += io->size;
2605 }
2606 mutex_unlock(&vcpu->kvm->lock);
2607}
2608
2609static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
92760499
LV		 2610 gpa_t addr, int len,
2611 int is_write)
de7d789a 2612{
92760499 2613 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr, len, is_write);
de7d789a
CO		 2614}
2615
2616int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2617 int size, unsigned port)
2618{
2619 struct kvm_io_device *pio_dev;
5fdbf976 2620 unsigned long val;
de7d789a
CO		 2621
2622 vcpu->run->exit_reason = KVM_EXIT_IO;
2623 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
ad312c7c 2624 vcpu->run->io.size = vcpu->arch.pio.size = size;
de7d789a 2625 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
ad312c7c
ZX		 2626 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2627 vcpu->run->io.port = vcpu->arch.pio.port = port;
2628 vcpu->arch.pio.in = in;
2629 vcpu->arch.pio.string = 0;
2630 vcpu->arch.pio.down = 0;
2631 vcpu->arch.pio.guest_page_offset = 0;
2632 vcpu->arch.pio.rep = 0;
de7d789a 2633
2714d1d3
FEL		 2634 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2635 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2636 handler);
2637 else
2638 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2639 handler);
2640
5fdbf976
MT		 2641 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2642 memcpy(vcpu->arch.pio_data, &val, 4);
de7d789a
CO		 2643
2644 kvm_x86_ops->skip_emulated_instruction(vcpu);
2645
92760499 2646 pio_dev = vcpu_find_pio_dev(vcpu, port, size, !in);
de7d789a 2647 if (pio_dev) {
ad312c7c 2648 kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
de7d789a
CO		 2649 complete_pio(vcpu);
2650 return 1;
2651 }
2652 return 0;
2653}
2654EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2655
2656int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2657 int size, unsigned long count, int down,
2658 gva_t address, int rep, unsigned port)
2659{
2660 unsigned now, in_page;
2661 int i, ret = 0;
2662 int nr_pages = 1;
2663 struct page *page;
2664 struct kvm_io_device *pio_dev;
2665
2666 vcpu->run->exit_reason = KVM_EXIT_IO;
2667 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
ad312c7c 2668 vcpu->run->io.size = vcpu->arch.pio.size = size;
de7d789a 2669 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
ad312c7c
ZX		 2670 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2671 vcpu->run->io.port = vcpu->arch.pio.port = port;
2672 vcpu->arch.pio.in = in;
2673 vcpu->arch.pio.string = 1;
2674 vcpu->arch.pio.down = down;
2675 vcpu->arch.pio.guest_page_offset = offset_in_page(address);
2676 vcpu->arch.pio.rep = rep;
de7d789a 2677
2714d1d3
FEL		 2678 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2679 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2680 handler);
2681 else
2682 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2683 handler);
2684
de7d789a
CO		 2685 if (!count) {
2686 kvm_x86_ops->skip_emulated_instruction(vcpu);
2687 return 1;
2688 }
2689
2690 if (!down)
2691 in_page = PAGE_SIZE - offset_in_page(address);
2692 else
2693 in_page = offset_in_page(address) + size;
2694 now = min(count, (unsigned long)in_page / size);
2695 if (!now) {
2696 /*
2697 * String I/O straddles page boundary. Pin two guest pages
2698 * so that we satisfy atomicity constraints. Do just one
2699 * transaction to avoid complexity.
2700 */
2701 nr_pages = 2;
2702 now = 1;
2703 }
2704 if (down) {
2705 /*
2706 * String I/O in reverse. Yuck. Kill the guest, fix later.
2707 */
2708 pr_unimpl(vcpu, "guest string pio down\n");
c1a5d4f9 2709 kvm_inject_gp(vcpu, 0);
de7d789a
CO		 2710 return 1;
2711 }
2712 vcpu->run->io.count = now;
ad312c7c 2713 vcpu->arch.pio.cur_count = now;
de7d789a 2714
ad312c7c 2715 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
de7d789a
CO		 2716 kvm_x86_ops->skip_emulated_instruction(vcpu);
2717
2718 for (i = 0; i < nr_pages; ++i) {
de7d789a 2719 page = gva_to_page(vcpu, address + i * PAGE_SIZE);
ad312c7c 2720 vcpu->arch.pio.guest_pages[i] = page;
de7d789a 2721 if (!page) {
c1a5d4f9 2722 kvm_inject_gp(vcpu, 0);
de7d789a
CO		 2723 free_pio_guest_pages(vcpu);
2724 return 1;
2725 }
2726 }
2727
92760499
LV		 2728 pio_dev = vcpu_find_pio_dev(vcpu, port,
2729 vcpu->arch.pio.cur_count,
2730 !vcpu->arch.pio.in);
ad312c7c 2731 if (!vcpu->arch.pio.in) {
de7d789a
CO		 2732 /* string PIO write */
2733 ret = pio_copy_data(vcpu);
2734 if (ret >= 0 && pio_dev) {
2735 pio_string_write(pio_dev, vcpu);
2736 complete_pio(vcpu);
ad312c7c 2737 if (vcpu->arch.pio.count == 0)
de7d789a
CO		 2738 ret = 1;
2739 }
2740 } else if (pio_dev)
2741 pr_unimpl(vcpu, "no string pio read support yet, "
2742 "port %x size %d count %ld\n",
2743 port, size, count);
2744
2745 return ret;
2746}
2747EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
2748
f8c16bba 2749int kvm_arch_init(void *opaque)
043405e1 2750{
56c6d28a 2751 int r;
f8c16bba
ZX		 2752 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
2753
f8c16bba
ZX		 2754 if (kvm_x86_ops) {
2755 printk(KERN_ERR "kvm: already loaded the other module\n");
56c6d28a
ZX		 2756 r = -EEXIST;
2757 goto out;
f8c16bba
ZX		 2758 }
2759
2760 if (!ops->cpu_has_kvm_support()) {
2761 printk(KERN_ERR "kvm: no hardware support\n");
56c6d28a
ZX		 2762 r = -EOPNOTSUPP;
2763 goto out;
f8c16bba
ZX		 2764 }
2765 if (ops->disabled_by_bios()) {
2766 printk(KERN_ERR "kvm: disabled by bios\n");
56c6d28a
ZX		 2767 r = -EOPNOTSUPP;
2768 goto out;
f8c16bba
ZX		 2769 }
2770
97db56ce
AK		 2771 r = kvm_mmu_module_init();
2772 if (r)
2773 goto out;
2774
2775 kvm_init_msr_list();
2776
f8c16bba 2777 kvm_x86_ops = ops;
56c6d28a 2778 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
7b52345e
SY		 2779 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
2780 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
2781 PT_DIRTY_MASK, PT64_NX_MASK, 0);
f8c16bba 2782 return 0;
56c6d28a
ZX		 2783
2784out:
56c6d28a 2785 return r;
043405e1 2786}
8776e519 2787
f8c16bba
ZX		 2788void kvm_arch_exit(void)
2789{
2790 kvm_x86_ops = NULL;
56c6d28a
ZX		 2791 kvm_mmu_module_exit();
2792}
f8c16bba 2793
8776e519
HB		 2794int kvm_emulate_halt(struct kvm_vcpu *vcpu)
2795{
2796 ++vcpu->stat.halt_exits;
2714d1d3 2797 KVMTRACE_0D(HLT, vcpu, handler);
8776e519 2798 if (irqchip_in_kernel(vcpu->kvm)) {
a4535290 2799 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
3200f405 2800 up_read(&vcpu->kvm->slots_lock);
8776e519 2801 kvm_vcpu_block(vcpu);
3200f405 2802 down_read(&vcpu->kvm->slots_lock);
a4535290 2803 if (vcpu->arch.mp_state != KVM_MP_STATE_RUNNABLE)
8776e519
HB		 2804 return -EINTR;
2805 return 1;
2806 } else {
2807 vcpu->run->exit_reason = KVM_EXIT_HLT;
2808 return 0;
2809 }
2810}
2811EXPORT_SYMBOL_GPL(kvm_emulate_halt);
2812
2f333bcb
MT		 2813static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
2814 unsigned long a1)
2815{
2816 if (is_long_mode(vcpu))
2817 return a0;
2818 else
2819 return a0 | ((gpa_t)a1 << 32);
2820}
2821
8776e519
HB		 2822int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
2823{
2824 unsigned long nr, a0, a1, a2, a3, ret;
2f333bcb 2825 int r = 1;
8776e519 2826
5fdbf976
MT		 2827 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
2828 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
2829 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
2830 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
2831 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
8776e519 2832
2714d1d3
FEL		 2833 KVMTRACE_1D(VMMCALL, vcpu, (u32)nr, handler);
2834
8776e519
HB		 2835 if (!is_long_mode(vcpu)) {
2836 nr &= 0xFFFFFFFF;
2837 a0 &= 0xFFFFFFFF;
2838 a1 &= 0xFFFFFFFF;
2839 a2 &= 0xFFFFFFFF;
2840 a3 &= 0xFFFFFFFF;
2841 }
2842
2843 switch (nr) {
b93463aa
AK		 2844 case KVM_HC_VAPIC_POLL_IRQ:
2845 ret = 0;
2846 break;
2f333bcb
MT		 2847 case KVM_HC_MMU_OP:
2848 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
2849 break;
8776e519
HB		 2850 default:
2851 ret = -KVM_ENOSYS;
2852 break;
2853 }
5fdbf976 2854 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
f11c3a8d 2855 ++vcpu->stat.hypercalls;
2f333bcb 2856 return r;
8776e519
HB		 2857}
2858EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
2859
2860int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
2861{
2862 char instruction[3];
2863 int ret = 0;
5fdbf976 2864 unsigned long rip = kvm_rip_read(vcpu);
8776e519 2865
8776e519
HB		 2866
2867 /*
2868 * Blow out the MMU to ensure that no other VCPU has an active mapping
2869 * to ensure that the updated hypercall appears atomically across all
2870 * VCPUs.
2871 */
2872 kvm_mmu_zap_all(vcpu->kvm);
2873
8776e519 2874 kvm_x86_ops->patch_hypercall(vcpu, instruction);
5fdbf976 2875 if (emulator_write_emulated(rip, instruction, 3, vcpu)
8776e519
HB		 2876 != X86EMUL_CONTINUE)
2877 ret = -EFAULT;
2878
8776e519
HB		 2879 return ret;
2880}
2881
2882static u64 mk_cr_64(u64 curr_cr, u32 new_val)
2883{
2884 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
2885}
2886
2887void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2888{
2889 struct descriptor_table dt = { limit, base };
2890
2891 kvm_x86_ops->set_gdt(vcpu, &dt);
2892}
2893
2894void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2895{
2896 struct descriptor_table dt = { limit, base };
2897
2898 kvm_x86_ops->set_idt(vcpu, &dt);
2899}
2900
2901void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
2902 unsigned long *rflags)
2903{
2d3ad1f4 2904 kvm_lmsw(vcpu, msw);
8776e519
HB		 2905 *rflags = kvm_x86_ops->get_rflags(vcpu);
2906}
2907
2908unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
2909{
54e445ca
JR		 2910 unsigned long value;
2911
8776e519
HB		 2912 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2913 switch (cr) {
2914 case 0:
54e445ca
JR		 2915 value = vcpu->arch.cr0;
2916 break;
8776e519 2917 case 2:
54e445ca
JR		 2918 value = vcpu->arch.cr2;
2919 break;
8776e519 2920 case 3:
54e445ca
JR		 2921 value = vcpu->arch.cr3;
2922 break;
8776e519 2923 case 4:
54e445ca
JR		 2924 value = vcpu->arch.cr4;
2925 break;
152ff9be 2926 case 8:
54e445ca
JR		 2927 value = kvm_get_cr8(vcpu);
2928 break;
8776e519 2929 default:
b8688d51 2930 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
8776e519
HB		 2931 return 0;
2932 }
54e445ca
JR		 2933 KVMTRACE_3D(CR_READ, vcpu, (u32)cr, (u32)value,
2934 (u32)((u64)value >> 32), handler);
2935
2936 return value;
8776e519
HB		 2937}
2938
2939void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
2940 unsigned long *rflags)
2941{
54e445ca
JR		 2942 KVMTRACE_3D(CR_WRITE, vcpu, (u32)cr, (u32)val,
2943 (u32)((u64)val >> 32), handler);
2944
8776e519
HB		 2945 switch (cr) {
2946 case 0:
2d3ad1f4 2947 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
8776e519
HB		 2948 *rflags = kvm_x86_ops->get_rflags(vcpu);
2949 break;
2950 case 2:
ad312c7c 2951 vcpu->arch.cr2 = val;
8776e519
HB		 2952 break;
2953 case 3:
2d3ad1f4 2954 kvm_set_cr3(vcpu, val);
8776e519
HB		 2955 break;
2956 case 4:
2d3ad1f4 2957 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
8776e519 2958 break;
152ff9be 2959 case 8:
2d3ad1f4 2960 kvm_set_cr8(vcpu, val & 0xfUL);
152ff9be 2961 break;
8776e519 2962 default:
b8688d51 2963 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
8776e519
HB		 2964 }
2965}
2966
07716717
DK		 2967static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
2968{
ad312c7c
ZX		 2969 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
2970 int j, nent = vcpu->arch.cpuid_nent;
07716717
DK		 2971
2972 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
2973 /* when no next entry is found, the current entry[i] is reselected */
2974 for (j = i + 1; j == i; j = (j + 1) % nent) {
ad312c7c 2975 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
07716717
DK		 2976 if (ej->function == e->function) {
2977 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2978 return j;
2979 }
2980 }
2981 return 0; /* silence gcc, even though control never reaches here */
2982}
2983
2984/* find an entry with matching function, matching index (if needed), and that
2985 * should be read next (if it's stateful) */
2986static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
2987 u32 function, u32 index)
2988{
2989 if (e->function != function)
2990 return 0;
2991 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
2992 return 0;
2993 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
2994 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
2995 return 0;
2996 return 1;
2997}
2998
8776e519
HB		 2999void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3000{
3001 int i;
07716717
DK		 3002 u32 function, index;
3003 struct kvm_cpuid_entry2 *e, *best;
8776e519 3004
5fdbf976
MT		 3005 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3006 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3007 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3008 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3009 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3010 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
8776e519 3011 best = NULL;
ad312c7c
ZX		 3012 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
3013 e = &vcpu->arch.cpuid_entries[i];
07716717
DK		 3014 if (is_matching_cpuid_entry(e, function, index)) {
3015 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3016 move_to_next_stateful_cpuid_entry(vcpu, i);
8776e519
HB		 3017 best = e;
3018 break;
3019 }
3020 /*
3021 * Both basic or both extended?
3022 */
3023 if (((e->function ^ function) & 0x80000000) == 0)
3024 if (!best || e->function > best->function)
3025 best = e;
3026 }
3027 if (best) {
5fdbf976
MT		 3028 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3029 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3030 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3031 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
8776e519 3032 }
8776e519 3033 kvm_x86_ops->skip_emulated_instruction(vcpu);
2714d1d3 3034 KVMTRACE_5D(CPUID, vcpu, function,
5fdbf976
MT		 3035 (u32)kvm_register_read(vcpu, VCPU_REGS_RAX),
3036 (u32)kvm_register_read(vcpu, VCPU_REGS_RBX),
3037 (u32)kvm_register_read(vcpu, VCPU_REGS_RCX),
3038 (u32)kvm_register_read(vcpu, VCPU_REGS_RDX), handler);
8776e519
HB		 3039}
3040EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
d0752060 3041
b6c7a5dc
HB		 3042/*
3043 * Check if userspace requested an interrupt window, and that the
3044 * interrupt window is open.
3045 *
3046 * No need to exit to userspace if we already have an interrupt queued.
3047 */
3048static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
3049 struct kvm_run *kvm_run)
3050{
ad312c7c 3051 return (!vcpu->arch.irq_summary &&
b6c7a5dc 3052 kvm_run->request_interrupt_window &&
ad312c7c 3053 vcpu->arch.interrupt_window_open &&
b6c7a5dc
HB		 3054 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
3055}
3056
3057static void post_kvm_run_save(struct kvm_vcpu *vcpu,
3058 struct kvm_run *kvm_run)
3059{
3060 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
2d3ad1f4 3061 kvm_run->cr8 = kvm_get_cr8(vcpu);
b6c7a5dc
HB		 3062 kvm_run->apic_base = kvm_get_apic_base(vcpu);
3063 if (irqchip_in_kernel(vcpu->kvm))
3064 kvm_run->ready_for_interrupt_injection = 1;
3065 else
3066 kvm_run->ready_for_interrupt_injection =
ad312c7c
ZX		 3067 (vcpu->arch.interrupt_window_open &&
3068 vcpu->arch.irq_summary == 0);
b6c7a5dc
HB		 3069}
3070
b93463aa
AK		 3071static void vapic_enter(struct kvm_vcpu *vcpu)
3072{
3073 struct kvm_lapic *apic = vcpu->arch.apic;
3074 struct page *page;
3075
3076 if (!apic || !apic->vapic_addr)
3077 return;
3078
10589a46 3079 down_read(&current->mm->mmap_sem);
b93463aa 3080 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
10589a46 3081 up_read(&current->mm->mmap_sem);
72dc67a6
IE		 3082
3083 vcpu->arch.apic->vapic_page = page;
b93463aa
AK		 3084}
3085
3086static void vapic_exit(struct kvm_vcpu *vcpu)
3087{
3088 struct kvm_lapic *apic = vcpu->arch.apic;
3089
3090 if (!apic || !apic->vapic_addr)
3091 return;
3092
f8b78fa3 3093 down_read(&vcpu->kvm->slots_lock);
b93463aa
AK		 3094 kvm_release_page_dirty(apic->vapic_page);
3095 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
f8b78fa3 3096 up_read(&vcpu->kvm->slots_lock);
b93463aa
AK		 3097}
3098
b6c7a5dc
HB		 3099static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3100{
3101 int r;
3102
a4535290 3103 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
b6c7a5dc 3104 pr_debug("vcpu %d received sipi with vector # %x\n",
ad312c7c 3105 vcpu->vcpu_id, vcpu->arch.sipi_vector);
b6c7a5dc
HB		 3106 kvm_lapic_reset(vcpu);
3107 r = kvm_x86_ops->vcpu_reset(vcpu);
3108 if (r)
3109 return r;
a4535290 3110 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
b6c7a5dc
HB		 3111 }
3112
3200f405 3113 down_read(&vcpu->kvm->slots_lock);
b93463aa
AK		 3114 vapic_enter(vcpu);
3115
b6c7a5dc 3116again:
2e53d63a
MT		 3117 if (vcpu->requests)
3118 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3119 kvm_mmu_unload(vcpu);
3120
b6c7a5dc
HB		 3121 r = kvm_mmu_reload(vcpu);
3122 if (unlikely(r))
3123 goto out;
3124
2f52d58c
AK		 3125 if (vcpu->requests) {
3126 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
2f599714 3127 __kvm_migrate_timers(vcpu);
d4acf7e7
MT		 3128 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3129 kvm_x86_ops->tlb_flush(vcpu);
b93463aa
AK		 3130 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3131 &vcpu->requests)) {
3132 kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
3133 r = 0;
3134 goto out;
3135 }
71c4dfaf
JR		 3136 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3137 kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
3138 r = 0;
3139 goto out;
3140 }
2f52d58c 3141 }
b93463aa 3142
06e05645 3143 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
b6c7a5dc
HB		 3144 kvm_inject_pending_timer_irqs(vcpu);
3145
3146 preempt_disable();
3147
3148 kvm_x86_ops->prepare_guest_switch(vcpu);
3149 kvm_load_guest_fpu(vcpu);
3150
3151 local_irq_disable();
3152
d4acf7e7 3153 if (vcpu->requests || need_resched()) {
6c142801
AK		 3154 local_irq_enable();
3155 preempt_enable();
3156 r = 1;
3157 goto out;
3158 }
3159
b6c7a5dc
HB		 3160 if (signal_pending(current)) {
3161 local_irq_enable();
3162 preempt_enable();
3163 r = -EINTR;
3164 kvm_run->exit_reason = KVM_EXIT_INTR;
3165 ++vcpu->stat.signal_exits;
3166 goto out;
3167 }
3168
29415c37
MT		 3169 if (vcpu->guest_debug.enabled)
3170 kvm_x86_ops->guest_debug_pre(vcpu);
3171
e9571ed5
MT		 3172 vcpu->guest_mode = 1;
3173 /*
3174 * Make sure that guest_mode assignment won't happen after
3175 * testing the pending IRQ vector bitmap.
3176 */
3177 smp_wmb();
3178
ad312c7c 3179 if (vcpu->arch.exception.pending)
298101da
AK		 3180 __queue_exception(vcpu);
3181 else if (irqchip_in_kernel(vcpu->kvm))
b6c7a5dc 3182 kvm_x86_ops->inject_pending_irq(vcpu);
eb9774f0 3183 else
b6c7a5dc
HB		 3184 kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
3185
b93463aa
AK		 3186 kvm_lapic_sync_to_vapic(vcpu);
3187
3200f405
MT		 3188 up_read(&vcpu->kvm->slots_lock);
3189
b6c7a5dc
HB		 3190 kvm_guest_enter();
3191
b6c7a5dc 3192
2714d1d3 3193 KVMTRACE_0D(VMENTRY, vcpu, entryexit);
b6c7a5dc
HB		 3194 kvm_x86_ops->run(vcpu, kvm_run);
3195
3196 vcpu->guest_mode = 0;
3197 local_irq_enable();
3198
3199 ++vcpu->stat.exits;
3200
3201 /*
3202 * We must have an instruction between local_irq_enable() and
3203 * kvm_guest_exit(), so the timer interrupt isn't delayed by
3204 * the interrupt shadow. The stat.exits increment will do nicely.
3205 * But we need to prevent reordering, hence this barrier():
3206 */
3207 barrier();
3208
3209 kvm_guest_exit();
3210
3211 preempt_enable();
3212
3200f405
MT		 3213 down_read(&vcpu->kvm->slots_lock);
3214
b6c7a5dc
HB		 3215 /*
3216 * Profile KVM exit RIPs:
3217 */
3218 if (unlikely(prof_on == KVM_PROFILING)) {
5fdbf976
MT		 3219 unsigned long rip = kvm_rip_read(vcpu);
3220 profile_hit(KVM_PROFILING, (void *)rip);
b6c7a5dc
HB		 3221 }
3222
ad312c7c
ZX		 3223 if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
3224 vcpu->arch.exception.pending = false;
298101da 3225
b93463aa
AK		 3226 kvm_lapic_sync_from_vapic(vcpu);
3227
b6c7a5dc
HB		 3228 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
3229
3230 if (r > 0) {
3231 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
3232 r = -EINTR;
3233 kvm_run->exit_reason = KVM_EXIT_INTR;
3234 ++vcpu->stat.request_irq_exits;
3235 goto out;
3236 }
e1beb1d3 3237 if (!need_resched())
b6c7a5dc 3238 goto again;
b6c7a5dc
HB		 3239 }
3240
3241out:
3200f405 3242 up_read(&vcpu->kvm->slots_lock);
b6c7a5dc
HB		 3243 if (r > 0) {
3244 kvm_resched(vcpu);
3200f405 3245 down_read(&vcpu->kvm->slots_lock);
29415c37 3246 goto again;
b6c7a5dc
HB		 3247 }
3248
3249 post_kvm_run_save(vcpu, kvm_run);
3250
b93463aa
AK		 3251 vapic_exit(vcpu);
3252
b6c7a5dc
HB		 3253 return r;
3254}
3255
3256int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3257{
3258 int r;
3259 sigset_t sigsaved;
3260
3261 vcpu_load(vcpu);
3262
ac9f6dc0
AK		 3263 if (vcpu->sigset_active)
3264 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3265
a4535290 3266 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
b6c7a5dc 3267 kvm_vcpu_block(vcpu);
ac9f6dc0
AK		 3268 r = -EAGAIN;
3269 goto out;
b6c7a5dc
HB		 3270 }
3271
b6c7a5dc
HB		 3272 /* re-sync apic's tpr */
3273 if (!irqchip_in_kernel(vcpu->kvm))
2d3ad1f4 3274 kvm_set_cr8(vcpu, kvm_run->cr8);
b6c7a5dc 3275
ad312c7c 3276 if (vcpu->arch.pio.cur_count) {
b6c7a5dc
HB		 3277 r = complete_pio(vcpu);
3278 if (r)
3279 goto out;
3280 }
3281#if CONFIG_HAS_IOMEM
3282 if (vcpu->mmio_needed) {
3283 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3284 vcpu->mmio_read_completed = 1;
3285 vcpu->mmio_needed = 0;
3200f405
MT		 3286
3287 down_read(&vcpu->kvm->slots_lock);
b6c7a5dc 3288 r = emulate_instruction(vcpu, kvm_run,
571008da
SY		 3289 vcpu->arch.mmio_fault_cr2, 0,
3290 EMULTYPE_NO_DECODE);
3200f405 3291 up_read(&vcpu->kvm->slots_lock);
b6c7a5dc
HB		 3292 if (r == EMULATE_DO_MMIO) {
3293 /*
3294 * Read-modify-write. Back to userspace.
3295 */
3296 r = 0;
3297 goto out;
3298 }
3299 }
3300#endif
5fdbf976
MT		 3301 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3302 kvm_register_write(vcpu, VCPU_REGS_RAX,
3303 kvm_run->hypercall.ret);
b6c7a5dc
HB		 3304
3305 r = __vcpu_run(vcpu, kvm_run);
3306
3307out:
3308 if (vcpu->sigset_active)
3309 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3310
3311 vcpu_put(vcpu);
3312 return r;
3313}
3314
3315int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3316{
3317 vcpu_load(vcpu);
3318
5fdbf976
MT		 3319 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3320 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3321 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3322 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3323 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3324 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3325 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3326 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
b6c7a5dc 3327#ifdef CONFIG_X86_64
5fdbf976
MT		 3328 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3329 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3330 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3331 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3332 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3333 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3334 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3335 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
b6c7a5dc
HB		 3336#endif
3337
5fdbf976 3338 regs->rip = kvm_rip_read(vcpu);
b6c7a5dc
HB		 3339 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3340
3341 /*
3342 * Don't leak debug flags in case they were set for guest debugging
3343 */
3344 if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep)
3345 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3346
3347 vcpu_put(vcpu);
3348
3349 return 0;
3350}
3351
3352int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3353{
3354 vcpu_load(vcpu);
3355
5fdbf976
MT		 3356 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3357 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3358 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3359 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3360 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3361 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3362 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3363 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
b6c7a5dc 3364#ifdef CONFIG_X86_64
5fdbf976
MT		 3365 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3366 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3367 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3368 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3369 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3370 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3371 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3372 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3373
b6c7a5dc
HB		 3374#endif
3375
5fdbf976 3376 kvm_rip_write(vcpu, regs->rip);
b6c7a5dc
HB		 3377 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3378
b6c7a5dc 3379
b4f14abd
JK		 3380 vcpu->arch.exception.pending = false;
3381
b6c7a5dc
HB		 3382 vcpu_put(vcpu);
3383
3384 return 0;
3385}
3386
3e6e0aab
GT		 3387void kvm_get_segment(struct kvm_vcpu *vcpu,
3388 struct kvm_segment *var, int seg)
b6c7a5dc 3389{
14af3f3c 3390 kvm_x86_ops->get_segment(vcpu, var, seg);
b6c7a5dc
HB		 3391}
3392
3393void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3394{
3395 struct kvm_segment cs;
3396
3e6e0aab 3397 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
b6c7a5dc
HB		 3398 *db = cs.db;
3399 *l = cs.l;
3400}
3401EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3402
3403int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3404 struct kvm_sregs *sregs)
3405{
3406 struct descriptor_table dt;
3407 int pending_vec;
3408
3409 vcpu_load(vcpu);
3410
3e6e0aab
GT		 3411 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3412 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3413 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3414 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3415 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3416 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
b6c7a5dc 3417
3e6e0aab
GT		 3418 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3419 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
b6c7a5dc
HB		 3420
3421 kvm_x86_ops->get_idt(vcpu, &dt);
3422 sregs->idt.limit = dt.limit;
3423 sregs->idt.base = dt.base;
3424 kvm_x86_ops->get_gdt(vcpu, &dt);
3425 sregs->gdt.limit = dt.limit;
3426 sregs->gdt.base = dt.base;
3427
3428 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
ad312c7c
ZX		 3429 sregs->cr0 = vcpu->arch.cr0;
3430 sregs->cr2 = vcpu->arch.cr2;
3431 sregs->cr3 = vcpu->arch.cr3;
3432 sregs->cr4 = vcpu->arch.cr4;
2d3ad1f4 3433 sregs->cr8 = kvm_get_cr8(vcpu);
ad312c7c 3434 sregs->efer = vcpu->arch.shadow_efer;
b6c7a5dc
HB		 3435 sregs->apic_base = kvm_get_apic_base(vcpu);
3436
3437 if (irqchip_in_kernel(vcpu->kvm)) {
3438 memset(sregs->interrupt_bitmap, 0,
3439 sizeof sregs->interrupt_bitmap);
3440 pending_vec = kvm_x86_ops->get_irq(vcpu);
3441 if (pending_vec >= 0)
3442 set_bit(pending_vec,
3443 (unsigned long *)sregs->interrupt_bitmap);
3444 } else
ad312c7c 3445 memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
b6c7a5dc
HB		 3446 sizeof sregs->interrupt_bitmap);
3447
3448 vcpu_put(vcpu);
3449
3450 return 0;
3451}
3452
62d9f0db
MT		 3453int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3454 struct kvm_mp_state *mp_state)
3455{
3456 vcpu_load(vcpu);
3457 mp_state->mp_state = vcpu->arch.mp_state;
3458 vcpu_put(vcpu);
3459 return 0;
3460}
3461
3462int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3463 struct kvm_mp_state *mp_state)
3464{
3465 vcpu_load(vcpu);
3466 vcpu->arch.mp_state = mp_state->mp_state;
3467 vcpu_put(vcpu);
3468 return 0;
3469}
3470
3e6e0aab 3471static void kvm_set_segment(struct kvm_vcpu *vcpu,
b6c7a5dc
HB		 3472 struct kvm_segment *var, int seg)
3473{
14af3f3c 3474 kvm_x86_ops->set_segment(vcpu, var, seg);
b6c7a5dc
HB		 3475}
3476
37817f29
IE		 3477static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3478 struct kvm_segment *kvm_desct)
3479{
3480 kvm_desct->base = seg_desc->base0;
3481 kvm_desct->base |= seg_desc->base1 << 16;
3482 kvm_desct->base |= seg_desc->base2 << 24;
3483 kvm_desct->limit = seg_desc->limit0;
3484 kvm_desct->limit |= seg_desc->limit << 16;
c93cd3a5
MT		 3485 if (seg_desc->g) {
3486 kvm_desct->limit <<= 12;
3487 kvm_desct->limit |= 0xfff;
3488 }
37817f29
IE		 3489 kvm_desct->selector = selector;
3490 kvm_desct->type = seg_desc->type;
3491 kvm_desct->present = seg_desc->p;
3492 kvm_desct->dpl = seg_desc->dpl;
3493 kvm_desct->db = seg_desc->d;
3494 kvm_desct->s = seg_desc->s;
3495 kvm_desct->l = seg_desc->l;
3496 kvm_desct->g = seg_desc->g;
3497 kvm_desct->avl = seg_desc->avl;
3498 if (!selector)
3499 kvm_desct->unusable = 1;
3500 else
3501 kvm_desct->unusable = 0;
3502 kvm_desct->padding = 0;
3503}
3504
3505static void get_segment_descritptor_dtable(struct kvm_vcpu *vcpu,
3506 u16 selector,
3507 struct descriptor_table *dtable)
3508{
3509 if (selector & 1 << 2) {
3510 struct kvm_segment kvm_seg;
3511
3e6e0aab 3512 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
37817f29
IE		 3513
3514 if (kvm_seg.unusable)
3515 dtable->limit = 0;
3516 else
3517 dtable->limit = kvm_seg.limit;
3518 dtable->base = kvm_seg.base;
3519 }
3520 else
3521 kvm_x86_ops->get_gdt(vcpu, dtable);
3522}
3523
3524/* allowed just for 8 bytes segments */
3525static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3526 struct desc_struct *seg_desc)
3527{
98899aa0 3528 gpa_t gpa;
37817f29
IE		 3529 struct descriptor_table dtable;
3530 u16 index = selector >> 3;
3531
3532 get_segment_descritptor_dtable(vcpu, selector, &dtable);
3533
3534 if (dtable.limit < index * 8 + 7) {
3535 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
3536 return 1;
3537 }
98899aa0
MT		 3538 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3539 gpa += index * 8;
3540 return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8);
37817f29
IE		 3541}
3542
3543/* allowed just for 8 bytes segments */
3544static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3545 struct desc_struct *seg_desc)
3546{
98899aa0 3547 gpa_t gpa;
37817f29
IE		 3548 struct descriptor_table dtable;
3549 u16 index = selector >> 3;
3550
3551 get_segment_descritptor_dtable(vcpu, selector, &dtable);
3552
3553 if (dtable.limit < index * 8 + 7)
3554 return 1;
98899aa0
MT		 3555 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3556 gpa += index * 8;
3557 return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8);
37817f29
IE		 3558}
3559
3560static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
3561 struct desc_struct *seg_desc)
3562{
3563 u32 base_addr;
3564
3565 base_addr = seg_desc->base0;
3566 base_addr |= (seg_desc->base1 << 16);
3567 base_addr |= (seg_desc->base2 << 24);
3568
98899aa0 3569 return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
37817f29
IE		 3570}
3571
37817f29
IE		 3572static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
3573{
3574 struct kvm_segment kvm_seg;
3575
3e6e0aab 3576 kvm_get_segment(vcpu, &kvm_seg, seg);
37817f29
IE		 3577 return kvm_seg.selector;
3578}
3579
3580static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
3581 u16 selector,
3582 struct kvm_segment *kvm_seg)
3583{
3584 struct desc_struct seg_desc;
3585
3586 if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
3587 return 1;
3588 seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
3589 return 0;
3590}
3591
f4bbd9aa
AK		 3592int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
3593{
3594 struct kvm_segment segvar = {
3595 .base = selector << 4,
3596 .limit = 0xffff,
3597 .selector = selector,
3598 .type = 3,
3599 .present = 1,
3600 .dpl = 3,
3601 .db = 0,
3602 .s = 1,
3603 .l = 0,
3604 .g = 0,
3605 .avl = 0,
3606 .unusable = 0,
3607 };
3608 kvm_x86_ops->set_segment(vcpu, &segvar, seg);
3609 return 0;
3610}
3611
3e6e0aab
GT		 3612int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3613 int type_bits, int seg)
37817f29
IE		 3614{
3615 struct kvm_segment kvm_seg;
3616
f4bbd9aa
AK		 3617 if (!(vcpu->arch.cr0 & X86_CR0_PE))
3618 return kvm_load_realmode_segment(vcpu, selector, seg);
37817f29
IE		 3619 if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
3620 return 1;
3621 kvm_seg.type |= type_bits;
3622
3623 if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
3624 seg != VCPU_SREG_LDTR)
3625 if (!kvm_seg.s)
3626 kvm_seg.unusable = 1;
3627
3e6e0aab 3628 kvm_set_segment(vcpu, &kvm_seg, seg);
37817f29
IE		 3629 return 0;
3630}
3631
3632static void save_state_to_tss32(struct kvm_vcpu *vcpu,
3633 struct tss_segment_32 *tss)
3634{
3635 tss->cr3 = vcpu->arch.cr3;
5fdbf976 3636 tss->eip = kvm_rip_read(vcpu);
37817f29 3637 tss->eflags = kvm_x86_ops->get_rflags(vcpu);
5fdbf976
MT		 3638 tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3639 tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3640 tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3641 tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3642 tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3643 tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3644 tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3645 tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
37817f29
IE		 3646 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3647 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3648 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3649 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3650 tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
3651 tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
3652 tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3653 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3654}
3655
3656static int load_state_from_tss32(struct kvm_vcpu *vcpu,
3657 struct tss_segment_32 *tss)
3658{
3659 kvm_set_cr3(vcpu, tss->cr3);
3660
5fdbf976 3661 kvm_rip_write(vcpu, tss->eip);
37817f29
IE		 3662 kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
3663
5fdbf976
MT		 3664 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
3665 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
3666 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
3667 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
3668 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
3669 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
3670 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
3671 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
37817f29 3672
3e6e0aab 3673 if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
37817f29
IE		 3674 return 1;
3675
3e6e0aab 3676 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
37817f29
IE		 3677 return 1;
3678
3e6e0aab 3679 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
37817f29
IE		 3680 return 1;
3681
3e6e0aab 3682 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
37817f29
IE		 3683 return 1;
3684
3e6e0aab 3685 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
37817f29
IE		 3686 return 1;
3687
3e6e0aab 3688 if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
37817f29
IE		 3689 return 1;
3690
3e6e0aab 3691 if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
37817f29
IE		 3692 return 1;
3693 return 0;
3694}
3695
3696static void save_state_to_tss16(struct kvm_vcpu *vcpu,
3697 struct tss_segment_16 *tss)
3698{
5fdbf976 3699 tss->ip = kvm_rip_read(vcpu);
37817f29 3700 tss->flag = kvm_x86_ops->get_rflags(vcpu);
5fdbf976
MT		 3701 tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3702 tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3703 tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3704 tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3705 tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3706 tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3707 tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
3708 tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
37817f29
IE		 3709
3710 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3711 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3712 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3713 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3714 tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3715 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3716}
3717
3718static int load_state_from_tss16(struct kvm_vcpu *vcpu,
3719 struct tss_segment_16 *tss)
3720{
5fdbf976 3721 kvm_rip_write(vcpu, tss->ip);
37817f29 3722 kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
5fdbf976
MT		 3723 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
3724 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
3725 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
3726 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
3727 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
3728 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
3729 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
3730 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
37817f29 3731
3e6e0aab 3732 if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
37817f29
IE		 3733 return 1;
3734
3e6e0aab 3735 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
37817f29
IE		 3736 return 1;
3737
3e6e0aab 3738 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
37817f29
IE		 3739 return 1;
3740
3e6e0aab 3741 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
37817f29
IE		 3742 return 1;
3743
3e6e0aab 3744 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
37817f29
IE		 3745 return 1;
3746 return 0;
3747}
3748
8b2cf73c 3749static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
34198bf8 3750 u32 old_tss_base,
37817f29
IE		 3751 struct desc_struct *nseg_desc)
3752{
3753 struct tss_segment_16 tss_segment_16;
3754 int ret = 0;
3755
34198bf8
MT		 3756 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3757 sizeof tss_segment_16))
37817f29
IE		 3758 goto out;
3759
3760 save_state_to_tss16(vcpu, &tss_segment_16);
37817f29 3761
34198bf8
MT		 3762 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3763 sizeof tss_segment_16))
37817f29 3764 goto out;
34198bf8
MT		 3765
3766 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3767 &tss_segment_16, sizeof tss_segment_16))
3768 goto out;
3769
37817f29
IE		 3770 if (load_state_from_tss16(vcpu, &tss_segment_16))
3771 goto out;
3772
3773 ret = 1;
3774out:
3775 return ret;
3776}
3777
8b2cf73c 3778static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
34198bf8 3779 u32 old_tss_base,
37817f29
IE		 3780 struct desc_struct *nseg_desc)
3781{
3782 struct tss_segment_32 tss_segment_32;
3783 int ret = 0;
3784
34198bf8
MT		 3785 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3786 sizeof tss_segment_32))
37817f29
IE		 3787 goto out;
3788
3789 save_state_to_tss32(vcpu, &tss_segment_32);
37817f29 3790
34198bf8
MT		 3791 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3792 sizeof tss_segment_32))
3793 goto out;
3794
3795 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3796 &tss_segment_32, sizeof tss_segment_32))
37817f29 3797 goto out;
34198bf8 3798
37817f29
IE		 3799 if (load_state_from_tss32(vcpu, &tss_segment_32))
3800 goto out;
3801
3802 ret = 1;
3803out:
3804 return ret;
3805}
3806
3807int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
3808{
3809 struct kvm_segment tr_seg;
3810 struct desc_struct cseg_desc;
3811 struct desc_struct nseg_desc;
3812 int ret = 0;
34198bf8
MT		 3813 u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
3814 u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
37817f29 3815
34198bf8 3816 old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
37817f29 3817
34198bf8
MT		 3818 /* FIXME: Handle errors. Failure to read either TSS or their
3819 * descriptors should generate a pagefault.
3820 */
37817f29
IE		 3821 if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
3822 goto out;
3823
34198bf8 3824 if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
37817f29
IE		 3825 goto out;
3826
37817f29
IE		 3827 if (reason != TASK_SWITCH_IRET) {
3828 int cpl;
3829
3830 cpl = kvm_x86_ops->get_cpl(vcpu);
3831 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
3832 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
3833 return 1;
3834 }
3835 }
3836
3837 if (!nseg_desc.p || (nseg_desc.limit0 | nseg_desc.limit << 16) < 0x67) {
3838 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
3839 return 1;
3840 }
3841
3842 if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
3fe913e7 3843 cseg_desc.type &= ~(1 << 1); //clear the B flag
34198bf8 3844 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
37817f29
IE		 3845 }
3846
3847 if (reason == TASK_SWITCH_IRET) {
3848 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3849 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
3850 }
3851
3852 kvm_x86_ops->skip_emulated_instruction(vcpu);
37817f29
IE		 3853
3854 if (nseg_desc.type & 8)
34198bf8 3855 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_base,
37817f29
IE		 3856 &nseg_desc);
3857 else
34198bf8 3858 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_base,
37817f29
IE		 3859 &nseg_desc);
3860
3861 if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
3862 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3863 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
3864 }
3865
3866 if (reason != TASK_SWITCH_IRET) {
3fe913e7 3867 nseg_desc.type |= (1 << 1);
37817f29
IE		 3868 save_guest_segment_descriptor(vcpu, tss_selector,
3869 &nseg_desc);
3870 }
3871
3872 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
3873 seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
3874 tr_seg.type = 11;
3e6e0aab 3875 kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
37817f29 3876out:
37817f29
IE		 3877 return ret;
3878}
3879EXPORT_SYMBOL_GPL(kvm_task_switch);
3880
b6c7a5dc
HB		 3881int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
3882 struct kvm_sregs *sregs)
3883{
3884 int mmu_reset_needed = 0;
3885 int i, pending_vec, max_bits;
3886 struct descriptor_table dt;
3887
3888 vcpu_load(vcpu);
3889
3890 dt.limit = sregs->idt.limit;
3891 dt.base = sregs->idt.base;
3892 kvm_x86_ops->set_idt(vcpu, &dt);
3893 dt.limit = sregs->gdt.limit;
3894 dt.base = sregs->gdt.base;
3895 kvm_x86_ops->set_gdt(vcpu, &dt);
3896
ad312c7c
ZX		 3897 vcpu->arch.cr2 = sregs->cr2;
3898 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
3899 vcpu->arch.cr3 = sregs->cr3;
b6c7a5dc 3900
2d3ad1f4 3901 kvm_set_cr8(vcpu, sregs->cr8);
b6c7a5dc 3902
ad312c7c 3903 mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
b6c7a5dc 3904 kvm_x86_ops->set_efer(vcpu, sregs->efer);
b6c7a5dc
HB		 3905 kvm_set_apic_base(vcpu, sregs->apic_base);
3906
3907 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3908
ad312c7c 3909 mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
b6c7a5dc 3910 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
d7306163 3911 vcpu->arch.cr0 = sregs->cr0;
b6c7a5dc 3912
ad312c7c 3913 mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
b6c7a5dc
HB		 3914 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
3915 if (!is_long_mode(vcpu) && is_pae(vcpu))
ad312c7c 3916 load_pdptrs(vcpu, vcpu->arch.cr3);
b6c7a5dc
HB		 3917
3918 if (mmu_reset_needed)
3919 kvm_mmu_reset_context(vcpu);
3920
3921 if (!irqchip_in_kernel(vcpu->kvm)) {
ad312c7c
ZX		 3922 memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
3923 sizeof vcpu->arch.irq_pending);
3924 vcpu->arch.irq_summary = 0;
3925 for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
3926 if (vcpu->arch.irq_pending[i])
3927 __set_bit(i, &vcpu->arch.irq_summary);
b6c7a5dc
HB		 3928 } else {
3929 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
3930 pending_vec = find_first_bit(
3931 (const unsigned long *)sregs->interrupt_bitmap,
3932 max_bits);
3933 /* Only pending external irq is handled here */
3934 if (pending_vec < max_bits) {
3935 kvm_x86_ops->set_irq(vcpu, pending_vec);
3936 pr_debug("Set back pending irq %d\n",
3937 pending_vec);
3938 }
3939 }
3940
3e6e0aab
GT		 3941 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3942 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3943 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3944 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3945 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3946 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
b6c7a5dc 3947
3e6e0aab
GT		 3948 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3949 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
b6c7a5dc
HB		 3950
3951 vcpu_put(vcpu);
3952
3953 return 0;
3954}
3955
3956int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
3957 struct kvm_debug_guest *dbg)
3958{
3959 int r;
3960
3961 vcpu_load(vcpu);
3962
3963 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
3964
3965 vcpu_put(vcpu);
3966
3967 return r;
3968}
3969
d0752060
HB		 3970/*
3971 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
3972 * we have asm/x86/processor.h
3973 */
3974struct fxsave {
3975 u16 cwd;
3976 u16 swd;
3977 u16 twd;
3978 u16 fop;
3979 u64 rip;
3980 u64 rdp;
3981 u32 mxcsr;
3982 u32 mxcsr_mask;
3983 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
3984#ifdef CONFIG_X86_64
3985 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
3986#else
3987 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
3988#endif
3989};
3990
8b006791
ZX		 3991/*
3992 * Translate a guest virtual address to a guest physical address.
3993 */
3994int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
3995 struct kvm_translation *tr)
3996{
3997 unsigned long vaddr = tr->linear_address;
3998 gpa_t gpa;
3999
4000 vcpu_load(vcpu);
72dc67a6 4001 down_read(&vcpu->kvm->slots_lock);
ad312c7c 4002 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
72dc67a6 4003 up_read(&vcpu->kvm->slots_lock);
8b006791
ZX		 4004 tr->physical_address = gpa;
4005 tr->valid = gpa != UNMAPPED_GVA;
4006 tr->writeable = 1;
4007 tr->usermode = 0;
8b006791
ZX		 4008 vcpu_put(vcpu);
4009
4010 return 0;
4011}
4012
d0752060
HB		 4013int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4014{
ad312c7c 4015 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
d0752060
HB		 4016
4017 vcpu_load(vcpu);
4018
4019 memcpy(fpu->fpr, fxsave->st_space, 128);
4020 fpu->fcw = fxsave->cwd;
4021 fpu->fsw = fxsave->swd;
4022 fpu->ftwx = fxsave->twd;
4023 fpu->last_opcode = fxsave->fop;
4024 fpu->last_ip = fxsave->rip;
4025 fpu->last_dp = fxsave->rdp;
4026 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
4027
4028 vcpu_put(vcpu);
4029
4030 return 0;
4031}
4032
4033int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4034{
ad312c7c 4035 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
d0752060
HB		 4036
4037 vcpu_load(vcpu);
4038
4039 memcpy(fxsave->st_space, fpu->fpr, 128);
4040 fxsave->cwd = fpu->fcw;
4041 fxsave->swd = fpu->fsw;
4042 fxsave->twd = fpu->ftwx;
4043 fxsave->fop = fpu->last_opcode;
4044 fxsave->rip = fpu->last_ip;
4045 fxsave->rdp = fpu->last_dp;
4046 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4047
4048 vcpu_put(vcpu);
4049
4050 return 0;
4051}
4052
4053void fx_init(struct kvm_vcpu *vcpu)
4054{
4055 unsigned after_mxcsr_mask;
4056
bc1a34f1
AA		 4057 /*
4058 * Touch the fpu the first time in non atomic context as if
4059 * this is the first fpu instruction the exception handler
4060 * will fire before the instruction returns and it'll have to
4061 * allocate ram with GFP_KERNEL.
4062 */
4063 if (!used_math())
d6e88aec 4064 kvm_fx_save(&vcpu->arch.host_fx_image);
bc1a34f1 4065
d0752060
HB		 4066 /* Initialize guest FPU by resetting ours and saving into guest's */
4067 preempt_disable();
d6e88aec
AK		 4068 kvm_fx_save(&vcpu->arch.host_fx_image);
4069 kvm_fx_finit();
4070 kvm_fx_save(&vcpu->arch.guest_fx_image);
4071 kvm_fx_restore(&vcpu->arch.host_fx_image);
d0752060
HB		 4072 preempt_enable();
4073
ad312c7c 4074 vcpu->arch.cr0 |= X86_CR0_ET;
d0752060 4075 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
ad312c7c
ZX		 4076 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4077 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
d0752060
HB		 4078 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4079}
4080EXPORT_SYMBOL_GPL(fx_init);
4081
4082void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4083{
4084 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4085 return;
4086
4087 vcpu->guest_fpu_loaded = 1;
d6e88aec
AK		 4088 kvm_fx_save(&vcpu->arch.host_fx_image);
4089 kvm_fx_restore(&vcpu->arch.guest_fx_image);
d0752060
HB		 4090}
4091EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4092
4093void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4094{
4095 if (!vcpu->guest_fpu_loaded)
4096 return;
4097
4098 vcpu->guest_fpu_loaded = 0;
d6e88aec
AK		 4099 kvm_fx_save(&vcpu->arch.guest_fx_image);
4100 kvm_fx_restore(&vcpu->arch.host_fx_image);
f096ed85 4101 ++vcpu->stat.fpu_reload;
d0752060
HB		 4102}
4103EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
e9b11c17
ZX		 4104
4105void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4106{
4107 kvm_x86_ops->vcpu_free(vcpu);
4108}
4109
4110struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4111 unsigned int id)
4112{
26e5215f
AK		 4113 return kvm_x86_ops->vcpu_create(kvm, id);
4114}
e9b11c17 4115
26e5215f
AK		 4116int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4117{
4118 int r;
e9b11c17
ZX		 4119
4120 /* We do fxsave: this must be aligned. */
ad312c7c 4121 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
e9b11c17
ZX		 4122
4123 vcpu_load(vcpu);
4124 r = kvm_arch_vcpu_reset(vcpu);
4125 if (r == 0)
4126 r = kvm_mmu_setup(vcpu);
4127 vcpu_put(vcpu);
4128 if (r < 0)
4129 goto free_vcpu;
4130
26e5215f 4131 return 0;
e9b11c17
ZX		 4132free_vcpu:
4133 kvm_x86_ops->vcpu_free(vcpu);
26e5215f 4134 return r;
e9b11c17
ZX		 4135}
4136
d40ccc62 4137void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
e9b11c17
ZX		 4138{
4139 vcpu_load(vcpu);
4140 kvm_mmu_unload(vcpu);
4141 vcpu_put(vcpu);
4142
4143 kvm_x86_ops->vcpu_free(vcpu);
4144}
4145
4146int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4147{
4148 return kvm_x86_ops->vcpu_reset(vcpu);
4149}
4150
4151void kvm_arch_hardware_enable(void *garbage)
4152{
4153 kvm_x86_ops->hardware_enable(garbage);
4154}
4155
4156void kvm_arch_hardware_disable(void *garbage)
4157{
4158 kvm_x86_ops->hardware_disable(garbage);
4159}
4160
4161int kvm_arch_hardware_setup(void)
4162{
4163 return kvm_x86_ops->hardware_setup();
4164}
4165
4166void kvm_arch_hardware_unsetup(void)
4167{
4168 kvm_x86_ops->hardware_unsetup();
4169}
4170
4171void kvm_arch_check_processor_compat(void *rtn)
4172{
4173 kvm_x86_ops->check_processor_compatibility(rtn);
4174}
4175
4176int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4177{
4178 struct page *page;
4179 struct kvm *kvm;
4180 int r;
4181
4182 BUG_ON(vcpu->kvm == NULL);
4183 kvm = vcpu->kvm;
4184
ad312c7c 4185 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
e9b11c17 4186 if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
a4535290 4187 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
e9b11c17 4188 else
a4535290 4189 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
e9b11c17
ZX		 4190
4191 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4192 if (!page) {
4193 r = -ENOMEM;
4194 goto fail;
4195 }
ad312c7c 4196 vcpu->arch.pio_data = page_address(page);
e9b11c17
ZX		 4197
4198 r = kvm_mmu_create(vcpu);
4199 if (r < 0)
4200 goto fail_free_pio_data;
4201
4202 if (irqchip_in_kernel(kvm)) {
4203 r = kvm_create_lapic(vcpu);
4204 if (r < 0)
4205 goto fail_mmu_destroy;
4206 }
4207
4208 return 0;
4209
4210fail_mmu_destroy:
4211 kvm_mmu_destroy(vcpu);
4212fail_free_pio_data:
ad312c7c 4213 free_page((unsigned long)vcpu->arch.pio_data);
e9b11c17
ZX		 4214fail:
4215 return r;
4216}
4217
4218void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4219{
4220 kvm_free_lapic(vcpu);
3200f405 4221 down_read(&vcpu->kvm->slots_lock);
e9b11c17 4222 kvm_mmu_destroy(vcpu);
3200f405 4223 up_read(&vcpu->kvm->slots_lock);
ad312c7c 4224 free_page((unsigned long)vcpu->arch.pio_data);
e9b11c17 4225}
d19a9cd2
ZX		 4226
4227struct kvm *kvm_arch_create_vm(void)
4228{
4229 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4230
4231 if (!kvm)
4232 return ERR_PTR(-ENOMEM);
4233
f05e70ac 4234 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4d5c5d0f 4235 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
d19a9cd2
ZX		 4236
4237 return kvm;
4238}
4239
4240static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4241{
4242 vcpu_load(vcpu);
4243 kvm_mmu_unload(vcpu);
4244 vcpu_put(vcpu);
4245}
4246
4247static void kvm_free_vcpus(struct kvm *kvm)
4248{
4249 unsigned int i;
4250
4251 /*
4252 * Unpin any mmu pages first.
4253 */
4254 for (i = 0; i < KVM_MAX_VCPUS; ++i)
4255 if (kvm->vcpus[i])
4256 kvm_unload_vcpu_mmu(kvm->vcpus[i]);
4257 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
4258 if (kvm->vcpus[i]) {
4259 kvm_arch_vcpu_free(kvm->vcpus[i]);
4260 kvm->vcpus[i] = NULL;
4261 }
4262 }
4263
4264}
4265
4266void kvm_arch_destroy_vm(struct kvm *kvm)
4267{
4d5c5d0f 4268 kvm_free_assigned_devices(kvm);
7837699f 4269 kvm_free_pit(kvm);
d7deeeb0
ZX		 4270 kfree(kvm->arch.vpic);
4271 kfree(kvm->arch.vioapic);
d19a9cd2
ZX		 4272 kvm_free_vcpus(kvm);
4273 kvm_free_physmem(kvm);
3d45830c
AK		 4274 if (kvm->arch.apic_access_page)
4275 put_page(kvm->arch.apic_access_page);
b7ebfb05
SY		 4276 if (kvm->arch.ept_identity_pagetable)
4277 put_page(kvm->arch.ept_identity_pagetable);
d19a9cd2
ZX		 4278 kfree(kvm);
4279}
0de10343
ZX		 4280
4281int kvm_arch_set_memory_region(struct kvm *kvm,
4282 struct kvm_userspace_memory_region *mem,
4283 struct kvm_memory_slot old,
4284 int user_alloc)
4285{
4286 int npages = mem->memory_size >> PAGE_SHIFT;
4287 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4288
4289 /*To keep backward compatibility with older userspace,
4290 *x86 needs to hanlde !user_alloc case.
4291 */
4292 if (!user_alloc) {
4293 if (npages && !old.rmap) {
604b38ac
AA		 4294 unsigned long userspace_addr;
4295
72dc67a6 4296 down_write(&current->mm->mmap_sem);
604b38ac
AA		 4297 userspace_addr = do_mmap(NULL, 0,
4298 npages * PAGE_SIZE,
4299 PROT_READ | PROT_WRITE,
acee3c04 4300 MAP_PRIVATE | MAP_ANONYMOUS,
604b38ac 4301 0);
72dc67a6 4302 up_write(&current->mm->mmap_sem);
0de10343 4303
604b38ac
AA		 4304 if (IS_ERR((void *)userspace_addr))
4305 return PTR_ERR((void *)userspace_addr);
4306
4307 /* set userspace_addr atomically for kvm_hva_to_rmapp */
4308 spin_lock(&kvm->mmu_lock);
4309 memslot->userspace_addr = userspace_addr;
4310 spin_unlock(&kvm->mmu_lock);
0de10343
ZX		 4311 } else {
4312 if (!old.user_alloc && old.rmap) {
4313 int ret;
4314
72dc67a6 4315 down_write(&current->mm->mmap_sem);
0de10343
ZX		 4316 ret = do_munmap(current->mm, old.userspace_addr,
4317 old.npages * PAGE_SIZE);
72dc67a6 4318 up_write(&current->mm->mmap_sem);
0de10343
ZX		 4319 if (ret < 0)
4320 printk(KERN_WARNING
4321 "kvm_vm_ioctl_set_memory_region: "
4322 "failed to munmap memory\n");
4323 }
4324 }
4325 }
4326
f05e70ac 4327 if (!kvm->arch.n_requested_mmu_pages) {
0de10343
ZX		 4328 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4329 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4330 }
4331
4332 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4333 kvm_flush_remote_tlbs(kvm);
4334
4335 return 0;
4336}
1d737c8a 4337
34d4cb8f
MT		 4338void kvm_arch_flush_shadow(struct kvm *kvm)
4339{
4340 kvm_mmu_zap_all(kvm);
4341}
4342
1d737c8a
ZX		 4343int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4344{
a4535290
AK		 4345 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4346 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED;
1d737c8a 4347}
5736199a
ZX		 4348
4349static void vcpu_kick_intr(void *info)
4350{
4351#ifdef DEBUG
4352 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
4353 printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
4354#endif
4355}
4356
4357void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4358{
4359 int ipi_pcpu = vcpu->cpu;
e9571ed5 4360 int cpu = get_cpu();
5736199a
ZX		 4361
4362 if (waitqueue_active(&vcpu->wq)) {
4363 wake_up_interruptible(&vcpu->wq);
4364 ++vcpu->stat.halt_wakeup;
4365 }
e9571ed5
MT		 4366 /*
4367 * We may be called synchronously with irqs disabled in guest mode,
4368 * So need not to call smp_call_function_single() in that case.
4369 */
4370 if (vcpu->guest_mode && vcpu->cpu != cpu)
8691e5a8 4371 smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0);
e9571ed5 4372 put_cpu();
5736199a 4373}
Linux kernel - Deliverables
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