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KVM: Reduce stack usage in kvm_vcpu_ioctl()
[deliverable/linux.git] / arch / x86 / kvm / x86.c
CommitLineData
043405e1
CO		 1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * derived from drivers/kvm/kvm_main.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
4d5c5d0f
BAY		 7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
043405e1
CO		 9 *
10 * Authors:
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
4d5c5d0f
BAY		 13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
043405e1
CO		 15 *
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
18 *
19 */
20
edf88417 21#include <linux/kvm_host.h>
313a3dc7 22#include "irq.h"
1d737c8a 23#include "mmu.h"
7837699f 24#include "i8254.h"
37817f29 25#include "tss.h"
5fdbf976 26#include "kvm_cache_regs.h"
26eef70c 27#include "x86.h"
313a3dc7 28
18068523 29#include <linux/clocksource.h>
4d5c5d0f 30#include <linux/interrupt.h>
313a3dc7
CO		 31#include <linux/kvm.h>
32#include <linux/fs.h>
4d5c5d0f 33#include <linux/pci.h>
313a3dc7 34#include <linux/vmalloc.h>
5fb76f9b 35#include <linux/module.h>
0de10343 36#include <linux/mman.h>
2bacc55c 37#include <linux/highmem.h>
043405e1
CO		 38
39#include <asm/uaccess.h>
d825ed0a 40#include <asm/msr.h>
a5f61300 41#include <asm/desc.h>
043405e1 42
313a3dc7 43#define MAX_IO_MSRS 256
a03490ed
CO		 44#define CR0_RESERVED_BITS \
45 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
46 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
47 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
48#define CR4_RESERVED_BITS \
49 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
50 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
51 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
52 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
53
54#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
50a37eb4
JR		 55/* EFER defaults:
56 * - enable syscall per default because its emulated by KVM
57 * - enable LME and LMA per default on 64 bit KVM
58 */
59#ifdef CONFIG_X86_64
60static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
61#else
62static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
63#endif
313a3dc7 64
ba1389b7
AK		 65#define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
66#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
417bc304 67
674eea0f
AK		 68static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
69 struct kvm_cpuid_entry2 __user *entries);
70
97896d04 71struct kvm_x86_ops *kvm_x86_ops;
5fdbf976 72EXPORT_SYMBOL_GPL(kvm_x86_ops);
97896d04 73
417bc304 74struct kvm_stats_debugfs_item debugfs_entries[] = {
ba1389b7
AK		 75 { "pf_fixed", VCPU_STAT(pf_fixed) },
76 { "pf_guest", VCPU_STAT(pf_guest) },
77 { "tlb_flush", VCPU_STAT(tlb_flush) },
78 { "invlpg", VCPU_STAT(invlpg) },
79 { "exits", VCPU_STAT(exits) },
80 { "io_exits", VCPU_STAT(io_exits) },
81 { "mmio_exits", VCPU_STAT(mmio_exits) },
82 { "signal_exits", VCPU_STAT(signal_exits) },
83 { "irq_window", VCPU_STAT(irq_window_exits) },
f08864b4 84 { "nmi_window", VCPU_STAT(nmi_window_exits) },
ba1389b7
AK		 85 { "halt_exits", VCPU_STAT(halt_exits) },
86 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
f11c3a8d 87 { "hypercalls", VCPU_STAT(hypercalls) },
ba1389b7
AK		 88 { "request_irq", VCPU_STAT(request_irq_exits) },
89 { "irq_exits", VCPU_STAT(irq_exits) },
90 { "host_state_reload", VCPU_STAT(host_state_reload) },
91 { "efer_reload", VCPU_STAT(efer_reload) },
92 { "fpu_reload", VCPU_STAT(fpu_reload) },
93 { "insn_emulation", VCPU_STAT(insn_emulation) },
94 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
4cee5764
AK		 95 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
96 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
97 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
98 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
99 { "mmu_flooded", VM_STAT(mmu_flooded) },
100 { "mmu_recycled", VM_STAT(mmu_recycled) },
dfc5aa00 101 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
0f74a24c 102 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
05da4558 103 { "largepages", VM_STAT(lpages) },
417bc304
HB		 104 { NULL }
105};
106
4d5c5d0f
BAY		 107struct kvm_assigned_dev_kernel *kvm_find_assigned_dev(struct list_head *head,
108 int assigned_dev_id)
109{
110 struct list_head *ptr;
111 struct kvm_assigned_dev_kernel *match;
112
113 list_for_each(ptr, head) {
114 match = list_entry(ptr, struct kvm_assigned_dev_kernel, list);
115 if (match->assigned_dev_id == assigned_dev_id)
116 return match;
117 }
118 return NULL;
119}
120
121static void kvm_assigned_dev_interrupt_work_handler(struct work_struct *work)
122{
123 struct kvm_assigned_dev_kernel *assigned_dev;
124
125 assigned_dev = container_of(work, struct kvm_assigned_dev_kernel,
126 interrupt_work);
127
128 /* This is taken to safely inject irq inside the guest. When
129 * the interrupt injection (or the ioapic code) uses a
130 * finer-grained lock, update this
131 */
132 mutex_lock(&assigned_dev->kvm->lock);
133 kvm_set_irq(assigned_dev->kvm,
134 assigned_dev->guest_irq, 1);
135 mutex_unlock(&assigned_dev->kvm->lock);
136 kvm_put_kvm(assigned_dev->kvm);
137}
138
139/* FIXME: Implement the OR logic needed to make shared interrupts on
140 * this line behave properly
141 */
142static irqreturn_t kvm_assigned_dev_intr(int irq, void *dev_id)
143{
144 struct kvm_assigned_dev_kernel *assigned_dev =
145 (struct kvm_assigned_dev_kernel *) dev_id;
146
147 kvm_get_kvm(assigned_dev->kvm);
148 schedule_work(&assigned_dev->interrupt_work);
149 disable_irq_nosync(irq);
150 return IRQ_HANDLED;
151}
152
153/* Ack the irq line for an assigned device */
154static void kvm_assigned_dev_ack_irq(struct kvm_irq_ack_notifier *kian)
155{
156 struct kvm_assigned_dev_kernel *dev;
157
158 if (kian->gsi == -1)
159 return;
160
161 dev = container_of(kian, struct kvm_assigned_dev_kernel,
162 ack_notifier);
163 kvm_set_irq(dev->kvm, dev->guest_irq, 0);
164 enable_irq(dev->host_irq);
165}
166
167static int kvm_vm_ioctl_assign_irq(struct kvm *kvm,
168 struct kvm_assigned_irq
169 *assigned_irq)
170{
171 int r = 0;
172 struct kvm_assigned_dev_kernel *match;
173
174 mutex_lock(&kvm->lock);
175
176 match = kvm_find_assigned_dev(&kvm->arch.assigned_dev_head,
177 assigned_irq->assigned_dev_id);
178 if (!match) {
179 mutex_unlock(&kvm->lock);
180 return -EINVAL;
181 }
182
183 if (match->irq_requested) {
184 match->guest_irq = assigned_irq->guest_irq;
185 match->ack_notifier.gsi = assigned_irq->guest_irq;
186 mutex_unlock(&kvm->lock);
187 return 0;
188 }
189
190 INIT_WORK(&match->interrupt_work,
191 kvm_assigned_dev_interrupt_work_handler);
192
193 if (irqchip_in_kernel(kvm)) {
194 if (assigned_irq->host_irq)
195 match->host_irq = assigned_irq->host_irq;
196 else
197 match->host_irq = match->dev->irq;
198 match->guest_irq = assigned_irq->guest_irq;
199 match->ack_notifier.gsi = assigned_irq->guest_irq;
200 match->ack_notifier.irq_acked = kvm_assigned_dev_ack_irq;
201 kvm_register_irq_ack_notifier(kvm, &match->ack_notifier);
202
203 /* Even though this is PCI, we don't want to use shared
204 * interrupts. Sharing host devices with guest-assigned devices
205 * on the same interrupt line is not a happy situation: there
206 * are going to be long delays in accepting, acking, etc.
207 */
208 if (request_irq(match->host_irq, kvm_assigned_dev_intr, 0,
209 "kvm_assigned_device", (void *)match)) {
210 printk(KERN_INFO "%s: couldn't allocate irq for pv "
211 "device\n", __func__);
212 r = -EIO;
213 goto out;
214 }
215 }
216
217 match->irq_requested = true;
218out:
219 mutex_unlock(&kvm->lock);
220 return r;
221}
222
223static int kvm_vm_ioctl_assign_device(struct kvm *kvm,
224 struct kvm_assigned_pci_dev *assigned_dev)
225{
226 int r = 0;
227 struct kvm_assigned_dev_kernel *match;
228 struct pci_dev *dev;
229
230 mutex_lock(&kvm->lock);
231
232 match = kvm_find_assigned_dev(&kvm->arch.assigned_dev_head,
233 assigned_dev->assigned_dev_id);
234 if (match) {
235 /* device already assigned */
236 r = -EINVAL;
237 goto out;
238 }
239
240 match = kzalloc(sizeof(struct kvm_assigned_dev_kernel), GFP_KERNEL);
241 if (match == NULL) {
242 printk(KERN_INFO "%s: Couldn't allocate memory\n",
243 __func__);
244 r = -ENOMEM;
245 goto out;
246 }
247 dev = pci_get_bus_and_slot(assigned_dev->busnr,
248 assigned_dev->devfn);
249 if (!dev) {
250 printk(KERN_INFO "%s: host device not found\n", __func__);
251 r = -EINVAL;
252 goto out_free;
253 }
254 if (pci_enable_device(dev)) {
255 printk(KERN_INFO "%s: Could not enable PCI device\n", __func__);
256 r = -EBUSY;
257 goto out_put;
258 }
259 r = pci_request_regions(dev, "kvm_assigned_device");
260 if (r) {
261 printk(KERN_INFO "%s: Could not get access to device regions\n",
262 __func__);
263 goto out_disable;
264 }
265 match->assigned_dev_id = assigned_dev->assigned_dev_id;
266 match->host_busnr = assigned_dev->busnr;
267 match->host_devfn = assigned_dev->devfn;
268 match->dev = dev;
269
270 match->kvm = kvm;
271
272 list_add(&match->list, &kvm->arch.assigned_dev_head);
273
274out:
275 mutex_unlock(&kvm->lock);
276 return r;
277out_disable:
278 pci_disable_device(dev);
279out_put:
280 pci_dev_put(dev);
281out_free:
282 kfree(match);
283 mutex_unlock(&kvm->lock);
284 return r;
285}
286
287static void kvm_free_assigned_devices(struct kvm *kvm)
288{
289 struct list_head *ptr, *ptr2;
290 struct kvm_assigned_dev_kernel *assigned_dev;
291
292 list_for_each_safe(ptr, ptr2, &kvm->arch.assigned_dev_head) {
293 assigned_dev = list_entry(ptr,
294 struct kvm_assigned_dev_kernel,
295 list);
296
297 if (irqchip_in_kernel(kvm) && assigned_dev->irq_requested) {
298 free_irq(assigned_dev->host_irq,
299 (void *)assigned_dev);
300
301 kvm_unregister_irq_ack_notifier(kvm,
302 &assigned_dev->
303 ack_notifier);
304 }
305
306 if (cancel_work_sync(&assigned_dev->interrupt_work))
307 /* We had pending work. That means we will have to take
308 * care of kvm_put_kvm.
309 */
310 kvm_put_kvm(kvm);
311
312 pci_release_regions(assigned_dev->dev);
313 pci_disable_device(assigned_dev->dev);
314 pci_dev_put(assigned_dev->dev);
315
316 list_del(&assigned_dev->list);
317 kfree(assigned_dev);
318 }
319}
417bc304 320
5fb76f9b
CO		 321unsigned long segment_base(u16 selector)
322{
323 struct descriptor_table gdt;
a5f61300 324 struct desc_struct *d;
5fb76f9b
CO		 325 unsigned long table_base;
326 unsigned long v;
327
328 if (selector == 0)
329 return 0;
330
331 asm("sgdt %0" : "=m"(gdt));
332 table_base = gdt.base;
333
334 if (selector & 4) { /* from ldt */
335 u16 ldt_selector;
336
337 asm("sldt %0" : "=g"(ldt_selector));
338 table_base = segment_base(ldt_selector);
339 }
a5f61300
AK		 340 d = (struct desc_struct *)(table_base + (selector & ~7));
341 v = d->base0 | ((unsigned long)d->base1 << 16) |
342 ((unsigned long)d->base2 << 24);
5fb76f9b 343#ifdef CONFIG_X86_64
a5f61300
AK		 344 if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
345 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
5fb76f9b
CO		 346#endif
347 return v;
348}
349EXPORT_SYMBOL_GPL(segment_base);
350
6866b83e
CO		 351u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
352{
353 if (irqchip_in_kernel(vcpu->kvm))
ad312c7c 354 return vcpu->arch.apic_base;
6866b83e 355 else
ad312c7c 356 return vcpu->arch.apic_base;
6866b83e
CO		 357}
358EXPORT_SYMBOL_GPL(kvm_get_apic_base);
359
360void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
361{
362 /* TODO: reserve bits check */
363 if (irqchip_in_kernel(vcpu->kvm))
364 kvm_lapic_set_base(vcpu, data);
365 else
ad312c7c 366 vcpu->arch.apic_base = data;
6866b83e
CO		 367}
368EXPORT_SYMBOL_GPL(kvm_set_apic_base);
369
298101da
AK		 370void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
371{
ad312c7c
ZX		 372 WARN_ON(vcpu->arch.exception.pending);
373 vcpu->arch.exception.pending = true;
374 vcpu->arch.exception.has_error_code = false;
375 vcpu->arch.exception.nr = nr;
298101da
AK		 376}
377EXPORT_SYMBOL_GPL(kvm_queue_exception);
378
c3c91fee
AK		 379void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
380 u32 error_code)
381{
382 ++vcpu->stat.pf_guest;
71c4dfaf
JR		 383 if (vcpu->arch.exception.pending) {
384 if (vcpu->arch.exception.nr == PF_VECTOR) {
385 printk(KERN_DEBUG "kvm: inject_page_fault:"
386 " double fault 0x%lx\n", addr);
387 vcpu->arch.exception.nr = DF_VECTOR;
388 vcpu->arch.exception.error_code = 0;
389 } else if (vcpu->arch.exception.nr == DF_VECTOR) {
390 /* triple fault -> shutdown */
391 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
392 }
c3c91fee
AK		 393 return;
394 }
ad312c7c 395 vcpu->arch.cr2 = addr;
c3c91fee
AK		 396 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
397}
398
3419ffc8
SY		 399void kvm_inject_nmi(struct kvm_vcpu *vcpu)
400{
401 vcpu->arch.nmi_pending = 1;
402}
403EXPORT_SYMBOL_GPL(kvm_inject_nmi);
404
298101da
AK		 405void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
406{
ad312c7c
ZX		 407 WARN_ON(vcpu->arch.exception.pending);
408 vcpu->arch.exception.pending = true;
409 vcpu->arch.exception.has_error_code = true;
410 vcpu->arch.exception.nr = nr;
411 vcpu->arch.exception.error_code = error_code;
298101da
AK		 412}
413EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
414
415static void __queue_exception(struct kvm_vcpu *vcpu)
416{
ad312c7c
ZX		 417 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
418 vcpu->arch.exception.has_error_code,
419 vcpu->arch.exception.error_code);
298101da
AK		 420}
421
a03490ed
CO		 422/*
423 * Load the pae pdptrs. Return true is they are all valid.
424 */
425int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
426{
427 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
428 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
429 int i;
430 int ret;
ad312c7c 431 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
a03490ed 432
a03490ed
CO		 433 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
434 offset * sizeof(u64), sizeof(pdpte));
435 if (ret < 0) {
436 ret = 0;
437 goto out;
438 }
439 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
440 if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
441 ret = 0;
442 goto out;
443 }
444 }
445 ret = 1;
446
ad312c7c 447 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
a03490ed 448out:
a03490ed
CO		 449
450 return ret;
451}
cc4b6871 452EXPORT_SYMBOL_GPL(load_pdptrs);
a03490ed 453
d835dfec
AK		 454static bool pdptrs_changed(struct kvm_vcpu *vcpu)
455{
ad312c7c 456 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
d835dfec
AK		 457 bool changed = true;
458 int r;
459
460 if (is_long_mode(vcpu) || !is_pae(vcpu))
461 return false;
462
ad312c7c 463 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
d835dfec
AK		 464 if (r < 0)
465 goto out;
ad312c7c 466 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
d835dfec 467out:
d835dfec
AK		 468
469 return changed;
470}
471
2d3ad1f4 472void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
a03490ed
CO		 473{
474 if (cr0 & CR0_RESERVED_BITS) {
475 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
ad312c7c 476 cr0, vcpu->arch.cr0);
c1a5d4f9 477 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 478 return;
479 }
480
481 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
482 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
c1a5d4f9 483 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 484 return;
485 }
486
487 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
488 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
489 "and a clear PE flag\n");
c1a5d4f9 490 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 491 return;
492 }
493
494 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
495#ifdef CONFIG_X86_64
ad312c7c 496 if ((vcpu->arch.shadow_efer & EFER_LME)) {
a03490ed
CO		 497 int cs_db, cs_l;
498
499 if (!is_pae(vcpu)) {
500 printk(KERN_DEBUG "set_cr0: #GP, start paging "
501 "in long mode while PAE is disabled\n");
c1a5d4f9 502 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 503 return;
504 }
505 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
506 if (cs_l) {
507 printk(KERN_DEBUG "set_cr0: #GP, start paging "
508 "in long mode while CS.L == 1\n");
c1a5d4f9 509 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 510 return;
511
512 }
513 } else
514#endif
ad312c7c 515 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
a03490ed
CO		 516 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
517 "reserved bits\n");
c1a5d4f9 518 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 519 return;
520 }
521
522 }
523
524 kvm_x86_ops->set_cr0(vcpu, cr0);
ad312c7c 525 vcpu->arch.cr0 = cr0;
a03490ed 526
a03490ed 527 kvm_mmu_reset_context(vcpu);
a03490ed
CO		 528 return;
529}
2d3ad1f4 530EXPORT_SYMBOL_GPL(kvm_set_cr0);
a03490ed 531
2d3ad1f4 532void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
a03490ed 533{
2d3ad1f4 534 kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
2714d1d3
FEL		 535 KVMTRACE_1D(LMSW, vcpu,
536 (u32)((vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f)),
537 handler);
a03490ed 538}
2d3ad1f4 539EXPORT_SYMBOL_GPL(kvm_lmsw);
a03490ed 540
2d3ad1f4 541void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
a03490ed
CO		 542{
543 if (cr4 & CR4_RESERVED_BITS) {
544 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
c1a5d4f9 545 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 546 return;
547 }
548
549 if (is_long_mode(vcpu)) {
550 if (!(cr4 & X86_CR4_PAE)) {
551 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
552 "in long mode\n");
c1a5d4f9 553 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 554 return;
555 }
556 } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
ad312c7c 557 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
a03490ed 558 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
c1a5d4f9 559 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 560 return;
561 }
562
563 if (cr4 & X86_CR4_VMXE) {
564 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
c1a5d4f9 565 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 566 return;
567 }
568 kvm_x86_ops->set_cr4(vcpu, cr4);
ad312c7c 569 vcpu->arch.cr4 = cr4;
a03490ed 570 kvm_mmu_reset_context(vcpu);
a03490ed 571}
2d3ad1f4 572EXPORT_SYMBOL_GPL(kvm_set_cr4);
a03490ed 573
2d3ad1f4 574void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
a03490ed 575{
ad312c7c 576 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
d835dfec
AK		 577 kvm_mmu_flush_tlb(vcpu);
578 return;
579 }
580
a03490ed
CO		 581 if (is_long_mode(vcpu)) {
582 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
583 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
c1a5d4f9 584 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 585 return;
586 }
587 } else {
588 if (is_pae(vcpu)) {
589 if (cr3 & CR3_PAE_RESERVED_BITS) {
590 printk(KERN_DEBUG
591 "set_cr3: #GP, reserved bits\n");
c1a5d4f9 592 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 593 return;
594 }
595 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
596 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
597 "reserved bits\n");
c1a5d4f9 598 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 599 return;
600 }
601 }
602 /*
603 * We don't check reserved bits in nonpae mode, because
604 * this isn't enforced, and VMware depends on this.
605 */
606 }
607
a03490ed
CO		 608 /*
609 * Does the new cr3 value map to physical memory? (Note, we
610 * catch an invalid cr3 even in real-mode, because it would
611 * cause trouble later on when we turn on paging anyway.)
612 *
613 * A real CPU would silently accept an invalid cr3 and would
614 * attempt to use it - with largely undefined (and often hard
615 * to debug) behavior on the guest side.
616 */
617 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
c1a5d4f9 618 kvm_inject_gp(vcpu, 0);
a03490ed 619 else {
ad312c7c
ZX		 620 vcpu->arch.cr3 = cr3;
621 vcpu->arch.mmu.new_cr3(vcpu);
a03490ed 622 }
a03490ed 623}
2d3ad1f4 624EXPORT_SYMBOL_GPL(kvm_set_cr3);
a03490ed 625
2d3ad1f4 626void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
a03490ed
CO		 627{
628 if (cr8 & CR8_RESERVED_BITS) {
629 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
c1a5d4f9 630 kvm_inject_gp(vcpu, 0);
a03490ed
CO		 631 return;
632 }
633 if (irqchip_in_kernel(vcpu->kvm))
634 kvm_lapic_set_tpr(vcpu, cr8);
635 else
ad312c7c 636 vcpu->arch.cr8 = cr8;
a03490ed 637}
2d3ad1f4 638EXPORT_SYMBOL_GPL(kvm_set_cr8);
a03490ed 639
2d3ad1f4 640unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
a03490ed
CO		 641{
642 if (irqchip_in_kernel(vcpu->kvm))
643 return kvm_lapic_get_cr8(vcpu);
644 else
ad312c7c 645 return vcpu->arch.cr8;
a03490ed 646}
2d3ad1f4 647EXPORT_SYMBOL_GPL(kvm_get_cr8);
a03490ed 648
043405e1
CO		 649/*
650 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
651 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
652 *
653 * This list is modified at module load time to reflect the
654 * capabilities of the host cpu.
655 */
656static u32 msrs_to_save[] = {
657 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
658 MSR_K6_STAR,
659#ifdef CONFIG_X86_64
660 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
661#endif
18068523 662 MSR_IA32_TIME_STAMP_COUNTER, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
847f0ad8 663 MSR_IA32_PERF_STATUS,
043405e1
CO		 664};
665
666static unsigned num_msrs_to_save;
667
668static u32 emulated_msrs[] = {
669 MSR_IA32_MISC_ENABLE,
670};
671
15c4a640
CO		 672static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
673{
f2b4b7dd 674 if (efer & efer_reserved_bits) {
15c4a640
CO		 675 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
676 efer);
c1a5d4f9 677 kvm_inject_gp(vcpu, 0);
15c4a640
CO		 678 return;
679 }
680
681 if (is_paging(vcpu)
ad312c7c 682 && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
15c4a640 683 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
c1a5d4f9 684 kvm_inject_gp(vcpu, 0);
15c4a640
CO		 685 return;
686 }
687
688 kvm_x86_ops->set_efer(vcpu, efer);
689
690 efer &= ~EFER_LMA;
ad312c7c 691 efer |= vcpu->arch.shadow_efer & EFER_LMA;
15c4a640 692
ad312c7c 693 vcpu->arch.shadow_efer = efer;
15c4a640
CO		 694}
695
f2b4b7dd
JR		 696void kvm_enable_efer_bits(u64 mask)
697{
698 efer_reserved_bits &= ~mask;
699}
700EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
701
702
15c4a640
CO		 703/*
704 * Writes msr value into into the appropriate "register".
705 * Returns 0 on success, non-0 otherwise.
706 * Assumes vcpu_load() was already called.
707 */
708int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
709{
710 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
711}
712
313a3dc7
CO		 713/*
714 * Adapt set_msr() to msr_io()'s calling convention
715 */
716static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
717{
718 return kvm_set_msr(vcpu, index, *data);
719}
720
18068523
GOC		 721static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
722{
723 static int version;
50d0a0f9
GH		 724 struct pvclock_wall_clock wc;
725 struct timespec now, sys, boot;
18068523
GOC		 726
727 if (!wall_clock)
728 return;
729
730 version++;
731
18068523
GOC		 732 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
733
50d0a0f9
GH		 734 /*
735 * The guest calculates current wall clock time by adding
736 * system time (updated by kvm_write_guest_time below) to the
737 * wall clock specified here. guest system time equals host
738 * system time for us, thus we must fill in host boot time here.
739 */
740 now = current_kernel_time();
741 ktime_get_ts(&sys);
742 boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
743
744 wc.sec = boot.tv_sec;
745 wc.nsec = boot.tv_nsec;
746 wc.version = version;
18068523
GOC		 747
748 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
749
750 version++;
751 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
18068523
GOC		 752}
753
50d0a0f9
GH		 754static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
755{
756 uint32_t quotient, remainder;
757
758 /* Don't try to replace with do_div(), this one calculates
759 * "(dividend << 32) / divisor" */
760 __asm__ ( "divl %4"
761 : "=a" (quotient), "=d" (remainder)
762 : "0" (0), "1" (dividend), "r" (divisor) );
763 return quotient;
764}
765
766static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
767{
768 uint64_t nsecs = 1000000000LL;
769 int32_t shift = 0;
770 uint64_t tps64;
771 uint32_t tps32;
772
773 tps64 = tsc_khz * 1000LL;
774 while (tps64 > nsecs*2) {
775 tps64 >>= 1;
776 shift--;
777 }
778
779 tps32 = (uint32_t)tps64;
780 while (tps32 <= (uint32_t)nsecs) {
781 tps32 <<= 1;
782 shift++;
783 }
784
785 hv_clock->tsc_shift = shift;
786 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
787
788 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
789 __FUNCTION__, tsc_khz, hv_clock->tsc_shift,
790 hv_clock->tsc_to_system_mul);
791}
792
18068523
GOC		 793static void kvm_write_guest_time(struct kvm_vcpu *v)
794{
795 struct timespec ts;
796 unsigned long flags;
797 struct kvm_vcpu_arch *vcpu = &v->arch;
798 void *shared_kaddr;
799
800 if ((!vcpu->time_page))
801 return;
802
50d0a0f9
GH		 803 if (unlikely(vcpu->hv_clock_tsc_khz != tsc_khz)) {
804 kvm_set_time_scale(tsc_khz, &vcpu->hv_clock);
805 vcpu->hv_clock_tsc_khz = tsc_khz;
806 }
807
18068523
GOC		 808 /* Keep irq disabled to prevent changes to the clock */
809 local_irq_save(flags);
810 kvm_get_msr(v, MSR_IA32_TIME_STAMP_COUNTER,
811 &vcpu->hv_clock.tsc_timestamp);
812 ktime_get_ts(&ts);
813 local_irq_restore(flags);
814
815 /* With all the info we got, fill in the values */
816
817 vcpu->hv_clock.system_time = ts.tv_nsec +
818 (NSEC_PER_SEC * (u64)ts.tv_sec);
819 /*
820 * The interface expects us to write an even number signaling that the
821 * update is finished. Since the guest won't see the intermediate
50d0a0f9 822 * state, we just increase by 2 at the end.
18068523 823 */
50d0a0f9 824 vcpu->hv_clock.version += 2;
18068523
GOC		 825
826 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
827
828 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
50d0a0f9 829 sizeof(vcpu->hv_clock));
18068523
GOC		 830
831 kunmap_atomic(shared_kaddr, KM_USER0);
832
833 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
834}
835
9ba075a6
AK		 836static bool msr_mtrr_valid(unsigned msr)
837{
838 switch (msr) {
839 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
840 case MSR_MTRRfix64K_00000:
841 case MSR_MTRRfix16K_80000:
842 case MSR_MTRRfix16K_A0000:
843 case MSR_MTRRfix4K_C0000:
844 case MSR_MTRRfix4K_C8000:
845 case MSR_MTRRfix4K_D0000:
846 case MSR_MTRRfix4K_D8000:
847 case MSR_MTRRfix4K_E0000:
848 case MSR_MTRRfix4K_E8000:
849 case MSR_MTRRfix4K_F0000:
850 case MSR_MTRRfix4K_F8000:
851 case MSR_MTRRdefType:
852 case MSR_IA32_CR_PAT:
853 return true;
854 case 0x2f8:
855 return true;
856 }
857 return false;
858}
859
860static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
861{
862 if (!msr_mtrr_valid(msr))
863 return 1;
864
865 vcpu->arch.mtrr[msr - 0x200] = data;
866 return 0;
867}
15c4a640
CO		 868
869int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
870{
871 switch (msr) {
15c4a640
CO		 872 case MSR_EFER:
873 set_efer(vcpu, data);
874 break;
15c4a640
CO		 875 case MSR_IA32_MC0_STATUS:
876 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
b8688d51 877 __func__, data);
15c4a640
CO		 878 break;
879 case MSR_IA32_MCG_STATUS:
880 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
b8688d51 881 __func__, data);
15c4a640 882 break;
c7ac679c
JR		 883 case MSR_IA32_MCG_CTL:
884 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
b8688d51 885 __func__, data);
c7ac679c 886 break;
b5e2fec0
AG		 887 case MSR_IA32_DEBUGCTLMSR:
888 if (!data) {
889 /* We support the non-activated case already */
890 break;
891 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
892 /* Values other than LBR and BTF are vendor-specific,
893 thus reserved and should throw a #GP */
894 return 1;
895 }
896 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
897 __func__, data);
898 break;
15c4a640
CO		 899 case MSR_IA32_UCODE_REV:
900 case MSR_IA32_UCODE_WRITE:
15c4a640 901 break;
9ba075a6
AK		 902 case 0x200 ... 0x2ff:
903 return set_msr_mtrr(vcpu, msr, data);
15c4a640
CO		 904 case MSR_IA32_APICBASE:
905 kvm_set_apic_base(vcpu, data);
906 break;
907 case MSR_IA32_MISC_ENABLE:
ad312c7c 908 vcpu->arch.ia32_misc_enable_msr = data;
15c4a640 909 break;
18068523
GOC		 910 case MSR_KVM_WALL_CLOCK:
911 vcpu->kvm->arch.wall_clock = data;
912 kvm_write_wall_clock(vcpu->kvm, data);
913 break;
914 case MSR_KVM_SYSTEM_TIME: {
915 if (vcpu->arch.time_page) {
916 kvm_release_page_dirty(vcpu->arch.time_page);
917 vcpu->arch.time_page = NULL;
918 }
919
920 vcpu->arch.time = data;
921
922 /* we verify if the enable bit is set... */
923 if (!(data & 1))
924 break;
925
926 /* ...but clean it before doing the actual write */
927 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
928
18068523 929 down_read(&current->mm->mmap_sem);
18068523
GOC		 930 vcpu->arch.time_page =
931 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
18068523
GOC		 932 up_read(&current->mm->mmap_sem);
933
934 if (is_error_page(vcpu->arch.time_page)) {
935 kvm_release_page_clean(vcpu->arch.time_page);
936 vcpu->arch.time_page = NULL;
937 }
938
939 kvm_write_guest_time(vcpu);
940 break;
941 }
15c4a640 942 default:
565f1fbd 943 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
15c4a640
CO		 944 return 1;
945 }
946 return 0;
947}
948EXPORT_SYMBOL_GPL(kvm_set_msr_common);
949
950
951/*
952 * Reads an msr value (of 'msr_index') into 'pdata'.
953 * Returns 0 on success, non-0 otherwise.
954 * Assumes vcpu_load() was already called.
955 */
956int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
957{
958 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
959}
960
9ba075a6
AK		 961static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
962{
963 if (!msr_mtrr_valid(msr))
964 return 1;
965
966 *pdata = vcpu->arch.mtrr[msr - 0x200];
967 return 0;
968}
969
15c4a640
CO		 970int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
971{
972 u64 data;
973
974 switch (msr) {
975 case 0xc0010010: /* SYSCFG */
976 case 0xc0010015: /* HWCR */
977 case MSR_IA32_PLATFORM_ID:
978 case MSR_IA32_P5_MC_ADDR:
979 case MSR_IA32_P5_MC_TYPE:
980 case MSR_IA32_MC0_CTL:
981 case MSR_IA32_MCG_STATUS:
982 case MSR_IA32_MCG_CAP:
c7ac679c 983 case MSR_IA32_MCG_CTL:
15c4a640
CO		 984 case MSR_IA32_MC0_MISC:
985 case MSR_IA32_MC0_MISC+4:
986 case MSR_IA32_MC0_MISC+8:
987 case MSR_IA32_MC0_MISC+12:
988 case MSR_IA32_MC0_MISC+16:
989 case MSR_IA32_UCODE_REV:
15c4a640 990 case MSR_IA32_EBL_CR_POWERON:
b5e2fec0
AG		 991 case MSR_IA32_DEBUGCTLMSR:
992 case MSR_IA32_LASTBRANCHFROMIP:
993 case MSR_IA32_LASTBRANCHTOIP:
994 case MSR_IA32_LASTINTFROMIP:
995 case MSR_IA32_LASTINTTOIP:
15c4a640
CO		 996 data = 0;
997 break;
9ba075a6
AK		 998 case MSR_MTRRcap:
999 data = 0x500 | KVM_NR_VAR_MTRR;
1000 break;
1001 case 0x200 ... 0x2ff:
1002 return get_msr_mtrr(vcpu, msr, pdata);
15c4a640
CO		 1003 case 0xcd: /* fsb frequency */
1004 data = 3;
1005 break;
1006 case MSR_IA32_APICBASE:
1007 data = kvm_get_apic_base(vcpu);
1008 break;
1009 case MSR_IA32_MISC_ENABLE:
ad312c7c 1010 data = vcpu->arch.ia32_misc_enable_msr;
15c4a640 1011 break;
847f0ad8
AG		 1012 case MSR_IA32_PERF_STATUS:
1013 /* TSC increment by tick */
1014 data = 1000ULL;
1015 /* CPU multiplier */
1016 data |= (((uint64_t)4ULL) << 40);
1017 break;
15c4a640 1018 case MSR_EFER:
ad312c7c 1019 data = vcpu->arch.shadow_efer;
15c4a640 1020 break;
18068523
GOC		 1021 case MSR_KVM_WALL_CLOCK:
1022 data = vcpu->kvm->arch.wall_clock;
1023 break;
1024 case MSR_KVM_SYSTEM_TIME:
1025 data = vcpu->arch.time;
1026 break;
15c4a640
CO		 1027 default:
1028 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1029 return 1;
1030 }
1031 *pdata = data;
1032 return 0;
1033}
1034EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1035
313a3dc7
CO		 1036/*
1037 * Read or write a bunch of msrs. All parameters are kernel addresses.
1038 *
1039 * @return number of msrs set successfully.
1040 */
1041static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1042 struct kvm_msr_entry *entries,
1043 int (*do_msr)(struct kvm_vcpu *vcpu,
1044 unsigned index, u64 *data))
1045{
1046 int i;
1047
1048 vcpu_load(vcpu);
1049
3200f405 1050 down_read(&vcpu->kvm->slots_lock);
313a3dc7
CO		 1051 for (i = 0; i < msrs->nmsrs; ++i)
1052 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1053 break;
3200f405 1054 up_read(&vcpu->kvm->slots_lock);
313a3dc7
CO		 1055
1056 vcpu_put(vcpu);
1057
1058 return i;
1059}
1060
1061/*
1062 * Read or write a bunch of msrs. Parameters are user addresses.
1063 *
1064 * @return number of msrs set successfully.
1065 */
1066static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1067 int (*do_msr)(struct kvm_vcpu *vcpu,
1068 unsigned index, u64 *data),
1069 int writeback)
1070{
1071 struct kvm_msrs msrs;
1072 struct kvm_msr_entry *entries;
1073 int r, n;
1074 unsigned size;
1075
1076 r = -EFAULT;
1077 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1078 goto out;
1079
1080 r = -E2BIG;
1081 if (msrs.nmsrs >= MAX_IO_MSRS)
1082 goto out;
1083
1084 r = -ENOMEM;
1085 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1086 entries = vmalloc(size);
1087 if (!entries)
1088 goto out;
1089
1090 r = -EFAULT;
1091 if (copy_from_user(entries, user_msrs->entries, size))
1092 goto out_free;
1093
1094 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1095 if (r < 0)
1096 goto out_free;
1097
1098 r = -EFAULT;
1099 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1100 goto out_free;
1101
1102 r = n;
1103
1104out_free:
1105 vfree(entries);
1106out:
1107 return r;
1108}
1109
018d00d2
ZX		 1110int kvm_dev_ioctl_check_extension(long ext)
1111{
1112 int r;
1113
1114 switch (ext) {
1115 case KVM_CAP_IRQCHIP:
1116 case KVM_CAP_HLT:
1117 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1118 case KVM_CAP_USER_MEMORY:
1119 case KVM_CAP_SET_TSS_ADDR:
07716717 1120 case KVM_CAP_EXT_CPUID:
18068523 1121 case KVM_CAP_CLOCKSOURCE:
7837699f 1122 case KVM_CAP_PIT:
a28e4f5a 1123 case KVM_CAP_NOP_IO_DELAY:
62d9f0db 1124 case KVM_CAP_MP_STATE:
ed848624 1125 case KVM_CAP_SYNC_MMU:
018d00d2
ZX		 1126 r = 1;
1127 break;
542472b5
LV		 1128 case KVM_CAP_COALESCED_MMIO:
1129 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1130 break;
774ead3a
AK		 1131 case KVM_CAP_VAPIC:
1132 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1133 break;
f725230a
AK		 1134 case KVM_CAP_NR_VCPUS:
1135 r = KVM_MAX_VCPUS;
1136 break;
a988b910
AK		 1137 case KVM_CAP_NR_MEMSLOTS:
1138 r = KVM_MEMORY_SLOTS;
1139 break;
2f333bcb
MT		 1140 case KVM_CAP_PV_MMU:
1141 r = !tdp_enabled;
1142 break;
018d00d2
ZX		 1143 default:
1144 r = 0;
1145 break;
1146 }
1147 return r;
1148
1149}
1150
043405e1
CO		 1151long kvm_arch_dev_ioctl(struct file *filp,
1152 unsigned int ioctl, unsigned long arg)
1153{
1154 void __user *argp = (void __user *)arg;
1155 long r;
1156
1157 switch (ioctl) {
1158 case KVM_GET_MSR_INDEX_LIST: {
1159 struct kvm_msr_list __user *user_msr_list = argp;
1160 struct kvm_msr_list msr_list;
1161 unsigned n;
1162
1163 r = -EFAULT;
1164 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1165 goto out;
1166 n = msr_list.nmsrs;
1167 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1168 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1169 goto out;
1170 r = -E2BIG;
1171 if (n < num_msrs_to_save)
1172 goto out;
1173 r = -EFAULT;
1174 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1175 num_msrs_to_save * sizeof(u32)))
1176 goto out;
1177 if (copy_to_user(user_msr_list->indices
1178 + num_msrs_to_save * sizeof(u32),
1179 &emulated_msrs,
1180 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1181 goto out;
1182 r = 0;
1183 break;
1184 }
674eea0f
AK		 1185 case KVM_GET_SUPPORTED_CPUID: {
1186 struct kvm_cpuid2 __user *cpuid_arg = argp;
1187 struct kvm_cpuid2 cpuid;
1188
1189 r = -EFAULT;
1190 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1191 goto out;
1192 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1193 cpuid_arg->entries);
1194 if (r)
1195 goto out;
1196
1197 r = -EFAULT;
1198 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1199 goto out;
1200 r = 0;
1201 break;
1202 }
043405e1
CO		 1203 default:
1204 r = -EINVAL;
1205 }
1206out:
1207 return r;
1208}
1209
313a3dc7
CO		 1210void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1211{
1212 kvm_x86_ops->vcpu_load(vcpu, cpu);
18068523 1213 kvm_write_guest_time(vcpu);
313a3dc7
CO		 1214}
1215
1216void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1217{
1218 kvm_x86_ops->vcpu_put(vcpu);
9327fd11 1219 kvm_put_guest_fpu(vcpu);
313a3dc7
CO		 1220}
1221
07716717 1222static int is_efer_nx(void)
313a3dc7
CO		 1223{
1224 u64 efer;
313a3dc7
CO		 1225
1226 rdmsrl(MSR_EFER, efer);
07716717
DK		 1227 return efer & EFER_NX;
1228}
1229
1230static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1231{
1232 int i;
1233 struct kvm_cpuid_entry2 *e, *entry;
1234
313a3dc7 1235 entry = NULL;
ad312c7c
ZX		 1236 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1237 e = &vcpu->arch.cpuid_entries[i];
313a3dc7
CO		 1238 if (e->function == 0x80000001) {
1239 entry = e;
1240 break;
1241 }
1242 }
07716717 1243 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
313a3dc7
CO		 1244 entry->edx &= ~(1 << 20);
1245 printk(KERN_INFO "kvm: guest NX capability removed\n");
1246 }
1247}
1248
07716717 1249/* when an old userspace process fills a new kernel module */
313a3dc7
CO		 1250static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1251 struct kvm_cpuid *cpuid,
1252 struct kvm_cpuid_entry __user *entries)
07716717
DK		 1253{
1254 int r, i;
1255 struct kvm_cpuid_entry *cpuid_entries;
1256
1257 r = -E2BIG;
1258 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1259 goto out;
1260 r = -ENOMEM;
1261 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1262 if (!cpuid_entries)
1263 goto out;
1264 r = -EFAULT;
1265 if (copy_from_user(cpuid_entries, entries,
1266 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1267 goto out_free;
1268 for (i = 0; i < cpuid->nent; i++) {
ad312c7c
ZX		 1269 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1270 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1271 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1272 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1273 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1274 vcpu->arch.cpuid_entries[i].index = 0;
1275 vcpu->arch.cpuid_entries[i].flags = 0;
1276 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1277 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1278 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1279 }
1280 vcpu->arch.cpuid_nent = cpuid->nent;
07716717
DK		 1281 cpuid_fix_nx_cap(vcpu);
1282 r = 0;
1283
1284out_free:
1285 vfree(cpuid_entries);
1286out:
1287 return r;
1288}
1289
1290static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1291 struct kvm_cpuid2 *cpuid,
1292 struct kvm_cpuid_entry2 __user *entries)
313a3dc7
CO		 1293{
1294 int r;
1295
1296 r = -E2BIG;
1297 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1298 goto out;
1299 r = -EFAULT;
ad312c7c 1300 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
07716717 1301 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
313a3dc7 1302 goto out;
ad312c7c 1303 vcpu->arch.cpuid_nent = cpuid->nent;
313a3dc7
CO		 1304 return 0;
1305
1306out:
1307 return r;
1308}
1309
07716717
DK		 1310static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1311 struct kvm_cpuid2 *cpuid,
1312 struct kvm_cpuid_entry2 __user *entries)
1313{
1314 int r;
1315
1316 r = -E2BIG;
ad312c7c 1317 if (cpuid->nent < vcpu->arch.cpuid_nent)
07716717
DK		 1318 goto out;
1319 r = -EFAULT;
ad312c7c
ZX		 1320 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1321 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
07716717
DK		 1322 goto out;
1323 return 0;
1324
1325out:
ad312c7c 1326 cpuid->nent = vcpu->arch.cpuid_nent;
07716717
DK		 1327 return r;
1328}
1329
1330static inline u32 bit(int bitno)
1331{
1332 return 1 << (bitno & 31);
1333}
1334
1335static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1336 u32 index)
1337{
1338 entry->function = function;
1339 entry->index = index;
1340 cpuid_count(entry->function, entry->index,
1341 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1342 entry->flags = 0;
1343}
1344
1345static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1346 u32 index, int *nent, int maxnent)
1347{
1348 const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
1349 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1350 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1351 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1352 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1353 bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) |
1354 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1355 bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
1356 bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
1357 bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
1358 const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
1359 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1360 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1361 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1362 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1363 bit(X86_FEATURE_PGE) |
1364 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1365 bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
1366 bit(X86_FEATURE_SYSCALL) |
1367 (bit(X86_FEATURE_NX) && is_efer_nx()) |
1368#ifdef CONFIG_X86_64
1369 bit(X86_FEATURE_LM) |
1370#endif
1371 bit(X86_FEATURE_MMXEXT) |
1372 bit(X86_FEATURE_3DNOWEXT) |
1373 bit(X86_FEATURE_3DNOW);
1374 const u32 kvm_supported_word3_x86_features =
1375 bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
1376 const u32 kvm_supported_word6_x86_features =
1377 bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY);
1378
1379 /* all func 2 cpuid_count() should be called on the same cpu */
1380 get_cpu();
1381 do_cpuid_1_ent(entry, function, index);
1382 ++*nent;
1383
1384 switch (function) {
1385 case 0:
1386 entry->eax = min(entry->eax, (u32)0xb);
1387 break;
1388 case 1:
1389 entry->edx &= kvm_supported_word0_x86_features;
1390 entry->ecx &= kvm_supported_word3_x86_features;
1391 break;
1392 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1393 * may return different values. This forces us to get_cpu() before
1394 * issuing the first command, and also to emulate this annoying behavior
1395 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1396 case 2: {
1397 int t, times = entry->eax & 0xff;
1398
1399 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1400 for (t = 1; t < times && *nent < maxnent; ++t) {
1401 do_cpuid_1_ent(&entry[t], function, 0);
1402 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1403 ++*nent;
1404 }
1405 break;
1406 }
1407 /* function 4 and 0xb have additional index. */
1408 case 4: {
14af3f3c 1409 int i, cache_type;
07716717
DK		 1410
1411 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1412 /* read more entries until cache_type is zero */
14af3f3c
HH		 1413 for (i = 1; *nent < maxnent; ++i) {
1414 cache_type = entry[i - 1].eax & 0x1f;
07716717
DK		 1415 if (!cache_type)
1416 break;
14af3f3c
HH		 1417 do_cpuid_1_ent(&entry[i], function, i);
1418 entry[i].flags |=
07716717
DK		 1419 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1420 ++*nent;
1421 }
1422 break;
1423 }
1424 case 0xb: {
14af3f3c 1425 int i, level_type;
07716717
DK		 1426
1427 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1428 /* read more entries until level_type is zero */
14af3f3c
HH		 1429 for (i = 1; *nent < maxnent; ++i) {
1430 level_type = entry[i - 1].ecx & 0xff;
07716717
DK		 1431 if (!level_type)
1432 break;
14af3f3c
HH		 1433 do_cpuid_1_ent(&entry[i], function, i);
1434 entry[i].flags |=
07716717
DK		 1435 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1436 ++*nent;
1437 }
1438 break;
1439 }
1440 case 0x80000000:
1441 entry->eax = min(entry->eax, 0x8000001a);
1442 break;
1443 case 0x80000001:
1444 entry->edx &= kvm_supported_word1_x86_features;
1445 entry->ecx &= kvm_supported_word6_x86_features;
1446 break;
1447 }
1448 put_cpu();
1449}
1450
674eea0f 1451static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
07716717
DK		 1452 struct kvm_cpuid_entry2 __user *entries)
1453{
1454 struct kvm_cpuid_entry2 *cpuid_entries;
1455 int limit, nent = 0, r = -E2BIG;
1456 u32 func;
1457
1458 if (cpuid->nent < 1)
1459 goto out;
1460 r = -ENOMEM;
1461 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1462 if (!cpuid_entries)
1463 goto out;
1464
1465 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1466 limit = cpuid_entries[0].eax;
1467 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1468 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1469 &nent, cpuid->nent);
1470 r = -E2BIG;
1471 if (nent >= cpuid->nent)
1472 goto out_free;
1473
1474 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1475 limit = cpuid_entries[nent - 1].eax;
1476 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1477 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1478 &nent, cpuid->nent);
1479 r = -EFAULT;
1480 if (copy_to_user(entries, cpuid_entries,
1481 nent * sizeof(struct kvm_cpuid_entry2)))
1482 goto out_free;
1483 cpuid->nent = nent;
1484 r = 0;
1485
1486out_free:
1487 vfree(cpuid_entries);
1488out:
1489 return r;
1490}
1491
313a3dc7
CO		 1492static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1493 struct kvm_lapic_state *s)
1494{
1495 vcpu_load(vcpu);
ad312c7c 1496 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
313a3dc7
CO		 1497 vcpu_put(vcpu);
1498
1499 return 0;
1500}
1501
1502static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1503 struct kvm_lapic_state *s)
1504{
1505 vcpu_load(vcpu);
ad312c7c 1506 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
313a3dc7
CO		 1507 kvm_apic_post_state_restore(vcpu);
1508 vcpu_put(vcpu);
1509
1510 return 0;
1511}
1512
f77bc6a4
ZX		 1513static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1514 struct kvm_interrupt *irq)
1515{
1516 if (irq->irq < 0 || irq->irq >= 256)
1517 return -EINVAL;
1518 if (irqchip_in_kernel(vcpu->kvm))
1519 return -ENXIO;
1520 vcpu_load(vcpu);
1521
ad312c7c
ZX		 1522 set_bit(irq->irq, vcpu->arch.irq_pending);
1523 set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
f77bc6a4
ZX		 1524
1525 vcpu_put(vcpu);
1526
1527 return 0;
1528}
1529
b209749f
AK		 1530static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1531 struct kvm_tpr_access_ctl *tac)
1532{
1533 if (tac->flags)
1534 return -EINVAL;
1535 vcpu->arch.tpr_access_reporting = !!tac->enabled;
1536 return 0;
1537}
1538
313a3dc7
CO		 1539long kvm_arch_vcpu_ioctl(struct file *filp,
1540 unsigned int ioctl, unsigned long arg)
1541{
1542 struct kvm_vcpu *vcpu = filp->private_data;
1543 void __user *argp = (void __user *)arg;
1544 int r;
1545
1546 switch (ioctl) {
1547 case KVM_GET_LAPIC: {
1548 struct kvm_lapic_state lapic;
1549
1550 memset(&lapic, 0, sizeof lapic);
1551 r = kvm_vcpu_ioctl_get_lapic(vcpu, &lapic);
1552 if (r)
1553 goto out;
1554 r = -EFAULT;
1555 if (copy_to_user(argp, &lapic, sizeof lapic))
1556 goto out;
1557 r = 0;
1558 break;
1559 }
1560 case KVM_SET_LAPIC: {
1561 struct kvm_lapic_state lapic;
1562
1563 r = -EFAULT;
1564 if (copy_from_user(&lapic, argp, sizeof lapic))
1565 goto out;
1566 r = kvm_vcpu_ioctl_set_lapic(vcpu, &lapic);;
1567 if (r)
1568 goto out;
1569 r = 0;
1570 break;
1571 }
f77bc6a4
ZX		 1572 case KVM_INTERRUPT: {
1573 struct kvm_interrupt irq;
1574
1575 r = -EFAULT;
1576 if (copy_from_user(&irq, argp, sizeof irq))
1577 goto out;
1578 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1579 if (r)
1580 goto out;
1581 r = 0;
1582 break;
1583 }
313a3dc7
CO		 1584 case KVM_SET_CPUID: {
1585 struct kvm_cpuid __user *cpuid_arg = argp;
1586 struct kvm_cpuid cpuid;
1587
1588 r = -EFAULT;
1589 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1590 goto out;
1591 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1592 if (r)
1593 goto out;
1594 break;
1595 }
07716717
DK		 1596 case KVM_SET_CPUID2: {
1597 struct kvm_cpuid2 __user *cpuid_arg = argp;
1598 struct kvm_cpuid2 cpuid;
1599
1600 r = -EFAULT;
1601 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1602 goto out;
1603 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1604 cpuid_arg->entries);
1605 if (r)
1606 goto out;
1607 break;
1608 }
1609 case KVM_GET_CPUID2: {
1610 struct kvm_cpuid2 __user *cpuid_arg = argp;
1611 struct kvm_cpuid2 cpuid;
1612
1613 r = -EFAULT;
1614 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1615 goto out;
1616 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1617 cpuid_arg->entries);
1618 if (r)
1619 goto out;
1620 r = -EFAULT;
1621 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1622 goto out;
1623 r = 0;
1624 break;
1625 }
313a3dc7
CO		 1626 case KVM_GET_MSRS:
1627 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1628 break;
1629 case KVM_SET_MSRS:
1630 r = msr_io(vcpu, argp, do_set_msr, 0);
1631 break;
b209749f
AK		 1632 case KVM_TPR_ACCESS_REPORTING: {
1633 struct kvm_tpr_access_ctl tac;
1634
1635 r = -EFAULT;
1636 if (copy_from_user(&tac, argp, sizeof tac))
1637 goto out;
1638 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1639 if (r)
1640 goto out;
1641 r = -EFAULT;
1642 if (copy_to_user(argp, &tac, sizeof tac))
1643 goto out;
1644 r = 0;
1645 break;
1646 };
b93463aa
AK		 1647 case KVM_SET_VAPIC_ADDR: {
1648 struct kvm_vapic_addr va;
1649
1650 r = -EINVAL;
1651 if (!irqchip_in_kernel(vcpu->kvm))
1652 goto out;
1653 r = -EFAULT;
1654 if (copy_from_user(&va, argp, sizeof va))
1655 goto out;
1656 r = 0;
1657 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1658 break;
1659 }
313a3dc7
CO		 1660 default:
1661 r = -EINVAL;
1662 }
1663out:
1664 return r;
1665}
1666
1fe779f8
CO		 1667static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1668{
1669 int ret;
1670
1671 if (addr > (unsigned int)(-3 * PAGE_SIZE))
1672 return -1;
1673 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1674 return ret;
1675}
1676
1677static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1678 u32 kvm_nr_mmu_pages)
1679{
1680 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1681 return -EINVAL;
1682
72dc67a6 1683 down_write(&kvm->slots_lock);
1fe779f8
CO		 1684
1685 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
f05e70ac 1686 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1fe779f8 1687
72dc67a6 1688 up_write(&kvm->slots_lock);
1fe779f8
CO		 1689 return 0;
1690}
1691
1692static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1693{
f05e70ac 1694 return kvm->arch.n_alloc_mmu_pages;
1fe779f8
CO		 1695}
1696
e9f85cde
ZX		 1697gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1698{
1699 int i;
1700 struct kvm_mem_alias *alias;
1701
d69fb81f
ZX		 1702 for (i = 0; i < kvm->arch.naliases; ++i) {
1703 alias = &kvm->arch.aliases[i];
e9f85cde
ZX		 1704 if (gfn >= alias->base_gfn
1705 && gfn < alias->base_gfn + alias->npages)
1706 return alias->target_gfn + gfn - alias->base_gfn;
1707 }
1708 return gfn;
1709}
1710
1fe779f8
CO		 1711/*
1712 * Set a new alias region. Aliases map a portion of physical memory into
1713 * another portion. This is useful for memory windows, for example the PC
1714 * VGA region.
1715 */
1716static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1717 struct kvm_memory_alias *alias)
1718{
1719 int r, n;
1720 struct kvm_mem_alias *p;
1721
1722 r = -EINVAL;
1723 /* General sanity checks */
1724 if (alias->memory_size & (PAGE_SIZE - 1))
1725 goto out;
1726 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1727 goto out;
1728 if (alias->slot >= KVM_ALIAS_SLOTS)
1729 goto out;
1730 if (alias->guest_phys_addr + alias->memory_size
1731 < alias->guest_phys_addr)
1732 goto out;
1733 if (alias->target_phys_addr + alias->memory_size
1734 < alias->target_phys_addr)
1735 goto out;
1736
72dc67a6 1737 down_write(&kvm->slots_lock);
a1708ce8 1738 spin_lock(&kvm->mmu_lock);
1fe779f8 1739
d69fb81f 1740 p = &kvm->arch.aliases[alias->slot];
1fe779f8
CO		 1741 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1742 p->npages = alias->memory_size >> PAGE_SHIFT;
1743 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1744
1745 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
d69fb81f 1746 if (kvm->arch.aliases[n - 1].npages)
1fe779f8 1747 break;
d69fb81f 1748 kvm->arch.naliases = n;
1fe779f8 1749
a1708ce8 1750 spin_unlock(&kvm->mmu_lock);
1fe779f8
CO		 1751 kvm_mmu_zap_all(kvm);
1752
72dc67a6 1753 up_write(&kvm->slots_lock);
1fe779f8
CO		 1754
1755 return 0;
1756
1757out:
1758 return r;
1759}
1760
1761static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1762{
1763 int r;
1764
1765 r = 0;
1766 switch (chip->chip_id) {
1767 case KVM_IRQCHIP_PIC_MASTER:
1768 memcpy(&chip->chip.pic,
1769 &pic_irqchip(kvm)->pics[0],
1770 sizeof(struct kvm_pic_state));
1771 break;
1772 case KVM_IRQCHIP_PIC_SLAVE:
1773 memcpy(&chip->chip.pic,
1774 &pic_irqchip(kvm)->pics[1],
1775 sizeof(struct kvm_pic_state));
1776 break;
1777 case KVM_IRQCHIP_IOAPIC:
1778 memcpy(&chip->chip.ioapic,
1779 ioapic_irqchip(kvm),
1780 sizeof(struct kvm_ioapic_state));
1781 break;
1782 default:
1783 r = -EINVAL;
1784 break;
1785 }
1786 return r;
1787}
1788
1789static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1790{
1791 int r;
1792
1793 r = 0;
1794 switch (chip->chip_id) {
1795 case KVM_IRQCHIP_PIC_MASTER:
1796 memcpy(&pic_irqchip(kvm)->pics[0],
1797 &chip->chip.pic,
1798 sizeof(struct kvm_pic_state));
1799 break;
1800 case KVM_IRQCHIP_PIC_SLAVE:
1801 memcpy(&pic_irqchip(kvm)->pics[1],
1802 &chip->chip.pic,
1803 sizeof(struct kvm_pic_state));
1804 break;
1805 case KVM_IRQCHIP_IOAPIC:
1806 memcpy(ioapic_irqchip(kvm),
1807 &chip->chip.ioapic,
1808 sizeof(struct kvm_ioapic_state));
1809 break;
1810 default:
1811 r = -EINVAL;
1812 break;
1813 }
1814 kvm_pic_update_irq(pic_irqchip(kvm));
1815 return r;
1816}
1817
e0f63cb9
SY		 1818static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1819{
1820 int r = 0;
1821
1822 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
1823 return r;
1824}
1825
1826static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1827{
1828 int r = 0;
1829
1830 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
1831 kvm_pit_load_count(kvm, 0, ps->channels[0].count);
1832 return r;
1833}
1834
5bb064dc
ZX		 1835/*
1836 * Get (and clear) the dirty memory log for a memory slot.
1837 */
1838int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1839 struct kvm_dirty_log *log)
1840{
1841 int r;
1842 int n;
1843 struct kvm_memory_slot *memslot;
1844 int is_dirty = 0;
1845
72dc67a6 1846 down_write(&kvm->slots_lock);
5bb064dc
ZX		 1847
1848 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1849 if (r)
1850 goto out;
1851
1852 /* If nothing is dirty, don't bother messing with page tables. */
1853 if (is_dirty) {
1854 kvm_mmu_slot_remove_write_access(kvm, log->slot);
1855 kvm_flush_remote_tlbs(kvm);
1856 memslot = &kvm->memslots[log->slot];
1857 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
1858 memset(memslot->dirty_bitmap, 0, n);
1859 }
1860 r = 0;
1861out:
72dc67a6 1862 up_write(&kvm->slots_lock);
5bb064dc
ZX		 1863 return r;
1864}
1865
1fe779f8
CO		 1866long kvm_arch_vm_ioctl(struct file *filp,
1867 unsigned int ioctl, unsigned long arg)
1868{
1869 struct kvm *kvm = filp->private_data;
1870 void __user *argp = (void __user *)arg;
1871 int r = -EINVAL;
f0d66275
DH		 1872 /*
1873 * This union makes it completely explicit to gcc-3.x
1874 * that these two variables' stack usage should be
1875 * combined, not added together.
1876 */
1877 union {
1878 struct kvm_pit_state ps;
1879 struct kvm_memory_alias alias;
1880 } u;
1fe779f8
CO		 1881
1882 switch (ioctl) {
1883 case KVM_SET_TSS_ADDR:
1884 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
1885 if (r < 0)
1886 goto out;
1887 break;
1888 case KVM_SET_MEMORY_REGION: {
1889 struct kvm_memory_region kvm_mem;
1890 struct kvm_userspace_memory_region kvm_userspace_mem;
1891
1892 r = -EFAULT;
1893 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
1894 goto out;
1895 kvm_userspace_mem.slot = kvm_mem.slot;
1896 kvm_userspace_mem.flags = kvm_mem.flags;
1897 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
1898 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
1899 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
1900 if (r)
1901 goto out;
1902 break;
1903 }
1904 case KVM_SET_NR_MMU_PAGES:
1905 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
1906 if (r)
1907 goto out;
1908 break;
1909 case KVM_GET_NR_MMU_PAGES:
1910 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
1911 break;
f0d66275 1912 case KVM_SET_MEMORY_ALIAS:
1fe779f8 1913 r = -EFAULT;
f0d66275 1914 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
1fe779f8 1915 goto out;
f0d66275 1916 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
1fe779f8
CO		 1917 if (r)
1918 goto out;
1919 break;
1fe779f8
CO		 1920 case KVM_CREATE_IRQCHIP:
1921 r = -ENOMEM;
d7deeeb0
ZX		 1922 kvm->arch.vpic = kvm_create_pic(kvm);
1923 if (kvm->arch.vpic) {
1fe779f8
CO		 1924 r = kvm_ioapic_init(kvm);
1925 if (r) {
d7deeeb0
ZX		 1926 kfree(kvm->arch.vpic);
1927 kvm->arch.vpic = NULL;
1fe779f8
CO		 1928 goto out;
1929 }
1930 } else
1931 goto out;
1932 break;
7837699f
SY		 1933 case KVM_CREATE_PIT:
1934 r = -ENOMEM;
1935 kvm->arch.vpit = kvm_create_pit(kvm);
1936 if (kvm->arch.vpit)
1937 r = 0;
1938 break;
1fe779f8
CO		 1939 case KVM_IRQ_LINE: {
1940 struct kvm_irq_level irq_event;
1941
1942 r = -EFAULT;
1943 if (copy_from_user(&irq_event, argp, sizeof irq_event))
1944 goto out;
1945 if (irqchip_in_kernel(kvm)) {
1946 mutex_lock(&kvm->lock);
1947 if (irq_event.irq < 16)
1948 kvm_pic_set_irq(pic_irqchip(kvm),
1949 irq_event.irq,
1950 irq_event.level);
d7deeeb0 1951 kvm_ioapic_set_irq(kvm->arch.vioapic,
1fe779f8
CO		 1952 irq_event.irq,
1953 irq_event.level);
1954 mutex_unlock(&kvm->lock);
1955 r = 0;
1956 }
1957 break;
1958 }
1959 case KVM_GET_IRQCHIP: {
1960 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
f0d66275 1961 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1fe779f8 1962
f0d66275
DH		 1963 r = -ENOMEM;
1964 if (!chip)
1fe779f8 1965 goto out;
f0d66275
DH		 1966 r = -EFAULT;
1967 if (copy_from_user(chip, argp, sizeof *chip))
1968 goto get_irqchip_out;
1fe779f8
CO		 1969 r = -ENXIO;
1970 if (!irqchip_in_kernel(kvm))
f0d66275
DH		 1971 goto get_irqchip_out;
1972 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
1fe779f8 1973 if (r)
f0d66275 1974 goto get_irqchip_out;
1fe779f8 1975 r = -EFAULT;
f0d66275
DH		 1976 if (copy_to_user(argp, chip, sizeof *chip))
1977 goto get_irqchip_out;
1fe779f8 1978 r = 0;
f0d66275
DH		 1979 get_irqchip_out:
1980 kfree(chip);
1981 if (r)
1982 goto out;
1fe779f8
CO		 1983 break;
1984 }
1985 case KVM_SET_IRQCHIP: {
1986 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
f0d66275 1987 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1fe779f8 1988
f0d66275
DH		 1989 r = -ENOMEM;
1990 if (!chip)
1fe779f8 1991 goto out;
f0d66275
DH		 1992 r = -EFAULT;
1993 if (copy_from_user(chip, argp, sizeof *chip))
1994 goto set_irqchip_out;
1fe779f8
CO		 1995 r = -ENXIO;
1996 if (!irqchip_in_kernel(kvm))
f0d66275
DH		 1997 goto set_irqchip_out;
1998 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
1fe779f8 1999 if (r)
f0d66275 2000 goto set_irqchip_out;
1fe779f8 2001 r = 0;
f0d66275
DH		 2002 set_irqchip_out:
2003 kfree(chip);
2004 if (r)
2005 goto out;
1fe779f8
CO		 2006 break;
2007 }
4d5c5d0f
BAY		 2008 case KVM_ASSIGN_PCI_DEVICE: {
2009 struct kvm_assigned_pci_dev assigned_dev;
2010
2011 r = -EFAULT;
2012 if (copy_from_user(&assigned_dev, argp, sizeof assigned_dev))
2013 goto out;
2014 r = kvm_vm_ioctl_assign_device(kvm, &assigned_dev);
2015 if (r)
2016 goto out;
2017 break;
2018 }
2019 case KVM_ASSIGN_IRQ: {
2020 struct kvm_assigned_irq assigned_irq;
2021
2022 r = -EFAULT;
2023 if (copy_from_user(&assigned_irq, argp, sizeof assigned_irq))
2024 goto out;
2025 r = kvm_vm_ioctl_assign_irq(kvm, &assigned_irq);
2026 if (r)
2027 goto out;
2028 break;
2029 }
e0f63cb9 2030 case KVM_GET_PIT: {
e0f63cb9 2031 r = -EFAULT;
f0d66275 2032 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
e0f63cb9
SY		 2033 goto out;
2034 r = -ENXIO;
2035 if (!kvm->arch.vpit)
2036 goto out;
f0d66275 2037 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
e0f63cb9
SY		 2038 if (r)
2039 goto out;
2040 r = -EFAULT;
f0d66275 2041 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
e0f63cb9
SY		 2042 goto out;
2043 r = 0;
2044 break;
2045 }
2046 case KVM_SET_PIT: {
e0f63cb9 2047 r = -EFAULT;
f0d66275 2048 if (copy_from_user(&u.ps, argp, sizeof u.ps))
e0f63cb9
SY		 2049 goto out;
2050 r = -ENXIO;
2051 if (!kvm->arch.vpit)
2052 goto out;
f0d66275 2053 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
e0f63cb9
SY		 2054 if (r)
2055 goto out;
2056 r = 0;
2057 break;
2058 }
1fe779f8
CO		 2059 default:
2060 ;
2061 }
2062out:
2063 return r;
2064}
2065
a16b043c 2066static void kvm_init_msr_list(void)
043405e1
CO		 2067{
2068 u32 dummy[2];
2069 unsigned i, j;
2070
2071 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
2072 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2073 continue;
2074 if (j < i)
2075 msrs_to_save[j] = msrs_to_save[i];
2076 j++;
2077 }
2078 num_msrs_to_save = j;
2079}
2080
bbd9b64e
CO		 2081/*
2082 * Only apic need an MMIO device hook, so shortcut now..
2083 */
2084static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
92760499
LV		 2085 gpa_t addr, int len,
2086 int is_write)
bbd9b64e
CO		 2087{
2088 struct kvm_io_device *dev;
2089
ad312c7c
ZX		 2090 if (vcpu->arch.apic) {
2091 dev = &vcpu->arch.apic->dev;
92760499 2092 if (dev->in_range(dev, addr, len, is_write))
bbd9b64e
CO		 2093 return dev;
2094 }
2095 return NULL;
2096}
2097
2098
2099static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
92760499
LV		 2100 gpa_t addr, int len,
2101 int is_write)
bbd9b64e
CO		 2102{
2103 struct kvm_io_device *dev;
2104
92760499 2105 dev = vcpu_find_pervcpu_dev(vcpu, addr, len, is_write);
bbd9b64e 2106 if (dev == NULL)
92760499
LV		 2107 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr, len,
2108 is_write);
bbd9b64e
CO		 2109 return dev;
2110}
2111
2112int emulator_read_std(unsigned long addr,
2113 void *val,
2114 unsigned int bytes,
2115 struct kvm_vcpu *vcpu)
2116{
2117 void *data = val;
10589a46 2118 int r = X86EMUL_CONTINUE;
bbd9b64e
CO		 2119
2120 while (bytes) {
ad312c7c 2121 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
bbd9b64e
CO		 2122 unsigned offset = addr & (PAGE_SIZE-1);
2123 unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
2124 int ret;
2125
10589a46
MT		 2126 if (gpa == UNMAPPED_GVA) {
2127 r = X86EMUL_PROPAGATE_FAULT;
2128 goto out;
2129 }
bbd9b64e 2130 ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
10589a46
MT		 2131 if (ret < 0) {
2132 r = X86EMUL_UNHANDLEABLE;
2133 goto out;
2134 }
bbd9b64e
CO		 2135
2136 bytes -= tocopy;
2137 data += tocopy;
2138 addr += tocopy;
2139 }
10589a46 2140out:
10589a46 2141 return r;
bbd9b64e
CO		 2142}
2143EXPORT_SYMBOL_GPL(emulator_read_std);
2144
bbd9b64e
CO		 2145static int emulator_read_emulated(unsigned long addr,
2146 void *val,
2147 unsigned int bytes,
2148 struct kvm_vcpu *vcpu)
2149{
2150 struct kvm_io_device *mmio_dev;
2151 gpa_t gpa;
2152
2153 if (vcpu->mmio_read_completed) {
2154 memcpy(val, vcpu->mmio_data, bytes);
2155 vcpu->mmio_read_completed = 0;
2156 return X86EMUL_CONTINUE;
2157 }
2158
ad312c7c 2159 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
bbd9b64e
CO		 2160
2161 /* For APIC access vmexit */
2162 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2163 goto mmio;
2164
2165 if (emulator_read_std(addr, val, bytes, vcpu)
2166 == X86EMUL_CONTINUE)
2167 return X86EMUL_CONTINUE;
2168 if (gpa == UNMAPPED_GVA)
2169 return X86EMUL_PROPAGATE_FAULT;
2170
2171mmio:
2172 /*
2173 * Is this MMIO handled locally?
2174 */
10589a46 2175 mutex_lock(&vcpu->kvm->lock);
92760499 2176 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 0);
bbd9b64e
CO		 2177 if (mmio_dev) {
2178 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
10589a46 2179 mutex_unlock(&vcpu->kvm->lock);
bbd9b64e
CO		 2180 return X86EMUL_CONTINUE;
2181 }
10589a46 2182 mutex_unlock(&vcpu->kvm->lock);
bbd9b64e
CO		 2183
2184 vcpu->mmio_needed = 1;
2185 vcpu->mmio_phys_addr = gpa;
2186 vcpu->mmio_size = bytes;
2187 vcpu->mmio_is_write = 0;
2188
2189 return X86EMUL_UNHANDLEABLE;
2190}
2191
3200f405 2192int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
9f811285 2193 const void *val, int bytes)
bbd9b64e
CO		 2194{
2195 int ret;
2196
2197 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
9f811285 2198 if (ret < 0)
bbd9b64e
CO		 2199 return 0;
2200 kvm_mmu_pte_write(vcpu, gpa, val, bytes);
2201 return 1;
2202}
2203
2204static int emulator_write_emulated_onepage(unsigned long addr,
2205 const void *val,
2206 unsigned int bytes,
2207 struct kvm_vcpu *vcpu)
2208{
2209 struct kvm_io_device *mmio_dev;
10589a46
MT		 2210 gpa_t gpa;
2211
10589a46 2212 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
bbd9b64e
CO		 2213
2214 if (gpa == UNMAPPED_GVA) {
c3c91fee 2215 kvm_inject_page_fault(vcpu, addr, 2);
bbd9b64e
CO		 2216 return X86EMUL_PROPAGATE_FAULT;
2217 }
2218
2219 /* For APIC access vmexit */
2220 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2221 goto mmio;
2222
2223 if (emulator_write_phys(vcpu, gpa, val, bytes))
2224 return X86EMUL_CONTINUE;
2225
2226mmio:
2227 /*
2228 * Is this MMIO handled locally?
2229 */
10589a46 2230 mutex_lock(&vcpu->kvm->lock);
92760499 2231 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 1);
bbd9b64e
CO		 2232 if (mmio_dev) {
2233 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
10589a46 2234 mutex_unlock(&vcpu->kvm->lock);
bbd9b64e
CO		 2235 return X86EMUL_CONTINUE;
2236 }
10589a46 2237 mutex_unlock(&vcpu->kvm->lock);
bbd9b64e
CO		 2238
2239 vcpu->mmio_needed = 1;
2240 vcpu->mmio_phys_addr = gpa;
2241 vcpu->mmio_size = bytes;
2242 vcpu->mmio_is_write = 1;
2243 memcpy(vcpu->mmio_data, val, bytes);
2244
2245 return X86EMUL_CONTINUE;
2246}
2247
2248int emulator_write_emulated(unsigned long addr,
2249 const void *val,
2250 unsigned int bytes,
2251 struct kvm_vcpu *vcpu)
2252{
2253 /* Crossing a page boundary? */
2254 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2255 int rc, now;
2256
2257 now = -addr & ~PAGE_MASK;
2258 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2259 if (rc != X86EMUL_CONTINUE)
2260 return rc;
2261 addr += now;
2262 val += now;
2263 bytes -= now;
2264 }
2265 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2266}
2267EXPORT_SYMBOL_GPL(emulator_write_emulated);
2268
2269static int emulator_cmpxchg_emulated(unsigned long addr,
2270 const void *old,
2271 const void *new,
2272 unsigned int bytes,
2273 struct kvm_vcpu *vcpu)
2274{
2275 static int reported;
2276
2277 if (!reported) {
2278 reported = 1;
2279 printk(KERN_WARNING "kvm: emulating exchange as write\n");
2280 }
2bacc55c
MT		 2281#ifndef CONFIG_X86_64
2282 /* guests cmpxchg8b have to be emulated atomically */
2283 if (bytes == 8) {
10589a46 2284 gpa_t gpa;
2bacc55c 2285 struct page *page;
c0b49b0d 2286 char *kaddr;
2bacc55c
MT		 2287 u64 val;
2288
10589a46
MT		 2289 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2290
2bacc55c
MT		 2291 if (gpa == UNMAPPED_GVA ||
2292 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2293 goto emul_write;
2294
2295 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2296 goto emul_write;
2297
2298 val = *(u64 *)new;
72dc67a6
IE		 2299
2300 down_read(&current->mm->mmap_sem);
2bacc55c 2301 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
72dc67a6
IE		 2302 up_read(&current->mm->mmap_sem);
2303
c0b49b0d
AM		 2304 kaddr = kmap_atomic(page, KM_USER0);
2305 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2306 kunmap_atomic(kaddr, KM_USER0);
2bacc55c
MT		 2307 kvm_release_page_dirty(page);
2308 }
3200f405 2309emul_write:
2bacc55c
MT		 2310#endif
2311
bbd9b64e
CO		 2312 return emulator_write_emulated(addr, new, bytes, vcpu);
2313}
2314
2315static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2316{
2317 return kvm_x86_ops->get_segment_base(vcpu, seg);
2318}
2319
2320int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2321{
2322 return X86EMUL_CONTINUE;
2323}
2324
2325int emulate_clts(struct kvm_vcpu *vcpu)
2326{
54e445ca 2327 KVMTRACE_0D(CLTS, vcpu, handler);
ad312c7c 2328 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
bbd9b64e
CO		 2329 return X86EMUL_CONTINUE;
2330}
2331
2332int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2333{
2334 struct kvm_vcpu *vcpu = ctxt->vcpu;
2335
2336 switch (dr) {
2337 case 0 ... 3:
2338 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2339 return X86EMUL_CONTINUE;
2340 default:
b8688d51 2341 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
bbd9b64e
CO		 2342 return X86EMUL_UNHANDLEABLE;
2343 }
2344}
2345
2346int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2347{
2348 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2349 int exception;
2350
2351 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2352 if (exception) {
2353 /* FIXME: better handling */
2354 return X86EMUL_UNHANDLEABLE;
2355 }
2356 return X86EMUL_CONTINUE;
2357}
2358
2359void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2360{
bbd9b64e 2361 u8 opcodes[4];
5fdbf976 2362 unsigned long rip = kvm_rip_read(vcpu);
bbd9b64e
CO		 2363 unsigned long rip_linear;
2364
f76c710d 2365 if (!printk_ratelimit())
bbd9b64e
CO		 2366 return;
2367
25be4608
GC		 2368 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2369
bbd9b64e
CO		 2370 emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
2371
2372 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2373 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
bbd9b64e
CO		 2374}
2375EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2376
14af3f3c 2377static struct x86_emulate_ops emulate_ops = {
bbd9b64e 2378 .read_std = emulator_read_std,
bbd9b64e
CO		 2379 .read_emulated = emulator_read_emulated,
2380 .write_emulated = emulator_write_emulated,
2381 .cmpxchg_emulated = emulator_cmpxchg_emulated,
2382};
2383
5fdbf976
MT		 2384static void cache_all_regs(struct kvm_vcpu *vcpu)
2385{
2386 kvm_register_read(vcpu, VCPU_REGS_RAX);
2387 kvm_register_read(vcpu, VCPU_REGS_RSP);
2388 kvm_register_read(vcpu, VCPU_REGS_RIP);
2389 vcpu->arch.regs_dirty = ~0;
2390}
2391
bbd9b64e
CO		 2392int emulate_instruction(struct kvm_vcpu *vcpu,
2393 struct kvm_run *run,
2394 unsigned long cr2,
2395 u16 error_code,
571008da 2396 int emulation_type)
bbd9b64e
CO		 2397{
2398 int r;
571008da 2399 struct decode_cache *c;
bbd9b64e 2400
26eef70c 2401 kvm_clear_exception_queue(vcpu);
ad312c7c 2402 vcpu->arch.mmio_fault_cr2 = cr2;
5fdbf976
MT		 2403 /*
2404 * TODO: fix x86_emulate.c to use guest_read/write_register
2405 * instead of direct ->regs accesses, can save hundred cycles
2406 * on Intel for instructions that don't read/change RSP, for
2407 * for example.
2408 */
2409 cache_all_regs(vcpu);
bbd9b64e
CO		 2410
2411 vcpu->mmio_is_write = 0;
ad312c7c 2412 vcpu->arch.pio.string = 0;
bbd9b64e 2413
571008da 2414 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
bbd9b64e
CO		 2415 int cs_db, cs_l;
2416 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2417
ad312c7c
ZX		 2418 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2419 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2420 vcpu->arch.emulate_ctxt.mode =
2421 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
bbd9b64e
CO		 2422 ? X86EMUL_MODE_REAL : cs_l
2423 ? X86EMUL_MODE_PROT64 : cs_db
2424 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2425
ad312c7c 2426 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
571008da
SY		 2427
2428 /* Reject the instructions other than VMCALL/VMMCALL when
2429 * try to emulate invalid opcode */
2430 c = &vcpu->arch.emulate_ctxt.decode;
2431 if ((emulation_type & EMULTYPE_TRAP_UD) &&
2432 (!(c->twobyte && c->b == 0x01 &&
2433 (c->modrm_reg == 0 || c->modrm_reg == 3) &&
2434 c->modrm_mod == 3 && c->modrm_rm == 1)))
2435 return EMULATE_FAIL;
2436
f2b5756b 2437 ++vcpu->stat.insn_emulation;
bbd9b64e 2438 if (r) {
f2b5756b 2439 ++vcpu->stat.insn_emulation_fail;
bbd9b64e
CO		 2440 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2441 return EMULATE_DONE;
2442 return EMULATE_FAIL;
2443 }
2444 }
2445
ad312c7c 2446 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
bbd9b64e 2447
ad312c7c 2448 if (vcpu->arch.pio.string)
bbd9b64e
CO		 2449 return EMULATE_DO_MMIO;
2450
2451 if ((r || vcpu->mmio_is_write) && run) {
2452 run->exit_reason = KVM_EXIT_MMIO;
2453 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2454 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2455 run->mmio.len = vcpu->mmio_size;
2456 run->mmio.is_write = vcpu->mmio_is_write;
2457 }
2458
2459 if (r) {
2460 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2461 return EMULATE_DONE;
2462 if (!vcpu->mmio_needed) {
2463 kvm_report_emulation_failure(vcpu, "mmio");
2464 return EMULATE_FAIL;
2465 }
2466 return EMULATE_DO_MMIO;
2467 }
2468
ad312c7c 2469 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
bbd9b64e
CO		 2470
2471 if (vcpu->mmio_is_write) {
2472 vcpu->mmio_needed = 0;
2473 return EMULATE_DO_MMIO;
2474 }
2475
2476 return EMULATE_DONE;
2477}
2478EXPORT_SYMBOL_GPL(emulate_instruction);
2479
de7d789a
CO		 2480static void free_pio_guest_pages(struct kvm_vcpu *vcpu)
2481{
2482 int i;
2483
ad312c7c
ZX		 2484 for (i = 0; i < ARRAY_SIZE(vcpu->arch.pio.guest_pages); ++i)
2485 if (vcpu->arch.pio.guest_pages[i]) {
2486 kvm_release_page_dirty(vcpu->arch.pio.guest_pages[i]);
2487 vcpu->arch.pio.guest_pages[i] = NULL;
de7d789a
CO		 2488 }
2489}
2490
2491static int pio_copy_data(struct kvm_vcpu *vcpu)
2492{
ad312c7c 2493 void *p = vcpu->arch.pio_data;
de7d789a
CO		 2494 void *q;
2495 unsigned bytes;
ad312c7c 2496 int nr_pages = vcpu->arch.pio.guest_pages[1] ? 2 : 1;
de7d789a 2497
ad312c7c 2498 q = vmap(vcpu->arch.pio.guest_pages, nr_pages, VM_READ|VM_WRITE,
de7d789a
CO		 2499 PAGE_KERNEL);
2500 if (!q) {
2501 free_pio_guest_pages(vcpu);
2502 return -ENOMEM;
2503 }
ad312c7c
ZX		 2504 q += vcpu->arch.pio.guest_page_offset;
2505 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2506 if (vcpu->arch.pio.in)
de7d789a
CO		 2507 memcpy(q, p, bytes);
2508 else
2509 memcpy(p, q, bytes);
ad312c7c 2510 q -= vcpu->arch.pio.guest_page_offset;
de7d789a
CO		 2511 vunmap(q);
2512 free_pio_guest_pages(vcpu);
2513 return 0;
2514}
2515
2516int complete_pio(struct kvm_vcpu *vcpu)
2517{
ad312c7c 2518 struct kvm_pio_request *io = &vcpu->arch.pio;
de7d789a
CO		 2519 long delta;
2520 int r;
5fdbf976 2521 unsigned long val;
de7d789a
CO		 2522
2523 if (!io->string) {
5fdbf976
MT		 2524 if (io->in) {
2525 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2526 memcpy(&val, vcpu->arch.pio_data, io->size);
2527 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2528 }
de7d789a
CO		 2529 } else {
2530 if (io->in) {
2531 r = pio_copy_data(vcpu);
5fdbf976 2532 if (r)
de7d789a 2533 return r;
de7d789a
CO		 2534 }
2535
2536 delta = 1;
2537 if (io->rep) {
2538 delta *= io->cur_count;
2539 /*
2540 * The size of the register should really depend on
2541 * current address size.
2542 */
5fdbf976
MT		 2543 val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2544 val -= delta;
2545 kvm_register_write(vcpu, VCPU_REGS_RCX, val);
de7d789a
CO		 2546 }
2547 if (io->down)
2548 delta = -delta;
2549 delta *= io->size;
5fdbf976
MT		 2550 if (io->in) {
2551 val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2552 val += delta;
2553 kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2554 } else {
2555 val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2556 val += delta;
2557 kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2558 }
de7d789a
CO		 2559 }
2560
de7d789a
CO		 2561 io->count -= io->cur_count;
2562 io->cur_count = 0;
2563
2564 return 0;
2565}
2566
2567static void kernel_pio(struct kvm_io_device *pio_dev,
2568 struct kvm_vcpu *vcpu,
2569 void *pd)
2570{
2571 /* TODO: String I/O for in kernel device */
2572
2573 mutex_lock(&vcpu->kvm->lock);
ad312c7c
ZX		 2574 if (vcpu->arch.pio.in)
2575 kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
2576 vcpu->arch.pio.size,
de7d789a
CO		 2577 pd);
2578 else
ad312c7c
ZX		 2579 kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
2580 vcpu->arch.pio.size,
de7d789a
CO		 2581 pd);
2582 mutex_unlock(&vcpu->kvm->lock);
2583}
2584
2585static void pio_string_write(struct kvm_io_device *pio_dev,
2586 struct kvm_vcpu *vcpu)
2587{
ad312c7c
ZX		 2588 struct kvm_pio_request *io = &vcpu->arch.pio;
2589 void *pd = vcpu->arch.pio_data;
de7d789a
CO		 2590 int i;
2591
2592 mutex_lock(&vcpu->kvm->lock);
2593 for (i = 0; i < io->cur_count; i++) {
2594 kvm_iodevice_write(pio_dev, io->port,
2595 io->size,
2596 pd);
2597 pd += io->size;
2598 }
2599 mutex_unlock(&vcpu->kvm->lock);
2600}
2601
2602static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
92760499
LV		 2603 gpa_t addr, int len,
2604 int is_write)
de7d789a 2605{
92760499 2606 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr, len, is_write);
de7d789a
CO		 2607}
2608
2609int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2610 int size, unsigned port)
2611{
2612 struct kvm_io_device *pio_dev;
5fdbf976 2613 unsigned long val;
de7d789a
CO		 2614
2615 vcpu->run->exit_reason = KVM_EXIT_IO;
2616 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
ad312c7c 2617 vcpu->run->io.size = vcpu->arch.pio.size = size;
de7d789a 2618 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
ad312c7c
ZX		 2619 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2620 vcpu->run->io.port = vcpu->arch.pio.port = port;
2621 vcpu->arch.pio.in = in;
2622 vcpu->arch.pio.string = 0;
2623 vcpu->arch.pio.down = 0;
2624 vcpu->arch.pio.guest_page_offset = 0;
2625 vcpu->arch.pio.rep = 0;
de7d789a 2626
2714d1d3
FEL		 2627 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2628 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2629 handler);
2630 else
2631 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2632 handler);
2633
5fdbf976
MT		 2634 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2635 memcpy(vcpu->arch.pio_data, &val, 4);
de7d789a
CO		 2636
2637 kvm_x86_ops->skip_emulated_instruction(vcpu);
2638
92760499 2639 pio_dev = vcpu_find_pio_dev(vcpu, port, size, !in);
de7d789a 2640 if (pio_dev) {
ad312c7c 2641 kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
de7d789a
CO		 2642 complete_pio(vcpu);
2643 return 1;
2644 }
2645 return 0;
2646}
2647EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2648
2649int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2650 int size, unsigned long count, int down,
2651 gva_t address, int rep, unsigned port)
2652{
2653 unsigned now, in_page;
2654 int i, ret = 0;
2655 int nr_pages = 1;
2656 struct page *page;
2657 struct kvm_io_device *pio_dev;
2658
2659 vcpu->run->exit_reason = KVM_EXIT_IO;
2660 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
ad312c7c 2661 vcpu->run->io.size = vcpu->arch.pio.size = size;
de7d789a 2662 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
ad312c7c
ZX		 2663 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2664 vcpu->run->io.port = vcpu->arch.pio.port = port;
2665 vcpu->arch.pio.in = in;
2666 vcpu->arch.pio.string = 1;
2667 vcpu->arch.pio.down = down;
2668 vcpu->arch.pio.guest_page_offset = offset_in_page(address);
2669 vcpu->arch.pio.rep = rep;
de7d789a 2670
2714d1d3
FEL		 2671 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2672 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2673 handler);
2674 else
2675 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2676 handler);
2677
de7d789a
CO		 2678 if (!count) {
2679 kvm_x86_ops->skip_emulated_instruction(vcpu);
2680 return 1;
2681 }
2682
2683 if (!down)
2684 in_page = PAGE_SIZE - offset_in_page(address);
2685 else
2686 in_page = offset_in_page(address) + size;
2687 now = min(count, (unsigned long)in_page / size);
2688 if (!now) {
2689 /*
2690 * String I/O straddles page boundary. Pin two guest pages
2691 * so that we satisfy atomicity constraints. Do just one
2692 * transaction to avoid complexity.
2693 */
2694 nr_pages = 2;
2695 now = 1;
2696 }
2697 if (down) {
2698 /*
2699 * String I/O in reverse. Yuck. Kill the guest, fix later.
2700 */
2701 pr_unimpl(vcpu, "guest string pio down\n");
c1a5d4f9 2702 kvm_inject_gp(vcpu, 0);
de7d789a
CO		 2703 return 1;
2704 }
2705 vcpu->run->io.count = now;
ad312c7c 2706 vcpu->arch.pio.cur_count = now;
de7d789a 2707
ad312c7c 2708 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
de7d789a
CO		 2709 kvm_x86_ops->skip_emulated_instruction(vcpu);
2710
2711 for (i = 0; i < nr_pages; ++i) {
de7d789a 2712 page = gva_to_page(vcpu, address + i * PAGE_SIZE);
ad312c7c 2713 vcpu->arch.pio.guest_pages[i] = page;
de7d789a 2714 if (!page) {
c1a5d4f9 2715 kvm_inject_gp(vcpu, 0);
de7d789a
CO		 2716 free_pio_guest_pages(vcpu);
2717 return 1;
2718 }
2719 }
2720
92760499
LV		 2721 pio_dev = vcpu_find_pio_dev(vcpu, port,
2722 vcpu->arch.pio.cur_count,
2723 !vcpu->arch.pio.in);
ad312c7c 2724 if (!vcpu->arch.pio.in) {
de7d789a
CO		 2725 /* string PIO write */
2726 ret = pio_copy_data(vcpu);
2727 if (ret >= 0 && pio_dev) {
2728 pio_string_write(pio_dev, vcpu);
2729 complete_pio(vcpu);
ad312c7c 2730 if (vcpu->arch.pio.count == 0)
de7d789a
CO		 2731 ret = 1;
2732 }
2733 } else if (pio_dev)
2734 pr_unimpl(vcpu, "no string pio read support yet, "
2735 "port %x size %d count %ld\n",
2736 port, size, count);
2737
2738 return ret;
2739}
2740EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
2741
f8c16bba 2742int kvm_arch_init(void *opaque)
043405e1 2743{
56c6d28a 2744 int r;
f8c16bba
ZX		 2745 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
2746
f8c16bba
ZX		 2747 if (kvm_x86_ops) {
2748 printk(KERN_ERR "kvm: already loaded the other module\n");
56c6d28a
ZX		 2749 r = -EEXIST;
2750 goto out;
f8c16bba
ZX		 2751 }
2752
2753 if (!ops->cpu_has_kvm_support()) {
2754 printk(KERN_ERR "kvm: no hardware support\n");
56c6d28a
ZX		 2755 r = -EOPNOTSUPP;
2756 goto out;
f8c16bba
ZX		 2757 }
2758 if (ops->disabled_by_bios()) {
2759 printk(KERN_ERR "kvm: disabled by bios\n");
56c6d28a
ZX		 2760 r = -EOPNOTSUPP;
2761 goto out;
f8c16bba
ZX		 2762 }
2763
97db56ce
AK		 2764 r = kvm_mmu_module_init();
2765 if (r)
2766 goto out;
2767
2768 kvm_init_msr_list();
2769
f8c16bba 2770 kvm_x86_ops = ops;
56c6d28a 2771 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
7b52345e
SY		 2772 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
2773 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
2774 PT_DIRTY_MASK, PT64_NX_MASK, 0);
f8c16bba 2775 return 0;
56c6d28a
ZX		 2776
2777out:
56c6d28a 2778 return r;
043405e1 2779}
8776e519 2780
f8c16bba
ZX		 2781void kvm_arch_exit(void)
2782{
2783 kvm_x86_ops = NULL;
56c6d28a
ZX		 2784 kvm_mmu_module_exit();
2785}
f8c16bba 2786
8776e519
HB		 2787int kvm_emulate_halt(struct kvm_vcpu *vcpu)
2788{
2789 ++vcpu->stat.halt_exits;
2714d1d3 2790 KVMTRACE_0D(HLT, vcpu, handler);
8776e519 2791 if (irqchip_in_kernel(vcpu->kvm)) {
a4535290 2792 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
3200f405 2793 up_read(&vcpu->kvm->slots_lock);
8776e519 2794 kvm_vcpu_block(vcpu);
3200f405 2795 down_read(&vcpu->kvm->slots_lock);
a4535290 2796 if (vcpu->arch.mp_state != KVM_MP_STATE_RUNNABLE)
8776e519
HB		 2797 return -EINTR;
2798 return 1;
2799 } else {
2800 vcpu->run->exit_reason = KVM_EXIT_HLT;
2801 return 0;
2802 }
2803}
2804EXPORT_SYMBOL_GPL(kvm_emulate_halt);
2805
2f333bcb
MT		 2806static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
2807 unsigned long a1)
2808{
2809 if (is_long_mode(vcpu))
2810 return a0;
2811 else
2812 return a0 | ((gpa_t)a1 << 32);
2813}
2814
8776e519
HB		 2815int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
2816{
2817 unsigned long nr, a0, a1, a2, a3, ret;
2f333bcb 2818 int r = 1;
8776e519 2819
5fdbf976
MT		 2820 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
2821 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
2822 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
2823 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
2824 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
8776e519 2825
2714d1d3
FEL		 2826 KVMTRACE_1D(VMMCALL, vcpu, (u32)nr, handler);
2827
8776e519
HB		 2828 if (!is_long_mode(vcpu)) {
2829 nr &= 0xFFFFFFFF;
2830 a0 &= 0xFFFFFFFF;
2831 a1 &= 0xFFFFFFFF;
2832 a2 &= 0xFFFFFFFF;
2833 a3 &= 0xFFFFFFFF;
2834 }
2835
2836 switch (nr) {
b93463aa
AK		 2837 case KVM_HC_VAPIC_POLL_IRQ:
2838 ret = 0;
2839 break;
2f333bcb
MT		 2840 case KVM_HC_MMU_OP:
2841 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
2842 break;
8776e519
HB		 2843 default:
2844 ret = -KVM_ENOSYS;
2845 break;
2846 }
5fdbf976 2847 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
f11c3a8d 2848 ++vcpu->stat.hypercalls;
2f333bcb 2849 return r;
8776e519
HB		 2850}
2851EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
2852
2853int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
2854{
2855 char instruction[3];
2856 int ret = 0;
5fdbf976 2857 unsigned long rip = kvm_rip_read(vcpu);
8776e519 2858
8776e519
HB		 2859
2860 /*
2861 * Blow out the MMU to ensure that no other VCPU has an active mapping
2862 * to ensure that the updated hypercall appears atomically across all
2863 * VCPUs.
2864 */
2865 kvm_mmu_zap_all(vcpu->kvm);
2866
8776e519 2867 kvm_x86_ops->patch_hypercall(vcpu, instruction);
5fdbf976 2868 if (emulator_write_emulated(rip, instruction, 3, vcpu)
8776e519
HB		 2869 != X86EMUL_CONTINUE)
2870 ret = -EFAULT;
2871
8776e519
HB		 2872 return ret;
2873}
2874
2875static u64 mk_cr_64(u64 curr_cr, u32 new_val)
2876{
2877 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
2878}
2879
2880void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2881{
2882 struct descriptor_table dt = { limit, base };
2883
2884 kvm_x86_ops->set_gdt(vcpu, &dt);
2885}
2886
2887void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2888{
2889 struct descriptor_table dt = { limit, base };
2890
2891 kvm_x86_ops->set_idt(vcpu, &dt);
2892}
2893
2894void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
2895 unsigned long *rflags)
2896{
2d3ad1f4 2897 kvm_lmsw(vcpu, msw);
8776e519
HB		 2898 *rflags = kvm_x86_ops->get_rflags(vcpu);
2899}
2900
2901unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
2902{
54e445ca
JR		 2903 unsigned long value;
2904
8776e519
HB		 2905 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2906 switch (cr) {
2907 case 0:
54e445ca
JR		 2908 value = vcpu->arch.cr0;
2909 break;
8776e519 2910 case 2:
54e445ca
JR		 2911 value = vcpu->arch.cr2;
2912 break;
8776e519 2913 case 3:
54e445ca
JR		 2914 value = vcpu->arch.cr3;
2915 break;
8776e519 2916 case 4:
54e445ca
JR		 2917 value = vcpu->arch.cr4;
2918 break;
152ff9be 2919 case 8:
54e445ca
JR		 2920 value = kvm_get_cr8(vcpu);
2921 break;
8776e519 2922 default:
b8688d51 2923 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
8776e519
HB		 2924 return 0;
2925 }
54e445ca
JR		 2926 KVMTRACE_3D(CR_READ, vcpu, (u32)cr, (u32)value,
2927 (u32)((u64)value >> 32), handler);
2928
2929 return value;
8776e519
HB		 2930}
2931
2932void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
2933 unsigned long *rflags)
2934{
54e445ca
JR		 2935 KVMTRACE_3D(CR_WRITE, vcpu, (u32)cr, (u32)val,
2936 (u32)((u64)val >> 32), handler);
2937
8776e519
HB		 2938 switch (cr) {
2939 case 0:
2d3ad1f4 2940 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
8776e519
HB		 2941 *rflags = kvm_x86_ops->get_rflags(vcpu);
2942 break;
2943 case 2:
ad312c7c 2944 vcpu->arch.cr2 = val;
8776e519
HB		 2945 break;
2946 case 3:
2d3ad1f4 2947 kvm_set_cr3(vcpu, val);
8776e519
HB		 2948 break;
2949 case 4:
2d3ad1f4 2950 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
8776e519 2951 break;
152ff9be 2952 case 8:
2d3ad1f4 2953 kvm_set_cr8(vcpu, val & 0xfUL);
152ff9be 2954 break;
8776e519 2955 default:
b8688d51 2956 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
8776e519
HB		 2957 }
2958}
2959
07716717
DK		 2960static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
2961{
ad312c7c
ZX		 2962 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
2963 int j, nent = vcpu->arch.cpuid_nent;
07716717
DK		 2964
2965 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
2966 /* when no next entry is found, the current entry[i] is reselected */
2967 for (j = i + 1; j == i; j = (j + 1) % nent) {
ad312c7c 2968 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
07716717
DK		 2969 if (ej->function == e->function) {
2970 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2971 return j;
2972 }
2973 }
2974 return 0; /* silence gcc, even though control never reaches here */
2975}
2976
2977/* find an entry with matching function, matching index (if needed), and that
2978 * should be read next (if it's stateful) */
2979static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
2980 u32 function, u32 index)
2981{
2982 if (e->function != function)
2983 return 0;
2984 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
2985 return 0;
2986 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
2987 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
2988 return 0;
2989 return 1;
2990}
2991
8776e519
HB		 2992void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
2993{
2994 int i;
07716717
DK		 2995 u32 function, index;
2996 struct kvm_cpuid_entry2 *e, *best;
8776e519 2997
5fdbf976
MT		 2998 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
2999 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3000 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3001 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3002 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3003 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
8776e519 3004 best = NULL;
ad312c7c
ZX		 3005 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
3006 e = &vcpu->arch.cpuid_entries[i];
07716717
DK		 3007 if (is_matching_cpuid_entry(e, function, index)) {
3008 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3009 move_to_next_stateful_cpuid_entry(vcpu, i);
8776e519
HB		 3010 best = e;
3011 break;
3012 }
3013 /*
3014 * Both basic or both extended?
3015 */
3016 if (((e->function ^ function) & 0x80000000) == 0)
3017 if (!best || e->function > best->function)
3018 best = e;
3019 }
3020 if (best) {
5fdbf976
MT		 3021 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3022 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3023 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3024 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
8776e519 3025 }
8776e519 3026 kvm_x86_ops->skip_emulated_instruction(vcpu);
2714d1d3 3027 KVMTRACE_5D(CPUID, vcpu, function,
5fdbf976
MT		 3028 (u32)kvm_register_read(vcpu, VCPU_REGS_RAX),
3029 (u32)kvm_register_read(vcpu, VCPU_REGS_RBX),
3030 (u32)kvm_register_read(vcpu, VCPU_REGS_RCX),
3031 (u32)kvm_register_read(vcpu, VCPU_REGS_RDX), handler);
8776e519
HB		 3032}
3033EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
d0752060 3034
b6c7a5dc
HB		 3035/*
3036 * Check if userspace requested an interrupt window, and that the
3037 * interrupt window is open.
3038 *
3039 * No need to exit to userspace if we already have an interrupt queued.
3040 */
3041static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
3042 struct kvm_run *kvm_run)
3043{
ad312c7c 3044 return (!vcpu->arch.irq_summary &&
b6c7a5dc 3045 kvm_run->request_interrupt_window &&
ad312c7c 3046 vcpu->arch.interrupt_window_open &&
b6c7a5dc
HB		 3047 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
3048}
3049
3050static void post_kvm_run_save(struct kvm_vcpu *vcpu,
3051 struct kvm_run *kvm_run)
3052{
3053 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
2d3ad1f4 3054 kvm_run->cr8 = kvm_get_cr8(vcpu);
b6c7a5dc
HB		 3055 kvm_run->apic_base = kvm_get_apic_base(vcpu);
3056 if (irqchip_in_kernel(vcpu->kvm))
3057 kvm_run->ready_for_interrupt_injection = 1;
3058 else
3059 kvm_run->ready_for_interrupt_injection =
ad312c7c
ZX		 3060 (vcpu->arch.interrupt_window_open &&
3061 vcpu->arch.irq_summary == 0);
b6c7a5dc
HB		 3062}
3063
b93463aa
AK		 3064static void vapic_enter(struct kvm_vcpu *vcpu)
3065{
3066 struct kvm_lapic *apic = vcpu->arch.apic;
3067 struct page *page;
3068
3069 if (!apic || !apic->vapic_addr)
3070 return;
3071
10589a46 3072 down_read(&current->mm->mmap_sem);
b93463aa 3073 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
10589a46 3074 up_read(&current->mm->mmap_sem);
72dc67a6
IE		 3075
3076 vcpu->arch.apic->vapic_page = page;
b93463aa
AK		 3077}
3078
3079static void vapic_exit(struct kvm_vcpu *vcpu)
3080{
3081 struct kvm_lapic *apic = vcpu->arch.apic;
3082
3083 if (!apic || !apic->vapic_addr)
3084 return;
3085
f8b78fa3 3086 down_read(&vcpu->kvm->slots_lock);
b93463aa
AK		 3087 kvm_release_page_dirty(apic->vapic_page);
3088 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
f8b78fa3 3089 up_read(&vcpu->kvm->slots_lock);
b93463aa
AK		 3090}
3091
b6c7a5dc
HB		 3092static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3093{
3094 int r;
3095
a4535290 3096 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
b6c7a5dc 3097 pr_debug("vcpu %d received sipi with vector # %x\n",
ad312c7c 3098 vcpu->vcpu_id, vcpu->arch.sipi_vector);
b6c7a5dc
HB		 3099 kvm_lapic_reset(vcpu);
3100 r = kvm_x86_ops->vcpu_reset(vcpu);
3101 if (r)
3102 return r;
a4535290 3103 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
b6c7a5dc
HB		 3104 }
3105
3200f405 3106 down_read(&vcpu->kvm->slots_lock);
b93463aa
AK		 3107 vapic_enter(vcpu);
3108
b6c7a5dc
HB		 3109preempted:
3110 if (vcpu->guest_debug.enabled)
3111 kvm_x86_ops->guest_debug_pre(vcpu);
3112
3113again:
2e53d63a
MT		 3114 if (vcpu->requests)
3115 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3116 kvm_mmu_unload(vcpu);
3117
b6c7a5dc
HB		 3118 r = kvm_mmu_reload(vcpu);
3119 if (unlikely(r))
3120 goto out;
3121
2f52d58c
AK		 3122 if (vcpu->requests) {
3123 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
2f599714 3124 __kvm_migrate_timers(vcpu);
d4acf7e7
MT		 3125 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3126 kvm_x86_ops->tlb_flush(vcpu);
b93463aa
AK		 3127 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3128 &vcpu->requests)) {
3129 kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
3130 r = 0;
3131 goto out;
3132 }
71c4dfaf
JR		 3133 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3134 kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
3135 r = 0;
3136 goto out;
3137 }
2f52d58c 3138 }
b93463aa 3139
06e05645 3140 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
b6c7a5dc
HB		 3141 kvm_inject_pending_timer_irqs(vcpu);
3142
3143 preempt_disable();
3144
3145 kvm_x86_ops->prepare_guest_switch(vcpu);
3146 kvm_load_guest_fpu(vcpu);
3147
3148 local_irq_disable();
3149
d4acf7e7 3150 if (vcpu->requests || need_resched()) {
6c142801
AK		 3151 local_irq_enable();
3152 preempt_enable();
3153 r = 1;
3154 goto out;
3155 }
3156
b6c7a5dc
HB		 3157 if (signal_pending(current)) {
3158 local_irq_enable();
3159 preempt_enable();
3160 r = -EINTR;
3161 kvm_run->exit_reason = KVM_EXIT_INTR;
3162 ++vcpu->stat.signal_exits;
3163 goto out;
3164 }
3165
e9571ed5
MT		 3166 vcpu->guest_mode = 1;
3167 /*
3168 * Make sure that guest_mode assignment won't happen after
3169 * testing the pending IRQ vector bitmap.
3170 */
3171 smp_wmb();
3172
ad312c7c 3173 if (vcpu->arch.exception.pending)
298101da
AK		 3174 __queue_exception(vcpu);
3175 else if (irqchip_in_kernel(vcpu->kvm))
b6c7a5dc 3176 kvm_x86_ops->inject_pending_irq(vcpu);
eb9774f0 3177 else
b6c7a5dc
HB		 3178 kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
3179
b93463aa
AK		 3180 kvm_lapic_sync_to_vapic(vcpu);
3181
3200f405
MT		 3182 up_read(&vcpu->kvm->slots_lock);
3183
b6c7a5dc
HB		 3184 kvm_guest_enter();
3185
b6c7a5dc 3186
2714d1d3 3187 KVMTRACE_0D(VMENTRY, vcpu, entryexit);
b6c7a5dc
HB		 3188 kvm_x86_ops->run(vcpu, kvm_run);
3189
3190 vcpu->guest_mode = 0;
3191 local_irq_enable();
3192
3193 ++vcpu->stat.exits;
3194
3195 /*
3196 * We must have an instruction between local_irq_enable() and
3197 * kvm_guest_exit(), so the timer interrupt isn't delayed by
3198 * the interrupt shadow. The stat.exits increment will do nicely.
3199 * But we need to prevent reordering, hence this barrier():
3200 */
3201 barrier();
3202
3203 kvm_guest_exit();
3204
3205 preempt_enable();
3206
3200f405
MT		 3207 down_read(&vcpu->kvm->slots_lock);
3208
b6c7a5dc
HB		 3209 /*
3210 * Profile KVM exit RIPs:
3211 */
3212 if (unlikely(prof_on == KVM_PROFILING)) {
5fdbf976
MT		 3213 unsigned long rip = kvm_rip_read(vcpu);
3214 profile_hit(KVM_PROFILING, (void *)rip);
b6c7a5dc
HB		 3215 }
3216
ad312c7c
ZX		 3217 if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
3218 vcpu->arch.exception.pending = false;
298101da 3219
b93463aa
AK		 3220 kvm_lapic_sync_from_vapic(vcpu);
3221
b6c7a5dc
HB		 3222 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
3223
3224 if (r > 0) {
3225 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
3226 r = -EINTR;
3227 kvm_run->exit_reason = KVM_EXIT_INTR;
3228 ++vcpu->stat.request_irq_exits;
3229 goto out;
3230 }
e1beb1d3 3231 if (!need_resched())
b6c7a5dc 3232 goto again;
b6c7a5dc
HB		 3233 }
3234
3235out:
3200f405 3236 up_read(&vcpu->kvm->slots_lock);
b6c7a5dc
HB		 3237 if (r > 0) {
3238 kvm_resched(vcpu);
3200f405 3239 down_read(&vcpu->kvm->slots_lock);
b6c7a5dc
HB		 3240 goto preempted;
3241 }
3242
3243 post_kvm_run_save(vcpu, kvm_run);
3244
b93463aa
AK		 3245 vapic_exit(vcpu);
3246
b6c7a5dc
HB		 3247 return r;
3248}
3249
3250int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3251{
3252 int r;
3253 sigset_t sigsaved;
3254
3255 vcpu_load(vcpu);
3256
ac9f6dc0
AK		 3257 if (vcpu->sigset_active)
3258 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3259
a4535290 3260 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
b6c7a5dc 3261 kvm_vcpu_block(vcpu);
ac9f6dc0
AK		 3262 r = -EAGAIN;
3263 goto out;
b6c7a5dc
HB		 3264 }
3265
b6c7a5dc
HB		 3266 /* re-sync apic's tpr */
3267 if (!irqchip_in_kernel(vcpu->kvm))
2d3ad1f4 3268 kvm_set_cr8(vcpu, kvm_run->cr8);
b6c7a5dc 3269
ad312c7c 3270 if (vcpu->arch.pio.cur_count) {
b6c7a5dc
HB		 3271 r = complete_pio(vcpu);
3272 if (r)
3273 goto out;
3274 }
3275#if CONFIG_HAS_IOMEM
3276 if (vcpu->mmio_needed) {
3277 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3278 vcpu->mmio_read_completed = 1;
3279 vcpu->mmio_needed = 0;
3200f405
MT		 3280
3281 down_read(&vcpu->kvm->slots_lock);
b6c7a5dc 3282 r = emulate_instruction(vcpu, kvm_run,
571008da
SY		 3283 vcpu->arch.mmio_fault_cr2, 0,
3284 EMULTYPE_NO_DECODE);
3200f405 3285 up_read(&vcpu->kvm->slots_lock);
b6c7a5dc
HB		 3286 if (r == EMULATE_DO_MMIO) {
3287 /*
3288 * Read-modify-write. Back to userspace.
3289 */
3290 r = 0;
3291 goto out;
3292 }
3293 }
3294#endif
5fdbf976
MT		 3295 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3296 kvm_register_write(vcpu, VCPU_REGS_RAX,
3297 kvm_run->hypercall.ret);
b6c7a5dc
HB		 3298
3299 r = __vcpu_run(vcpu, kvm_run);
3300
3301out:
3302 if (vcpu->sigset_active)
3303 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3304
3305 vcpu_put(vcpu);
3306 return r;
3307}
3308
3309int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3310{
3311 vcpu_load(vcpu);
3312
5fdbf976
MT		 3313 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3314 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3315 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3316 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3317 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3318 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3319 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3320 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
b6c7a5dc 3321#ifdef CONFIG_X86_64
5fdbf976
MT		 3322 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3323 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3324 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3325 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3326 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3327 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3328 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3329 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
b6c7a5dc
HB		 3330#endif
3331
5fdbf976 3332 regs->rip = kvm_rip_read(vcpu);
b6c7a5dc
HB		 3333 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3334
3335 /*
3336 * Don't leak debug flags in case they were set for guest debugging
3337 */
3338 if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep)
3339 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3340
3341 vcpu_put(vcpu);
3342
3343 return 0;
3344}
3345
3346int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3347{
3348 vcpu_load(vcpu);
3349
5fdbf976
MT		 3350 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3351 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3352 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3353 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3354 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3355 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3356 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3357 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
b6c7a5dc 3358#ifdef CONFIG_X86_64
5fdbf976
MT		 3359 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3360 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3361 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3362 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3363 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3364 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3365 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3366 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3367
b6c7a5dc
HB		 3368#endif
3369
5fdbf976 3370 kvm_rip_write(vcpu, regs->rip);
b6c7a5dc
HB		 3371 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3372
b6c7a5dc 3373
b4f14abd
JK		 3374 vcpu->arch.exception.pending = false;
3375
b6c7a5dc
HB		 3376 vcpu_put(vcpu);
3377
3378 return 0;
3379}
3380
3e6e0aab
GT		 3381void kvm_get_segment(struct kvm_vcpu *vcpu,
3382 struct kvm_segment *var, int seg)
b6c7a5dc 3383{
14af3f3c 3384 kvm_x86_ops->get_segment(vcpu, var, seg);
b6c7a5dc
HB		 3385}
3386
3387void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3388{
3389 struct kvm_segment cs;
3390
3e6e0aab 3391 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
b6c7a5dc
HB		 3392 *db = cs.db;
3393 *l = cs.l;
3394}
3395EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3396
3397int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3398 struct kvm_sregs *sregs)
3399{
3400 struct descriptor_table dt;
3401 int pending_vec;
3402
3403 vcpu_load(vcpu);
3404
3e6e0aab
GT		 3405 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3406 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3407 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3408 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3409 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3410 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
b6c7a5dc 3411
3e6e0aab
GT		 3412 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3413 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
b6c7a5dc
HB		 3414
3415 kvm_x86_ops->get_idt(vcpu, &dt);
3416 sregs->idt.limit = dt.limit;
3417 sregs->idt.base = dt.base;
3418 kvm_x86_ops->get_gdt(vcpu, &dt);
3419 sregs->gdt.limit = dt.limit;
3420 sregs->gdt.base = dt.base;
3421
3422 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
ad312c7c
ZX		 3423 sregs->cr0 = vcpu->arch.cr0;
3424 sregs->cr2 = vcpu->arch.cr2;
3425 sregs->cr3 = vcpu->arch.cr3;
3426 sregs->cr4 = vcpu->arch.cr4;
2d3ad1f4 3427 sregs->cr8 = kvm_get_cr8(vcpu);
ad312c7c 3428 sregs->efer = vcpu->arch.shadow_efer;
b6c7a5dc
HB		 3429 sregs->apic_base = kvm_get_apic_base(vcpu);
3430
3431 if (irqchip_in_kernel(vcpu->kvm)) {
3432 memset(sregs->interrupt_bitmap, 0,
3433 sizeof sregs->interrupt_bitmap);
3434 pending_vec = kvm_x86_ops->get_irq(vcpu);
3435 if (pending_vec >= 0)
3436 set_bit(pending_vec,
3437 (unsigned long *)sregs->interrupt_bitmap);
3438 } else
ad312c7c 3439 memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
b6c7a5dc
HB		 3440 sizeof sregs->interrupt_bitmap);
3441
3442 vcpu_put(vcpu);
3443
3444 return 0;
3445}
3446
62d9f0db
MT		 3447int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3448 struct kvm_mp_state *mp_state)
3449{
3450 vcpu_load(vcpu);
3451 mp_state->mp_state = vcpu->arch.mp_state;
3452 vcpu_put(vcpu);
3453 return 0;
3454}
3455
3456int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3457 struct kvm_mp_state *mp_state)
3458{
3459 vcpu_load(vcpu);
3460 vcpu->arch.mp_state = mp_state->mp_state;
3461 vcpu_put(vcpu);
3462 return 0;
3463}
3464
3e6e0aab 3465static void kvm_set_segment(struct kvm_vcpu *vcpu,
b6c7a5dc
HB		 3466 struct kvm_segment *var, int seg)
3467{
14af3f3c 3468 kvm_x86_ops->set_segment(vcpu, var, seg);
b6c7a5dc
HB		 3469}
3470
37817f29
IE		 3471static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3472 struct kvm_segment *kvm_desct)
3473{
3474 kvm_desct->base = seg_desc->base0;
3475 kvm_desct->base |= seg_desc->base1 << 16;
3476 kvm_desct->base |= seg_desc->base2 << 24;
3477 kvm_desct->limit = seg_desc->limit0;
3478 kvm_desct->limit |= seg_desc->limit << 16;
c93cd3a5
MT		 3479 if (seg_desc->g) {
3480 kvm_desct->limit <<= 12;
3481 kvm_desct->limit |= 0xfff;
3482 }
37817f29
IE		 3483 kvm_desct->selector = selector;
3484 kvm_desct->type = seg_desc->type;
3485 kvm_desct->present = seg_desc->p;
3486 kvm_desct->dpl = seg_desc->dpl;
3487 kvm_desct->db = seg_desc->d;
3488 kvm_desct->s = seg_desc->s;
3489 kvm_desct->l = seg_desc->l;
3490 kvm_desct->g = seg_desc->g;
3491 kvm_desct->avl = seg_desc->avl;
3492 if (!selector)
3493 kvm_desct->unusable = 1;
3494 else
3495 kvm_desct->unusable = 0;
3496 kvm_desct->padding = 0;
3497}
3498
3499static void get_segment_descritptor_dtable(struct kvm_vcpu *vcpu,
3500 u16 selector,
3501 struct descriptor_table *dtable)
3502{
3503 if (selector & 1 << 2) {
3504 struct kvm_segment kvm_seg;
3505
3e6e0aab 3506 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
37817f29
IE		 3507
3508 if (kvm_seg.unusable)
3509 dtable->limit = 0;
3510 else
3511 dtable->limit = kvm_seg.limit;
3512 dtable->base = kvm_seg.base;
3513 }
3514 else
3515 kvm_x86_ops->get_gdt(vcpu, dtable);
3516}
3517
3518/* allowed just for 8 bytes segments */
3519static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3520 struct desc_struct *seg_desc)
3521{
98899aa0 3522 gpa_t gpa;
37817f29
IE		 3523 struct descriptor_table dtable;
3524 u16 index = selector >> 3;
3525
3526 get_segment_descritptor_dtable(vcpu, selector, &dtable);
3527
3528 if (dtable.limit < index * 8 + 7) {
3529 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
3530 return 1;
3531 }
98899aa0
MT		 3532 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3533 gpa += index * 8;
3534 return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8);
37817f29
IE		 3535}
3536
3537/* allowed just for 8 bytes segments */
3538static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3539 struct desc_struct *seg_desc)
3540{
98899aa0 3541 gpa_t gpa;
37817f29
IE		 3542 struct descriptor_table dtable;
3543 u16 index = selector >> 3;
3544
3545 get_segment_descritptor_dtable(vcpu, selector, &dtable);
3546
3547 if (dtable.limit < index * 8 + 7)
3548 return 1;
98899aa0
MT		 3549 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3550 gpa += index * 8;
3551 return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8);
37817f29
IE		 3552}
3553
3554static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
3555 struct desc_struct *seg_desc)
3556{
3557 u32 base_addr;
3558
3559 base_addr = seg_desc->base0;
3560 base_addr |= (seg_desc->base1 << 16);
3561 base_addr |= (seg_desc->base2 << 24);
3562
98899aa0 3563 return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
37817f29
IE		 3564}
3565
37817f29
IE		 3566static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
3567{
3568 struct kvm_segment kvm_seg;
3569
3e6e0aab 3570 kvm_get_segment(vcpu, &kvm_seg, seg);
37817f29
IE		 3571 return kvm_seg.selector;
3572}
3573
3574static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
3575 u16 selector,
3576 struct kvm_segment *kvm_seg)
3577{
3578 struct desc_struct seg_desc;
3579
3580 if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
3581 return 1;
3582 seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
3583 return 0;
3584}
3585
3e6e0aab
GT		 3586int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3587 int type_bits, int seg)
37817f29
IE		 3588{
3589 struct kvm_segment kvm_seg;
3590
3591 if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
3592 return 1;
3593 kvm_seg.type |= type_bits;
3594
3595 if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
3596 seg != VCPU_SREG_LDTR)
3597 if (!kvm_seg.s)
3598 kvm_seg.unusable = 1;
3599
3e6e0aab 3600 kvm_set_segment(vcpu, &kvm_seg, seg);
37817f29
IE		 3601 return 0;
3602}
3603
3604static void save_state_to_tss32(struct kvm_vcpu *vcpu,
3605 struct tss_segment_32 *tss)
3606{
3607 tss->cr3 = vcpu->arch.cr3;
5fdbf976 3608 tss->eip = kvm_rip_read(vcpu);
37817f29 3609 tss->eflags = kvm_x86_ops->get_rflags(vcpu);
5fdbf976
MT		 3610 tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3611 tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3612 tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3613 tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3614 tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3615 tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3616 tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3617 tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
37817f29
IE		 3618 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3619 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3620 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3621 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3622 tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
3623 tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
3624 tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3625 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3626}
3627
3628static int load_state_from_tss32(struct kvm_vcpu *vcpu,
3629 struct tss_segment_32 *tss)
3630{
3631 kvm_set_cr3(vcpu, tss->cr3);
3632
5fdbf976 3633 kvm_rip_write(vcpu, tss->eip);
37817f29
IE		 3634 kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
3635
5fdbf976
MT		 3636 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
3637 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
3638 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
3639 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
3640 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
3641 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
3642 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
3643 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
37817f29 3644
3e6e0aab 3645 if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
37817f29
IE		 3646 return 1;
3647
3e6e0aab 3648 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
37817f29
IE		 3649 return 1;
3650
3e6e0aab 3651 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
37817f29
IE		 3652 return 1;
3653
3e6e0aab 3654 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
37817f29
IE		 3655 return 1;
3656
3e6e0aab 3657 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
37817f29
IE		 3658 return 1;
3659
3e6e0aab 3660 if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
37817f29
IE		 3661 return 1;
3662
3e6e0aab 3663 if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
37817f29
IE		 3664 return 1;
3665 return 0;
3666}
3667
3668static void save_state_to_tss16(struct kvm_vcpu *vcpu,
3669 struct tss_segment_16 *tss)
3670{
5fdbf976 3671 tss->ip = kvm_rip_read(vcpu);
37817f29 3672 tss->flag = kvm_x86_ops->get_rflags(vcpu);
5fdbf976
MT		 3673 tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3674 tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3675 tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3676 tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3677 tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3678 tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3679 tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
3680 tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
37817f29
IE		 3681
3682 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3683 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3684 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3685 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3686 tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3687 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3688}
3689
3690static int load_state_from_tss16(struct kvm_vcpu *vcpu,
3691 struct tss_segment_16 *tss)
3692{
5fdbf976 3693 kvm_rip_write(vcpu, tss->ip);
37817f29 3694 kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
5fdbf976
MT		 3695 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
3696 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
3697 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
3698 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
3699 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
3700 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
3701 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
3702 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
37817f29 3703
3e6e0aab 3704 if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
37817f29
IE		 3705 return 1;
3706
3e6e0aab 3707 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
37817f29
IE		 3708 return 1;
3709
3e6e0aab 3710 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
37817f29
IE		 3711 return 1;
3712
3e6e0aab 3713 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
37817f29
IE		 3714 return 1;
3715
3e6e0aab 3716 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
37817f29
IE		 3717 return 1;
3718 return 0;
3719}
3720
8b2cf73c 3721static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
34198bf8 3722 u32 old_tss_base,
37817f29
IE		 3723 struct desc_struct *nseg_desc)
3724{
3725 struct tss_segment_16 tss_segment_16;
3726 int ret = 0;
3727
34198bf8
MT		 3728 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3729 sizeof tss_segment_16))
37817f29
IE		 3730 goto out;
3731
3732 save_state_to_tss16(vcpu, &tss_segment_16);
37817f29 3733
34198bf8
MT		 3734 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3735 sizeof tss_segment_16))
37817f29 3736 goto out;
34198bf8
MT		 3737
3738 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3739 &tss_segment_16, sizeof tss_segment_16))
3740 goto out;
3741
37817f29
IE		 3742 if (load_state_from_tss16(vcpu, &tss_segment_16))
3743 goto out;
3744
3745 ret = 1;
3746out:
3747 return ret;
3748}
3749
8b2cf73c 3750static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
34198bf8 3751 u32 old_tss_base,
37817f29
IE		 3752 struct desc_struct *nseg_desc)
3753{
3754 struct tss_segment_32 tss_segment_32;
3755 int ret = 0;
3756
34198bf8
MT		 3757 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3758 sizeof tss_segment_32))
37817f29
IE		 3759 goto out;
3760
3761 save_state_to_tss32(vcpu, &tss_segment_32);
37817f29 3762
34198bf8
MT		 3763 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3764 sizeof tss_segment_32))
3765 goto out;
3766
3767 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3768 &tss_segment_32, sizeof tss_segment_32))
37817f29 3769 goto out;
34198bf8 3770
37817f29
IE		 3771 if (load_state_from_tss32(vcpu, &tss_segment_32))
3772 goto out;
3773
3774 ret = 1;
3775out:
3776 return ret;
3777}
3778
3779int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
3780{
3781 struct kvm_segment tr_seg;
3782 struct desc_struct cseg_desc;
3783 struct desc_struct nseg_desc;
3784 int ret = 0;
34198bf8
MT		 3785 u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
3786 u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
37817f29 3787
34198bf8 3788 old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
37817f29 3789
34198bf8
MT		 3790 /* FIXME: Handle errors. Failure to read either TSS or their
3791 * descriptors should generate a pagefault.
3792 */
37817f29
IE		 3793 if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
3794 goto out;
3795
34198bf8 3796 if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
37817f29
IE		 3797 goto out;
3798
37817f29
IE		 3799 if (reason != TASK_SWITCH_IRET) {
3800 int cpl;
3801
3802 cpl = kvm_x86_ops->get_cpl(vcpu);
3803 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
3804 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
3805 return 1;
3806 }
3807 }
3808
3809 if (!nseg_desc.p || (nseg_desc.limit0 | nseg_desc.limit << 16) < 0x67) {
3810 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
3811 return 1;
3812 }
3813
3814 if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
3fe913e7 3815 cseg_desc.type &= ~(1 << 1); //clear the B flag
34198bf8 3816 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
37817f29
IE		 3817 }
3818
3819 if (reason == TASK_SWITCH_IRET) {
3820 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3821 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
3822 }
3823
3824 kvm_x86_ops->skip_emulated_instruction(vcpu);
37817f29
IE		 3825
3826 if (nseg_desc.type & 8)
34198bf8 3827 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_base,
37817f29
IE		 3828 &nseg_desc);
3829 else
34198bf8 3830 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_base,
37817f29
IE		 3831 &nseg_desc);
3832
3833 if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
3834 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3835 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
3836 }
3837
3838 if (reason != TASK_SWITCH_IRET) {
3fe913e7 3839 nseg_desc.type |= (1 << 1);
37817f29
IE		 3840 save_guest_segment_descriptor(vcpu, tss_selector,
3841 &nseg_desc);
3842 }
3843
3844 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
3845 seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
3846 tr_seg.type = 11;
3e6e0aab 3847 kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
37817f29 3848out:
37817f29
IE		 3849 return ret;
3850}
3851EXPORT_SYMBOL_GPL(kvm_task_switch);
3852
b6c7a5dc
HB		 3853int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
3854 struct kvm_sregs *sregs)
3855{
3856 int mmu_reset_needed = 0;
3857 int i, pending_vec, max_bits;
3858 struct descriptor_table dt;
3859
3860 vcpu_load(vcpu);
3861
3862 dt.limit = sregs->idt.limit;
3863 dt.base = sregs->idt.base;
3864 kvm_x86_ops->set_idt(vcpu, &dt);
3865 dt.limit = sregs->gdt.limit;
3866 dt.base = sregs->gdt.base;
3867 kvm_x86_ops->set_gdt(vcpu, &dt);
3868
ad312c7c
ZX		 3869 vcpu->arch.cr2 = sregs->cr2;
3870 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
3871 vcpu->arch.cr3 = sregs->cr3;
b6c7a5dc 3872
2d3ad1f4 3873 kvm_set_cr8(vcpu, sregs->cr8);
b6c7a5dc 3874
ad312c7c 3875 mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
b6c7a5dc 3876 kvm_x86_ops->set_efer(vcpu, sregs->efer);
b6c7a5dc
HB		 3877 kvm_set_apic_base(vcpu, sregs->apic_base);
3878
3879 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3880
ad312c7c 3881 mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
b6c7a5dc 3882 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
d7306163 3883 vcpu->arch.cr0 = sregs->cr0;
b6c7a5dc 3884
ad312c7c 3885 mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
b6c7a5dc
HB		 3886 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
3887 if (!is_long_mode(vcpu) && is_pae(vcpu))
ad312c7c 3888 load_pdptrs(vcpu, vcpu->arch.cr3);
b6c7a5dc
HB		 3889
3890 if (mmu_reset_needed)
3891 kvm_mmu_reset_context(vcpu);
3892
3893 if (!irqchip_in_kernel(vcpu->kvm)) {
ad312c7c
ZX		 3894 memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
3895 sizeof vcpu->arch.irq_pending);
3896 vcpu->arch.irq_summary = 0;
3897 for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
3898 if (vcpu->arch.irq_pending[i])
3899 __set_bit(i, &vcpu->arch.irq_summary);
b6c7a5dc
HB		 3900 } else {
3901 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
3902 pending_vec = find_first_bit(
3903 (const unsigned long *)sregs->interrupt_bitmap,
3904 max_bits);
3905 /* Only pending external irq is handled here */
3906 if (pending_vec < max_bits) {
3907 kvm_x86_ops->set_irq(vcpu, pending_vec);
3908 pr_debug("Set back pending irq %d\n",
3909 pending_vec);
3910 }
3911 }
3912
3e6e0aab
GT		 3913 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3914 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3915 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3916 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3917 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3918 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
b6c7a5dc 3919
3e6e0aab
GT		 3920 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3921 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
b6c7a5dc
HB		 3922
3923 vcpu_put(vcpu);
3924
3925 return 0;
3926}
3927
3928int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
3929 struct kvm_debug_guest *dbg)
3930{
3931 int r;
3932
3933 vcpu_load(vcpu);
3934
3935 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
3936
3937 vcpu_put(vcpu);
3938
3939 return r;
3940}
3941
d0752060
HB		 3942/*
3943 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
3944 * we have asm/x86/processor.h
3945 */
3946struct fxsave {
3947 u16 cwd;
3948 u16 swd;
3949 u16 twd;
3950 u16 fop;
3951 u64 rip;
3952 u64 rdp;
3953 u32 mxcsr;
3954 u32 mxcsr_mask;
3955 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
3956#ifdef CONFIG_X86_64
3957 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
3958#else
3959 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
3960#endif
3961};
3962
8b006791
ZX		 3963/*
3964 * Translate a guest virtual address to a guest physical address.
3965 */
3966int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
3967 struct kvm_translation *tr)
3968{
3969 unsigned long vaddr = tr->linear_address;
3970 gpa_t gpa;
3971
3972 vcpu_load(vcpu);
72dc67a6 3973 down_read(&vcpu->kvm->slots_lock);
ad312c7c 3974 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
72dc67a6 3975 up_read(&vcpu->kvm->slots_lock);
8b006791
ZX		 3976 tr->physical_address = gpa;
3977 tr->valid = gpa != UNMAPPED_GVA;
3978 tr->writeable = 1;
3979 tr->usermode = 0;
8b006791
ZX		 3980 vcpu_put(vcpu);
3981
3982 return 0;
3983}
3984
d0752060
HB		 3985int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
3986{
ad312c7c 3987 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
d0752060
HB		 3988
3989 vcpu_load(vcpu);
3990
3991 memcpy(fpu->fpr, fxsave->st_space, 128);
3992 fpu->fcw = fxsave->cwd;
3993 fpu->fsw = fxsave->swd;
3994 fpu->ftwx = fxsave->twd;
3995 fpu->last_opcode = fxsave->fop;
3996 fpu->last_ip = fxsave->rip;
3997 fpu->last_dp = fxsave->rdp;
3998 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
3999
4000 vcpu_put(vcpu);
4001
4002 return 0;
4003}
4004
4005int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4006{
ad312c7c 4007 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
d0752060
HB		 4008
4009 vcpu_load(vcpu);
4010
4011 memcpy(fxsave->st_space, fpu->fpr, 128);
4012 fxsave->cwd = fpu->fcw;
4013 fxsave->swd = fpu->fsw;
4014 fxsave->twd = fpu->ftwx;
4015 fxsave->fop = fpu->last_opcode;
4016 fxsave->rip = fpu->last_ip;
4017 fxsave->rdp = fpu->last_dp;
4018 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4019
4020 vcpu_put(vcpu);
4021
4022 return 0;
4023}
4024
4025void fx_init(struct kvm_vcpu *vcpu)
4026{
4027 unsigned after_mxcsr_mask;
4028
bc1a34f1
AA		 4029 /*
4030 * Touch the fpu the first time in non atomic context as if
4031 * this is the first fpu instruction the exception handler
4032 * will fire before the instruction returns and it'll have to
4033 * allocate ram with GFP_KERNEL.
4034 */
4035 if (!used_math())
d6e88aec 4036 kvm_fx_save(&vcpu->arch.host_fx_image);
bc1a34f1 4037
d0752060
HB		 4038 /* Initialize guest FPU by resetting ours and saving into guest's */
4039 preempt_disable();
d6e88aec
AK		 4040 kvm_fx_save(&vcpu->arch.host_fx_image);
4041 kvm_fx_finit();
4042 kvm_fx_save(&vcpu->arch.guest_fx_image);
4043 kvm_fx_restore(&vcpu->arch.host_fx_image);
d0752060
HB		 4044 preempt_enable();
4045
ad312c7c 4046 vcpu->arch.cr0 |= X86_CR0_ET;
d0752060 4047 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
ad312c7c
ZX		 4048 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4049 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
d0752060
HB		 4050 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4051}
4052EXPORT_SYMBOL_GPL(fx_init);
4053
4054void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4055{
4056 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4057 return;
4058
4059 vcpu->guest_fpu_loaded = 1;
d6e88aec
AK		 4060 kvm_fx_save(&vcpu->arch.host_fx_image);
4061 kvm_fx_restore(&vcpu->arch.guest_fx_image);
d0752060
HB		 4062}
4063EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4064
4065void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4066{
4067 if (!vcpu->guest_fpu_loaded)
4068 return;
4069
4070 vcpu->guest_fpu_loaded = 0;
d6e88aec
AK		 4071 kvm_fx_save(&vcpu->arch.guest_fx_image);
4072 kvm_fx_restore(&vcpu->arch.host_fx_image);
f096ed85 4073 ++vcpu->stat.fpu_reload;
d0752060
HB		 4074}
4075EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
e9b11c17
ZX		 4076
4077void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4078{
4079 kvm_x86_ops->vcpu_free(vcpu);
4080}
4081
4082struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4083 unsigned int id)
4084{
26e5215f
AK		 4085 return kvm_x86_ops->vcpu_create(kvm, id);
4086}
e9b11c17 4087
26e5215f
AK		 4088int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4089{
4090 int r;
e9b11c17
ZX		 4091
4092 /* We do fxsave: this must be aligned. */
ad312c7c 4093 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
e9b11c17
ZX		 4094
4095 vcpu_load(vcpu);
4096 r = kvm_arch_vcpu_reset(vcpu);
4097 if (r == 0)
4098 r = kvm_mmu_setup(vcpu);
4099 vcpu_put(vcpu);
4100 if (r < 0)
4101 goto free_vcpu;
4102
26e5215f 4103 return 0;
e9b11c17
ZX		 4104free_vcpu:
4105 kvm_x86_ops->vcpu_free(vcpu);
26e5215f 4106 return r;
e9b11c17
ZX		 4107}
4108
d40ccc62 4109void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
e9b11c17
ZX		 4110{
4111 vcpu_load(vcpu);
4112 kvm_mmu_unload(vcpu);
4113 vcpu_put(vcpu);
4114
4115 kvm_x86_ops->vcpu_free(vcpu);
4116}
4117
4118int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4119{
4120 return kvm_x86_ops->vcpu_reset(vcpu);
4121}
4122
4123void kvm_arch_hardware_enable(void *garbage)
4124{
4125 kvm_x86_ops->hardware_enable(garbage);
4126}
4127
4128void kvm_arch_hardware_disable(void *garbage)
4129{
4130 kvm_x86_ops->hardware_disable(garbage);
4131}
4132
4133int kvm_arch_hardware_setup(void)
4134{
4135 return kvm_x86_ops->hardware_setup();
4136}
4137
4138void kvm_arch_hardware_unsetup(void)
4139{
4140 kvm_x86_ops->hardware_unsetup();
4141}
4142
4143void kvm_arch_check_processor_compat(void *rtn)
4144{
4145 kvm_x86_ops->check_processor_compatibility(rtn);
4146}
4147
4148int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4149{
4150 struct page *page;
4151 struct kvm *kvm;
4152 int r;
4153
4154 BUG_ON(vcpu->kvm == NULL);
4155 kvm = vcpu->kvm;
4156
ad312c7c 4157 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
e9b11c17 4158 if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
a4535290 4159 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
e9b11c17 4160 else
a4535290 4161 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
e9b11c17
ZX		 4162
4163 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4164 if (!page) {
4165 r = -ENOMEM;
4166 goto fail;
4167 }
ad312c7c 4168 vcpu->arch.pio_data = page_address(page);
e9b11c17
ZX		 4169
4170 r = kvm_mmu_create(vcpu);
4171 if (r < 0)
4172 goto fail_free_pio_data;
4173
4174 if (irqchip_in_kernel(kvm)) {
4175 r = kvm_create_lapic(vcpu);
4176 if (r < 0)
4177 goto fail_mmu_destroy;
4178 }
4179
4180 return 0;
4181
4182fail_mmu_destroy:
4183 kvm_mmu_destroy(vcpu);
4184fail_free_pio_data:
ad312c7c 4185 free_page((unsigned long)vcpu->arch.pio_data);
e9b11c17
ZX		 4186fail:
4187 return r;
4188}
4189
4190void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4191{
4192 kvm_free_lapic(vcpu);
3200f405 4193 down_read(&vcpu->kvm->slots_lock);
e9b11c17 4194 kvm_mmu_destroy(vcpu);
3200f405 4195 up_read(&vcpu->kvm->slots_lock);
ad312c7c 4196 free_page((unsigned long)vcpu->arch.pio_data);
e9b11c17 4197}
d19a9cd2
ZX		 4198
4199struct kvm *kvm_arch_create_vm(void)
4200{
4201 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4202
4203 if (!kvm)
4204 return ERR_PTR(-ENOMEM);
4205
f05e70ac 4206 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4d5c5d0f 4207 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
d19a9cd2
ZX		 4208
4209 return kvm;
4210}
4211
4212static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4213{
4214 vcpu_load(vcpu);
4215 kvm_mmu_unload(vcpu);
4216 vcpu_put(vcpu);
4217}
4218
4219static void kvm_free_vcpus(struct kvm *kvm)
4220{
4221 unsigned int i;
4222
4223 /*
4224 * Unpin any mmu pages first.
4225 */
4226 for (i = 0; i < KVM_MAX_VCPUS; ++i)
4227 if (kvm->vcpus[i])
4228 kvm_unload_vcpu_mmu(kvm->vcpus[i]);
4229 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
4230 if (kvm->vcpus[i]) {
4231 kvm_arch_vcpu_free(kvm->vcpus[i]);
4232 kvm->vcpus[i] = NULL;
4233 }
4234 }
4235
4236}
4237
4238void kvm_arch_destroy_vm(struct kvm *kvm)
4239{
4d5c5d0f 4240 kvm_free_assigned_devices(kvm);
7837699f 4241 kvm_free_pit(kvm);
d7deeeb0
ZX		 4242 kfree(kvm->arch.vpic);
4243 kfree(kvm->arch.vioapic);
d19a9cd2
ZX		 4244 kvm_free_vcpus(kvm);
4245 kvm_free_physmem(kvm);
3d45830c
AK		 4246 if (kvm->arch.apic_access_page)
4247 put_page(kvm->arch.apic_access_page);
b7ebfb05
SY		 4248 if (kvm->arch.ept_identity_pagetable)
4249 put_page(kvm->arch.ept_identity_pagetable);
d19a9cd2
ZX		 4250 kfree(kvm);
4251}
0de10343
ZX		 4252
4253int kvm_arch_set_memory_region(struct kvm *kvm,
4254 struct kvm_userspace_memory_region *mem,
4255 struct kvm_memory_slot old,
4256 int user_alloc)
4257{
4258 int npages = mem->memory_size >> PAGE_SHIFT;
4259 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4260
4261 /*To keep backward compatibility with older userspace,
4262 *x86 needs to hanlde !user_alloc case.
4263 */
4264 if (!user_alloc) {
4265 if (npages && !old.rmap) {
604b38ac
AA		 4266 unsigned long userspace_addr;
4267
72dc67a6 4268 down_write(&current->mm->mmap_sem);
604b38ac
AA		 4269 userspace_addr = do_mmap(NULL, 0,
4270 npages * PAGE_SIZE,
4271 PROT_READ | PROT_WRITE,
4272 MAP_SHARED | MAP_ANONYMOUS,
4273 0);
72dc67a6 4274 up_write(&current->mm->mmap_sem);
0de10343 4275
604b38ac
AA		 4276 if (IS_ERR((void *)userspace_addr))
4277 return PTR_ERR((void *)userspace_addr);
4278
4279 /* set userspace_addr atomically for kvm_hva_to_rmapp */
4280 spin_lock(&kvm->mmu_lock);
4281 memslot->userspace_addr = userspace_addr;
4282 spin_unlock(&kvm->mmu_lock);
0de10343
ZX		 4283 } else {
4284 if (!old.user_alloc && old.rmap) {
4285 int ret;
4286
72dc67a6 4287 down_write(&current->mm->mmap_sem);
0de10343
ZX		 4288 ret = do_munmap(current->mm, old.userspace_addr,
4289 old.npages * PAGE_SIZE);
72dc67a6 4290 up_write(&current->mm->mmap_sem);
0de10343
ZX		 4291 if (ret < 0)
4292 printk(KERN_WARNING
4293 "kvm_vm_ioctl_set_memory_region: "
4294 "failed to munmap memory\n");
4295 }
4296 }
4297 }
4298
f05e70ac 4299 if (!kvm->arch.n_requested_mmu_pages) {
0de10343
ZX		 4300 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4301 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4302 }
4303
4304 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4305 kvm_flush_remote_tlbs(kvm);
4306
4307 return 0;
4308}
1d737c8a 4309
34d4cb8f
MT		 4310void kvm_arch_flush_shadow(struct kvm *kvm)
4311{
4312 kvm_mmu_zap_all(kvm);
4313}
4314
1d737c8a
ZX		 4315int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4316{
a4535290
AK		 4317 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4318 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED;
1d737c8a 4319}
5736199a
ZX		 4320
4321static void vcpu_kick_intr(void *info)
4322{
4323#ifdef DEBUG
4324 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
4325 printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
4326#endif
4327}
4328
4329void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4330{
4331 int ipi_pcpu = vcpu->cpu;
e9571ed5 4332 int cpu = get_cpu();
5736199a
ZX		 4333
4334 if (waitqueue_active(&vcpu->wq)) {
4335 wake_up_interruptible(&vcpu->wq);
4336 ++vcpu->stat.halt_wakeup;
4337 }
e9571ed5
MT		 4338 /*
4339 * We may be called synchronously with irqs disabled in guest mode,
4340 * So need not to call smp_call_function_single() in that case.
4341 */
4342 if (vcpu->guest_mode && vcpu->cpu != cpu)
8691e5a8 4343 smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0);
e9571ed5 4344 put_cpu();
5736199a 4345}
Linux kernel - Deliverables
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