Commit | Line | Data |
---|---|---|
651bbe16 | 1 | /* |
27b46d76 | 2 | * Default generic APIC driver. This handles up to 8 CPUs. |
1da177e4 LT |
3 | */ |
4 | #define APIC_DEFINITION 1 | |
1da177e4 LT |
5 | #include <linux/threads.h> |
6 | #include <linux/cpumask.h> | |
7 | #include <asm/mpspec.h> | |
8 | #include <asm/mach-default/mach_apicdef.h> | |
9 | #include <asm/genapic.h> | |
10 | #include <asm/fixmap.h> | |
11 | #include <asm/apicdef.h> | |
12 | #include <linux/kernel.h> | |
13 | #include <linux/string.h> | |
14 | #include <linux/smp.h> | |
15 | #include <linux/init.h> | |
16 | #include <asm/mach-default/mach_apic.h> | |
17 | #include <asm/mach-default/mach_ipi.h> | |
18 | #include <asm/mach-default/mach_mpparse.h> | |
569712b2 | 19 | #include <asm/mach-default/mach_wakecpu.h> |
1da177e4 | 20 | |
e2d40b18 IM |
21 | static void default_vector_allocation_domain(int cpu, struct cpumask *retmask) |
22 | { | |
23 | /* | |
24 | * Careful. Some cpus do not strictly honor the set of cpus | |
25 | * specified in the interrupt destination when using lowest | |
26 | * priority interrupt delivery mode. | |
27 | * | |
28 | * In particular there was a hyperthreading cpu observed to | |
29 | * deliver interrupts to the wrong hyperthread when only one | |
30 | * hyperthread was specified in the interrupt desitination. | |
31 | */ | |
32 | *retmask = (cpumask_t) { { [0] = APIC_ALL_CPUS } }; | |
33 | } | |
34 | ||
1da177e4 | 35 | /* should be called last. */ |
e96763d6 | 36 | static int probe_default(void) |
651bbe16 | 37 | { |
1da177e4 | 38 | return 1; |
651bbe16 | 39 | } |
1da177e4 | 40 | |
0a7e8c64 IM |
41 | struct genapic apic_default = { |
42 | ||
43 | .name = "default", | |
44 | .probe = probe_default, | |
306db03b | 45 | .acpi_madt_oem_check = NULL, |
7ed248da | 46 | .apic_id_registered = default_apic_id_registered, |
0a7e8c64 | 47 | |
dcafa4a8 IM |
48 | .irq_delivery_mode = dest_LowestPrio, |
49 | /* logical delivery broadcast to all CPUs: */ | |
50 | .irq_dest_mode = 1, | |
0a7e8c64 | 51 | |
0a9cc20b | 52 | .target_cpus = default_target_cpus, |
08125d3e | 53 | .disable_esr = 0, |
bdb1a9b6 | 54 | .dest_logical = APIC_DEST_LOGICAL, |
d1d7cae8 IM |
55 | .check_apicid_used = default_check_apicid_used, |
56 | .check_apicid_present = default_check_apicid_present, | |
0a7e8c64 | 57 | |
e2d40b18 | 58 | .vector_allocation_domain = default_vector_allocation_domain, |
a5c43296 | 59 | .init_apic_ldr = default_init_apic_ldr, |
0a7e8c64 IM |
60 | |
61 | .ioapic_phys_id_map = ioapic_phys_id_map, | |
62 | .setup_apic_routing = setup_apic_routing, | |
63 | .multi_timer_check = multi_timer_check, | |
64 | .apicid_to_node = apicid_to_node, | |
65 | .cpu_to_logical_apicid = cpu_to_logical_apicid, | |
66 | .cpu_present_to_apicid = cpu_present_to_apicid, | |
67 | .apicid_to_cpu_present = apicid_to_cpu_present, | |
68 | .setup_portio_remap = setup_portio_remap, | |
69 | .check_phys_apicid_present = check_phys_apicid_present, | |
70 | .enable_apic_mode = enable_apic_mode, | |
71 | .phys_pkg_id = phys_pkg_id, | |
72 | .mps_oem_check = mps_oem_check, | |
73 | ||
74 | .get_apic_id = get_apic_id, | |
75 | .set_apic_id = NULL, | |
76 | .apic_id_mask = APIC_ID_MASK, | |
77 | ||
78 | .cpu_mask_to_apicid = cpu_mask_to_apicid, | |
79 | .cpu_mask_to_apicid_and = cpu_mask_to_apicid_and, | |
80 | ||
81 | .send_IPI_mask = send_IPI_mask, | |
82 | .send_IPI_mask_allbutself = NULL, | |
83 | .send_IPI_allbutself = send_IPI_allbutself, | |
84 | .send_IPI_all = send_IPI_all, | |
85 | .send_IPI_self = NULL, | |
86 | ||
87 | .wakeup_cpu = NULL, | |
88 | .trampoline_phys_low = TRAMPOLINE_PHYS_LOW, | |
89 | .trampoline_phys_high = TRAMPOLINE_PHYS_HIGH, | |
90 | .wait_for_init_deassert = wait_for_init_deassert, | |
91 | .smp_callin_clear_local_apic = smp_callin_clear_local_apic, | |
92 | .store_NMI_vector = store_NMI_vector, | |
93 | .restore_NMI_vector = restore_NMI_vector, | |
94 | .inquire_remote_apic = inquire_remote_apic, | |
95 | }; |