Commit | Line | Data |
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1da177e4 LT |
1 | /*---------------------------------------------------------------------------+ |
2 | | get_address.c | | |
3 | | | | |
4 | | Get the effective address from an FPU instruction. | | |
5 | | | | |
6 | | Copyright (C) 1992,1993,1994,1997 | | |
7 | | W. Metzenthen, 22 Parker St, Ormond, Vic 3163, | | |
8 | | Australia. E-mail billm@suburbia.net | | |
9 | | | | |
10 | | | | |
11 | +---------------------------------------------------------------------------*/ | |
12 | ||
13 | /*---------------------------------------------------------------------------+ | |
14 | | Note: | | |
15 | | The file contains code which accesses user memory. | | |
16 | | Emulator static data may change when user memory is accessed, due to | | |
17 | | other processes using the emulator while swapping is in progress. | | |
18 | +---------------------------------------------------------------------------*/ | |
19 | ||
1da177e4 LT |
20 | #include <linux/stddef.h> |
21 | ||
22 | #include <asm/uaccess.h> | |
23 | #include <asm/desc.h> | |
24 | ||
25 | #include "fpu_system.h" | |
26 | #include "exception.h" | |
27 | #include "fpu_emu.h" | |
28 | ||
1da177e4 LT |
29 | #define FPU_WRITE_BIT 0x10 |
30 | ||
31 | static int reg_offset[] = { | |
3d0d14f9 IM |
32 | offsetof(struct info, ___eax), |
33 | offsetof(struct info, ___ecx), | |
34 | offsetof(struct info, ___edx), | |
35 | offsetof(struct info, ___ebx), | |
36 | offsetof(struct info, ___esp), | |
37 | offsetof(struct info, ___ebp), | |
38 | offsetof(struct info, ___esi), | |
39 | offsetof(struct info, ___edi) | |
1da177e4 LT |
40 | }; |
41 | ||
42 | #define REG_(x) (*(long *)(reg_offset[(x)]+(u_char *) FPU_info)) | |
43 | ||
44 | static int reg_offset_vm86[] = { | |
3d0d14f9 IM |
45 | offsetof(struct info, ___cs), |
46 | offsetof(struct info, ___vm86_ds), | |
47 | offsetof(struct info, ___vm86_es), | |
48 | offsetof(struct info, ___vm86_fs), | |
49 | offsetof(struct info, ___vm86_gs), | |
50 | offsetof(struct info, ___ss), | |
51 | offsetof(struct info, ___vm86_ds) | |
52 | }; | |
1da177e4 LT |
53 | |
54 | #define VM86_REG_(x) (*(unsigned short *) \ | |
55 | (reg_offset_vm86[((unsigned)x)]+(u_char *) FPU_info)) | |
56 | ||
464d1a78 | 57 | /* This dummy, gs is not saved on the stack. */ |
1da177e4 LT |
58 | #define ___GS ___ds |
59 | ||
60 | static int reg_offset_pm[] = { | |
3d0d14f9 IM |
61 | offsetof(struct info, ___cs), |
62 | offsetof(struct info, ___ds), | |
63 | offsetof(struct info, ___es), | |
64 | offsetof(struct info, ___fs), | |
65 | offsetof(struct info, ___GS), | |
66 | offsetof(struct info, ___ss), | |
67 | offsetof(struct info, ___ds) | |
68 | }; | |
1da177e4 LT |
69 | |
70 | #define PM_REG_(x) (*(unsigned short *) \ | |
71 | (reg_offset_pm[((unsigned)x)]+(u_char *) FPU_info)) | |
72 | ||
1da177e4 LT |
73 | /* Decode the SIB byte. This function assumes mod != 0 */ |
74 | static int sib(int mod, unsigned long *fpu_eip) | |
75 | { | |
3d0d14f9 IM |
76 | u_char ss, index, base; |
77 | long offset; | |
78 | ||
79 | RE_ENTRANT_CHECK_OFF; | |
80 | FPU_code_access_ok(1); | |
81 | FPU_get_user(base, (u_char __user *) (*fpu_eip)); /* The SIB byte */ | |
82 | RE_ENTRANT_CHECK_ON; | |
83 | (*fpu_eip)++; | |
84 | ss = base >> 6; | |
85 | index = (base >> 3) & 7; | |
86 | base &= 7; | |
87 | ||
88 | if ((mod == 0) && (base == 5)) | |
89 | offset = 0; /* No base register */ | |
90 | else | |
91 | offset = REG_(base); | |
92 | ||
93 | if (index == 4) { | |
94 | /* No index register */ | |
95 | /* A non-zero ss is illegal */ | |
96 | if (ss) | |
97 | EXCEPTION(EX_Invalid); | |
98 | } else { | |
99 | offset += (REG_(index)) << ss; | |
100 | } | |
101 | ||
102 | if (mod == 1) { | |
103 | /* 8 bit signed displacement */ | |
104 | long displacement; | |
105 | RE_ENTRANT_CHECK_OFF; | |
106 | FPU_code_access_ok(1); | |
107 | FPU_get_user(displacement, (signed char __user *)(*fpu_eip)); | |
108 | offset += displacement; | |
109 | RE_ENTRANT_CHECK_ON; | |
110 | (*fpu_eip)++; | |
111 | } else if (mod == 2 || base == 5) { /* The second condition also has mod==0 */ | |
112 | /* 32 bit displacement */ | |
113 | long displacement; | |
114 | RE_ENTRANT_CHECK_OFF; | |
115 | FPU_code_access_ok(4); | |
116 | FPU_get_user(displacement, (long __user *)(*fpu_eip)); | |
117 | offset += displacement; | |
118 | RE_ENTRANT_CHECK_ON; | |
119 | (*fpu_eip) += 4; | |
120 | } | |
1da177e4 | 121 | |
3d0d14f9 IM |
122 | return offset; |
123 | } | |
1da177e4 | 124 | |
3d0d14f9 | 125 | static unsigned long vm86_segment(u_char segment, struct address *addr) |
1da177e4 | 126 | { |
3d0d14f9 | 127 | segment--; |
1da177e4 | 128 | #ifdef PARANOID |
3d0d14f9 IM |
129 | if (segment > PREFIX_SS_) { |
130 | EXCEPTION(EX_INTERNAL | 0x130); | |
131 | math_abort(FPU_info, SIGSEGV); | |
132 | } | |
1da177e4 | 133 | #endif /* PARANOID */ |
3d0d14f9 IM |
134 | addr->selector = VM86_REG_(segment); |
135 | return (unsigned long)VM86_REG_(segment) << 4; | |
1da177e4 LT |
136 | } |
137 | ||
1da177e4 LT |
138 | /* This should work for 16 and 32 bit protected mode. */ |
139 | static long pm_address(u_char FPU_modrm, u_char segment, | |
140 | struct address *addr, long offset) | |
3d0d14f9 IM |
141 | { |
142 | struct desc_struct descriptor; | |
143 | unsigned long base_address, limit, address, seg_top; | |
1da177e4 | 144 | |
3d0d14f9 | 145 | segment--; |
1da177e4 LT |
146 | |
147 | #ifdef PARANOID | |
3d0d14f9 IM |
148 | /* segment is unsigned, so this also detects if segment was 0: */ |
149 | if (segment > PREFIX_SS_) { | |
150 | EXCEPTION(EX_INTERNAL | 0x132); | |
151 | math_abort(FPU_info, SIGSEGV); | |
152 | } | |
1da177e4 LT |
153 | #endif /* PARANOID */ |
154 | ||
3d0d14f9 IM |
155 | switch (segment) { |
156 | /* gs isn't used by the kernel, so it still has its | |
157 | user-space value. */ | |
158 | case PREFIX_GS_ - 1: | |
159 | /* N.B. - movl %seg, mem is a 2 byte write regardless of prefix */ | |
160 | savesegment(gs, addr->selector); | |
161 | break; | |
162 | default: | |
163 | addr->selector = PM_REG_(segment); | |
1da177e4 | 164 | } |
1da177e4 | 165 | |
3d0d14f9 IM |
166 | descriptor = LDT_DESCRIPTOR(PM_REG_(segment)); |
167 | base_address = SEG_BASE_ADDR(descriptor); | |
168 | address = base_address + offset; | |
169 | limit = base_address | |
170 | + (SEG_LIMIT(descriptor) + 1) * SEG_GRANULARITY(descriptor) - 1; | |
171 | if (limit < base_address) | |
172 | limit = 0xffffffff; | |
173 | ||
174 | if (SEG_EXPAND_DOWN(descriptor)) { | |
175 | if (SEG_G_BIT(descriptor)) | |
176 | seg_top = 0xffffffff; | |
177 | else { | |
178 | seg_top = base_address + (1 << 20); | |
179 | if (seg_top < base_address) | |
180 | seg_top = 0xffffffff; | |
181 | } | |
182 | access_limit = | |
183 | (address <= limit) || (address >= seg_top) ? 0 : | |
184 | ((seg_top - address) >= 255 ? 255 : seg_top - address); | |
185 | } else { | |
186 | access_limit = | |
187 | (address > limit) || (address < base_address) ? 0 : | |
188 | ((limit - address) >= 254 ? 255 : limit - address + 1); | |
189 | } | |
190 | if (SEG_EXECUTE_ONLY(descriptor) || | |
191 | (!SEG_WRITE_PERM(descriptor) && (FPU_modrm & FPU_WRITE_BIT))) { | |
192 | access_limit = 0; | |
193 | } | |
194 | return address; | |
195 | } | |
1da177e4 LT |
196 | |
197 | /* | |
198 | MOD R/M byte: MOD == 3 has a special use for the FPU | |
199 | SIB byte used iff R/M = 100b | |
200 | ||
201 | 7 6 5 4 3 2 1 0 | |
202 | ..... ......... ......... | |
203 | MOD OPCODE(2) R/M | |
204 | ||
1da177e4 LT |
205 | SIB byte |
206 | ||
207 | 7 6 5 4 3 2 1 0 | |
208 | ..... ......... ......... | |
209 | SS INDEX BASE | |
210 | ||
211 | */ | |
212 | ||
213 | void __user *FPU_get_address(u_char FPU_modrm, unsigned long *fpu_eip, | |
3d0d14f9 IM |
214 | struct address *addr, fpu_addr_modes addr_modes) |
215 | { | |
216 | u_char mod; | |
217 | unsigned rm = FPU_modrm & 7; | |
218 | long *cpu_reg_ptr; | |
219 | int address = 0; /* Initialized just to stop compiler warnings. */ | |
220 | ||
221 | /* Memory accessed via the cs selector is write protected | |
222 | in `non-segmented' 32 bit protected mode. */ | |
223 | if (!addr_modes.default_mode && (FPU_modrm & FPU_WRITE_BIT) | |
224 | && (addr_modes.override.segment == PREFIX_CS_)) { | |
225 | math_abort(FPU_info, SIGSEGV); | |
226 | } | |
227 | ||
228 | addr->selector = FPU_DS; /* Default, for 32 bit non-segmented mode. */ | |
229 | ||
230 | mod = (FPU_modrm >> 6) & 3; | |
231 | ||
232 | if (rm == 4 && mod != 3) { | |
233 | address = sib(mod, fpu_eip); | |
234 | } else { | |
235 | cpu_reg_ptr = ®_(rm); | |
236 | switch (mod) { | |
237 | case 0: | |
238 | if (rm == 5) { | |
239 | /* Special case: disp32 */ | |
240 | RE_ENTRANT_CHECK_OFF; | |
241 | FPU_code_access_ok(4); | |
242 | FPU_get_user(address, | |
243 | (unsigned long __user | |
244 | *)(*fpu_eip)); | |
245 | (*fpu_eip) += 4; | |
246 | RE_ENTRANT_CHECK_ON; | |
247 | addr->offset = address; | |
248 | return (void __user *)address; | |
249 | } else { | |
250 | address = *cpu_reg_ptr; /* Just return the contents | |
251 | of the cpu register */ | |
252 | addr->offset = address; | |
253 | return (void __user *)address; | |
254 | } | |
255 | case 1: | |
256 | /* 8 bit signed displacement */ | |
257 | RE_ENTRANT_CHECK_OFF; | |
258 | FPU_code_access_ok(1); | |
259 | FPU_get_user(address, (signed char __user *)(*fpu_eip)); | |
260 | RE_ENTRANT_CHECK_ON; | |
261 | (*fpu_eip)++; | |
262 | break; | |
263 | case 2: | |
264 | /* 32 bit displacement */ | |
265 | RE_ENTRANT_CHECK_OFF; | |
266 | FPU_code_access_ok(4); | |
267 | FPU_get_user(address, (long __user *)(*fpu_eip)); | |
268 | (*fpu_eip) += 4; | |
269 | RE_ENTRANT_CHECK_ON; | |
270 | break; | |
271 | case 3: | |
272 | /* Not legal for the FPU */ | |
273 | EXCEPTION(EX_Invalid); | |
274 | } | |
275 | address += *cpu_reg_ptr; | |
276 | } | |
277 | ||
278 | addr->offset = address; | |
279 | ||
280 | switch (addr_modes.default_mode) { | |
281 | case 0: | |
282 | break; | |
283 | case VM86: | |
284 | address += vm86_segment(addr_modes.override.segment, addr); | |
285 | break; | |
286 | case PM16: | |
287 | case SEG32: | |
288 | address = pm_address(FPU_modrm, addr_modes.override.segment, | |
289 | addr, address); | |
290 | break; | |
291 | default: | |
292 | EXCEPTION(EX_INTERNAL | 0x133); | |
293 | } | |
294 | ||
295 | return (void __user *)address; | |
296 | } | |
297 | ||
298 | void __user *FPU_get_address_16(u_char FPU_modrm, unsigned long *fpu_eip, | |
299 | struct address *addr, fpu_addr_modes addr_modes) | |
1da177e4 | 300 | { |
3d0d14f9 IM |
301 | u_char mod; |
302 | unsigned rm = FPU_modrm & 7; | |
303 | int address = 0; /* Default used for mod == 0 */ | |
304 | ||
305 | /* Memory accessed via the cs selector is write protected | |
306 | in `non-segmented' 32 bit protected mode. */ | |
307 | if (!addr_modes.default_mode && (FPU_modrm & FPU_WRITE_BIT) | |
308 | && (addr_modes.override.segment == PREFIX_CS_)) { | |
309 | math_abort(FPU_info, SIGSEGV); | |
310 | } | |
311 | ||
312 | addr->selector = FPU_DS; /* Default, for 32 bit non-segmented mode. */ | |
313 | ||
314 | mod = (FPU_modrm >> 6) & 3; | |
315 | ||
316 | switch (mod) { | |
1da177e4 | 317 | case 0: |
3d0d14f9 IM |
318 | if (rm == 6) { |
319 | /* Special case: disp16 */ | |
320 | RE_ENTRANT_CHECK_OFF; | |
321 | FPU_code_access_ok(2); | |
322 | FPU_get_user(address, | |
323 | (unsigned short __user *)(*fpu_eip)); | |
324 | (*fpu_eip) += 2; | |
325 | RE_ENTRANT_CHECK_ON; | |
326 | goto add_segment; | |
327 | } | |
328 | break; | |
1da177e4 | 329 | case 1: |
3d0d14f9 IM |
330 | /* 8 bit signed displacement */ |
331 | RE_ENTRANT_CHECK_OFF; | |
332 | FPU_code_access_ok(1); | |
333 | FPU_get_user(address, (signed char __user *)(*fpu_eip)); | |
334 | RE_ENTRANT_CHECK_ON; | |
335 | (*fpu_eip)++; | |
336 | break; | |
1da177e4 | 337 | case 2: |
3d0d14f9 IM |
338 | /* 16 bit displacement */ |
339 | RE_ENTRANT_CHECK_OFF; | |
340 | FPU_code_access_ok(2); | |
341 | FPU_get_user(address, (unsigned short __user *)(*fpu_eip)); | |
342 | (*fpu_eip) += 2; | |
343 | RE_ENTRANT_CHECK_ON; | |
344 | break; | |
1da177e4 | 345 | case 3: |
3d0d14f9 IM |
346 | /* Not legal for the FPU */ |
347 | EXCEPTION(EX_Invalid); | |
348 | break; | |
349 | } | |
350 | switch (rm) { | |
351 | case 0: | |
352 | address += FPU_info->___ebx + FPU_info->___esi; | |
353 | break; | |
354 | case 1: | |
355 | address += FPU_info->___ebx + FPU_info->___edi; | |
356 | break; | |
357 | case 2: | |
358 | address += FPU_info->___ebp + FPU_info->___esi; | |
359 | if (addr_modes.override.segment == PREFIX_DEFAULT) | |
360 | addr_modes.override.segment = PREFIX_SS_; | |
361 | break; | |
362 | case 3: | |
363 | address += FPU_info->___ebp + FPU_info->___edi; | |
364 | if (addr_modes.override.segment == PREFIX_DEFAULT) | |
365 | addr_modes.override.segment = PREFIX_SS_; | |
366 | break; | |
367 | case 4: | |
368 | address += FPU_info->___esi; | |
369 | break; | |
370 | case 5: | |
371 | address += FPU_info->___edi; | |
372 | break; | |
373 | case 6: | |
374 | address += FPU_info->___ebp; | |
375 | if (addr_modes.override.segment == PREFIX_DEFAULT) | |
376 | addr_modes.override.segment = PREFIX_SS_; | |
377 | break; | |
378 | case 7: | |
379 | address += FPU_info->___ebx; | |
380 | break; | |
1da177e4 | 381 | } |
1da177e4 | 382 | |
3d0d14f9 IM |
383 | add_segment: |
384 | address &= 0xffff; | |
1da177e4 | 385 | |
3d0d14f9 IM |
386 | addr->offset = address; |
387 | ||
388 | switch (addr_modes.default_mode) { | |
389 | case 0: | |
390 | break; | |
391 | case VM86: | |
392 | address += vm86_segment(addr_modes.override.segment, addr); | |
393 | break; | |
394 | case PM16: | |
395 | case SEG32: | |
396 | address = pm_address(FPU_modrm, addr_modes.override.segment, | |
397 | addr, address); | |
398 | break; | |
399 | default: | |
400 | EXCEPTION(EX_INTERNAL | 0x131); | |
1da177e4 | 401 | } |
3d0d14f9 IM |
402 | |
403 | return (void __user *)address; | |
1da177e4 | 404 | } |