regmap-i2c: Use i2c block command only if register value width is 8 bit
[deliverable/linux.git] / arch / x86 / mm / amdtopology.c
CommitLineData
3aa88cdf 1/*
eec1d4fa 2 * AMD NUMA support.
1da177e4 3 * Discover the memory map and associated nodes.
3aa88cdf 4 *
eec1d4fa 5 * This version reads it directly from the AMD northbridge.
3aa88cdf 6 *
1da177e4
LT
7 * Copyright 2002,2003 Andi Kleen, SuSE Labs.
8 */
9#include <linux/kernel.h>
10#include <linux/init.h>
11#include <linux/string.h>
12#include <linux/module.h>
13#include <linux/nodemask.h>
a9ce6bc1 14#include <linux/memblock.h>
2706a0bf 15#include <linux/bootmem.h>
a9ce6bc1 16
1da177e4
LT
17#include <asm/io.h>
18#include <linux/pci_ids.h>
cbf9bd60 19#include <linux/acpi.h>
1da177e4
LT
20#include <asm/types.h>
21#include <asm/mmzone.h>
22#include <asm/proto.h>
23#include <asm/e820.h>
24#include <asm/pci-direct.h>
25#include <asm/numa.h>
cbf9bd60
YL
26#include <asm/mpspec.h>
27#include <asm/apic.h>
23ac4ae8 28#include <asm/amd_nb.h>
1da177e4 29
f51bf307 30static unsigned char __initdata nodeids[8];
8ee2debc 31
1da177e4
LT
32static __init int find_northbridge(void)
33{
3aa88cdf 34 int num;
1da177e4 35
3aa88cdf 36 for (num = 0; num < 32; num++) {
1da177e4 37 u32 header;
3aa88cdf
CM
38
39 header = read_pci_config(0, num, 0, 0x00);
bb4a1d64
JD
40 if (header != (PCI_VENDOR_ID_AMD | (0x1100<<16)) &&
41 header != (PCI_VENDOR_ID_AMD | (0x1200<<16)) &&
42 header != (PCI_VENDOR_ID_AMD | (0x1300<<16)))
3aa88cdf 43 continue;
1da177e4 44
3aa88cdf 45 header = read_pci_config(0, num, 1, 0x00);
bb4a1d64
JD
46 if (header != (PCI_VENDOR_ID_AMD | (0x1101<<16)) &&
47 header != (PCI_VENDOR_ID_AMD | (0x1201<<16)) &&
48 header != (PCI_VENDOR_ID_AMD | (0x1301<<16)))
3aa88cdf
CM
49 continue;
50 return num;
51 }
1da177e4 52
940fed2e 53 return -ENOENT;
1da177e4
LT
54}
55
cbf9bd60
YL
56static __init void early_get_boot_cpu_id(void)
57{
58 /*
f6e9456c 59 * need to get the APIC ID of the BSP so can use that to
eec1d4fa 60 * create apicid_to_node in amd_scan_nodes()
cbf9bd60 61 */
a4caa18e 62#ifdef CONFIG_X86_MPPARSE
cbf9bd60
YL
63 /*
64 * get boot-time SMP configuration:
65 */
66 if (smp_found_config)
67 early_get_smp_config();
a4caa18e 68#endif
8ee2debc
DR
69}
70
940fed2e 71int __init amd_numa_init(void)
8ee2debc 72{
2706a0bf
TH
73 u64 start = PFN_PHYS(0);
74 u64 end = PFN_PHYS(max_pfn);
8ee2debc 75 unsigned numnodes;
2706a0bf 76 u64 prevbase;
45fe6c78 77 int i, j, nb;
d34c0895 78 u32 nodeid, reg;
45fe6c78 79 unsigned int bits, cores, apicid_base;
1da177e4 80
0637a70a 81 if (!early_pci_allowed())
940fed2e 82 return -EINVAL;
0637a70a 83
3aa88cdf
CM
84 nb = find_northbridge();
85 if (nb < 0)
1da177e4
LT
86 return nb;
87
1af5ba51 88 pr_info("Scanning NUMA topology in Northbridge %d\n", nb);
1da177e4 89
3aa88cdf 90 reg = read_pci_config(0, nb, 0, 0x60);
1da177e4 91 numnodes = ((reg >> 4) & 0xF) + 1;
3bea9c97 92 if (numnodes <= 1)
940fed2e 93 return -ENOENT;
1da177e4 94
8ee2debc 95 pr_info("Number of physical nodes %d\n", numnodes);
1da177e4 96
1da177e4 97 prevbase = 0;
3aa88cdf 98 for (i = 0; i < 8; i++) {
2706a0bf 99 u64 base, limit;
3aa88cdf 100
1da177e4
LT
101 base = read_pci_config(0, nb, 1, 0x40 + i*8);
102 limit = read_pci_config(0, nb, 1, 0x44 + i*8);
103
f51bf307 104 nodeids[i] = nodeid = limit & 7;
3aa88cdf 105 if ((base & 3) == 0) {
1da177e4 106 if (i < numnodes)
1af5ba51 107 pr_info("Skipping disabled node %d\n", i);
1da177e4 108 continue;
3aa88cdf 109 }
1da177e4 110 if (nodeid >= numnodes) {
2706a0bf 111 pr_info("Ignoring excess node %d (%Lx:%Lx)\n", nodeid,
1af5ba51 112 base, limit);
1da177e4 113 continue;
3aa88cdf 114 }
1da177e4 115
3aa88cdf 116 if (!limit) {
2706a0bf 117 pr_info("Skipping node entry %d (base %Lx)\n",
1af5ba51 118 i, base);
1da177e4
LT
119 continue;
120 }
121 if ((base >> 8) & 3 || (limit >> 8) & 3) {
2706a0bf 122 pr_err("Node %d using interleaving mode %Lx/%Lx\n",
1af5ba51 123 nodeid, (base >> 8) & 3, (limit >> 8) & 3);
940fed2e 124 return -EINVAL;
3aa88cdf 125 }
4697bdcc 126 if (node_isset(nodeid, numa_nodes_parsed)) {
1af5ba51
DR
127 pr_info("Node %d already present, skipping\n",
128 nodeid);
1da177e4
LT
129 continue;
130 }
131
3aa88cdf 132 limit >>= 16;
ffd10a2b 133 limit++;
7e9a2f0a 134 limit <<= 24;
1da177e4 135
8ee2debc
DR
136 if (limit > end)
137 limit = end;
1da177e4 138 if (limit <= base)
3aa88cdf
CM
139 continue;
140
1da177e4 141 base >>= 16;
3aa88cdf
CM
142 base <<= 24;
143
144 if (base < start)
145 base = start;
146 if (limit > end)
147 limit = end;
148 if (limit == base) {
1af5ba51 149 pr_err("Empty node %d\n", nodeid);
3aa88cdf 150 continue;
1da177e4 151 }
3aa88cdf 152 if (limit < base) {
2706a0bf 153 pr_err("Node %d bogus settings %Lx-%Lx.\n",
3aa88cdf 154 nodeid, base, limit);
1da177e4 155 continue;
3aa88cdf
CM
156 }
157
1da177e4 158 /* Could sort here, but pun for now. Should not happen anyroads. */
3aa88cdf 159 if (prevbase > base) {
2706a0bf 160 pr_err("Node map not sorted %Lx,%Lx\n",
3aa88cdf 161 prevbase, base);
940fed2e 162 return -EINVAL;
1da177e4 163 }
3aa88cdf 164
2706a0bf 165 pr_info("Node %d MemBase %016Lx Limit %016Lx\n",
1af5ba51 166 nodeid, base, limit);
3aa88cdf 167
1da177e4 168 prevbase = base;
91556237 169 numa_add_memblk(nodeid, base, limit);
92d4a437 170 node_set(nodeid, numa_nodes_parsed);
3aa88cdf 171 }
1da177e4 172
4697bdcc 173 if (!nodes_weight(numa_nodes_parsed))
940fed2e 174 return -ENOENT;
45fe6c78
TH
175
176 /*
177 * We seem to have valid NUMA configuration. Map apicids to nodes
178 * using the coreid bits from early_identify_cpu.
179 */
180 bits = boot_cpu_data.x86_coreid_bits;
181 cores = 1 << bits;
182 apicid_base = 0;
183
184 /* get the APIC ID of the BSP early for systems with apicid lifting */
185 early_get_boot_cpu_id();
186 if (boot_cpu_physical_apicid > 0) {
187 pr_info("BSP APIC ID: %02x\n", boot_cpu_physical_apicid);
188 apicid_base = boot_cpu_physical_apicid;
189 }
190
92d4a437 191 for_each_node_mask(i, numa_nodes_parsed)
45fe6c78
TH
192 for (j = apicid_base; j < cores + apicid_base; j++)
193 set_apicid_to_node((i << bits) + j, i);
194
8ee2debc
DR
195 return 0;
196}
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