Merge branch 'nvmf-4.8-rc' of git://git.infradead.org/nvme-fabrics into for-linus
[deliverable/linux.git] / arch / x86 / mm / amdtopology.c
CommitLineData
3aa88cdf 1/*
eec1d4fa 2 * AMD NUMA support.
1da177e4 3 * Discover the memory map and associated nodes.
3aa88cdf 4 *
eec1d4fa 5 * This version reads it directly from the AMD northbridge.
3aa88cdf 6 *
1da177e4
LT
7 * Copyright 2002,2003 Andi Kleen, SuSE Labs.
8 */
9#include <linux/kernel.h>
10#include <linux/init.h>
11#include <linux/string.h>
1da177e4 12#include <linux/nodemask.h>
a9ce6bc1 13#include <linux/memblock.h>
2706a0bf 14#include <linux/bootmem.h>
a9ce6bc1 15
1da177e4
LT
16#include <asm/io.h>
17#include <linux/pci_ids.h>
cbf9bd60 18#include <linux/acpi.h>
1da177e4
LT
19#include <asm/types.h>
20#include <asm/mmzone.h>
21#include <asm/proto.h>
22#include <asm/e820.h>
23#include <asm/pci-direct.h>
24#include <asm/numa.h>
cbf9bd60
YL
25#include <asm/mpspec.h>
26#include <asm/apic.h>
23ac4ae8 27#include <asm/amd_nb.h>
1da177e4 28
f51bf307 29static unsigned char __initdata nodeids[8];
8ee2debc 30
1da177e4
LT
31static __init int find_northbridge(void)
32{
3aa88cdf 33 int num;
1da177e4 34
3aa88cdf 35 for (num = 0; num < 32; num++) {
1da177e4 36 u32 header;
3aa88cdf
CM
37
38 header = read_pci_config(0, num, 0, 0x00);
bb4a1d64
JD
39 if (header != (PCI_VENDOR_ID_AMD | (0x1100<<16)) &&
40 header != (PCI_VENDOR_ID_AMD | (0x1200<<16)) &&
41 header != (PCI_VENDOR_ID_AMD | (0x1300<<16)))
3aa88cdf 42 continue;
1da177e4 43
3aa88cdf 44 header = read_pci_config(0, num, 1, 0x00);
bb4a1d64
JD
45 if (header != (PCI_VENDOR_ID_AMD | (0x1101<<16)) &&
46 header != (PCI_VENDOR_ID_AMD | (0x1201<<16)) &&
47 header != (PCI_VENDOR_ID_AMD | (0x1301<<16)))
3aa88cdf
CM
48 continue;
49 return num;
50 }
1da177e4 51
940fed2e 52 return -ENOENT;
1da177e4
LT
53}
54
cbf9bd60
YL
55static __init void early_get_boot_cpu_id(void)
56{
57 /*
f6e9456c 58 * need to get the APIC ID of the BSP so can use that to
eec1d4fa 59 * create apicid_to_node in amd_scan_nodes()
cbf9bd60 60 */
a4caa18e 61#ifdef CONFIG_X86_MPPARSE
cbf9bd60
YL
62 /*
63 * get boot-time SMP configuration:
64 */
65 if (smp_found_config)
66 early_get_smp_config();
a4caa18e 67#endif
8ee2debc
DR
68}
69
940fed2e 70int __init amd_numa_init(void)
8ee2debc 71{
2706a0bf
TH
72 u64 start = PFN_PHYS(0);
73 u64 end = PFN_PHYS(max_pfn);
8ee2debc 74 unsigned numnodes;
2706a0bf 75 u64 prevbase;
45fe6c78 76 int i, j, nb;
d34c0895 77 u32 nodeid, reg;
45fe6c78 78 unsigned int bits, cores, apicid_base;
1da177e4 79
0637a70a 80 if (!early_pci_allowed())
940fed2e 81 return -EINVAL;
0637a70a 82
3aa88cdf
CM
83 nb = find_northbridge();
84 if (nb < 0)
1da177e4
LT
85 return nb;
86
1af5ba51 87 pr_info("Scanning NUMA topology in Northbridge %d\n", nb);
1da177e4 88
3aa88cdf 89 reg = read_pci_config(0, nb, 0, 0x60);
1da177e4 90 numnodes = ((reg >> 4) & 0xF) + 1;
3bea9c97 91 if (numnodes <= 1)
940fed2e 92 return -ENOENT;
1da177e4 93
8ee2debc 94 pr_info("Number of physical nodes %d\n", numnodes);
1da177e4 95
1da177e4 96 prevbase = 0;
3aa88cdf 97 for (i = 0; i < 8; i++) {
2706a0bf 98 u64 base, limit;
3aa88cdf 99
1da177e4
LT
100 base = read_pci_config(0, nb, 1, 0x40 + i*8);
101 limit = read_pci_config(0, nb, 1, 0x44 + i*8);
102
f51bf307 103 nodeids[i] = nodeid = limit & 7;
3aa88cdf 104 if ((base & 3) == 0) {
1da177e4 105 if (i < numnodes)
1af5ba51 106 pr_info("Skipping disabled node %d\n", i);
1da177e4 107 continue;
3aa88cdf 108 }
1da177e4 109 if (nodeid >= numnodes) {
2706a0bf 110 pr_info("Ignoring excess node %d (%Lx:%Lx)\n", nodeid,
1af5ba51 111 base, limit);
1da177e4 112 continue;
3aa88cdf 113 }
1da177e4 114
3aa88cdf 115 if (!limit) {
2706a0bf 116 pr_info("Skipping node entry %d (base %Lx)\n",
1af5ba51 117 i, base);
1da177e4
LT
118 continue;
119 }
120 if ((base >> 8) & 3 || (limit >> 8) & 3) {
2706a0bf 121 pr_err("Node %d using interleaving mode %Lx/%Lx\n",
1af5ba51 122 nodeid, (base >> 8) & 3, (limit >> 8) & 3);
940fed2e 123 return -EINVAL;
3aa88cdf 124 }
4697bdcc 125 if (node_isset(nodeid, numa_nodes_parsed)) {
1af5ba51
DR
126 pr_info("Node %d already present, skipping\n",
127 nodeid);
1da177e4
LT
128 continue;
129 }
130
3aa88cdf 131 limit >>= 16;
ffd10a2b 132 limit++;
7e9a2f0a 133 limit <<= 24;
1da177e4 134
8ee2debc
DR
135 if (limit > end)
136 limit = end;
1da177e4 137 if (limit <= base)
3aa88cdf
CM
138 continue;
139
1da177e4 140 base >>= 16;
3aa88cdf
CM
141 base <<= 24;
142
143 if (base < start)
144 base = start;
145 if (limit > end)
146 limit = end;
147 if (limit == base) {
1af5ba51 148 pr_err("Empty node %d\n", nodeid);
3aa88cdf 149 continue;
1da177e4 150 }
3aa88cdf 151 if (limit < base) {
2706a0bf 152 pr_err("Node %d bogus settings %Lx-%Lx.\n",
3aa88cdf 153 nodeid, base, limit);
1da177e4 154 continue;
3aa88cdf
CM
155 }
156
1da177e4 157 /* Could sort here, but pun for now. Should not happen anyroads. */
3aa88cdf 158 if (prevbase > base) {
2706a0bf 159 pr_err("Node map not sorted %Lx,%Lx\n",
3aa88cdf 160 prevbase, base);
940fed2e 161 return -EINVAL;
1da177e4 162 }
3aa88cdf 163
2706a0bf 164 pr_info("Node %d MemBase %016Lx Limit %016Lx\n",
1af5ba51 165 nodeid, base, limit);
3aa88cdf 166
1da177e4 167 prevbase = base;
91556237 168 numa_add_memblk(nodeid, base, limit);
92d4a437 169 node_set(nodeid, numa_nodes_parsed);
3aa88cdf 170 }
1da177e4 171
4697bdcc 172 if (!nodes_weight(numa_nodes_parsed))
940fed2e 173 return -ENOENT;
45fe6c78
TH
174
175 /*
176 * We seem to have valid NUMA configuration. Map apicids to nodes
177 * using the coreid bits from early_identify_cpu.
178 */
179 bits = boot_cpu_data.x86_coreid_bits;
180 cores = 1 << bits;
181 apicid_base = 0;
182
183 /* get the APIC ID of the BSP early for systems with apicid lifting */
184 early_get_boot_cpu_id();
185 if (boot_cpu_physical_apicid > 0) {
186 pr_info("BSP APIC ID: %02x\n", boot_cpu_physical_apicid);
187 apicid_base = boot_cpu_physical_apicid;
188 }
189
92d4a437 190 for_each_node_mask(i, numa_nodes_parsed)
45fe6c78
TH
191 for (j = apicid_base; j < cores + apicid_base; j++)
192 set_apicid_to_node((i << bits) + j, i);
193
8ee2debc
DR
194 return 0;
195}
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